Display panel and display device

Abstract

The invention relates to a display panel and a display device. The display panel comprises a substrate; a pixel located on one side of the substrate; the first insulating layer is positioned on one side, away from the substrate, of the pixel; the array composite layer is located on the side, away from the substrate, of the first insulating layer; the first through hole at least penetrates through the first insulating layer; wherein the array composite layer is electrically connected with the corresponding pixels through the corresponding first through holes. According to the invention, the flexibility of film layer structure setting and the flexibility of a driving mode of the display panel can be improved.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display panel and display device. Background Technology

[0002] Micro-element technology refers to the high-density integration of arrays of tiny components on a substrate. As an emerging display technology, micro-element displays offer several advantages over liquid crystal displays (LCDs), such as lower power consumption, wider color gamut, faster response times, and less stringent requirements for water and oxygen isolation during encapsulation. Therefore, mini-LEDs and micro-LEDs are considered highly promising display technologies.

[0003] However, the related technologies still have issues with the need to improve the membrane structure to enhance the flexibility of membrane structure setup and driving method. Summary of the Invention

[0004] Therefore, it is necessary to provide a display panel and display device that aims to solve the problem that the film structure of related technologies still needs to be improved to enhance the flexibility of film structure setting and driving method.

[0005] In a first aspect, embodiments of this application provide a display panel, including:

[0006] Base;

[0007] A pixel is located on one side of the substrate;

[0008] A first insulating layer is located on the side of the pixel away from the substrate;

[0009] An array composite layer is located on the side of the first insulating layer away from the substrate;

[0010] The first through-hole penetrates at least the first insulating layer;

[0011] The array composite layer is electrically connected to the corresponding pixel through the corresponding first through-hole.

[0012] Secondly, based on the same application concept, embodiments of this application also provide a display device, which includes any of the display panels provided in the first aspect.

[0013] In this embodiment, the display panel includes a substrate, pixels, a first insulating layer, an array composite layer, and a first through-hole. The pixels are located on one side of the substrate; the first insulating layer is located on the side of the pixels away from the substrate; the array composite layer is located on the side of the first insulating layer away from the substrate; the first through-hole penetrates at least the first insulating layer; wherein the array composite layer is electrically connected to the corresponding pixels through the corresponding first through-hole. That is, in the manufacturing process of the display panel, pixels are first fabricated / bonded on the substrate, and then the array composite layer is fabricated on the side of the pixels away from the substrate; that is, the array composite layer is located on the side of the pixels away from the substrate. The array composite layer being located on the side of the pixels away from the substrate provides a new film layer structure for the display panel; control signals / electrical signals are transmitted to the pixels in the direction of the substrate after passing through the array composite layer, providing a new driving method for electrical signals. The display panel can have a more flexible film layer structure and a more flexible driving method. Various types of pixels / light-emitting elements can be set in the pixels of the display panel, and the display panel can also have good display effects. Attached Figure Description

[0014] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0015] Figure 1 This is a schematic diagram of a first cross-sectional structure of a display panel provided in an embodiment of this application.

[0016] Figure 2 This is a schematic diagram of a second cross-sectional structure of a display panel provided in an embodiment of this application.

[0017] Figure 3 This is a schematic diagram of a third cross-sectional structure of a display panel provided in an embodiment of this application.

[0018] Figure 4 This is a schematic diagram of a fourth cross-sectional structure of a display panel provided in an embodiment of this application.

[0019] Figure 5 This is a schematic diagram of a second wiring in a display panel provided in an embodiment of this application.

[0020] Figure 6 This is a schematic diagram of the first intermediate process of a method for manufacturing a display panel according to an embodiment of this application.

[0021] Figure 7 This is a schematic diagram of a second intermediate process of a method for manufacturing a display panel according to an embodiment of this application.

[0022] Figure 8 This is a schematic diagram of a third intermediate process in a method for manufacturing a display panel according to an embodiment of this application.

[0023] Figure 9 This is a schematic diagram of the fourth intermediate process of a method for manufacturing a display panel according to an embodiment of this application.

[0024] Figure 10 This is a schematic diagram of a display device provided in an embodiment of this application.

[0025] Explanation of reference numerals in the attached figures:

[0026] Display device 200; display panel 100; substrate 11; pixel PX; first through hole 12k1; first electrode 181; first sub-part 181a; second sub-part 181b; driving circuit QD; thin film transistor T1; light-shielding layer 19; first light-shielding part 191; light-shielding opening 191k; first sub-light-shielding part 1911; second electrode D2; pixel body PX01; first sub-electrode PX02; second sub-electrode PX03; first trace 132; second through hole 12k2; driving chip 40; first driving signal line 211; circuit board 50;

[0027] First insulating layer 12; array composite layer 10Z; light-shielding metal layer 13; third insulating layer 14; semiconductor layer 15; second insulating layer 16; source-drain metal layer 17; fourth insulating layer PLN; encapsulation layer 31; active part 151; third via 16k1; light-shielding part 131; source 171; drain 172; first metal layer 21; display area AA; non-display area BB; gap 101; second trace 102; first conductive layer 18. Detailed Implementation

[0028] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings. Preferred embodiments of this application are shown in the drawings. However, this application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the disclosure of this application.

[0029] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0030] When describing positional relationships, unless otherwise specified, when an element, such as a layer, film, or substrate, is referred to as being "on" another element, it may be directly on the other element or there may be intermediate elements present. Furthermore, when a layer is referred to as being "below" another layer, it may be directly below it or there may be one or more intermediate elements present. It is also understood that when a layer is referred to as being "between" two layers, it may be the only layer between the two layers, or there may be one or more intermediate elements present.

[0031] When using the terms “including,” “having,” and “comprising” as described herein, another component may be added unless explicitly qualifying terms such as “only,” “consisting of,” etc. are used. Unless otherwise stated, singular terms may include plural forms and should not be construed as having a quantity of one.

[0032] It should be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, without departing from the scope of this application, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element.

[0033] It should also be understood that, in interpreting an element, although not explicitly described, the element is interpreted as including a range of error, which should be within the acceptable deviation range of a particular value as determined by a person skilled in the art. For example, "approximately," "about," or "substantially" can mean within one or more standard deviations, without limitation herein.

[0034] Furthermore, in the instruction manual, the phrase "planar distribution diagram" refers to the diagram when the target part is viewed from above, and the phrase "cross-sectional diagram" refers to the diagram when the target part is viewed from the side as a cross-section taken by vertically cutting the target part.

[0035] Furthermore, the accompanying drawings are not drawn to a 1:1 scale, and the relative dimensions of the components are shown in the drawings only as examples and not necessarily to actual scale.

[0036] Various modifications and variations can be made to this application without departing from its spirit or scope, which will be apparent to those skilled in the art. Therefore, this application is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the implementation methods provided in the embodiments of this application can be combined with each other without contradiction.

[0037] The related technologies suffer from limitations in film layer structure, which requires further improvement to enhance the flexibility of film layer structure placement and driving methods. In these technologies, an array composite layer is first fabricated on a substrate, and then pixels are fabricated / bonded on the side of the array composite layer away from the substrate. The array composite layer may include structures such as driving circuits, which include thin-film transistors (TFTs) and / or driving traces. The pixels can be light-emitting diodes (LEDs), and the active portion of the TFT is located between the pixel and the substrate. This film layer structure, where the array composite layer is fixed between the substrate and the pixel, results in insufficient flexibility in the film layer structure and driving methods of the display panel.

[0038] Based on the aforementioned technical problems, the inventors discovered that a display panel includes a substrate, pixels, a first insulating layer, an array composite layer, and a first through-hole. The pixels are located on one side of the substrate; the first insulating layer is located on the side of the pixels away from the substrate; the array composite layer is located on the side of the first insulating layer away from the substrate; the first through-hole penetrates at least the first insulating layer; wherein the array composite layer is electrically connected to the corresponding pixels through the corresponding first through-hole. That is, in the manufacturing process of the display panel, pixels are first fabricated / bonded on the substrate, and then the array composite layer is fabricated on the side of the pixels away from the substrate; i.e., the array composite layer is located on the side of the pixels away from the substrate. The array composite layer being located on the side of the pixels away from the substrate provides a new film layer structure for the display panel; control signals / electrical signals are transmitted to the pixels in the direction towards the substrate after passing through the array composite layer, providing a new driving method for electrical signals. The display panel can have a more flexible film layer structure and a more flexible driving method. Various types of pixels / light-emitting elements can be set in the pixels of the display panel, and the display panel can also have good display effects.

[0039] The above is the core idea of ​​this application. The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0040] Please see Figures 1 to 5 . Figure 1 This is a schematic diagram of a first cross-sectional structure of a display panel provided in an embodiment of this application. Figure 2 This is a schematic diagram of a second cross-sectional structure of a display panel provided in an embodiment of this application. Figure 3 This is a schematic diagram of a third cross-sectional structure of a display panel provided in an embodiment of this application. Figure 4 This is a schematic diagram of a fourth cross-sectional structure of a display panel provided in an embodiment of this application. Figure 5 This is a schematic diagram of a second wiring in a display panel provided in an embodiment of this application.

[0041] This application provides a display panel 100, which includes a substrate 11, a pixel PX, a first insulating layer 12, an array composite layer 10Z, and a first through-hole 12k1. The pixel PX is located on one side of the substrate 11; the first insulating layer 12 is located on the side of the pixel PX away from the substrate 11; the array composite layer 10Z is located on the side of the first insulating layer 12 away from the substrate 11; the first through-hole 12k1 at least penetrates the first insulating layer 12; wherein, the array composite layer 10Z is electrically connected to the corresponding pixel PX through the corresponding first through-hole 12k1.

[0042] For example, a pixel PX can be a mini light-emitting diode (Mini LED) or a micro light-emitting diode (MicroLED), and a pixel PX can be an organic light-emitting diode (OLED), but is not limited to these.

[0043] For example, pixel PX is located on one side of substrate 11; first insulating layer 12 is located on the side of pixel PX away from substrate 11; array composite layer 10Z is located on the side of first insulating layer 12 away from substrate 11. That is, in the manufacturing process of display panel 100, pixel PX is first fabricated / bonded on substrate 11, and then array composite layer 10Z is fabricated on the side of pixel PX away from substrate 11; that is, array composite layer 10Z is located on the side of pixel PX away from substrate 11.

[0044] In this embodiment, the display panel 100 includes a substrate 11, a pixel PX, a first insulating layer 12, an array composite layer 10Z, and a first via 12k1. The pixel PX is located on one side of the substrate 11; the first insulating layer 12 is located on the side of the pixel PX away from the substrate 11; the array composite layer 10Z is located on the side of the first insulating layer 12 away from the substrate 11; the first via 12k1 at least penetrates the first insulating layer 12; wherein, the array composite layer 10Z is electrically connected to the corresponding pixel PX through the corresponding first via 12k1. In the manufacturing process of the display panel 100, pixels PX are first fabricated / bonded on the substrate 11, and then an array composite layer 10Z is fabricated on the side of the pixel PX away from the substrate 11. That is, the array composite layer 10Z is located on the side of the pixel PX away from the substrate 11, providing a new film layer structure for the display panel 100. After the control signal / electrical signal passes through the array composite layer 10Z, it is transmitted to the pixel PX in the direction of the substrate 11, providing a new driving method for the electrical signal. The display panel 100 can have a more flexible film layer structure and a more flexible driving method. Various types of pixels can be set in the pixel PX of the display panel 100, and the display panel 100 can also have a good display effect.

[0045] In some implementations, such as Figure 1 and Figure 2 As shown, the display panel 100 also includes a plurality of first electrodes 181. The plurality of first electrodes 181 are located between the corresponding pixel PX and the substrate 11. The first electrode 181 includes a first sub-part 181a and a second sub-part 181b. The orthographic projection of the first sub-part 181a on the substrate 11 overlaps with the orthographic projection of the corresponding pixel PX on the substrate 11. The orthographic projection of the second sub-part 181b on the substrate 11 does not overlap with the orthographic projection of the corresponding pixel PX on the substrate 11. The orthographic projection of the first via 12k1 on the substrate 11 overlaps with at least a portion of the orthographic projection of the corresponding second sub-part 181b on the substrate 11. The array composite layer 10Z includes a plurality of driving circuits QD. The pixel PX is electrically connected to the corresponding first electrode 181, and the driving circuit QD is electrically connected to the second sub-part 181b through the corresponding first via 12k1.

[0046] For example, such as Figure 1 and Figure 2As shown, the orthographic projection of the first sub-part 181a onto the substrate 11 overlaps with the orthographic projection of the corresponding pixel PX onto the substrate 11; the orthographic projection of the second sub-part 181b onto the substrate 11 does not overlap with the orthographic projection of the corresponding pixel PX onto the substrate 11; the orthographic projection of the first via 12k1 onto the substrate 11 overlaps with at least a portion of the corresponding second sub-part 181b onto the substrate 11. For example, viewed from the side of the array composite layer 10Z away from the substrate 11, the second sub-part 181b of the first electrode 181 is exposed outside the pixel PX, and is not covered by the pixel PX. The first via 12k1 can extend to the surface of the second sub-part 181b away from the substrate 11, thereby allowing the driving circuit QD to be electrically connected to the second sub-part 181b through the corresponding first via 12k1.

[0047] For example, such as Figure 1 and Figure 2 As shown, the driving circuit QD may include a thin-film transistor T1. The driving circuit QD can control whether the pixel PX emits light. The structure and function of the driving circuit QD are not limited to this.

[0048] In some implementations, such as Figure 1 and Figure 2 As shown, the display panel 100 also includes a light-shielding layer 19. The light-shielding layer 19 includes a first light-shielding portion 191 and a plurality of light-shielding openings 191k surrounding the first light-shielding portion 191. The first light-shielding portion 191 is located at least between two adjacent pixels PX, and the light-shielding openings 191k expose at least a portion of the surface of the pixel PX away from the substrate 11.

[0049] For example, such as Figure 1 and Figure 2 As shown, the material of the light-shielding layer 19 may include, but is not limited to, black ink.

[0050] For example, such as Figure 1 and Figure 2 As shown, the light-shielding opening 191k exposes at least a portion of the surface of pixel PX away from the substrate 11, so that light emitted from pixel PX can exit through the light-shielding opening 191k.

[0051] In some implementations, such as Figure 1 and Figure 2 As shown, the first light-shielding part 191 includes a first sub-light-shielding part 1911 located on the side of the second sub-part 181b away from the substrate 11 of the first electrode 181, and the first through hole 12k1 also penetrates the first sub-light-shielding part 1911.

[0052] For example, such as Figure 1 and Figure 2As shown, the first sub-shading part 1911 is located on the side of the second sub-part 181b of the first electrode 181 away from the substrate 11. The first through hole 12k1 also penetrates the first sub-shading part 1911, so that the drive circuit QD and the like can be electrically connected to the second sub-part 181b through the corresponding first through hole 12k1.

[0053] In some implementations, such as Figure 1 As shown, the display panel 100 also includes a plurality of second electrodes D2. The plurality of second electrodes D2 are located between the corresponding pixel PX and the substrate 11; the pixel PX includes a pixel body PX01, a first sub-electrode PX02 and a second sub-electrode PX03, the first sub-electrode PX02 is located between the pixel body PX01 and the substrate 11, the second sub-electrode PX03 is located between the pixel body PX01 and the substrate 11, the first sub-electrode PX02 is electrically connected to the corresponding first electrode 181, and the second sub-electrode PX03 is electrically connected to the corresponding second electrode D2.

[0054] For example, such as Figure 1 As shown, the first electrode 181 and the second electrode D2 are both located between the corresponding pixel PX and the substrate 11, and the first sub-electrode PX02 and the second sub-electrode PX03 are located between the pixel body PX01 and the substrate 11, or the first sub-electrode PX02 and the second sub-electrode PX03 are located between the first electrode 181 and the second electrode D2 and the substrate 11.

[0055] For example, such as Figure 1 As shown, when pixel PX is a light-emitting diode, the first sub-electrode PX02 and the first electrode 181 can be electrically connected through a first bonding layer (not shown in the figure), and the second sub-electrode PX03 and the second electrode D2 can be electrically connected through a second bonding layer (not shown in the figure). The first bonding layer and the second bonding layer can be connected to the electrodes on both sides after laser irradiation, but this is not limited to this. For example, without setting the first bonding layer and the second bonding layer, the first sub-electrode PX02 can be directly connected to the first electrode 181 and the second sub-electrode PX03 can be directly connected to the second electrode D2 through laser irradiation.

[0056] For example, such as Figure 1 As shown, the display panel 100 includes a first conductive layer 18 located on a substrate 11, and the first conductive layer 18 includes a first electrode 181 and a second electrode D2.

[0057] For example, such as Figure 1 As shown, but not limited to Figure 1For example, when some metal films (e.g., the first electrode and the second electrode, the first bonding layer and the second bonding layer) in the array composite layer 10Z are prepared by electron beam evaporation, compared with related technologies, it is possible to avoid the damage to the Si-O bonds or Si-Si bonds of the active part in the thin film transistor by irradiation by lasers or X-rays, thereby avoiding the performance degradation of the driving circuit.

[0058] In some implementations, such as Figure 2 As shown, pixel PX includes pixel body PX01, first sub-electrode PX02 and second sub-electrode PX03. The first sub-electrode PX02 is located between pixel body PX01 and substrate 11, and the second sub-electrode PX03 is located on the side of pixel body PX01 away from substrate 11. Array composite layer 10Z includes at least one first trace 132. Display panel 100 includes a second through hole 12k2. The second through hole 12k2 at least penetrates the first insulating layer 12. The first trace 132 is electrically connected to the corresponding second sub-electrode PX03 through the second through hole 12k2.

[0059] For example, such as Figure 2 As shown, in a direction perpendicular to the plane of the substrate 11, the first sub-electrode PX02, the pixel body PX01, and the second sub-electrode PX03 are stacked. The second sub-electrode PX03 is located on the side of the pixel body PX01 away from the substrate 11. The first sub-electrode PX02 is located between the pixel body PX01 and the substrate 11 / first electrode 181. The first sub-electrode PX02 is electrically connected to the corresponding first electrode 181. The driving circuit QD is electrically connected to the second sub-part 181b through the corresponding first through hole 12k1.

[0060] For example, such as Figure 2 As shown, in some embodiments, the second electrode D2 may not be provided in the display panel 100, and the first trace 132 is directly electrically connected to the corresponding second sub-electrode PX03 through the second through hole 12k2, which can reduce the number of manufacturing process steps and the complexity of the film layer.

[0061] For example, such as Figure 2 As shown, in some other embodiments, the second electrode D2 may not be provided separately in the display panel 100, and a portion of the first trace 132 may be the second electrode D2.

[0062] In some implementations, such as Figure 3As shown, the display panel 100 also includes a plurality of second electrodes D2. The plurality of second electrodes D2 are located between the corresponding pixel PX and the substrate 11; the pixel PX includes a pixel body PX01, a first sub-electrode PX02 and a second sub-electrode PX03, the second sub-electrode PX03 is located between the pixel body PX01 and the substrate 11, and the first sub-electrode PX02 is located on the side of the pixel body PX01 away from the substrate 11; the array composite layer 10Z includes a plurality of driving circuits QD, the second sub-electrode PX03 is electrically connected to the corresponding second electrode D2, and the driving circuit QD is electrically connected to the corresponding first sub-electrode PX02 through the first through hole 12k1.

[0063] For example, such as Figure 3 As shown, in a direction perpendicular to the plane of the substrate 11, the second sub-electrode PX03, the pixel body PX01, and the first sub-electrode PX02 are stacked. The first sub-electrode PX02 is located on the side of the pixel body PX01 away from the substrate 11. The second sub-electrode PX03 is located between the pixel body PX01 and the substrate 11 / second electrode D2. The second sub-electrode PX03 is electrically connected to the corresponding second electrode D2. The driving circuit QD is electrically connected to the first sub-electrode PX02 through the corresponding first through hole 12k1.

[0064] For example, such as Figure 3 As shown, the orthographic projection of the first through-hole 12k1 on the substrate at least partially overlaps with the orthographic projection of the pixel body PX01 on the substrate, but is not limited thereto.

[0065] For example, such as Figure 2 As shown, in some embodiments, the first electrode 181 may not be provided in the display panel 100, and the driving circuit QD is directly electrically connected to the corresponding first sub-electrode PX02 through the first through hole 12k1, which can reduce the number of manufacturing process steps and the complexity of the film layer.

[0066] For example, such as Figure 2 As shown, in some other embodiments, the first electrode 181 may not be separately provided in the display panel 100, and a portion of the driving circuit QD may be the first electrode 181.

[0067] For example, such as Figure 2 and Figure 3 As shown, but not limited to Figure 2 and Figure 3For example, when the first sub-electrode (e.g., anode) and the second sub-electrode (e.g., cathode) of pixel PX are stacked on both sides of the pixel PX body (light-emitting body) in a direction perpendicular to the plane of substrate 11, compared with related technologies, the problem that the first or second sub-electrode located on the side of pixel PX body away from substrate 11 is difficult to electrically connect with the electrodes on the array composite layer 10Z can be solved. This makes it easier for the driving circuit in the array composite layer 10Z to electrically connect with the first and / or second sub-electrodes on both sides of pixel PX body.

[0068] In some implementations, combined Figure 5 As shown, at least a portion of the second sub-electrodes PX03 are electrically connected to each other.

[0069] For example, combined Figure 5 As shown, one of the first sub-electrode PX02 and the second sub-electrode PX03 is the anode, and the other is the cathode.

[0070] For example, combined Figure 5 As shown, the first sub-electrode PX02 is a pixel electrode, and the second sub-electrode PX03 is a common electrode. For example, at least a portion of the second sub-electrodes PX03 are electrically connected to each other, and the second sub-electrodes PX03 serve as a common electrode. At least a portion of the second sub-electrodes PX03 can be provided with a common signal by the second trace 102 in the non-display area, and the second trace 102 is electrically connected to the display chip and / or circuit board 50.

[0071] In some implementations, such as Figure 4 As shown, the display panel 100 also includes multiple driver chips 40. The driver chip 40 is located between two adjacent pixels PX and is electrically connected to the corresponding pixel PX; the array composite layer 10Z includes multiple first drive signal lines 211, and the first drive signal lines 211 are electrically connected to the corresponding driver chip 40 through the corresponding first through hole 12k1.

[0072] For example, such as Figure 4 As shown, the driver chip 40 is a micro IC (micro driver chip). A micro IC is a silicon-based discrete integrated circuit (micro integrated circuit) with PWM drive. It can be used to achieve precise control of light-emitting diodes such as microLEDs.

[0073] For example, such as Figure 4As shown, the driver chip 40 is located between two adjacent pixels PX and is electrically connected to the corresponding pixel PX. The first driving signal line 211 is electrically connected to the corresponding driver chip 40 through the corresponding first through-hole 12k1. After the first driving signal line 211 provides an electrical signal to the driver chip 40, the driver chip 40 can drive and control the pixel PX to emit light. The electrical connection method between the driver chip 40 and the pixel PX is not limited here.

[0074] For example, such as Figure 4 As shown, the driver chip 40 is located between two adjacent pixels PX and is electrically connected to the corresponding pixel PX. By placing the driver chip 40 and the pixel PX close to each other and on the same side of the substrate 11, the process steps and process difficulty of setting the driver chip 40 can be reduced.

[0075] For example, to illustrate more specifically the problems in the related technology, there is a need to improve the film structure to enhance performance. In the related technology, an array composite layer is first fabricated on a substrate, and then pixels are fabricated / bonded on the side of the array composite layer away from the substrate. The array composite layer may include structures such as driving circuits, which include thin-film transistors (TFTs) and / or driving traces. The pixels can be light-emitting diodes, and the active part of the TFT is located between the pixel and the substrate. This film structure, where the array composite layer is located between the substrate and the pixel, can lead to some manufacturing process or performance deficiencies. For example, bonding the pixel to the first and second electrodes in the array composite layer requires irradiation with lasers or X-rays to electrically connect the pixel to the first and second electrodes. Alternatively, when some metal films (such as the first and second electrodes) in the array composite layer are prepared by electron beam evaporation, X-rays are generated. X-rays have strong penetrating power, and irradiation with lasers or X-rays can damage the Si-O bonds or Si-Si bonds in the active part, thereby causing a decrease in the performance of the driving circuit. For example, if an array composite layer is first fabricated on a substrate, and then a pixel is fabricated / bonded on the side of the array composite layer away from the substrate, and the first sub-electrode (e.g., anode) and the second sub-electrode (e.g., cathode) of the pixel are stacked on both sides of the pixel body (light-emitting body) in a direction perpendicular to the plane of the substrate, then, because the pixel is thicker in the direction perpendicular to the plane of the substrate, there is a problem of difficulty in connecting the first or second sub-electrode on the side of the pixel body away from the substrate with the electrode on the array composite layer.

[0076] For example, combined Figures 1 to 4To illustrate the effects of this application more specifically, in the first aspect, a novel film layer structure for a display panel 100 is provided, wherein the array composite layer 10Z is located on the side of the pixel PX away from the substrate 11, which can have a good display effect. Secondly, the new film layer structure of the display panel 100 can solve the problem of adverse effects on the array composite layer 10Z during the fabrication / bonding of pixel PXs in related technologies; it can prevent the destruction of Si-O bonds or Si-Si bonds in the active part of the thin-film transistor by irradiation by lasers or X-rays, thereby avoiding performance degradation of the driving circuit; when the first sub-electrode (e.g., anode) and the second sub-electrode (e.g., cathode) of the pixel PX are stacked on both sides of the pixel PX body (light-emitting body) in a direction perpendicular to the plane of the substrate 11, the problem of difficulty in electrical connection between the first or second sub-electrode on the side of the pixel PX body away from the substrate 11 and the electrodes on the array composite layer 10Z can be solved due to the large thickness of the pixel PX in the direction perpendicular to the plane of the substrate 11, making it easier for the driving circuit in the array composite layer 10Z to be electrically connected to the first and / or second sub-electrodes on both sides of the pixel PX body. The embodiments of this application have the beneficial effects of at least one of the above aspects, and the effects of avoiding adverse effects on the array composite layer 10Z during the manufacturing process in the embodiments of this application may include, but are not limited to, the effects exemplified above.

[0077] In some implementations, such as Figures 1 to 3 As shown, the array composite layer 10Z includes a semiconductor layer 15, a second insulating layer 16, and a source-drain metal layer 17. The semiconductor layer 15 is located on the side of the first insulating layer 12 away from the substrate 11, and includes a plurality of active portions 151. The second insulating layer 16 is located on the side of the semiconductor layer 15 away from the substrate 11, and includes a plurality of third vias 16k1. The source-drain metal layer 17 is located on the side of the second insulating layer 16 away from the substrate 11, and includes a plurality of sources 171 and a plurality of drains 172. The sources 171 and drains 172 are electrically connected to the corresponding active portions 151. One of the sources 171 and drains 172 is electrically connected to the corresponding pixel PX through the first via 12k1.

[0078] For example, such as Figures 1 to 3 As shown, source 171 is electrically connected to the source region of the corresponding active part 151, drain 172 is electrically connected to the drain region of the corresponding active part 151, and source 171 and drain 172 are electrically connected to the corresponding active part 151; one of source 171 and drain 172 is electrically connected to the corresponding pixel PX through the first via 12k1. Figures 1 to 3The example illustrates that the source 171 is electrically connected to the first electrode 181 through the first through hole 12k1. In other embodiments, the source 171 and the drain 172 can be interchanged. For example, the drain 172 is electrically connected to the first electrode 181 through the first through hole 12k1.

[0079] For example, such as Figures 1 to 3 As shown, the array composite layer 10Z comprises, in the direction away from the pixel PX of the first insulating layer 12, the following layers are sequentially stacked: a light-shielding metal layer 13, a third insulating layer 14, a semiconductor layer 15, a second insulating layer 16, a source / drain metal layer 17, and a fourth insulating layer PLN. The light-shielding metal layer 13 includes multiple light-shielding portions 131. The orthographic projection of the active portion 151 onto the substrate 11 can be located within the range of the orthographic projection of the corresponding light-shielding portion 131 onto the substrate, preventing light from incident on the active portion 151 and avoiding performance degradation of the active portion 151. The semiconductor layer 15 includes multiple active portions 151. The fourth insulating layer PLN can be a planarization layer, but is not limited to this. The film structure of the array composite layer 10Z is not limited to... Figures 1 to 3 As shown, for example, the array composite layer 10Z may not include any one of the light-shielding metal layer 13, the third insulating layer 14, or the fourth insulating layer PLN. For example, the array composite layer 10Z may include other film layers, and the array composite layer 10Z may be in the order of other film layer structures.

[0080] For example, such as Figure 4 As shown, the array composite layer 10Z includes a first metal layer 21 and a fourth insulating layer PLN sequentially stacked in the direction away from the first insulating layer 12 in the direction away from the pixel PX. The first metal layer 21 includes a first driving signal line 211. The film structure of the array composite layer 10Z is not limited to... Figure 4 As shown, for example, the array composite layer 10Z may include other film layers.

[0081] For example, such as Figures 1 to 4 As shown, the display panel 100 may also include an encapsulation layer 31 located some distance away from the substrate 11 in the fourth insulating layer PLN. The encapsulation layer 31 may be a glass encapsulation, but is not limited thereto.

[0082] In some implementations, such as Figure 5 As shown, the display panel 100 includes a display area AA and a non-display area BB that at least partially surrounds the display area AA. Multiple pixels PX and multiple driving circuits QD are located in the display area AA. The array composite layer 10Z also includes a second trace 102 located in the non-display area BB, and the second trace 102 is electrically connected to the multiple pixels PX.

[0083] For example, such as Figure 5 As shown, and in combination Figures 1 to 3As shown, the first sub-electrode PX02 is a pixel electrode, and the second sub-electrode PX03 is a common electrode. For example, at least a portion of the second sub-electrodes PX03 are electrically connected to each other, and the second sub-electrodes PX03 serve as a common electrode. At least a portion of the second sub-electrodes PX03 can be provided with a common signal by the second trace 102 in the non-display area. The second trace 102 can be electrically connected to the common electrode to provide a common signal.

[0084] For example, such as Figure 5 As shown, and in combination Figures 1 to 3 As shown, the second trace 102 can be patterned by the light-shielding metal layer 13, but is not limited to this. For example... Figure 5 As shown, and in combination Figure 4 As shown, the second trace 102 can be patterned by the first metal layer 21, but is not limited thereto.

[0085] In some implementations, such as Figures 1 to 4 , Figure 5 As shown, in a direction parallel to the plane of the substrate 11, the array composite layer 10Z includes a plurality of gap portions 101, and the metal clearance gap portion 101 in the array composite layer 10Z; the orthographic projection of the pixel PX on the substrate 11 at least partially overlaps with the orthographic projection of the corresponding gap portion 101 on the substrate 11.

[0086] For example, such as Figures 1 to 4 , Figure 5 As shown, the array composite layer 10Z includes multiple gaps 101, with metal clearance gaps 101 within the array composite layer 10Z. In the gaps 101, there is no opaque material such as metal that obstructs light emission, allowing light emitted from the pixel PX to pass through the gaps 101 and exit from the encapsulation layer 31. When the active portion 151 clearances the pixel PX, it prevents the light emitted from the pixel PX from affecting the performance of the thin-film transistor T1.

[0087] For example, such as Figures 1 to 4 , Figure 5 As shown, in some embodiments, the drive circuit QD is located outside the gap portion 101, and the gap portion 101 may be located between two adjacent drive circuits QD.

[0088] It should be noted that in some other embodiments, the light emitted by the pixel PX can reach the human eye after exiting the substrate 11. In this case, the opaque film layer such as metal can be overlapped with the pixel PX in a direction perpendicular to the plane of the substrate 11.

[0089] Please see Figures 6 to 9 . Figure 6 This is a schematic diagram of the first intermediate process of a method for manufacturing a display panel according to an embodiment of this application. Figure 7This is a schematic diagram of a second intermediate process of a method for manufacturing a display panel according to an embodiment of this application. Figure 8 This is a schematic diagram of a third intermediate process in a method for manufacturing a display panel according to an embodiment of this application. Figure 9 This is a schematic diagram of the fourth intermediate process of a method for manufacturing a display panel according to an embodiment of this application. Figure 1 This is also a schematic diagram of the fifth intermediate process of a method for manufacturing a display panel provided in this application embodiment. Figures 6 to 9 ,as well as Figure 1 ,by Figure 1 The example display panel 100 illustrates the specific technological steps of the manufacturing method of the display panel.

[0090] Secondly, based on the same concept, this application also provides a method for manufacturing a display panel, which can be used to manufacture the display panel 100 of any of the above.

[0091] In some embodiments, the method of manufacturing the display panel includes: step S100, such as... Figure 6 As shown, a substrate 11 is provided, and at least one of a first electrode 181 and a second electrode D2 is formed on one side of the substrate 11; step S200, as follows Figure 7 As shown, pixel PX is positioned on the side of the first electrode 181 and / or the second electrode D2 away from the substrate 11, and pixel PX is electrically connected to the first electrode 181 and / or the second electrode D2; step S300, as... Figure 8 As shown, a first insulating layer 12 is formed on the side of pixel PX away from the substrate 11; step S400, as... Figure 9 As shown, an array composite layer 10Z is formed on the side of the first insulating layer 12 away from the substrate 11, and a first through-hole 12k1 is formed therein. The first through-hole 12k1 at least penetrates the first insulating layer 12, and the array composite layer 10Z is electrically connected to the corresponding pixel PX through the corresponding first through-hole 12k1; S500, as Figure 1 As shown, an encapsulation layer 31 is formed on the side of the array composite layer 10Z away from the substrate 11.

[0092] For example, between steps S200 and S300, the method of manufacturing the display panel may further include: step S230, forming a light-shielding layer 19, the light-shielding layer 19 including a first light-shielding portion 191 and a plurality of light-shielding openings 191k surrounded by the first light-shielding portion 191, the first light-shielding portion 191 being located at least between two adjacent pixels PX, and the light-shielding openings 191k exposing at least a portion of the surface of the pixel PX away from the substrate 11.

[0093] For example, combined Figures 1 to 4For example, firstly, a pixel PX is bonded or manufactured, and then an array composite layer 10Z is manufactured on the side of the pixel PX away from the substrate 11. The width of the first via 12k1 and the second via 12k2 at the end away from the substrate 11 is greater than the width at the end closer to the substrate 11.

[0094] Please see Figure 10 , Figure 10 This is a schematic diagram of a display device provided in an embodiment of this application.

[0095] Thirdly, based on the same concept, this application also provides a display device 200, which includes a display panel 100 of any of the above features, or a display panel 100 that combines any of the above features.

[0096] For example, the display device 200 also has the beneficial effects of the display panel 100 in the above embodiments. The similarities can be understood with reference to the explanation of the display panel 100 above, and will not be repeated below.

[0097] For example, the display device 200 provided in the embodiments of this application can be Figure 10 The mobile phone shown can also be any electronic product with display function, including but not limited to the following categories: television, laptop, desktop monitor, tablet, digital camera, smart bracelet, smart glasses, vehicle display, industrial control equipment, medical display, touch interactive terminal, etc. This application embodiment does not make any special limitation in this regard.

[0098] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0099] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A display panel, characterized in that, include: Base; A pixel is located on one side of the substrate; A first insulating layer is located on the side of the pixel away from the substrate; An array composite layer is located on the side of the first insulating layer away from the substrate; The first through-hole penetrates at least the first insulating layer; The array composite layer is electrically connected to the corresponding pixel through the corresponding first through-hole.

2. The display panel according to claim 1, characterized in that, Also includes: Multiple first electrodes are located between the corresponding pixel and the substrate, and each first electrode includes a first sub-region and a second sub-region; The orthographic projection of the first sub-part onto the substrate overlaps with the orthographic projection of the corresponding pixel onto the substrate; The orthographic projection of the second sub-part onto the substrate does not overlap with the orthographic projection of the corresponding pixel onto the substrate; The orthographic projection of the first through hole onto the substrate overlaps with at least a portion of the corresponding second sub-part onto the substrate; The array composite layer includes multiple driving circuits, the pixels are electrically connected to the corresponding first electrodes, and the driving circuits are electrically connected to the second sub-parts through the corresponding first vias.

3. The display panel according to claim 2, characterized in that, Also includes: A light-shielding layer includes a first light-shielding portion and a plurality of light-shielding openings surrounding the first light-shielding portion, the first light-shielding portion being located at least between two adjacent pixels, and the light-shielding openings exposing at least a portion of the surface of the pixel away from the substrate.

4. The display panel according to claim 3, characterized in that, The first light-shielding portion includes a first sub-light-shielding portion located on the side of the second sub-part of the first electrode away from the substrate, and the first through hole also penetrates the first sub-light-shielding portion.

5. The display panel according to claim 2, characterized in that, Also includes: Multiple second electrodes are located between the corresponding pixel and the substrate; The pixel includes a pixel body, a first sub-electrode, and a second sub-electrode. The first sub-electrode is located between the pixel body and the substrate, and the second sub-electrode is located between the pixel body and the substrate. The first sub-electrode is electrically connected to the corresponding first electrode, and the second sub-electrode is electrically connected to the corresponding second electrode.

6. The display panel according to claim 2, characterized in that, The pixel includes a pixel body, a first sub-electrode, and a second sub-electrode. The first sub-electrode is located between the pixel body and the substrate, and the second sub-electrode is located on the side of the pixel body away from the substrate. The array composite layer includes at least one first trace, and the display panel includes a second through-hole. The second through-hole penetrates at least the first insulating layer, and the first trace is electrically connected to the corresponding second sub-electrode through the second through-hole.

7. The display panel according to claim 1, characterized in that, Also includes: Multiple second electrodes are located between the corresponding pixel and the substrate; The pixel includes a pixel body, a first sub-electrode and a second sub-electrode, the second sub-electrode is located between the pixel body and the substrate, and the first sub-electrode is located on the side of the pixel body away from the substrate; The array composite layer includes multiple driving circuits, the second sub-electrode is electrically connected to the corresponding second electrode, and the driving circuit is electrically connected to the corresponding first sub-electrode through the first through hole.

8. The display panel according to any one of claims 5 to 7, characterized in that, At least a portion of the second sub-electrodes are electrically connected to each other.

9. The display panel according to claim 1, characterized in that, Also includes: Multiple driver chips are located between two adjacent pixels and are electrically connected to the corresponding pixels; The array composite layer includes multiple first drive signal lines, which are electrically connected to the corresponding drive chips through corresponding first vias.

10. The display panel according to any one of claims 2 to 7, characterized in that, The array composite layer includes: A semiconductor layer is located on the side of the first insulating layer away from the substrate, and the semiconductor layer includes a plurality of active portions; A second insulating layer is located on the side of the semiconductor layer away from the substrate, and the second insulating layer includes a plurality of third vias; A source-drain metal layer is located on the side of the second insulating layer away from the substrate. The source-drain metal layer includes a plurality of sources and a plurality of drains. The sources and drains are electrically connected to the corresponding active portions. One of the source and the drain is electrically connected to the corresponding pixel through the first via.

11. The display panel according to claim 10, characterized in that, The display panel includes a display area and a non-display area that at least partially surrounds the display area, and the plurality of pixels and the plurality of driving circuits are located in the display area; The array composite layer also includes a second trace located in the non-display area, the second trace being electrically connected to a plurality of the pixels.

12. The display panel according to claim 1, characterized in that, In a direction parallel to the plane of the substrate, the array composite layer includes a plurality of gaps, and the metal in the array composite layer avoids the gaps; The orthographic projection of the pixel on the substrate at least partially overlaps with the orthographic projection of the corresponding gap portion on the substrate.

13. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 12.

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