Manufacturing method of semiconductor structure
By using low-pressure chemical vapor deposition and hydrogen reaction of the thermal oxide layer during HTO thin film deposition, the problem of chlorine residue affecting device performance was solved, thus improving the reliability and performance of the device.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-19
- Publication Date
- 2026-03-24
AI Technical Summary
The problem of excessive chlorine residue in existing technologies affects the threshold voltage of devices.
A high-temperature silicon oxide layer is formed by low-pressure chemical vapor deposition. During the formation of the thermal oxide layer, hydrogen is used to react with chlorine in the HTO film to generate HCl, thereby reducing the residual chlorine content.
By reducing chlorine residue, the reliability and performance of the device are improved.
Smart Images
Figure CN121728983A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor technology and relates to a method for fabricating a semiconductor structure. Background Technology
[0002] HTO thin film, or High-Temperature Oxide (HTO) thin film, is a silicon dioxide film formed on a silicon substrate using a chemical vapor deposition (CVD) process. This film exhibits high density and good coverage, and can be deposited at high temperatures (approximately 800°C). HTO thin films have wide applications in the microelectronics industry, such as serving as gate oxide layers, isolation layers, sidewall spacers, and interconnect dielectric layers.
[0003] In the deposition of HTO thin films, dichlorosilane (SiH2Cl2) and nitrous oxide (N2O) are usually used as precursors, and the reaction formula is as follows: SiH2Cl2 + 2N2O → SiO2 + 2N2 + 2HCl.
[0004] Because dichlorosilane contains chlorine, chlorine residues may form in the HTO film during deposition. When the HTO film is used as a gate oxide layer, these chlorine residues may affect the threshold voltage of the device, as chlorine is a known semiconductor dopant that can alter the electrical properties of silicon.
[0005] In semiconductor manufacturing, controlling the impurity content in thin films is crucial because it can significantly affect device performance. Therefore, improving the deposition process of HTO thin films to ensure that chlorine residue remains within acceptable limits, thereby guaranteeing device reliability and performance, has become a critical technical problem that urgently needs to be solved by those skilled in the art.
[0006] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating understanding by those skilled in the art. It should not be assumed that these technical solutions are known to those skilled in the art simply because they have been described in the background section of this application. Summary of the Invention
[0007] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a method for fabricating a semiconductor structure to solve the problem of excessive chlorine residue in HTO films fabricated by existing methods.
[0008] To achieve the above and other related objectives, the present invention provides a method for fabricating a semiconductor structure, comprising the following steps:
[0009] A silicon substrate is provided, and the silicon substrate is pre-cleaned;
[0010] A high-temperature silicon oxide layer is formed on the silicon substrate using low-pressure chemical vapor deposition.
[0011] A thermal oxide layer is formed at the interface between the silicon substrate and the high-temperature silicon oxide layer, wherein hydrogen gas is used in the process of forming the thermal oxide layer.
[0012] Optionally, the method for forming the thermal oxide layer includes a wet oxidation process, wherein the gases used in the wet oxidation process include hydrogen, oxygen, and water vapor.
[0013] Optionally, the wet oxygen method uses a temperature range of 600-900℃, an H2 flow rate range of 1-20 slm, and an O2 flow rate range of 1-20 slm.
[0014] Optionally, the method for forming the thermal oxide layer includes alternating between dry oxygen and wet oxygen methods, wherein the dry oxygen method uses oxygen as the gas.
[0015] Optionally, the dry oxygen method uses a temperature range of 600-900℃ and a flow rate range of 1-20slm.
[0016] Optionally, the method for forming the thermal oxide layer includes a wet dichloroethylene oxidation process, wherein the gases used in the wet dichloroethylene oxidation process include dichloroethylene, oxygen, hydrogen, and water vapor.
[0017] Optionally, the method for forming the thermal oxide layer includes in-situ steam oxidation, wherein the gases used in the in-situ steam oxidation include oxygen and hydrogen.
[0018] Optionally, the gases used in the low-pressure chemical vapor deposition method include SiH2Cl2 and N2O.
[0019] Optionally, the low-pressure chemical vapor deposition method uses a temperature range of 700-800℃, a gas pressure range of 0.1-2 torr, a SiH2Cl2 flow rate range of 10-200 sccm, and an N2O flow rate range of 50-300 sccm.
[0020] Optionally, the high-temperature silicon oxide layer and the thermal oxide layer together form a gate oxide layer.
[0021] As described above, the method for fabricating the semiconductor structure of the present invention includes the following steps: providing a silicon substrate and pre-cleaning the silicon substrate; forming a high-temperature silicon oxide layer on the silicon substrate using a low-pressure chemical vapor deposition method; forming a thermal oxide layer at the interface between the silicon substrate and the high-temperature silicon oxide layer, wherein hydrogen is used in the process of forming the thermal oxide layer, and HCl is generated by reacting H with chlorine in the HTO film, which reduces the amount of chlorine residue in the film and is beneficial to improving the reliability and performance of the device. Attached Figure Description
[0022] Figure 1 The diagram shows a process flow chart of the method for fabricating the semiconductor structure of the present invention.
[0023] Figure 2 The diagram shows a silicon substrate provided by the method for fabricating the semiconductor structure of the present invention.
[0024] Figure 3 The diagram shows a schematic of the semiconductor structure fabricated by low-pressure chemical vapor deposition (LPCVD) to form a high-temperature silicon oxide layer on a silicon substrate.
[0025] Figure 4 The diagram shows the diffusion of hydrogen and other process gases to the interface between the silicon substrate and the high-temperature silicon oxide layer in the semiconductor structure fabrication method of the present invention.
[0026] Figure 5 The diagram shown illustrates the structure obtained after forming a thermal oxide layer at the interface between a silicon substrate and a high-temperature silicon oxide layer, which is a method for fabricating the semiconductor structure of the present invention.
[0027] Figure 6 The diagram shown is a schematic of a semiconductor structure.
[0028] Figure 7 The diagram shows the structure obtained after forming an HTO thin film on a silicon substrate using only the LPCVD method in a pair of proportions.
[0029] Figure 8 Displayed as Figure 7 EDX diagram of the structure shown.
[0030] Figure 9 This is a schematic diagram of the structure obtained after forming an HTO thin film on a silicon substrate using the LPCVD method in another comparative example.
[0031] Figure 10 Displayed as in Figure 9 Based on the structure shown, an additional dry oxygen process is added, which is a schematic diagram showing the diffusion of oxygen (O2) from the surface of the HTO film to the interface between the silicon substrate and the HTO film.
[0032] Figure 11 Displayed as in Figure 9 The diagram shows the structure obtained by adding a dry oxidation process to form a thermal oxide layer at the interface between the silicon substrate and the HTO thin film, based on the structure shown.
[0033] Figure 12 Displayed as Figure 11 EDX diagram of the structure shown.
[0034] Figure 13The method for fabricating the semiconductor structure of the present invention first uses LPCVD to form a high-temperature silicon oxide layer on a silicon substrate, and then adds a wet oxide process to form a thermal oxide layer at the interface between the silicon substrate and the high-temperature silicon oxide layer. The resulting structure is shown in the EDX image.
[0035] Explanation of reference numerals in the attached figures
[0036] Steps S1 to S3
[0037] 1, 8, 10 Silicon substrates
[0038] 2 High-temperature silicon oxide layer
[0039] 3.11 Thermal Oxidation Layer
[0040] 4 Gate Oxide Layer
[0041] 5 Polysilicon gate
[0042] 6 side walls
[0043] 7, 9 HTO films Detailed Implementation
[0044] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
[0045] It should be emphasized that the term "including / comprises" as used herein refers to the presence of a feature, whole, step, or component, but does not exclude the presence or addition of one or more other features, wholes, steps, or components.
[0046] Features described and / or illustrated for one embodiment may be used in the same or similar manner in one or more other embodiments, combined with features in other embodiments, or substituted for features in other embodiments.
[0047] In the detailed description of embodiments of the present invention, for ease of explanation, the schematic diagrams illustrating the device structure may be partially enlarged without adhering to the general scale, and the schematic diagrams are merely examples and should not limit the scope of protection of the present invention. Furthermore, in actual manufacturing, the three-dimensional spatial dimensions of length, width, and depth should be included.
[0048] For ease of description, spatial relation terms such as “below,” “under,” “lower than,” “below,” “above,” and “upper” may be used herein to describe the relationship between one element or feature shown in the accompanying drawings and other elements or features. It will be understood that these spatial relation terms are intended to include directions other than those depicted in the drawings for devices in use or operation. Furthermore, when a layer is referred to as being “between” two layers, it may be the only layer between the two layers, or there may be one or more layers in between.
[0049] In the context of this application, the structure described above the first feature may include embodiments in which the first and second features are in direct contact, or embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.
[0050] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.
[0051] This invention provides a method for fabricating a semiconductor structure; please refer to [link / reference]. Figure 1 The diagram shows the process flow of this method, which includes the following steps:
[0052] S1: Provide a silicon substrate and pre-clean the silicon substrate;
[0053] S2: A high-temperature silicon oxide layer is formed on the silicon substrate using low-pressure chemical vapor deposition.
[0054] S3: A thermal oxide layer is formed at the interface between the silicon substrate and the high-temperature silicon oxide layer, wherein hydrogen gas is used in the process of forming the thermal oxide layer.
[0055] The following section details each of the above steps in conjunction with the structural diagram.
[0056] Please refer to the following first. Figure 2 Perform step S1: Provide a silicon substrate 1 and pre-clean the silicon substrate 1.
[0057] Specifically, the purpose of pre-cleaning is to ensure that the silicon wafer surface is clean before entering the HTO oxide layer growth process, thereby helping to improve the quality and uniformity of the oxide layer.
[0058] As an example, the pre-cleaning includes at least one of the following:
[0059] (1) Chemical cleaning: Use specific chemical solvents, such as ammonium hydroxide (NH4OH), hydrochloric acid (HCl) or hydrofluoric acid (HF) solution, to remove organic residues and surface oxides from the silicon wafer surface.
[0060] (2) Ultrasonic cleaning: Using the mechanical vibration and cavitation effect generated by ultrasonic waves, particles and chemical residues on the surface of silicon wafers are further removed.
[0061] (3) RCA cleaning: This is a standard cleaning process that involves using a mixed solution of sulfuric acid and hydrogen peroxide (called Piranha cleaning) and hydrofluoric acid solution to remove metal ions and organic contaminants from the silicon wafer surface.
[0062] (4) Deionized water rinsing: After chemical cleaning and ultrasonic cleaning, the silicon wafer is thoroughly rinsed with deionized water to remove all chemical residues.
[0063] (5) Drying: The cleaned silicon wafers need to be dried to remove surface moisture, which can be achieved by rotary drying, hot plate drying or using a dry nitrogen flow.
[0064] Please see again Figure 3 Step S2 is performed: a high-temperature silicon oxide layer 2 is formed on the silicon substrate 1 using low-pressure chemical vapor deposition.
[0065] Specifically, Low Pressure Chemical Vapor Deposition (LPCVD) is a widely used technique in semiconductor manufacturing. It involves chemical reactions at relatively low pressures (typically below 133 Pa) to convert gaseous reactants into solid thin films that are deposited onto a substrate. LPCVD technology offers several advantages, including better step coverage, precise control over composition and structure, high deposition rates and yields, and the elimination of carrier gas, thus reducing particulate contamination sources.
[0066] As an example, the gases used in forming the high-temperature silicon oxide layer 2 by low-pressure chemical vapor deposition in this invention include dichlorosilane (SiH2Cl2) and nitrous oxide (N2O), and the reaction formula is as follows: SiH2Cl2 + 2N2O → SiO2 + 2N2 + 2HCl.
[0067] As an example, the low-pressure chemical vapor deposition method uses a temperature range of 700-800℃, a gas pressure range of 0.1-2 torr, a SiH2Cl2 flow rate range of 10-200 sccm, and an N2O flow rate range of 50-300 sccm.
[0068] Specifically, the growth thickness of the high-temperature silicon oxide layer 2 can be adjusted according to actual needs, and no specific limitations are imposed in this invention.
[0069] Please see again Figure 4 and Figure 5 Step S3 is performed: a thermal oxide layer 3 is formed at the interface between the silicon substrate 1 and the high-temperature silicon oxide layer 2 (hereinafter referred to as HTO thin film), wherein hydrogen gas is used in the process of forming the thermal oxide layer 3. Figure 4 The diagram shows hydrogen (H2) and other process gases (e.g., oxygen (O2) and water vapor (H2O)) diffusing from the surface of the high-temperature oxide layer 2 to the interface between the silicon substrate 1 and the high-temperature silicon oxide layer 2. Figure 5 The diagram shows the structure obtained after the thermal oxide layer 3 is formed at the interface between the silicon substrate 1 and the high-temperature silicon oxide layer 2.
[0070] Specifically, the principle of reducing chlorine residue in HTO films in this invention is as follows: since hydrogen is used in the process of forming the thermal oxide layer 3, the H in it can react with the chlorine in the HTO film to generate HCl, thereby consuming the chlorine in the HTO film, achieving a lower chlorine residue or complete removal of chlorine, which is beneficial to improving the reliability and performance of the device.
[0071] In some embodiments, the method for forming the thermal oxide layer 3 includes wet oxidation, wherein the gases used in the wet oxidation method include hydrogen, oxygen and water vapor (H2O), wherein oxygen is used as the main oxidant, hydrogen is used to regulate the oxidation atmosphere, and water vapor can react with the silicon wafer at high temperature to promote the growth of the silicon dioxide layer.
[0072] As an example, the wet oxygen method uses a temperature range of 600-900℃, an H2 flow rate range of 1-20 slm, and an O2 flow rate range of 1-20 slm.
[0073] In other embodiments, the method of forming the thermal oxide layer 3 includes alternating between dry oxygen and wet oxygen methods, wherein the dry oxygen method uses oxygen as the gas.
[0074] Specifically, the growth rate of dry oxidation is slower than that of wet oxidation, but it is superior in terms of density and uniformity. Alternating between dry and wet oxidation methods helps to obtain better oxide layer quality and control the growth rate.
[0075] As an example, the dry oxygen method uses a temperature range of 600-900℃ and a flow rate range of 1-20 slm; the wet oxygen method uses a temperature range of 600-900℃, an H2 flow rate range of 1-20 slm, and an O2 flow rate range of 1-20 slm.
[0076] In some other embodiments, the method for forming the thermal oxide layer 3 includes wet dichloroethylene oxidation (WDICE), wherein the gases used in the wet dichloroethylene oxidation process include dichloroethylene (DCE), oxygen, hydrogen, and water vapor.
[0077] Specifically, wet dichloroethylene oxidation refers to a wet oxidation process that uses dichloroethylene (DCE) as an oxidant during the oxidation process. In semiconductor manufacturing, wet oxidation typically involves using steam to promote the growth of silicon dioxide layers during the oxidation process. When DCE is introduced into the oxidation furnace, it can be used in conjunction with steam to increase the oxidation rate and improve the quality of the oxide layer, while hydrogen is used to regulate the oxidation atmosphere.
[0078] In some other embodiments, the method for forming the thermal oxide layer includes in-situ steam generation (ISSG), where the gases used in the in-situ steam generation include oxygen and hydrogen.
[0079] Specifically, in-situ steam oxidation is a technique used in semiconductor manufacturing to grow ultrathin oxide films. This process uses oxygen doped with a small amount of hydrogen as a reaction atmosphere at high temperatures. The hydrogen and oxygen produce a chemical reaction similar to combustion, generating a large number of gaseous active free radicals, mainly atomic oxygen. Due to the strong oxidizing effect of atomic oxygen, the resulting oxide film has fewer bulk defects and a lower interface state density, thereby improving the quality and electrical properties of the film.
[0080] As an example, the high-temperature silicon oxide layer 2 and the thermal oxide layer 3 form a gate oxide layer. Since there is little or no chlorine residue in it, it will not affect the threshold voltage of the device.
[0081] For example, please refer to Figure 6 The diagram shows a schematic of a semiconductor structure, which includes a gate structure formed on the silicon substrate 1. The gate structure includes a gate oxide layer 4 composed of the high-temperature silicon oxide layer 2 and the thermal oxide layer 3, and a polysilicon gate 5 located on the gate oxide layer 4. It also includes sidewalls 6 located on both sides of the gate oxide layer 4 and the polysilicon gate 5.
[0082] The technical effects of the present invention will be further verified by comparative examples below.
[0083] For example, please refer to Figure 7 and Figure 8 ,in, Figure 7 This diagram illustrates the structure obtained by forming an HTO thin film 7 on a silicon substrate 8 using only the LPCVD method in a pair of scales. Figure 8Displayed as Figure 7 The EDX image of the structure shown indicates that there is residual chlorine in the HTO film.
[0084] Specifically, EDX (Energy Dispersive X-ray Spectroscopy) is a method for analyzing the chemical composition of samples using an X-ray energy dispersive spectrometer in transmission and scanning electron microscopy. It determines the elements contained in the sample by analyzing the wavelength and intensity of the characteristic X-rays emitted by the elements, and determines the elemental content by comparing the intensities of different elemental spectral lines. EDX is often used in conjunction with electron microscopy for micro-area compositional analysis of samples. A commonly used EDX detector is a lithium silicon permeation detector, which converts X-ray photon signals into electrical pulse signals, and then analyzes these signals to determine the elemental composition and content of the sample. This invention uses EDX to accurately analyze the residual chlorine content in HTO thin films.
[0085] For example, please refer to Figures 9 to 12 ,in, Figure 9 This is a schematic diagram showing the structure obtained after forming an HTO thin film 9 on a silicon substrate 10 using LPCVD in another example. Figure 10 and Figure 11 Displayed as in Figure 9 Based on the structure shown, a dry oxidation process is added to form a thermal oxide layer 11 at the interface between the silicon substrate 10 and the HTO thin film 9. (See diagram.) Figure 10 The diagram shows oxygen (O2) diffusing from the surface of the HTO film 9 to the interface between the silicon substrate 10 and the HTO film 9. Figure 11 The diagram shows the structure obtained after the thermal oxide layer 11 is formed at the interface between the silicon substrate 10 and the HTO thin film 9. Figure 12 Displayed as Figure 11 The EDX image of the structure shown indicates that chlorine residue remains in the HTO film.
[0086] For example, please refer to Figure 13 The image shows the EDX diagram of the structure obtained after the present invention first uses LPCVD to form the high-temperature silicon oxide layer 2 on the silicon substrate 1, and then adds a wet oxidation process to form the thermal oxide layer 3 at the interface between the silicon substrate 1 and the high-temperature silicon oxide layer 2. It can be seen that there is no chlorine residue in the HTO film.
[0087] In summary, the semiconductor structure fabrication method of the present invention includes the following steps: providing a silicon substrate and pre-cleaning the silicon substrate; forming a high-temperature silicon oxide layer on the silicon substrate using low-pressure chemical vapor deposition; and forming a thermal oxide layer at the interface between the silicon substrate and the high-temperature silicon oxide layer. During the formation of the thermal oxide layer, hydrogen gas is used to react with chlorine in the HTO film to generate HCl, reducing the residual chlorine content in the film and thus improving the reliability and performance of the device. Therefore, the present invention effectively overcomes the various shortcomings of the prior art and has high industrial applicability.
[0088] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.
Claims
1. A method for fabricating a semiconductor structure, characterized in that, Includes the following steps: A silicon substrate is provided, and the silicon substrate is pre-cleaned; A high-temperature silicon oxide layer is formed on the silicon substrate using low-pressure chemical vapor deposition. A thermal oxide layer is formed at the interface between the silicon substrate and the high-temperature silicon oxide layer, wherein hydrogen gas is used in the process of forming the thermal oxide layer.
2. The method for fabricating a semiconductor structure according to claim 1, characterized in that: The method for forming the thermal oxide layer includes a wet oxidation process, wherein the gases used in the wet oxidation process include hydrogen, oxygen and water vapor.
3. The method for fabricating a semiconductor structure according to claim 2, characterized in that: The wet oxygen method uses a temperature range of 600-900℃, an H2 flow rate range of 1-20 slm, and an O2 flow rate range of 1-20 slm.
4. The method for fabricating a semiconductor structure according to claim 2 or 3, characterized in that: The method for forming the thermal oxide layer includes alternating between dry oxygen and wet oxygen methods, wherein the dry oxygen method uses oxygen as a gas.
5. The method for fabricating a semiconductor structure according to claim 4, characterized in that: The dry oxygen method uses a temperature range of 600-900℃ and a flow rate range of 1-20slm.
6. The method for fabricating a semiconductor structure according to claim 1, characterized in that: The method for forming the thermal oxide layer includes a wet dichloroethylene oxidation process, wherein the gases used in the wet dichloroethylene oxidation process include dichloroethylene, oxygen, hydrogen, and water vapor.
7. The method for fabricating a semiconductor structure according to claim 1, characterized in that: The method for forming the thermal oxide layer includes in-situ steam oxidation, wherein the gases used in the in-situ steam oxidation include oxygen and hydrogen.
8. The method for fabricating a semiconductor structure according to claim 1, characterized in that: The gases used in the low-pressure chemical vapor deposition method include SiH2Cl2 and N2O.
9. The method for fabricating a semiconductor structure according to claim 8, characterized in that: The low-pressure chemical vapor deposition method uses a temperature range of 700-800℃, a gas pressure range of 0.1-2 torr, a SiH2Cl2 flow rate range of 10-200 sccm, and an N2O flow rate range of 50-300 sccm.
10. The method for fabricating a semiconductor structure according to claim 1, characterized in that: The high-temperature silicon oxide layer and the thermal oxide layer together form a gate oxide layer.