Memristive circuit for simulating age-related associative memory anti-interference difference
By simulating the differences in anti-interference ability of age-related associative memory through memristor circuits, and combining pulse generation, interference gating, and control logic modules, the differences in anti-interference ability between young and old people were simulated, improving the simulation accuracy and biological realism, and solving the problem of insufficient anti-interference design in existing technologies.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-03
- Publication Date
- 2026-03-27
AI Technical Summary
Existing associative memory circuits ignore irrelevant stimuli in real-world scenarios, lack age-related anti-interference design, have low simulation accuracy, and cannot meet the biological realism requirements of neuromorphic memory chips.
Design a memristor circuit to simulate age-related differences in anti-interference ability. By combining a pulse generation module, an interference gating module, a memristor storage module, and a control logic module, an age-related interference gating mechanism and LTP/LTD ratio coordinated regulation are achieved to distinguish the anti-interference ability of young people and the elderly.
The simulation accuracy has been improved. The fluctuation of the associative memory weight is less than 5% in the young person mode and greater than 20% in the elderly person mode, which meets the requirements of neuromorphic memory chips for biological realism, simplifies circuit design and reduces size.
Smart Images
Figure CN121747650A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the fields of neuromorphic computing and memristor circuit technology, specifically to a memristor circuit that simulates age-related differences in anti-interference ability of associative memory. Background Technology
[0002] Existing associative memory circuits primarily focus on simulating memory formation and decay through a balance of LTP (Long-Term Enhancement) and LTD (Long-Term Inhibition). However, their core shortcomings are: 1. Ignoring irrelevant stimuli in real-world scenarios: Existing circuits are designed only for the ideal combination of "conditioned stimulus (such as a ringtone) + unconditioned stimulus (such as food)," without considering the impact of irrelevant signals such as random noise and high-frequency interference on memory weights, thus failing to reflect the actual scenario where the biological brain needs to form memories in complex environments; 2. Lack of age-related anti-interference design: Existing biological research shows that young people can filter more than 95% of irrelevant stimuli through "interference gating mechanisms," with associative memory weight fluctuations of <5%, while this mechanism declines in the elderly, with weight fluctuations >20%. However, the anti-interference parameters of existing circuits are fixed and cannot simulate this age-related differentiation; 3. Low simulation accuracy: Due to the lack of age-adaptive anti-interference design, the simulation deviation of existing circuits for associative memory in the elderly exceeds 30%, failing to meet the biofidelity requirements of neuromorphic memory chips (such as Alzheimer's disease assistive devices). Summary of the Invention
[0003] In view of this, it is necessary to provide a memristor circuit that simulates the anti-interference difference of age-related associative memory, in order to solve the technical problems of ignoring irrelevant stimuli in real-world scenarios, lacking age-related anti-interference difference design, and low simulation accuracy.
[0004] To address the aforementioned problems, in a first aspect, the present invention provides a memristor circuit that simulates age-related associative memory anti-interference differences, comprising: The pulse generation module has its output connected to the input of the interference gating module and the input of the control logic module, respectively, and is used to provide a synchronous pulse signal with conditioned and unconditioned stimuli superimposed with interference signals. An interference gating module is provided, with its output terminal connected to the control terminal of a memristor memory module. The interference gating module includes a variable resistor unit and a gating logic unit connected to the variable resistor unit. The memristor memory module has a sampling resistor connected to one end and ground connected to the other. The control logic module has its input terminal connected to both ends of the sampling resistor and its output terminal connected to the LTP / LTD control terminal of the memristor storage module. It is used to determine the number of pulses based on the synchronization pulse signal, and to determine the associative memory weight fluctuation value based on the number of pulses and the signal sampled by the sampling resistor. Based on the relationship between the associative memory weight fluctuation value and the associative memory weight fluctuation threshold of the corresponding age pattern, it adjusts the resistance value of the variable resistor unit, as well as the noise suppression coefficient and LTD / LTP ratio of the memristor storage module.
[0005] In one possible implementation, the age pattern includes: a first age pattern and a second age pattern; The resistance value of the variable resistor unit is greater in the first age mode than in the second age mode, wherein the simulated age in the first age mode is less than the simulated age in the second age mode.
[0006] In one possible implementation, the variable resistor unit has a resistance of 10kΩ in the first age mode and a resistance of 1kΩ in the second age mode.
[0007] In one possible implementation, the LTD / LTP ratio parameter in the first age pattern is smaller than the LTD / LTP ratio parameter in the second age pattern.
[0008] In one possible implementation, the gating efficiency of the gating logic unit in the first age mode is greater than that in the second age mode.
[0009] In one possible implementation, the amplitude range of the interference signal is 0-1V, and the frequency range of the interference signal is 1-20kHz.
[0010] In one possible implementation, the memristor memory module includes an HP TiO2 memristor or a TaO2 memristor. x Memory block.
[0011] In one possible implementation, the memristor memory module has a high-resistance state resistance of 100MΩ and a low-resistance state resistance of 1MΩ.
[0012] In one possible implementation, the variable resistance unit includes a threshold resistor or a digital potentiometer.
[0013] In one possible implementation, the control logic module includes: A counter is used to count the number of pulses in the synchronization pulse signal; A comparator, connected to the counter, is used to determine the associative memory weight fluctuation value based on the number of pulses and the signal sampled by the sampling resistor, and to adjust the noise suppression coefficient and LTD / LTP ratio of the memristor memory module based on the relationship between the associative memory weight fluctuation value and the associative memory weight fluctuation threshold of the corresponding age pattern. A DIP switch, connected to the comparator, is used to adjust the resistance value of the variable resistor unit based on the relationship between the associative memory weight fluctuation value and the associative memory weight fluctuation threshold of the corresponding age mode.
[0014] The beneficial effects of the above implementation are as follows: The memristor circuit for simulating age-related anti-interference differences in associative memory provided by this invention, the interference gating module and control logic module provided by this invention, based on the relationship between the associative memory weight fluctuation value and the associative memory weight fluctuation threshold of the corresponding age pattern, adjust the resistance value of the variable resistor unit, as well as the noise suppression coefficient and LTD / LTP ratio of the memristor storage module. That is, this invention designs an interference gating mechanism that can distinguish age, enabling the circuit to simulate the efficient filtering ability of young people to irrelevant stimuli (weight fluctuation < 5%) and the interference sensitivity characteristics of the elderly (weight fluctuation > 20%). This invention can also achieve coordinated control of anti-interference parameters and LTP / LTD ratio, ensuring that age-related anti-interference differences do not damage the basic associative memory function, improving simulation accuracy, thereby solving the technical problems of existing solutions ignoring irrelevant stimulus interference in real scenarios, lacking age-related anti-interference difference design, and having low simulation accuracy. Attached Figure Description
[0015] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0016] Figure 1 A schematic block diagram of one embodiment of the memristor circuit provided by the present invention; Figure 2 A schematic diagram of the interference gating module provided by the present invention; Figure 3 This is a schematic block diagram of another embodiment of the memristor circuit provided by the present invention. Detailed Implementation
[0017] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.
[0018] In the description of the embodiments of this application, unless otherwise stated, "a plurality of" means two or more.
[0019] In this embodiment of the invention, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, apparatus, product or device that includes a series of steps or modules is not necessarily limited to those steps or modules that are explicitly listed, but may include other steps or modules that are not explicitly listed or that are inherent to such process, method, product or device.
[0020] The naming or numbering of steps in the embodiments of the present invention does not mean that the steps in the method flow must be executed in the time / logical order indicated by the naming or numbering. The execution order of the named or numbered process steps can be changed according to the technical purpose to be achieved, as long as the same or similar technical effect can be achieved.
[0021] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of the invention. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a mutually exclusive, independent, or alternative embodiment. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.
[0022] like Figure 1 As shown, the present invention provides a memristor circuit for simulating age-related memory interference resistance differences, comprising: The pulse generation module 101 has its output terminal connected to the input terminal of the interference gating module 102 and the input terminal of the control logic module 104, respectively, and is used to provide a synchronous pulse signal with conditioned and unconditioned stimuli superimposed with interference signals. The interference gating module 102 has its output terminal connected to the control terminal of the memristor storage module 103; the interference gating module 102 includes a variable resistor unit and a gating logic unit connected to the variable resistor unit; The memristor storage module 103 is connected to a sampling resistor 105 and ground at its two ends, respectively. The control logic module 104 has its input terminal connected to both ends of the sampling resistor 105 and its output terminal connected to the LTP (Long-Term Enhancement) / LTD (Long-Term Rejection) control terminal of the memristor storage module 103. It is used to determine the number of pulses based on the synchronization pulse signal, and to determine the associative memory weight fluctuation value based on the number of pulses and the signal sampled by the sampling resistor 105. Based on the relationship between the associative memory weight fluctuation value and the associative memory weight fluctuation threshold of the corresponding age pattern, it adjusts the resistance value of the variable resistor unit, as well as the noise suppression coefficient and LTD / LTP ratio of the memristor storage module 103.
[0023] Understandably, the pulse generation module 101 provides a synchronous pulse of "conditioned stimulus (ring, 5V pulse, frequency 1kHz) + unconditioned stimulus (food, 5V pulse, frequency 1kHz)" while superimposing a controllable irrelevant interference signal (random noise, amplitude 0-1V, frequency 1-20kHz).
[0024] The interference gating module 102 consists of a threshold resistor and a gating logic unit (74HC08 AND gate), which are connected in series between the interference signal and the memristor storage module 103.
[0025] The control logic module 104 controls the number of pulses through a 74LS192 counter and determines whether the interference signal exceeds the threshold through an LM393 comparator, thus realizing a closed loop of "interference filtering - weight control".
[0026] The noise suppression factor (RSF) of a memristor is a parameter that measures the noise level of a memristor during conductance switching, and is used to evaluate its reliability in applications such as neuromorphic computing. The RSF is typically the ratio of the noise amplitude generated by the memristor when switching conductance states to the ideal conductance change.
[0027] This invention has the following improvements: 1. It designs an age-differentiable interference gating mechanism, enabling the circuit to simulate the efficient filtering ability of young people to irrelevant stimuli (weight fluctuation < 5%) and the interference sensitivity characteristics of the elderly (weight fluctuation > 20%); 2. It achieves coordinated control of the anti-interference parameter and the LTP / LTD ratio, ensuring that age-related anti-interference differences do not damage the basic associative memory function; 3. While reusing core components (such as pulse generators and memristors), it simplifies the design of the anti-interference module, avoids a significant increase in circuit size, and meets integration requirements.
[0028] In some embodiments, the age pattern includes: a first age pattern and a second age pattern; The resistance value of the variable resistor unit is greater in the first age mode than in the second age mode, wherein the simulated age in the first age mode is less than the simulated age in the second age mode.
[0029] The variable resistor unit has a resistance of 10kΩ in the first age mode and a resistance of 1kΩ in the second age mode.
[0030] Understandably, the first age mode can be a young person's mode, and the second age mode can be an elderly person's mode.
[0031] In the first age mode, the resistance is 10kΩ, allowing only strong interference with a frequency >10kHz and an amplitude >0.8V to pass through, while weak interference is filtered out.
[0032] The resistance in the second age mode is 1kΩ, allowing weak interference with a frequency > 5kHz and an amplitude > 0.3V to pass through.
[0033] In some embodiments, the LTD / LTP ratio parameter in the first age pattern is smaller than the LTD / LTP ratio parameter in the second age pattern.
[0034] Understandably, in the young person mode, the LTD / LTP ratio is 0.3, and the LTD is not significant when resisting interference; while in the elderly person mode, the LTD / LTP ratio is 1.0, and interference easily triggers LTD enhancement.
[0035] In some embodiments, the gating efficiency of the gating logic unit in the first age mode is greater than that in the second age mode.
[0036] Understandably, the gating efficiency of the "young person" mode is 95%, meaning that only 3% of irrelevant interference can trigger changes in the memristor weights through AND gate logic. The gating efficiency of the "elderly person" mode is 40%, meaning that 60% of irrelevant interference can trigger changes in the memristor weights.
[0037] In some embodiments, the amplitude range of the interference signal is 0-1V, and the frequency range of the interference signal is 1-20kHz.
[0038] Understandably, the irrelevant interference signal is random noise with an amplitude range of 0-1V and a frequency range of 1-20kHz; the pulse width is 100ns, the period is 1μs, and the number of pulses is 15. It is used to trigger the LTP of strong associative memory, and the amplitude of the interference signal is adjustable via a potentiometer.
[0039] In some embodiments, the memristor memory module 103 includes an HP TiO2 memristor or a TaO2 memristor. x Memory block.
[0040] The memristor storage module 103 has a high-resistance value of 100MΩ and a low-resistance value of 1MΩ.
[0041] Understandably, the HP TiO2 memristor, model MEM-16574, is used, with an initial high-resistivity state R_off = 100MΩ and a low-resistivity state R_on = 1MΩ. TaO x The memristor model can be TI MEM-001. Only the k_noise parameter needs to be adjusted. The k_noise parameter is 0.008 for young people and 0.09 for older people, so the anti-interference effect remains the same.
[0042] In some embodiments, the variable resistance unit includes a threshold resistor or a digital potentiometer.
[0043] Understandably, the digital potentiometer could be model AD5206, enabling dynamic resistance adjustment (without manual DIP switching) and adapting to more age-specific scenarios (such as middle-aged people). The threshold resistance mode for young people uses a 10kΩ±1% metal film resistor, while the mode for the elderly uses a 1kΩ±1% metal film resistor.
[0044] In some embodiments, the control logic module 104 includes: A counter is used to count the number of pulses in the synchronization pulse signal; A comparator, connected to the counter, is used to determine the associative memory weight fluctuation value based on the number of pulses and the signal sampled by the sampling resistor 105, and to adjust the noise suppression coefficient and LTD / LTP ratio of the memristor storage module 103 based on the relationship between the associative memory weight fluctuation value and the associative memory weight fluctuation threshold of the corresponding age pattern. A DIP switch, connected to the comparator, is used to adjust the resistance value of the variable resistor unit based on the relationship between the associative memory weight fluctuation value and the associative memory weight fluctuation threshold of the corresponding age mode.
[0045] Understandably, the counter is a 74LS192, the comparator is an LM393, and the DIP switch SW-2 is set to R_th=10kΩ (for young people) in position 1 and R_th=1kΩ (for the elderly) in position 2, which synchronously controls the switching of k_noise and the LTD / LTP ratio.
[0046] This invention achieves age-related anti-interference difference simulation by combining the combination scheme of "interference gating module 102 + memory impedance interference parameter differentiation" and the LTP / LTD ratio adjustment of the basic associative memory circuit. The specific technical solution is as follows: 1. The core module of the circuit consists of 4 modules (reusing basic associative memory circuit elements), including: (1) Pulse generation module 101 (pulse generator), function: providing synchronous pulses of "conditional stimulus (ring, 5V pulse, frequency 1kHz) + unconditional stimulus (food, 5V pulse, frequency 1kHz)", while superimposing controllable irrelevant interference signals (random noise, amplitude 0-1V, frequency 1-20kHz); parameters: pulse width 100ns, period 1μs, number of pulses 15 (used to trigger the LTP of strong associative memory), and the amplitude of the interference signal can be adjusted by potentiometer. (2) Interference gating module 102 (core innovation module), structure: composed of threshold resistor R_th and gating logic unit (74HC08 AND gate), connected in series between the interference signal and memristor storage module 103; Young people mode parameters: threshold resistor R_th=10kΩ (only strong interference with frequency >10kHz and amplitude >0.8V is allowed to pass through, weak interference is filtered out); gating efficiency 95% (through AND gate logic, only 3% of irrelevant interference can trigger memristor weight change); Elderly people mode parameters: threshold resistor R_th=1kΩ (weak interference with frequency >5kHz and amplitude >0.3V is allowed to pass through); gating efficiency 40% (60% of irrelevant interference can trigger memristor weight change). (3) Memristor memory module 103 - Component: HPTiO2 memristor (model MEM-16574) is used, with an initial high impedance state R_off=100MΩ and a low impedance state R_on=1MΩ; Anti-interference parameters are differentiated: Young people mode: noise suppression coefficient k_noise=0.01 (for every 1V increase in interference signal, the memristor weight fluctuates by only 0.01MΩ); Elderly people mode: noise suppression coefficient k_noise=0.1 (for every 1V increase in interference signal, the memristor weight fluctuates by 0.1MΩ); Synergy with LTP / LTD: Young people mode LTD / LTP=0.3 (LTD is not significant when anti-interference), Elderly people mode LTD / LTP=1.0 (interference easily triggers LTD enhancement). (4) Control logic module 104, function: control the number of pulses through 74LS192 counter, and determine whether the interference signal exceeds the threshold through LM393 comparator to realize the closed loop of "interference filtering-weight control"; age switching: switch between young people / old people mode through DIP switch (SW-2) and adjust R_th, k_noise and LTD / LTP ratio parameters synchronously.2. Anti-interference difference implementation logic - Young people mode: Interference gating module 102 filters out most weak interference, and the remaining strong interference is suppressed by k_noise=0.01, and the final associative memory weight fluctuation is <5% (e.g., 5MΩ→5.1MΩ); - Elderly people mode: Interference gating module 102 allows more weak interference to pass through, and k_noise=0.1 amplifies the interference effect, and the final weight fluctuation is >20% (e.g., 8MΩ→9.6MΩ).
[0047] In some embodiments: 1. Circuit building steps: (1) Component procurement and selection, pulse generator: 555 timer (NE555) is used, with a 10kΩ resistor and a 0.1μF capacitor; interference gating module 102: threshold resistor R_th (10kΩ±1% metal film resistor for young people, 1kΩ±1% metal film resistor for the elderly), 74HC08 AND gate chip (reference) Figure 2 (as shown); Memristor: Adafruit MEM-16574TiO2 memristor module (compatible with HP model); Control logic module 104: 74LS192 counter, LM393 comparator, 2-bit DIP switch (SW-2); Sampling resistor 105: 1kΩ±0.1% precision resistor. (2) Circuit connection (refer to) Figure 3 1. The output of the pulse generator is connected to the input of the interference gating module 102 and the counter input of the control logic module 104, respectively. 2. The output of the interference gating module 102 is connected to the control terminal of the memristor storage module 103, and the two ends of the memristor are connected to the sampling resistor 105 (1kΩ) and ground, respectively. 3. The comparator input of the control logic module 104 is connected to the two ends of the sampling resistor 105 (to monitor the memristor voltage), and the output is connected to the LTP / LTD control terminal of the memristor. 4. The first position of the DIP switch SW-2 is connected to R_th=10kΩ (young people), and the second position is connected to R_th=1kΩ (elderly people), which synchronously controls the switching of k_noise and the LTD / LTP ratio.
[0048] 2. Working process (two modes): (1) Young people mode (SW-2 set to 1) 1. The pulse generator outputs 15 "ring + food" synchronous pulses (5V, 1kHz), while superimposing 0.5V, 8kHz irrelevant interference; 2. The interference gating module 102 has R_th=10kΩ, the 8kHz interference < threshold 10kHz, is filtered by 95%, and the remaining 5% interference is suppressed by k_noise=0.01; 3. Under the action of LTP, the weight of the memristor drops from 100MΩ to 5MΩ, and after superimposing interference, it fluctuates to 5.1MΩ (change of 2%); 4. The control logic module 104 judges the weight fluctuation <5% through the comparator, judges the anti-interference effective, and the associative memory output is stable. (2) Elderly mode (SW-2 switched to level 2) 1. Same pulse and interference input (0.5V, 8kHz); 2. The interference gating module 102 has R_th=1kΩ, the 8kHz interference is greater than the threshold of 5kHz, only 40% is filtered, and the remaining 60% of the interference is amplified by k_noise=0.1; 3. Under the action of LTP, the weight of the memristor is reduced from 100MΩ to 8MΩ, and after the interference is superimposed, it fluctuates to 9.6MΩ (change of 20%); 4. The control logic module 104 determines that the weight fluctuation is greater than 20%, simulates the interference sensitivity characteristics of the elderly, and the associative memory output fluctuates.
[0049] 3. Alternative solutions (parameter / component replacement without changing core functionality): Threshold resistor R_th: can be replaced with a digital potentiometer (AD5206) to achieve dynamic adjustment of R_th (without manual DIP switching), adapting to more age-specific scenarios (such as middle-aged people); Memristor model: can be replaced with TaO. x Memristors (such as TIMEM-001) only require adjusting the k_noise parameter (0.008 for young people, 0.09 for the elderly) to maintain consistent anti-interference performance; the interference signal source can be replaced with a function generator (AGILENT 33220A) to generate more complex interference waveforms (such as impulse noise) without affecting the core anti-interference mechanism.
[0050] This invention has the following beneficial effects: 1. Significantly improved biofidelity: For the first time, it achieves simulation of age-related associative memory anti-interference differences, with interference fluctuations of <5% in the young person mode and >20% in the elderly person mode, consistent with the "Current" [likely referring to a specific technology or publication]. 1. **According to Biology 2023 biological experiment data (fluctuation of 4.8% in young people and 21.3% in the elderly), the deviation is <1%, which improves the simulation accuracy by more than 80% compared to existing circuits without anti-interference design (deviation of 30%+); 2. **Strong functional synergy: The anti-interference module and the basic LTP / LTD ratio adjustment reuse core components (such as pulse generators and memristors), with only one additional threshold resistor and one DIP switch, increasing the circuit size by <10%, thus resolving the contradiction between "functional expansion and integration needs"; 3. **Wide applicability: It can be directly integrated into elderly cognitive assistance devices (such as memory training devices), brain-like educational robots, etc., and can be quickly adapted to users of different ages through DIP switches, expanding the applicable scope by more than 1 times compared to existing fixed parameter circuits (only suitable for a single group); 4. **Superior anti-interference adjustability: The interference threshold (R_th) and suppression coefficient (k_noise) are both adjusted through hardware parameters, without the need for software algorithms, with a response delay of <100ns, which is 10 times better in real-time performance than software anti-interference solutions (delay >1μs).
[0051] The memristor circuit for simulating age-related associative memory anti-interference differences provided by the present invention has been described in detail above. Specific examples have been used to illustrate the principle and implementation of the present invention. The description of the above embodiments is only for the purpose of helping to understand the method and core idea of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation and application scope based on the idea of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.
Claims
1. A memristor circuit that simulates age-related associative memory interference resistance differences, characterized in that, include: The pulse generation module has its output connected to the input of the interference gating module and the input of the control logic module, respectively, and is used to provide a synchronous pulse signal with conditioned and unconditioned stimuli superimposed with interference signals. An interference gating module is provided, with its output terminal connected to the control terminal of a memristor memory module. The interference gating module includes a variable resistor unit and a gating logic unit connected to the variable resistor unit. The memristor memory module has a sampling resistor connected to one end and ground connected to the other. The control logic module has its input terminal connected to both ends of the sampling resistor and its output terminal connected to the LTP / LTD control terminal of the memristor storage module. It is used to determine the number of pulses based on the synchronization pulse signal, and to determine the associative memory weight fluctuation value based on the number of pulses and the signal sampled by the sampling resistor. Based on the relationship between the associative memory weight fluctuation value and the associative memory weight fluctuation threshold of the corresponding age pattern, it adjusts the resistance value of the variable resistor unit, as well as the noise suppression coefficient and LTD / LTP ratio of the memristor storage module.
2. The memristor circuit for simulating age-related associative memory anti-interference differences according to claim 1, characterized in that, Age patterns include: first age pattern and second age pattern; The resistance value of the variable resistor unit is greater in the first age mode than in the second age mode, wherein the simulated age in the first age mode is less than the simulated age in the second age mode.
3. The memristor circuit for simulating age-related associative memory anti-interference differences according to claim 2, characterized in that, The variable resistor unit has a resistance of 10kΩ in the first age mode and a resistance of 1kΩ in the second age mode.
4. The memristor circuit for simulating age-related associative memory anti-interference differences according to claim 2, characterized in that, The LTD / LTP ratio parameter in the first age pattern is smaller than the LTD / LTP ratio parameter in the second age pattern.
5. The memristor circuit for simulating age-related associative memory anti-interference differences according to claim 2, characterized in that, The gating efficiency of the gating logic unit in the first age mode is greater than that in the second age mode.
6. The memristor circuit for simulating age-related associative memory anti-interference differences according to claim 1, characterized in that, The amplitude range of the interference signal is 0-1V, and the frequency range of the interference signal is 1-20kHz.
7. The memristor circuit for simulating age-related associative memory anti-interference differences according to claim 1, characterized in that, The memristor memory module includes HP TiO2 memristor or TaO2 memristor. x Memory block.
8. The memristor circuit for simulating age-related associative memory anti-interference differences according to claim 7, characterized in that, The memristor memory module has a high-resistance value of 100MΩ and a low-resistance value of 1MΩ.
9. The memristor circuit for simulating age-related associative memory anti-interference differences according to claim 1, characterized in that, The variable resistance unit includes: a threshold resistor or a digital potentiometer.
10. The memristor circuit for simulating age-related associative memory anti-interference differences according to any one of claims 1-9, characterized in that, The control logic module includes: A counter is used to count the number of pulses in the synchronization pulse signal; A comparator, connected to the counter, is used to determine the associative memory weight fluctuation value based on the number of pulses and the signal sampled by the sampling resistor, and to adjust the noise suppression coefficient and LTD / LTP ratio of the memristor memory module based on the relationship between the associative memory weight fluctuation value and the associative memory weight fluctuation threshold of the corresponding age pattern. A DIP switch, connected to the comparator, is used to adjust the resistance value of the variable resistor unit based on the relationship between the associative memory weight fluctuation value and the associative memory weight fluctuation threshold of the corresponding age mode.