Data generation method, encoding and decoding method and device, electronic equipment and medium
By generating a bipartite graph that matches the master code pattern, the punching position of the LDPC code is determined, and the check bit and information bit sub-code adaptation sequence is generated. This solves the problem of low coding efficiency for LDPC code rate compatibility, improves coding and decoding efficiency, and is suitable for real-time communication scenarios.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-25
- Publication Date
- 2026-03-27
AI Technical Summary
Existing rate-compatible coding techniques based on low-density parity-check codes (LDPC) are inefficient in the encoding and decoding process, especially in communication scenarios with high real-time requirements, making it difficult to guarantee the complexity and reliability of encoding and decoding.
By generating a bipartite graph that matches the master code pattern, the connection relationship between the check node and the variable node is determined, the punching position is accurately determined, and the check bit and information bit sub-code adaptation sequence is generated, reducing the complexity of the online encoding and decoding process.
It improves encoding and decoding efficiency, is suitable for communication scenarios with high real-time requirements, reduces the complexity of the encoding and decoding system, and improves transmission reliability.
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Figure CN121750148A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of communication technology, and in particular to a data generation method, encoding and decoding method, apparatus, electronic device and medium. Background Technology
[0002] Rate-compatible coding is a coding technique that supports dynamic adjustment of the code rate based on channel conditions or service requirements, thereby supporting channel-coded transmission with different code rates. This technique achieves flexible code rate adjustment by designing a basic coding structure (such as a "master code") and allowing the derivation of sub-codes with different code rates from the master code.
[0003] In related technologies, rate-compatible coding based on Low-Density Parity-Check (LDPC) codes is mainly achieved through methods such as puncturing and expansion. However, due to the low efficiency of puncturing, the encoding and decoding efficiency is also low. Summary of the Invention
[0004] This application provides a data generation method, encoding and decoding method, apparatus, electronic device, and medium to solve the problem of low efficiency in encoding and decoding.
[0005] In a first aspect, this application provides a data generation method applied to a generation device, the method comprising:
[0006] Obtain the bipartite graph corresponding to the check matrix that matches the mother code pattern, the maximum number of holes punched in the information bits, and the maximum number of holes punched in the check bits; the bipartite graph includes multiple check nodes and multiple variable nodes;
[0007] Based on the connection relationship between the verification nodes and variable nodes in the bipartite graph, multiple first punch nodes are determined from the multiple verification nodes, and the verification bit positions corresponding to the multiple first punch nodes are stored in the verification bit subcode adaptation sequence. Also, multiple second punch nodes are determined from the multiple variable nodes, and the information bit positions corresponding to the multiple second punch nodes are stored in the information bit subcode adaptation sequence.
[0008] The number of the first punch nodes is equal to the maximum number of punches for the check bit; the number of the second punch nodes is equal to the maximum number of punches for the information bit; the check bit subcode adaptation sequence and the information bit subcode adaptation sequence are used for encoding by the encoding device and for decoding by the decoding device.
[0009] In some embodiments, determining multiple first puncture nodes from multiple check nodes based on the connection relationship between check nodes and variable nodes in the bipartite graph, storing the check bit positions corresponding to the multiple first puncture nodes in a check bit subcode adaptation sequence, and determining multiple second puncture nodes from multiple variable nodes, storing the information bit positions corresponding to the multiple second puncture nodes in an information bit subcode adaptation sequence, includes:
[0010] Based on the bipartite graph corresponding to the i-th run, the i-th run process is performed until the number of determined first punch nodes equals the maximum number of punches for the check bits, and the number of determined second punch nodes equals the maximum number of punches for the information bits; the i-th run process includes the following operations:
[0011] Based on the connection relationship between the verification nodes and variable nodes in the bipartite graph corresponding to the i-th run, the recovery order information of the verification nodes, the decoding contribution information of each verification node, the variable nodes connected to each verification node, and the number of surviving verification nodes associated with each variable node are determined.
[0012] Based on the recovery order information of the verification nodes and the decoding contribution information of each verification node, multiple first puncturing nodes are determined from the multiple verification nodes, and the parity bit positions corresponding to the multiple first puncturing nodes are stored in the parity bit subcode adaptation sequence. Furthermore, based on the variable nodes connected to each verification node and the number of surviving verification nodes associated with each variable node, multiple second puncturing nodes are determined from the multiple variable nodes, and the parity bit positions corresponding to the multiple second puncturing nodes are stored in the information bit subcode adaptation sequence.
[0013] In some embodiments, the decoding contribution information is a decoding contribution value; determining the decoding contribution information of each verification node based on the connection relationship between the verification node and the variable node in the bipartite graph corresponding to the i-th run includes:
[0014] Determine the first number of each verification node in the bipartite graph corresponding to the i-th run; the first number is the number of first punch nodes determined in the (i-1)-th run associated with the verification node;
[0015] The first preset contribution value is determined as the decoding contribution value of the first number of verification nodes equal to the first preset value;
[0016] The second preset contribution value is determined as the decoding contribution value of the first number of verification nodes that is greater than the first preset value;
[0017] The third preset contribution quantity is determined as the decoding contribution value of the verification node whose first quantity is equal to the second preset value;
[0018] Wherein, the first preset value is greater than the second preset value, the first preset contribution value is greater than the second preset contribution value, and the second preset contribution value is greater than the third preset contribution value.
[0019] In some embodiments, the verification node recovery order information is determined based on the connection relationship between the verification node and the variable node in the bipartite graph corresponding to the i-th run, including:
[0020] For each verification node in the first verification node set, the variable nodes connected to the verification node are stored in the first variable node set; the first verification node set includes a preset number of verification nodes whose decoding contribution information is sorted first.
[0021] Determine a second number for each variable node in the first variable node set; the second number is the number of verification nodes connected to and belonging to the first verification node set;
[0022] The second number of each variable node in the first set of variable nodes is determined as the verification node recovery order information.
[0023] In some embodiments, the step of determining multiple first puncturing nodes from multiple check nodes based on the check node recovery order information and the decoding contribution information of each check node, storing the check bit positions corresponding to the multiple first puncturing nodes in a check bit subcode adaptation sequence, and determining multiple second puncturing nodes from multiple variable nodes based on the variable nodes connected to each check node and the number of surviving check nodes associated with each variable node, storing the check bit positions corresponding to the multiple second puncturing nodes in an information bit subcode adaptation sequence, includes:
[0024] Based on the recovery order information of the verification nodes and the decoding contribution information of each verification node in the bipartite graph corresponding to the i-th run, a first set of verification nodes and a second set of verification nodes for the i-th run are generated respectively; the first set of verification nodes includes a preset number of verification nodes whose decoding contribution information is sorted first, and the second set of verification nodes includes multiple recoverable verification nodes.
[0025] The verification node that exists in both the first verification node set and the second verification node set is determined as the first punching node corresponding to the i-th run, and the position of the verification bit corresponding to the first punching node corresponding to the i-th run is stored at the end of the verification bit subcode adaptation sequence to obtain the verification bit subcode adaptation sequence corresponding to the i-th run.
[0026] Based on the variable nodes connected to each of the first set of verification nodes and the number of surviving verification nodes associated with each variable node, the second punch node corresponding to the i-th run is determined from the variable nodes in the bipartite graph corresponding to the i-th run, and the information bit position corresponding to the second punch node corresponding to the i-th run is stored at the end of the information bit subcode adaptation sequence to obtain the information bit subcode adaptation sequence corresponding to the i-th run.
[0027] Remove the first and second punched nodes corresponding to the i-th run from the bipartite graph corresponding to the i-th run to obtain the updated bipartite graph.
[0028] In some embodiments, the decoding contribution information is a decoding contribution value;
[0029] The step of generating a first set of verification nodes and a second set of verification nodes for the i-th run based on the recovery order information of the verification nodes and the decoding contribution information of each verification node in the bipartite graph corresponding to the i-th run includes:
[0030] The verification nodes in the bipartite graph corresponding to the i-th run are sequentially stored into the first verification node set in ascending order of their decoding contribution values.
[0031] Based on the first set of verification nodes and the information on the recovery order of the verification nodes, multiple verification nodes are determined from the bipartite graph corresponding to the i-th run, and the determined multiple verification nodes are stored in the second set of verification nodes.
[0032] In some embodiments, the verification node recovery order information includes a second number of multiple variable nodes that meet the conditions; the second number is the number of verification nodes connected to and belonging to the first verification node set.
[0033] The step of determining multiple verification nodes from the bipartite graph corresponding to the i-th run based on the first set of verification nodes and the verification node recovery order information, and storing the determined multiple verification nodes into the second set of verification nodes, includes:
[0034] For each verification node in the first set of verification nodes, the variable nodes connected to the verification nodes are stored in the first set of variable nodes;
[0035] According to the second quantity of each variable node in the first variable node set in ascending order, the verification nodes connected to each variable node are sequentially stored into the second verification node set.
[0036] In some embodiments, determining the second punch node corresponding to the i-th run from the variable nodes in the bipartite graph corresponding to the i-th run, based on the variable nodes connected to each of the first verification node sets and the number of surviving verification nodes associated with each variable node, includes:
[0037] According to the order of the verification nodes in the first set of verification nodes, the variable nodes that meet the first condition among the variable nodes connected to each verification node are sequentially stored in the second set of variable nodes; the first condition is that the number of associated surviving verification nodes is the minimum.
[0038] The variable nodes in the second set of variable nodes are determined as the second punching nodes corresponding to the i-th run.
[0039] In some embodiments, it also includes:
[0040] According to the order of the verification nodes in the first set of verification nodes, the variable nodes that meet the second condition among the variable nodes connected to each verification node are sequentially stored in the third set of variable nodes; the second condition is that the number of associated surviving verification nodes is the largest.
[0041] If the number of determined first punch nodes meets the maximum number of punches for the check bit, and the number of determined punch nodes does not reach the maximum number of punches for the information bit, then the variable nodes in the third variable node set are determined as the second punch nodes corresponding to the i-th run.
[0042] In some embodiments, obtaining the maximum number of punched holes for information bits and the maximum number of punched holes for check bits includes:
[0043] Based on the range of the mother code rate, code length, and child code rate, determine the maximum number of holes to be punched in the information bits and the maximum number of holes to be punched in the check bits.
[0044] In some embodiments, determining the maximum number of punctures for information bits and the maximum number of punctures for parity bits based on the mother code rate, code length, and child code rate range includes:
[0045] The product of the code length and the proportion of the information bits to be punctured is determined as the maximum number of punctured information bits; wherein, the proportion of the information bits to be punctured is the ratio of the amount of code rate to be reduced to the proportion of the parity bit; the amount of code rate to be reduced is the difference between the mother code rate and the minimum value of the sub-code rate range, and the proportion of the parity bit is the difference between 1 and the minimum value of the sub-code rate range.
[0046] The product of the code length and the proportion of the first parity bit to be punched is determined as the maximum number of parity bits to be punched; wherein, the proportion of the first parity bit to be punched is the ratio of the first bit rate to be increased to the maximum value of the sub-code bit rate range, and the first bit rate to be increased is the difference between the maximum value of the sub-code bit rate range and the mother code bit rate.
[0047] Secondly, this application provides an encoding method applied to an encoding device, the method comprising:
[0048] Obtain the sequence of information blocks to be encoded and the number of adaptations; the number of adaptations includes at least one of the number of information bit adaptations and the number of check bit adaptations;
[0049] If the adaptation quantity information includes the information bit adaptation quantity, then the position of the information bit to be punctured is determined from the information bit subcode adaptation sequence based on the information bit adaptation quantity, and the information bit to be punctured in the information block sequence to be encoded is punctured to obtain punctured data; and / or, if the adaptation quantity information includes the parity bit adaptation quantity, then the position of the parity bit to be punctured is determined from the parity bit subcode adaptation sequence based on the parity bit adaptation quantity, and the parity bit to be punctured in the subcode encoding sequence is punctured to obtain punctured data; the subcode encoding sequence is generated based on the information block sequence to be encoded;
[0050] Channel transmission is performed based on the data obtained after punching the holes.
[0051] In some embodiments, determining the position of the information bit to be punctured from the information bit subcode adaptation sequence based on the number of information bit adaptations, and puncturing the position of the information bit to be punctured in the information block sequence to obtain punctured data includes:
[0052] According to the order of the information bit positions in the information bit code adaptation sequence, a plurality of information bit positions to be punched are selected sequentially from the information bit code adaptation sequence; the number of the plurality of information bit positions to be punched is equal to the number of information bit adaptations.
[0053] Fill the information bit positions to be punched in the sequence of information blocks to be encoded with 0 to obtain the sequence of information blocks to be encoded after punching.
[0054] Accordingly, the channel transmission based on the punched data includes:
[0055] The punched information block sequence is encoded to obtain a sub-code encoding sequence;
[0056] The subcode encoded sequence is transmitted through the channel.
[0057] In some embodiments, determining the parity bit position to be punctured from the parity bit subcode adaptation sequence based on the number of parity bit adaptations, and puncturing the parity bit position to be punctured in the subcode encoding sequence includes:
[0058] The sequence of information blocks to be encoded is encoded to obtain a subcode encoding sequence;
[0059] According to the order of the parity bit positions in the parity bit adaptation sequence, a plurality of parity bit positions to be punched are selected sequentially from the parity bit adaptation sequence; the number of the plurality of parity bit positions to be punched is equal to the number of parity bit adaptations.
[0060] The data at the position of the parity bit to be punched in the subcode encoding sequence is deleted to obtain the adapted subcode encoding sequence;
[0061] Accordingly, the channel transmission based on the punched data includes:
[0062] The adapted subcode encoding sequence is then transmitted through the channel.
[0063] In some embodiments, it also includes:
[0064] If the preset length of a single encoded information block is less than the information bit length, and the channel transmission length is equal to the code length, then the difference between the information bit length and the length of the information block sequence to be encoded is determined as the number of information bit adaptations.
[0065] If the preset length of a single encoded information block is less than the information bit length and the channel transmission length is less than the code length, then the difference between the information bit length and the length of the information block sequence to be encoded is determined as the number of information bit adaptations, and the number of check bit adaptations is determined based on the number of information bit adaptations, the code length, the target subcode rate, and the mother code rate.
[0066] If the preset length of a single encoded information block is equal to the information bit length, and the channel transmission length is less than the code length, then the number of check bits to be adapted is determined based on the number of information bit adaptations, the code length, the target sub-code rate, and the mother code rate.
[0067] In some embodiments, determining the number of check bits to be adapted based on the number of information bits adapted, the code length, the target sub-code rate, and the mother code rate includes:
[0068] The sum of the number of holes required for the check bits and the number of holes required for the information bits is determined as the number of check bits to be matched.
[0069] Wherein, the number of punctures required for the check bits is the product of the code length and the proportion of the second check bits to be punctured; the proportion of the second check bits to be punctured is the ratio of the second code rate to be increased to the target sub-code rate, and the second code rate to be increased is the difference between the target sub-code rate and the mother code rate; the number of punctures required for the information bits is the product of the number of information bit adaptations and the ratio of check bits to information bits; the ratio of check bits to information bits is the ratio of the check bit proportion to the target sub-code rate; and the check bit proportion is the difference between 1 and the target sub-code rate.
[0070] Thirdly, this application provides a decoding method applied to a decoding device, the method comprising:
[0071] Obtain the data received based on channel transmission and the number of adaptations; the data includes an information bit sequence and a parity bit sequence; the number of adaptations includes at least one of the number of information bit adaptations and the number of parity bit adaptations;
[0072] If the adaptation quantity information includes the information bit adaptation quantity, then the information bit position to be recovered is determined from the information bit subcode adaptation sequence based on the information bit adaptation quantity, and the information bit position to be recovered in the information bit sequence is recovered to obtain the recovered data; and / or, if the adaptation quantity information includes the parity bit adaptation quantity, then the parity bit position to be recovered is determined from the parity bit subcode adaptation sequence based on the parity bit adaptation quantity, and the parity bit position to be recovered in the parity bit sequence is recovered to obtain the recovered data;
[0073] Decoding is performed based on the recovered data to obtain the decoding result.
[0074] In some embodiments, determining the position of the information bit to be recovered from the information bit subcode adaptation sequence based on the number of information bit adaptations, and recovering the position of the information bit to be recovered in the information bit sequence to obtain the recovered data includes:
[0075] According to the order of the information bit positions in the information bit code adaptation sequence, a plurality of information bit positions to be recovered are selected sequentially from the information bit code adaptation sequence; the number of the plurality of information bit positions to be recovered is equal to the number of information bit adaptations;
[0076] The information bit positions to be recovered in the information bit sequence are restored to the first preset value to obtain the recovered data.
[0077] In some embodiments, determining the position of the parity bit to be recovered from the parity bit subcode adaptation sequence based on the number of parity bit adaptations, and recovering the position of the parity bit to be recovered in the parity bit sequence to obtain the recovered data includes:
[0078] According to the order of the parity bit positions in the parity bit adaptation sequence, a plurality of parity bit positions to be recovered are selected sequentially from the parity bit adaptation sequence; the number of the plurality of parity bit positions to be recovered is equal to the number of parity bit adaptations.
[0079] The parity bit position to be recovered in the parity bit sequence is restored to the second preset value to obtain the recovered data.
[0080] In some embodiments, it also includes:
[0081] If the preset length of a single encoded information block is less than the information bit length, and the channel transmission length is equal to the code length, then the difference between the information bit length and the length of the information block sequence to be encoded is determined as the number of information bit adaptations.
[0082] If the preset length of a single encoded information block is less than the information bit length and the channel transmission length is less than the code length, then the difference between the information bit length and the length of the information block sequence to be encoded is determined as the number of information bit adaptations, and the number of check bit adaptations is determined based on the number of information bit adaptations, the code length, the target subcode code rate, and the mother code rate.
[0083] If the preset length of a single encoded information block is equal to the information bit length, and the channel transmission length is less than the code length, then the number of check bits to be adapted is determined based on the number of information bit adaptations, the code length, the target sub-code rate, and the mother code rate.
[0084] In some embodiments, determining the number of check bits to be adapted based on the number of information bits adapted, the code length, the target sub-code rate, and the mother code rate includes:
[0085] The sum of the number of holes required for the check bits and the number of holes required for the information bits is determined as the number of check bits to be matched.
[0086] Wherein, the number of punctures required for the check bits is the product of the code length and the proportion of the second check bits to be punctured; the proportion of the second check bits to be punctured is the ratio of the second code rate to be increased to the target sub-code rate, and the second code rate to be increased is the difference between the target sub-code rate and the mother code rate; the number of punctures required for the information bits is the product of the number of information bit adaptations and the ratio of check bits to information bits; the ratio of check bits to information bits is the ratio of the check bit proportion to the target sub-code rate; and the check bit proportion is the difference between 1 and the target sub-code rate.
[0087] Fourthly, this application provides a data generation apparatus, disposed within a generation device, the apparatus comprising:
[0088] The acquisition module is used to acquire the bipartite graph corresponding to the check matrix that matches the mother code pattern, the maximum number of holes punched in the information bits, and the maximum number of holes punched in the check bits; the bipartite graph includes multiple check nodes and multiple variable nodes;
[0089] The generation module is used to determine multiple first punch nodes from multiple verification nodes based on the connection relationship between verification nodes and variable nodes in the bipartite graph, store the verification bit positions corresponding to the multiple first punch nodes into a verification bit subcode adaptation sequence, and determine multiple second punch nodes from multiple variable nodes, store the information bit positions corresponding to the multiple second punch nodes into an information bit subcode adaptation sequence.
[0090] The number of the first punch nodes is equal to the maximum number of punches for the check bit; the number of the second punch nodes is equal to the maximum number of punches for the information bit; the check bit subcode adaptation sequence and the information bit subcode adaptation sequence are used for encoding by the encoding device and for decoding by the decoding device.
[0091] Fifthly, this application provides an encoding device disposed in an encoding apparatus, the device comprising:
[0092] The acquisition module is used to acquire the sequence of information blocks to be encoded and the number of adaptations; the number of adaptations includes at least one of the number of information bit adaptations and the number of check bit adaptations.
[0093] A punching module is configured to, if the adaptation quantity information includes an information bit adaptation quantity, determine the position of the information bit to be punched from the information bit subcode adaptation sequence based on the information bit adaptation quantity, and punch the information bit position to be punched in the information block sequence to be encoded to obtain punched data; and / or, if the adaptation quantity information includes a parity bit adaptation quantity, determine the position of the parity bit to be punched from the parity bit subcode adaptation sequence based on the parity bit adaptation quantity, and punch the parity bit position to be punched in the subcode encoding sequence to obtain punched data; the subcode encoding sequence is generated based on the information block sequence to be encoded;
[0094] A transmission module is used for channel transmission based on the punched data.
[0095] Sixthly, this application provides a decoding apparatus disposed in a decoding device, the apparatus comprising:
[0096] An acquisition module is used to acquire data received based on channel transmission and adaptation quantity information; the data includes an information bit sequence and a check bit sequence; the adaptation quantity information includes at least one of the information bit adaptation quantity and the check bit adaptation quantity.
[0097] The recovery module is configured to, if the adaptation quantity information includes the information bit adaptation quantity, determine the position of the information bit to be recovered from the information bit subcode adaptation sequence based on the information bit adaptation quantity, and recover the position of the information bit to be recovered in the information bit sequence to obtain the recovered data; and / or, if the adaptation quantity information includes the parity bit adaptation quantity, determine the position of the parity bit to be recovered from the parity bit subcode adaptation sequence based on the parity bit adaptation quantity, and recover the position of the parity bit to be recovered in the parity bit sequence to obtain the recovered data;
[0098] The decoding module is used to decode the recovered data to obtain the decoding result.
[0099] In a seventh aspect, this application provides an electronic device, including: a processor and a memory communicatively connected to the processor;
[0100] The memory stores computer-executed instructions;
[0101] The processor executes computer execution instructions stored in the memory to implement the data generation method as described in any of the first aspects, the encoding method as described in any of the second aspects, or the decoding method as described in any of the third aspects.
[0102] Eighthly, this application provides a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, are used to implement the data generation method as described in any of the first aspects, the encoding method as described in any of the second aspects, or the decoding method as described in any of the third aspects.
[0103] Ninthly, this application provides a computer program product, including a computer program that, when executed by a processor, implements the data generation method as described in any of the first aspects, the encoding method as described in any of the second aspects, or the decoding method as described in any of the third aspects.
[0104] The data generation method, encoding and decoding method, apparatus, electronic device, and medium provided in this application offer a scheme for offline generation of subcode adaptation sequences. By obtaining a bipartite graph of a check matrix that matches the parent code pattern, and based on the connection relationship between check nodes and variable nodes in the bipartite graph, multiple first punch nodes are determined from multiple check nodes, and the corresponding check bit positions are stored in the check bit subcode adaptation sequence. Based on the connection relationship between check nodes and variable nodes in the bipartite graph, multiple second punch nodes are determined from multiple variable nodes, and the corresponding information bit positions are stored in the information bit subcode adaptation sequence. This method references the connection relationship between check nodes and variable nodes in the bipartite graph, which can accurately determine possible punch positions, thereby storing the possible punch positions in the sequence and providing a basis for the encoding and decoding stages. Building upon this, in the encoding stage, suitable puncturing positions are directly selected from the parity bit subcode adaptation sequence to puncture the information block sequence to be encoded, and suitable puncturing positions are selected from the information bit subcode adaptation sequence to puncture the subcode encoding sequence. This reduces the complexity of determining puncturing positions online, improves overall encoding efficiency, and is more suitable for communication scenarios with high real-time requirements. Furthermore, in the decoding stage, suitable recovery positions are directly selected from the parity bit subcode adaptation sequence to recover the parity bit sequence in the received data, and suitable recovery positions are selected from the information bit subcode adaptation sequence to recover the information bit sequence in the received data. This reduces the complexity of determining recovery positions online, improves overall decoding efficiency, and is more suitable for communication scenarios with high real-time requirements. Attached Figure Description
[0105] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.
[0106] Figure 1 This is a schematic diagram of an application scenario provided in this application;
[0107] Figure 2 This is a flowchart illustrating a data generation method provided in this application;
[0108] Figure 3 This is a flowchart illustrating another data generation method provided in this application;
[0109] Figure 4 This is a flowchart illustrating an encoding method provided in this application;
[0110] Figure 5 This is a flowchart illustrating another encoding method provided in this application;
[0111] Figure 6 This is a flowchart illustrating yet another encoding method provided in this application;
[0112] Figure 7 This is a flowchart illustrating the decoding method provided in this application;
[0113] Figure 8 This is a flowchart illustrating another decoding method provided in this application;
[0114] Figure 9 This is a flowchart illustrating yet another decoding method provided in this application;
[0115] Figure 10 This is a schematic diagram of a coding / decoding process provided in this application;
[0116] Figure 11 This is a schematic diagram of another encoding / decoding process provided in this application;
[0117] Figure 12 This is a schematic diagram of yet another encoding / decoding process provided in this application;
[0118] Figure 13 This is a schematic diagram of yet another encoding / decoding process provided in this application;
[0119] Figure 14 This is a schematic diagram of yet another encoding / decoding process provided in this application;
[0120] Figure 15 This is a schematic diagram of yet another encoding / decoding process provided in this application;
[0121] Figure 16 This is a schematic diagram of a compatible code construction process and a code rate compatible encoding and decoding process provided in this application;
[0122] Figure 17 This is a schematic diagram of the structure of a data generation device provided in this application;
[0123] Figure 18 This is a schematic diagram of the structure of an encoding device provided in this application;
[0124] Figure 19 This is a schematic diagram of the structure of a decoding device provided in this application;
[0125] Figure 20 This is a schematic diagram of the structure of an electronic device provided in this application.
[0126] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation
[0127] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.
[0128] Rate-compatible coding is a coding technique that supports dynamic adjustment of the code rate based on channel conditions or service requirements, thereby supporting channel-coded transmission with different code rates. This technique achieves flexible code rate adjustment by designing a basic coding structure (such as a "master code") and allowing the derivation of sub-codes with different code rates from the master code.
[0129] In related technologies, rate-compatible coding based on low-density parity-check code (LDPC) is mainly achieved through methods such as puncturing and expansion.
[0130] Research on rate-compatible coding of LDPC codes mainly focuses on finding better rate-compatible puncturing algorithms, which are used to obtain high-rate codewords from low-rate codewords. These algorithms are mainly divided into two categories: random puncturing algorithms and non-random puncturing algorithms. Most currently used puncturing methods are based on grouping and sorting algorithms, or are optimizations of these algorithms. For example, they may incorporate internal structure evaluation and measurement of the LDPC code to select puncturing positions, or improve performance by modifying the measurement function of the puncturing nodes. However, these puncturing algorithms are limited to specific channel conditions or LDPC code types (such as lower triangular / approximate lower triangular codes, quasi-cyclic codes, or double-diagonal LDPC codes), resulting in poor applicability. Once the channel or code type changes, the corresponding measurement function and structure evaluation strategy become inapplicable.
[0131] Compared to puncturing algorithms, extension is also a method for achieving rate-compatible coding. However, extension adds more parity information, using the expansion of the parity-check matrix to achieve rate-compatible transitions from high-rate codewords to low-rate codewords. Extension is more suitable for Hybrid Automatic Repeat Request (HARQ) systems and not for unidirectional satellite channel transmission requirements.
[0132] Furthermore, in existing LDPC-based rate-compatible coding schemes, the encoding and decoding of compatible codes are implemented using independent rate / de-rate matching modules at the transmitting and receiving ends. This includes tasks such as puncturing / restoring encoded codewords or adjusting the error correction code parity-check matrix. In this scheme, rate adaptation via real-time rate matching algorithms results in high overhead and complexity for the encoding and decoding system, leading to low encoding and decoding efficiency. It also makes it difficult to guarantee the reliability of encoding at various code rates with relatively low complexity, resulting in significant performance loss for compatible subcodes and low transmission reliability.
[0133] Based on this, this application proposes a data generation method, encoding and decoding method, apparatus, electronic device and medium, aiming to solve the above-mentioned technical problems.
[0134] The technical solutions of this application embodiment can be applied to various communication systems, such as: satellite communication systems, Long Term Evolution (LTE) systems, LTE Frequency Division Duplex (FDD) systems, LTE Time Division Duplex (TDD) systems, Universal Mobile Telecommunication System (UMTS), Worldwide Interoperability for Microwave Access (WiMAX) communication systems, future 5th Generation (5G) communication systems or new radio access technology (NR), vehicle-to-other devices (V2X), where V2X can include vehicle-to-network (V2N), vehicle-to-vehicle (V2V), vehicle-to-infrastructure (V2I), vehicle-to-pedestrian (V2P), etc., Long Term Evolution-Vehicle (LTE-V) communication, vehicle-to-everything (V2X) networks, and machine-type communications. Type communication (MTC), Internet of Things (IoT), Long Term Evolution-Machine (LTE-M), Machine to Machine (M2M), etc.
[0135] Figure 1 This is a schematic diagram illustrating one application scenario provided in this application. For example... Figure 1 As shown, this application scenario is a communication system, which may include at least two network devices; this application does not limit this. For example, Figure 1 The communication system 10 shown includes two network devices: network device 101 and network device 102.
[0136] Each of the aforementioned network devices can be configured with multiple antennas. These multiple antennas may include at least one transmitting antenna for transmitting signals and at least one receiving antenna for receiving signals. Additionally, each network device also includes a transmitter chain and a receiver chain, which, as will be understood by those skilled in the art, may include multiple components related to signal transmission and reception (e.g., processors, modulators, multiplexers, demodulators, demultiplexers, or antennas). Therefore, network devices can communicate with each other using multi-antenna technology.
[0137] Optionally, the communication system may also include other network entities such as a network controller and a mobility management entity, but the embodiments of this application are not limited thereto.
[0138] In this embodiment of the application, the network device can be any device with wireless transceiver capabilities. This equipment includes, but is not limited to: evolved Node B (eNB), Radio Network Controller (RNC), Node B (NB), Base Station Controller (BSC), Base Transceiver Station (BTS), Home base station (e.g., Home evolved Node B, or HomeNode B, HNB), Base Band Unit (BBU), Access Point (AP), Wireless Relay Node, Wireless Backhaul Node, Transmission Point (TP), or Transmission and Reception Point (TRP) in a Wireless Fidelity (WIFI) system. It can also be a gNB in a 5G system, such as NR, or a transmission point (TRP or TP), one or a group of antenna panels (including multiple antenna panels) of a base station in a 5G system, or a network node constituting a gNB or transmission point, such as a Base Band Unit (BBU) or a Distributed Unit (DU).
[0139] In some deployments, a gNB may include a centralized unit (CU) and a distribution unit (DU). The gNB may also include an active antenna unit (AAU). The CU implements some of the gNB's functions, and the DU implements others. For example, the CU handles non-real-time protocols and services, implementing radio resource control (RRC) and packet data convergence protocol (PDCP) layer functions. The DU handles physical layer protocols and real-time services, implementing radio link control (RLC), media access control (MAC), and physical (PHY) layer functions. The AAU implements some physical layer processing functions, radio frequency processing, and active antenna-related functions. Since RRC layer information ultimately becomes PHY layer information, or is derived from PHY layer information, in this architecture, higher-layer signaling, such as RRC layer signaling, can be considered to be sent by the DU, or by the DU+AAU. It is understood that network devices can be devices that include one or more of the following: CU nodes, DU nodes, and AAU nodes. In addition, the CU can be classified as a network device in the radio access network (RAN) or as a network device in the core network (CN), and this application does not limit this.
[0140] In one application scenario, the communication system is a base station communication system. The network equipment in the base station communication system includes base stations and mobile stations. Spatial diversity is achieved by several spatially separated base stations to achieve full or partial coverage of the same area. Each base station can independently send signals to the mobile station, and the mobile station can receive signals from each base station.
[0141] In another application scenario, the communication system is a satellite communication system. The network equipment in the satellite communication system includes satellite equipment and ground equipment. Each satellite equipment can send signals to the ground equipment, and the ground equipment receives the signals from each satellite equipment.
[0142] In this application, signal transmission and reception involve encoding and decoding operations. Specifically, before transmitting a signal, network device 1 encodes the signal and sends the encoded data to network device 2. The network device then decodes the received data to obtain the original signal. For ease of description, this application refers to the network device transmitting the signal as an encoding device and the network device receiving the signal as a decoding device.
[0143] It should be noted that the signal involved in this application may also be called data or other suitable names, and this application does not limit it in this regard.
[0144] This application provides a generation device. The generation device is used to generate a subcode adaptation sequence. Optionally, the subcode adaptation sequence includes a check bit subcode adaptation sequence and an information bit subcode adaptation sequence. Exemplarily, the generation device can be any electronic device, such as a terminal, server, or network device.
[0145] This application provides an encoding device. This encoding device is used for encoding based on subcode adaptation sequences.
[0146] This application provides a decoding device. This decoding device is used for decoding based on subcode adaptation sequences.
[0147] In some embodiments, the generating device generates a subcode adaptation sequence by executing the data generation method provided in this application, and sends the subcode adaptation sequence to the encoding device and the decoding device respectively; the encoding device receives the subcode adaptation sequence sent by the generating device and stores the subcode adaptation sequence, and performs encoding based on the subcode adaptation sequence by executing the encoding method provided in this application; the decoding device receives the subcode adaptation sequence sent by the generating device and stores the subcode adaptation sequence, and performs decoding based on the subcode adaptation sequence by executing the decoding method provided in this application.
[0148] In other embodiments, the generating device generates a subcode adaptation sequence by executing the data generation method provided in this application, and stores the subcode adaptation sequence. A technician manually adds the subcode adaptation sequence to both the encoding and decoding devices, such that the encoding device stores the subcode adaptation sequence and performs encoding based on the subcode adaptation sequence by executing the encoding method provided in this application; and the decoding device stores the subcode adaptation sequence and performs decoding based on the subcode adaptation sequence by executing the decoding method provided in this application.
[0149] In other embodiments, the encoding and decoding devices may also acquire the subcode adaptation sequence in other ways, which are not limited in this application.
[0150] The data generation method provided in this application is executed by a data generation device, which is integrated into a generation equipment. The encoding method provided in this application is executed by an encoding device, which is integrated into an encoding equipment. The decoding method provided in this application is executed by a decoding device, which is integrated into a decoding equipment.
[0151] The technical solution of this application and how it solves the above-mentioned technical problems will be described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will be described below with reference to the accompanying drawings.
[0152] Figure 2 This is a flowchart illustrating a data generation method provided in this application. Figure 2 As shown, the data generation method includes the following steps:
[0153] Step S101: Obtain the bipartite graph corresponding to the check matrix that matches the mother code pattern, the maximum number of holes for information bits, and the maximum number of holes for check bits; the bipartite graph includes multiple check nodes and multiple variable nodes.
[0154] Among them, the LDPC code is called the rate-compatible mother code, and the code that is compatible with the mother code is called the child code corresponding to the mother code.
[0155] For example, the mother code can be represented as (N, K), where N is the length of the mother code, K is the length of the information bits, the parity bit length M = NK, and the mother code rate R0 = K / N. The sub-code rate range is [R min ,R max ], where R min R is the minimum subcode rate. max This represents the maximum subcode rate. In practical applications, the target subcode rate is R. m And R m ∈[R min ,R max ].
[0156] The parity-check matrix H is an m×n matrix, where m is the number of parity-check equations (i.e., the number of parity bits), and n is the total length of the codeword, also known as the master code, which includes information bits and parity bits. Therefore, n is the length N of the master code. The parity-check matrix is a sparse matrix, meaning it contains only a small number of non-zero elements (usually "1"), with the majority of elements being "0". Each row of the parity-check matrix represents a parity-check equation, and each column represents a bit in the codeword. If an element in a row and column of the parity-check matrix is "1", it means that the corresponding bit in that column participates in the parity-check equation for that row. Thus, the parity-check matrix defines the parity-check relationship of the codeword and determines the complexity and performance of the decoding algorithm.
[0157] Optionally, this embodiment determines the corresponding parity-check matrix based on the code pattern of the mother code. It is understood that different mother code patterns result in different parity-check matrices. Therefore, when the mother code pattern is determined, the parity-check matrix is also determined. Optionally, the parity-check matrix can be constructed using various methods, including random construction and structured construction. Random construction methods typically involve randomly placing "1" elements based on a certain probability distribution, while structured construction methods utilize algebraic or combinatorial methods to ensure that the H matrix possesses specific properties.
[0158] In this embodiment, a bipartite graph (Tanner graph) is used to represent the parity check matrix. This bipartite graph is a two-way bipartite graph containing two types of nodes: variable nodes (corresponding to columns of the parity check matrix) and parity nodes (corresponding to rows of the parity check matrix). If an element in a row and column of the parity check matrix is "1", then a line connects the corresponding variable node and parity node in the bipartite graph.
[0159] Optionally, nodes in a bipartite graph can be represented using data structures. Examples include arrays, lists, and adjacency lists. For instance, using an array or list, one can store information about variable nodes. Each element in the array or list can be a structure or object containing information such as the node index and a list of related check nodes. The list of related check nodes stores each check node connected to the variable node. Similarly, another array or list can be used to store information about check nodes. Each element in the array or list may be a structure or object containing information such as the node index and a list of related variable nodes. The list of related variable nodes stores each variable node connected to the check node.
[0160] The maximum number of punctures in the information bit (also known as the maximum adaptable length of the information block) represents the maximum number of bits that can be punched from the information bit during the punching process. The information bit comprises multiple bits; for ease of distinction, this application refers to this bit as the information bit position.
[0161] The maximum number of punctures in the parity bit (also known as the maximum fit length of the parity block) indicates the maximum number of bits that can be punched from the parity bit during the punching process. The parity bit consists of multiple bits, and for ease of distinction, this application refers to this bit as the parity bit position.
[0162] In some embodiments, the bipartite graph, the maximum number of punctures in the information bits, and the maximum number of punctures in the parity check matrix corresponding to the master code pattern are predetermined and stored in the generation device. This allows the stored bipartite graph, the maximum number of punctures in the information bits, and the maximum number of punctures in the parity check bits to be directly retrieved when a subcode adaptation sequence needs to be generated, thereby accelerating data generation and reducing latency. In other embodiments, the bipartite graph, the maximum number of punctures in the information bits, and the maximum number of punctures in the parity check bits are determined only when a subcode adaptation sequence needs to be generated. Since these parameters are determined only when needed, they can be dynamically adjusted according to current requirements, offering greater flexibility and better adaptability to different application scenarios and needs. When storage resources are limited, not pre-storing these parameters can reduce storage space usage.
[0163] Step S102: Based on the connection relationship between the check nodes and variable nodes in the bipartite graph, determine multiple first punch nodes from multiple check nodes, store the check bit positions corresponding to the multiple first punch nodes in the check bit subcode adaptation sequence, and determine multiple second punch nodes from multiple variable nodes, store the information bit positions corresponding to the multiple second punch nodes in the information bit subcode adaptation sequence.
[0164] The number of first punch nodes is equal to the maximum number of punches for the check bits; the number of second punch nodes is equal to the maximum number of punches for the information bits; the check bit subcode adaptation sequence and the information bit subcode adaptation sequence are used for encoding by the encoding device and for decoding by the decoding device.
[0165] In this embodiment, the number of check nodes in the bipartite graph is the same as the number of check bits in the mother code check bits, and there is a one-to-one correspondence between check nodes and check bits. This embodiment selects multiple first-punctured nodes from the multiple check nodes. Each first-punctured node represents a check node that can be punctured, and the corresponding check bit position can be considered a check bit position that can be punctured. Therefore, this check bit position can be stored in the check bit subcode adaptation sequence. Similarly, the number of variable nodes in the bipartite graph is the same as the number of information bits in the mother code information bits, and there is a one-to-one correspondence between variable nodes and information bits. This embodiment selects multiple second-punctured nodes from the multiple variable nodes. Each second-punctured node represents a variable node that can be punctured, and the corresponding information bit position can be considered an information bit position that can be punctured. Therefore, this information bit position can be stored in the information bit subcode adaptation sequence.
[0166] Among them, the total number of multiple check bit positions contained in the check bit subcode adaptation sequence is equal to the maximum number of check bits punched, and the total number of multiple information bit positions contained in the information bit subcode adaptation sequence is equal to the maximum number of information bits punched.
[0167] For example, let Inf represent the information bit code adaptation sequence, Inf = {inf0, inf1, ..., inf...} i ,...,inf I}, where inf i Let be a real number between [0, K-1], representing the position of the (i+1)th information bit in the information bit subcode adaptation sequence, where i ∈ [0, I] and I represents the maximum number of punctures in the information bit. For example, let Pnf represent the check bit subcode adaptation sequence, Pnf = {pnf0, pnf1, ..., pnf...} j ,...,pnf P}, where pnf j Let be a real number between [K, N-1], representing the position of the (j+1)th parity bit in the parity bit subcode adaptation sequence, where j∈[0, P] and P represents the maximum number of punctures in the parity bit.
[0168] This embodiment provides a scheme for generating subcode adaptation sequences offline. By obtaining a bipartite graph of the parity check matrix that matches the parent code pattern, and based on the connection relationship between the parity check nodes and variable nodes in the bipartite graph, multiple first punch nodes are determined from multiple parity check nodes, and the corresponding parity bit positions are stored in the parity bit subcode adaptation sequence. Based on the connection relationship between the parity check nodes and variable nodes in the bipartite graph, multiple second punch nodes are determined from multiple variable nodes, and the corresponding information bit positions are stored in the information bit subcode adaptation sequence. This method refers to the connection relationship between the parity check nodes and variable nodes in the bipartite graph, which can accurately determine the possible punch positions, and thus store the possible punch positions in the sequence, providing a basis for the encoding and decoding stages.
[0169] Figure 3 This is a flowchart illustrating another data generation method provided in this application, such as... Figure 3 As shown, the data generation method provided in this embodiment is based on the data generation method provided in the previous embodiment of this application, with further refinements to steps S101 and S102. The data generation method provided in this embodiment includes the following steps:
[0170] Step S201: Obtain the bipartite graph corresponding to the check matrix that matches the mother code pattern.
[0171] In some embodiments, the implementation of step S201 is the same as that of step S101, and will not be described again here.
[0172] Step S202: Obtain the maximum number of holes for the information bits and the maximum number of holes for the check bits.
[0173] In some embodiments, step S202 is specifically implemented as: determining the maximum number of punctures for information bits and the maximum number of punctures for parity bits based on the mother code rate, code length, and sub-code rate range.
[0174] Optionally, when the master code pattern is determined, the generating device pre-stores the master code rate, code length, and sub-code rate range. Accordingly, based on the stored master code rate, code length, and sub-code rate range, the maximum number of punctures for information bits and the maximum number of punctures for check bits are determined.
[0175] For example, the mother code can be represented as (N, K), where N is the length of the mother code (i.e., code length), K is the information bit length, the check bit length M = NK, and the mother code rate R0 = K / N. The code rate range of the subcode is [R min ,R max ], where R min R is the minimum subcode rate. max This represents the maximum subcode rate. In practical applications, the target subcode rate is R. m And R m ∈[R min ,R max ].
[0176] In some embodiments, the maximum number of punctures for information bits and the maximum number of punctures for parity bits are determined based on the mother code rate, code length, and sub-code rate range, including the following steps S2021-S2022:
[0177] Step S2021: The product of the code length and the proportion of the information bits to be punched is determined as the maximum number of punches for the information bits.
[0178] Among them, the proportion of information bits to be punched is the ratio of the amount of code rate to be reduced to the proportion of check bits; the amount of code rate to be reduced is the difference between the minimum value of the range of the mother code code rate and the child code code rate, and the proportion of check bits is the difference between 1 and the minimum value of the range of the child code code rate.
[0179] Optionally, step S2021 is derived from the formula Implementation. Where I represents the maximum number of punctures in the information bits, N is the code length, K is the information bit length, R0 is the mother code rate, and R... min This represents the minimum subcode rate.
[0180] Step S2022: The product of the code length and the proportion of the first check bit to be punched is determined as the maximum number of check bits to be punched.
[0181] The proportion of the first parity bit to be punched is the ratio of the first bit rate to be increased to the maximum value of the sub-code bit rate range, and the first bit rate to be increased is the difference between the maximum value of the sub-code bit rate range and the mother code bit rate.
[0182] Optionally, step S2022 is derived from the formula Implementation. Where P is the maximum number of punctures in the parity bit, N is the code length, M is the parity bit length, R0 is the mother code rate, and R... max This represents the maximum subcode rate.
[0183] In this embodiment, by calculating the amount of code rate to be reduced and the amount of code rate to be increased, the code rate of the subcode can be precisely controlled. This is crucial for communication systems that need to flexibly switch between different code rates, ensuring normal operation under various conditions. By determining the maximum number of punctures for information bits and parity bits, the utilization of encoding resources can be optimized, avoiding excessive redundant information and reducing unnecessary computational and storage overhead. By rationally allocating the number of punctures for information bits and parity bits, robustness can be enhanced, providing sufficient error correction capability even at lower code rates, ensuring the reliability of data transmission. This method allows for flexible adjustment of the ratio of information bits and parity bits within different code rate ranges, making the encoding scheme more adaptable. A balance can be found at both high and low code rates to meet the needs of different application scenarios.
[0184] This application does not limit the execution order of steps S201 and S202. In some embodiments, step S201 may be executed first, followed by step S202; step S202 may be executed first, followed by step S201; or steps S201 and S202 may be executed simultaneously. This embodiment only illustrates the example of executing step S201 first, followed by step S202; other cases are similar and will not be described in detail here.
[0185] In some embodiments, after step S202, step S102 is executed, that is, based on the connection relationship between the check nodes and variable nodes in the bipartite graph, multiple first punch nodes are determined from multiple check nodes, and the check bit positions corresponding to the multiple first punch nodes are stored in the check bit subcode adaptation sequence; and multiple second punch nodes are determined from multiple variable nodes, and the information bit positions corresponding to the multiple second punch nodes are stored in the information bit subcode adaptation sequence.
[0186] In some embodiments, step S102 is specifically implemented as follows: based on the bipartite graph corresponding to the i-th run, perform the i-th run process until the number of determined first punch nodes is equal to the maximum number of punches for the check bits, and the number of determined second punch nodes is equal to the maximum number of punches for the information bits. Where i is a positive integer greater than or equal to 1.
[0187] The first implementation method: The i-th running process includes:
[0188] Based on the connection relationship between the verification nodes and variable nodes in the bipartite graph corresponding to the i-th run, determine the verification node recovery order information, the decoding contribution information of each verification node, the variable nodes connected to each verification node, and the number of surviving verification nodes associated with each variable node.
[0189] Based on the recovery order information of the check nodes and the decoding contribution information of each check node, multiple first puncture nodes are determined from multiple check nodes, and the check bit positions corresponding to the multiple first puncture nodes are stored in the check bit subcode adaptation sequence. Furthermore, based on the variable nodes connected to each check node and the number of surviving check nodes associated with each variable node, multiple second puncture nodes are determined from multiple variable nodes, and the check bit positions corresponding to the multiple second puncture nodes are stored in the information bit subcode adaptation sequence.
[0190] As can be seen, step S102 includes multiple loops, in which multiple first punch nodes are determined and stored in the check bit subcode adaptation sequence, and multiple second punch nodes are determined and stored in the information bit subcode adaptation sequence, and so on, until the total number of check bit positions in the check bit subcode adaptation sequence is equal to the maximum number of check bits punched, and the total number of information bit positions in the information bit subcode adaptation sequence is equal to the maximum number of information bits punched.
[0191] By repeatedly running the algorithm and gradually determining the punching nodes, the number of punches for parity bits and information bits can be precisely controlled. Determining punching nodes based on the parity node recovery order information and decoding contribution information ensures that nodes that significantly contribute to decoding are preserved during the punching process, thereby improving overall decoding performance. By considering the number of surviving parity nodes associated with variable nodes, more redundant information can be retained during punching, enhancing the system's robustness and error correction capabilities, which is particularly important for data transmission in noisy environments. This scheme determines punching nodes through the connectivity relationships in a bipartite graph, enabling a more rational allocation of parity and information bit resources and avoiding resource waste.
[0192] The second implementation method: The i-th running process includes:
[0193] Based on the connection relationship between the check nodes and variable nodes in the bipartite graph corresponding to the i-th run, the recovery order information of the check nodes and the decoding contribution information of each check node are determined. Based on the recovery order information of the check nodes and the decoding contribution information of each check node, multiple first puncture nodes are determined from multiple check nodes, and the check bit positions corresponding to the multiple first puncture nodes are stored in the check bit subcode adaptation sequence. Based on the connection relationship between the check nodes and variable nodes in the bipartite graph corresponding to the i-th run, the number of variable nodes connected to each check node and the number of surviving check nodes associated with each variable node are determined. Based on the number of variable nodes connected to each check node and the number of surviving check nodes associated with each variable node, multiple second puncture nodes are determined from multiple variable nodes, and the check bit positions corresponding to the multiple second puncture nodes are stored in the information bit subcode adaptation sequence.
[0194] The following is a detailed explanation of the specific implementation of the i-th run in the first implementation method. The specific implementation of the second implementation method is the same as that of the first implementation method, and will not be repeated here.
[0195] Step S203: Based on the connection relationship between the check nodes and variable nodes in the bipartite graph corresponding to the i-th run, determine the check node recovery order information, the decoding contribution information of each check node, the variable nodes connected to each check node, and the number of surviving check nodes associated with each variable node.
[0196] Among them, the decoding contribution information of the verification node is used to indicate the degree of contribution of the verification node to the decoding.
[0197] In some embodiments, the decoding contribution information is the decoding contribution value; then, based on the connection relationship between the verification nodes and variable nodes in the bipartite graph corresponding to the i-th run, the decoding contribution information of each verification node is determined, specifically implemented as follows: determining the first number of each verification node in the bipartite graph corresponding to the i-th run; when the first number of verification nodes is equal to a first preset value, determining the first preset contribution value as the decoding contribution value of the verification node; when the first number of verification nodes is greater than the first preset value, determining the second preset contribution value as the decoding contribution value of the verification node; when the first number of verification nodes is equal to the second preset value, determining the third preset contribution number as the decoding contribution value of the verification node.
[0198] Optionally, the first number of verification nodes is the number of reference punch nodes, where each reference punch node is the first punch node associated with the verification node and determined during the first to (i-1)th runs. In this embodiment, there are no connections between verification nodes in the bipartite graph, but there are connections between verification nodes and variable nodes. Furthermore, multiple first punch nodes are determined in each run. Therefore, for any given verification node, the first punch node associated with that verification node can be considered as the first punch node connected to the variable node connected to that verification node.
[0199] Wherein, the first preset value is greater than the second preset value, the first preset contribution value is greater than the second preset contribution value, and the second preset contribution value is greater than the third preset contribution value. Optionally, the first preset value is 1, and the second preset value is 0. Optionally, the first, second, and third preset contribution values can be set according to actual needs, as long as the above-mentioned size relationship is met. This application does not limit this, for example, the first, second, and third preset contribution values are 1, 2, and 3, respectively.
[0200] In iterative decoding, if a check node is associated with only one punctured node, that punctured node is likely to be quickly recovered in the first iteration. This is because the information received by the check node is relatively simple at this point; it only needs to consider the state of this one punctured node, thus providing more direct and accurate feedback. When a check node is associated with multiple punctured nodes, the information it receives becomes more complex. Because it needs to consider the states of multiple punctured nodes simultaneously, the check node needs to consider more factors when determining whether the parity check equation is satisfied and when propagating error information. Check nodes not associated with any punctured nodes have no direct role in recovering punctured node information; they mainly participate in the verification of unpunctured bits and error detection. Therefore, in iterative decoding, the decoding contribution of a check node is closely related to the number of punctured nodes it is associated with; thus, the contribution value can be determined based on the number of punctured nodes it is associated with.
[0201] In this embodiment, the verification node associated with only one first punch node has the largest decoding contribution value because it can quickly recover the punch node information; the verification node associated with multiple first punch nodes has the next largest decoding contribution value because it needs to process more complex information and may need to be iterated multiple times to recover the punch node; and the verification node not associated with any first punch node, although it does not directly participate in the recovery process of the punch node, plays an important role in maintaining codeword verification consistency.
[0202] Optionally, the first number of verification nodes can also be the number of reference verification nodes, which are the verification nodes associated with the current verification node. In this embodiment, there is no connection between verification nodes in the bipartite graph, but there is a connection between verification nodes and variable nodes. Therefore, for any verification node, the verification nodes associated with the current verification node can be regarded as other verification nodes connected to the variable nodes connected to the current verification node.
[0203] The check node recovery order information is used to indicate the recovery order of check nodes during the decoding process. Optionally, the check node recovery order information includes a second number of each variable node, where the second number of a variable node is the number of check nodes connected to that variable node and belonging to the first check node set. The first check node set includes a preset number of check nodes whose decoding contribution information is ranked first. Optionally, the preset number is equal to the maximum number of punctures in the check bits.
[0204] In some embodiments, the verification node recovery order information is determined based on the connection relationship between the verification node and the variable node in the bipartite graph corresponding to the i-th run. Specifically, this is implemented as follows:
[0205] For each verification node in the first set of verification nodes, store the variable nodes connected to the verification nodes into the first set of variable nodes; determine the second number of each variable node in the first set of variable nodes; and use the second number of each variable node in the first set of variable nodes as the verification node recovery order information.
[0206] Specifically, according to the order of the verification nodes in the first set of verification nodes, for each verification node, all variable nodes connected to that verification node are sequentially stored in the first set of variable nodes.
[0207] Here, the surviving check node associated with a variable node refers to a check node that is connected to only one variable node among all the check nodes connected to that variable node. In other words, the surviving check node associated with a variable node is only connected to that variable node and is not connected to any other variable nodes.
[0208] Step S204: Based on the verification node recovery order information and the decoding contribution information of each verification node in the bipartite graph corresponding to the i-th run, generate the first verification node set and the second verification node set for the i-th run respectively.
[0209] The first set of check nodes includes a predetermined number of check nodes whose decoding contribution information is ranked first, and the predetermined number is equal to the maximum number of punctures in the check bits. The second set of check nodes includes multiple recoverable check nodes. Optionally, the recoverable check nodes are at least one of a 1-step recoverable node and a 2-step recoverable node. Specifically, based on the recovery order of the first puncture nodes in the decoding process, the first puncture node that can obtain non-zero information in the first iteration is called a one-step recoverable (1-SR) node, and the first puncture node that recovers in the k-th iteration is called a k-step recoverable (k-SR) node.
[0210] In some embodiments, the decoding contribution information is a decoding contribution value; then step S204 is specifically implemented as the following steps S2041-S2042:
[0211] Step S2041: Store each verification node in the bipartite graph corresponding to the i-th run in the first verification node set in ascending order of decoding contribution value.
[0212] Alternatively, you can simply store the first preset number of verification nodes into the first verification node set.
[0213] Step S2042: Based on the first set of verification nodes and the information on the recovery order of verification nodes, determine multiple verification nodes from the bipartite graph corresponding to the i-th run, and store the determined multiple verification nodes into the second set of verification nodes.
[0214] By sorting the check nodes in ascending order of their decoding contribution values and storing them in the first check node set, some check nodes that may serve as the first punch node are selected from the perspective of decoding contribution values. The second check node set is determined based on the first check node set and the check node recovery order information, and some check nodes that may serve as the first punch node are selected from the perspective of decoding recovery order.
[0215] In some embodiments, the verification node recovery order information includes a second number of multiple variable nodes that meet the conditions; the second number of variable nodes is the number of verification nodes connected to the variable node and belonging to the first verification node set. Accordingly, step S2042 is specifically implemented as follows: for each verification node in the first verification node set, the variable nodes connected to the verification node are stored in the first variable node set; according to the order of the second number of each variable node in the first variable node set from smallest to largest, the verification nodes connected to each variable node are sequentially stored in the second verification node set.
[0216] The first set of check nodes stores check nodes that may become the first punch node. The smaller the number of variable nodes, the smaller the number of check nodes that the variable node is connected to that may become the first punch node. If a check node connected to the variable node is the first punch node, the first punch node is easier to recover during decoding. Therefore, the check node can be stored in the second set of check nodes first.
[0217] Step S205: The verification node that exists in both the first verification node set and the second verification node set is determined as the first punching node corresponding to the i-th run.
[0218] The first set of verification nodes and the second set of verification nodes each contain verification nodes that may become the first punch node. Therefore, the verification nodes in the intersection of the two sets are more likely to become the first punch node. Thus, these verification nodes can be identified as the first punch node with high accuracy.
[0219] Step S206: Store the position of the parity bit corresponding to the first punch node corresponding to the i-th run into the end of the parity bit subcode adaptation sequence to obtain the parity bit subcode adaptation sequence corresponding to the i-th run.
[0220] In the parity bit subcode adaptation sequence, the positions of each parity bit are arranged sequentially according to the order of the determined time. The parity bit positions determined first have higher priority and are selected more preferentially by the encoding and decoding operations.
[0221] Step S207: Based on the variable nodes connected to each verification node in the first verification node set and the number of surviving verification nodes associated with each variable node, determine the second punch node corresponding to the i-th run from the variable nodes in the bipartite graph corresponding to the i-th run.
[0222] In some embodiments, step S207 is specifically implemented as follows:
[0223] According to the order of the verification nodes in the first verification node set, the variable nodes that meet the first condition among the variable nodes connected to each verification node are stored in the second variable node set in sequence; the first condition is that the number of associated surviving verification nodes is the minimum; the variable nodes in the second variable node set are determined as the second punching nodes corresponding to the i-th run.
[0224] If the number of surviving check nodes associated with a variable node is smaller, then the variable node can recover faster when it is the second punch node. Therefore, the variable node can be used as the second punch node.
[0225] In some embodiments, the data generation method provided in this application further includes:
[0226] According to the order of the verification nodes in the first set of verification nodes, the variable nodes that meet the second condition among the variable nodes connected to each verification node are stored in the third set of variable nodes in sequence; the second condition is that the number of associated surviving verification nodes is the largest.
[0227] If the number of the first punched nodes meets the maximum number of punched nodes for the check bit, and the number of the first punched nodes does not reach the maximum number of punched nodes for the information bit, then the variable nodes in the third variable node set are determined as the second punched nodes corresponding to the i-th run.
[0228] In cases where the number of variable nodes meeting the first condition does not reach the maximum number of information bits that can be punched, variable nodes meeting the second condition can be used as second punching nodes to enrich the information bit subcode adaptation sequence, thereby providing richer basis for encoding and decoding.
[0229] Step S208: Store the information bit position corresponding to the second punch node corresponding to the i-th run into the end of the information bit subcode adaptation sequence to obtain the information bit subcode adaptation sequence corresponding to the i-th run.
[0230] In the information bit code adaptation sequence, the positions of each information bit are arranged sequentially according to the order of their determined time. The information bit positions determined earlier have higher priority and are selected more often by the encoding and decoding operations.
[0231] Step S209: Remove the first punch node and the second punch node corresponding to the i-th run from the bipartite graph corresponding to the i-th run to obtain the updated bipartite graph.
[0232] The updated bipartite graph can be viewed as the bipartite graph corresponding to the (i+1)th run, so that the (i+1)th run can be performed based on the bipartite graph corresponding to the (i+1)th run. Here, i is a positive integer greater than or equal to 1.
[0233] In this context, the first punch node is a verification node, and the second punch node is a variable node. The "removal" operation refers to marking the first punch node and the second punch node corresponding to the i-th run as punch nodes in the bipartite graph, so that in the (i+1)-th run, the first punch node can be identified from multiple verification nodes in the bipartite graph, and the second punch node can be identified from multiple variable nodes in the bipartite graph.
[0234] When i=1, it is necessary to first obtain the bipartite graph corresponding to the first run before proceeding with the first run. In some embodiments, generating the bipartite graph corresponding to the first run is specifically implemented as follows: determining the initial first punch node from multiple verification nodes according to a preset filtering strategy; storing the initial first punch node in the verification bit code adaptation sequence; and removing the initial first punch node from the bipartite graph corresponding to the verification matrix to obtain the bipartite graph corresponding to the first run.
[0235] The preset filtering strategy can be either to randomly select a verification node from multiple verification nodes in the original bipartite graph corresponding to the verification matrix as the initial first punch node, or to select the first verification node from multiple verification nodes in the original bipartite graph corresponding to the verification matrix as the initial first punch node. The first verification node refers to the verification node corresponding to the first row in the verification matrix.
[0236] In this context, the first punch node is a check node, the second punch node is a variable node, and the "removal" operation refers to marking the initial first punch node as a punch node in the original bipartite graph so that the initial first punch node can be identified from the multiple check nodes in the bipartite graph during the first run.
[0237] The bipartite graph corresponding to the first run has changed compared to the original bipartite graph. One check node has been removed, and one first punch node has been added. Correspondingly, the connection relationships between the nodes have also changed. For example, if a variable node was previously connected to a check node, but that check node is "removed" (i.e., marked as a punch node), its type has changed. This can be seen as the variable node no longer being connected to the check node, but instead being connected to a first punch node. Similarly, if a variable node was previously connected to two check nodes, but one of the check nodes is "removed" (i.e., its type has changed), this can be seen as the variable node being connected to only one check node and also to a first punch node.
[0238] Similarly, the bipartite graph corresponding to the (i+1)th run has changed compared to the bipartite graph corresponding to the ith run. Specifically, the number of check nodes has decreased by a certain number, while the number of first-punch nodes has increased by a certain number. The number of variable nodes has also decreased by a certain number, while the number of second-punch nodes has increased by a certain number (this number is determined by the specific running process). Correspondingly, the connection relationships of the corresponding nodes have also changed. For example, if a variable node was previously connected to two check nodes, but one of the check nodes is "removed," meaning its type has changed, then it can be considered that this variable node is only connected to one check node and one first-punch node. As another example, if a check node was previously connected to two variable nodes, but one of the variable nodes is "removed," meaning it is marked as a punch node, then its type has changed, and it can be considered that this check node is only connected to one variable node and one second-punch node.
[0239] As can be seen, the update of the bipartite graph changes the connection relationship between the check node, variable node, first punch node, and second punch node. Therefore, in each run, the check node recovery order information, the decoding contribution information of each check node, the variable nodes connected to each check node, and the number of surviving check nodes associated with each variable node will also change. Therefore, each run needs to re-execute step S203 to determine the new parameters, thereby providing an accurate basis for the subsequent selection of the first punch node and the second punch node.
[0240] The data generation method provided in this application specifically offers a subcode adaptation sequence generation scheme based on LDPC codes. This scheme can generate corresponding subcode adaptation sequences for any code type, thus not restricting the LDPC code type. The scheme takes a parity check matrix H, a maximum number of punctures P for parity bits, and a maximum number of punctures I for information bits as input, and outputs compatible subcode adaptation sequences: a puncture adaptation sequence Inf for information bits and a puncture adaptation sequence Pnf for parity bits. Specifically, for information bits, when selecting variable nodes, variable nodes with fewer associated surviving parity nodes are prioritized as the second puncture node, ensuring that the variable information transmitted in the subcode helps the puncture node recover more data. For parity bits, the first puncture node is prioritized to recover data in the first and second iterations, and then the first puncture node is ordered according to its decoding contribution value.
[0241] The above-described subcode adaptation sequence generation scheme maximizes subcode compatibility while ensuring error performance. Although this scheme has relatively high complexity, it is an offline design compared to encoding and decoding. The subcode adaptation sequences it provides are all sorted according to punching priority, so that punching positions can be directly selected in order during encoding and decoding. The operation is simple and has low complexity.
[0242] The following is an exemplary description of the above subcode adaptation sequence generation process using a specific embodiment. Assume the parent code rate is 0.65, the parent code type is QC-LDPC code, the information bit length K = 8225, the parity bit length M = 4445, the code length N = 12700, and the required compatibility subcode rate range based on the transport block and channel transmission requirements for different channel mappings is [0.61, 0.76]. The maximum number of punctures in the information bits is I = 1032, and the maximum number of punctures in the parity bits is P = 1805. The subcode adaptation sequence generation process includes the following steps:
[0243] 1. Obtain the algorithm input parameters: the parity check matrix H with a mother code rate R0 of 0.65, the maximum number of punctures for information bits I = 1032, and the maximum number of punctures for parity bits P = 1805;
[0244] 2. Calculate the number N(c) of the first punch nodes associated with each check node in the bipartite graph corresponding to H;
[0245] 3. Store the verification nodes into set A in ascending order of N(c);
[0246] 4. Establish the set of associated variable nodes based on set A. Where P v Let A represent the set of variable nodes, where c is the verification node in set A, and X(c) represents the neighboring nodes of node c; a neighboring node is a variable node connected to node c.
[0247] 5. Calculate the number of check nodes (v) associated with variable node v that belong to set A. n Where v is P v Variable nodes in;
[0248] 6. According to v n Place the check nodes connected to the variable nodes into set B in ascending order;
[0249] 8. Take the nodes at the intersection of set A and set B, and in order of their node order in set B, use them as the first punch nodes, and store the first punch nodes in Pnf;
[0250] 9. For each verification node in set A, determine the number of surviving verification nodes associated with the variable nodes connected to each verification node.
[0251] 10. Store the variable node with the fewest associated surviving verification nodes into V. min In the set, store the variable node with the largest number of associated surviving verification nodes into V. max In the set;
[0252] 11. Following the order of nodes in set A, V should be chosen first.min The variable nodes in the set are used as the second punch nodes, and the second punch nodes are stored in Inf;
[0253] 12. If condition I is not met, V should be selected first, according to the order of nodes in set A. max The variable nodes in the set are used as the second punch nodes, and the second punch nodes are stored in Inf;
[0254] 13. Repeat the above operation until P and I are satisfied, and output Pnf and Inf.
[0255] The inventors of this application also conducted simulation operations. Table 1 shows the subcode adaptation of QC-LDPC codes with a code length of 12700 and different code rates (given according to the error resistance probability within 1.5% under the condition that the subcode and the parent code have the same error correction capability).
[0256] Table 1 Compatible subcode adaptation parameters for different mother codes
[0257] <![CDATA[Mother code rate R0]]> Pnf sequence length P Inf sequence length I <![CDATA[Sub - code bit - rate range [R min , R max > 0.5 3148 1236 0.446~0.665 0.6 2021 1098 0.562~0.714 0.65 1805 1032 0.619~0.758 0.7 1664 966 0.675~0.806 0.75 1504 894 0.731~0.851 0.8 1220 828 0.786~0.885 0.85 905 756 0.841~0.915 0.9 597 690 0.894~0.944
[0258] It should be noted that Table 1 is only an example. In practical applications, those skilled in the art can configure the subcode adaptation according to actual needs, and this application does not limit this.
[0259] The encoding and decoding methods provided in this application are described below.
[0260] Figure 4 This is a flowchart illustrating an encoding method provided in this application, such as... Figure 4 As shown, the method includes the following steps:
[0261] Step S301: Obtain the sequence of information blocks to be encoded and the number of adaptations; the number of adaptations includes at least one of the number of information bits adapted and the number of check bits adapted.
[0262] In this process, the encoding device first acquires the sequence of information blocks to be encoded and then encodes the sequence when executing the encoding method.
[0263] In practical applications, depending on the different transmission requirements of the satellite channel, without considering code block segmentation, the total length of the codeword in a single encoded transmission on the channel (i.e., the channel transmission length) is less than or equal to the transmission length of the mother code encoding rule (i.e., the length of the mother code, also known as the code length) N, and the length of the independently encoded information block L is less than or equal to K, where K is the information bit length.
[0264] Among them, the number of information bit adaptations is used to represent the total number of information bit positions to be punched in the information bits; the number of parity bit adaptations is used to represent the total number of parity bit positions to be punched in the parity bits.
[0265] In some embodiments, the operation of determining the number of adaptations is specifically implemented in the following three ways:
[0266] In the first case, if the preset length of a single encoded information block is less than the information bit length, and the channel transmission length is equal to the code length, then the difference between the information bit length and the length of the sequence of information blocks to be encoded is determined as the number of information bit adaptations. Here, the preset length of a single encoded information block is the length L of the independently encoded information block, which is also the length of the sequence of information blocks to be encoded. In this case, the preset length of the single encoded information block is less than the information bit length, requiring puncturing of the information bits. Only the number of information bit adaptations needs to be determined; the difference between the two lengths can be used to determine the number of information bit adaptations, providing a basis for encoding. Optionally, this operation of determining the number of information bit adaptations is implemented by the following formula:
[0267] S = KL, 0 ≤ S ≤ I
[0268] Where S is the number of information bits adapted, K is the length of the information bits, L is the length of the information block sequence to be encoded, and I is the maximum number of holes punched in the information bits.
[0269] In the second scenario, if the preset length of a single encoded information block is less than the information bit length, and the channel transmission length is less than the code length, then the difference between the information bit length and the length of the sequence of information blocks to be encoded is determined as the number of information bit adaptations. The number of parity bit adaptations is then determined based on the number of information bit adaptations, the code length, the target sub-code rate, and the mother code rate. In this case, puncturing is required for both the information bits and the parity bits. Accordingly, the number of information bit adaptations and the number of parity bit adaptations need to be determined to provide a basis for encoding.
[0270] In the third scenario, if the preset length of a single encoded information block equals the information bit length, and the channel transmission length is less than the code length, then the number of parity bits to be adapted is determined based on the number of information bit adaptations, the code length, the target sub-code rate, and the mother code rate. In this case, parity bits do not need to be punched; only the number of parity bits to be adapted needs to be determined. This number can be based on the number of information bit adaptations, the code length, the target sub-code rate, and the mother code rate, providing a basis for encoding.
[0271] In some embodiments, the number of check bits is determined based on the number of information bit adaptations, code length, target sub-code rate, and mother code rate. Specifically, this is implemented as follows:
[0272] The sum of the number of holes required for the check bits and the number of holes required for the information bits is determined as the number of check bits to be matched.
[0273] The number of punctures required for the check bits is the product of the code length and the proportion of the second check bits to be punctured; the proportion of the second check bits to be punctured is the ratio of the second code rate to be increased to the target sub-code rate, and the second code rate to be increased is the difference between the target sub-code rate and the mother code rate; the number of punctures required for the information bits is the product of the number of information bit adaptations and the ratio of check bits to information bits; the ratio of check bits to information bits is the ratio of the check bit proportion to the target sub-code rate; and the check bit proportion is the difference between 1 and the target sub-code rate.
[0274] Optionally, the operation of determining the number of check bits to be matched is implemented by the following formula:
[0275]
[0276] Where Q is the number of parity bit adaptations, N is the code length, R0 is the mother code rate, and R m S represents the target subcode bitrate, S represents the number of information bits to be adapted, and P represents the maximum number of holes to be punched in the information bits.
[0277] The number of holes required for the check bit is N(R). m -R0) / R m The proportion of the second verification bit to be punched is (R) m -R0) / R m The second bitrate to be increased is R. m -R0, the number of holes required for the information bit is S(1-R). m ) / R m The ratio of check bits to information bits is (1-R). m ) / R m The proportion of check bits is 1-R m .
[0278] In practical applications, it may be necessary to dynamically adjust the bitrate according to network conditions or transmission requirements. This solution provides a complete calculation process that can easily recalculate the number of check bits to be adapted based on the new target subcode bitrate, thereby supporting dynamic bitrate adjustment. During information transmission, resources (such as bandwidth and storage space) are often limited. By accurately calculating the number of check bits to be adapted, this solution can minimize the transmission of redundant information while ensuring the reliability of data transmission, thereby optimizing resource utilization.
[0279] Step S302: If the adaptation quantity information includes the information bit adaptation quantity, then the position of the information bit to be punctured is determined from the information bit subcode adaptation sequence based on the information bit adaptation quantity, and the position of the information bit to be punctured in the information block sequence to be encoded is punctured to obtain punctured data; and / or, if the adaptation quantity information includes the parity bit adaptation quantity, then the position of the parity bit to be punctured is determined from the parity bit subcode adaptation sequence based on the parity bit adaptation quantity, and the position of the parity bit to be punctured in the subcode encoding sequence is punctured to obtain punctured data; the subcode encoding sequence is generated based on the information block sequence to be encoded.
[0280] It can be seen that step S302 has the following three possibilities:
[0281] In the first case, if the adaptation quantity information only includes the information bit adaptation quantity, then the position of the information bit to be punctured is determined from the information bit subcode adaptation sequence based on the information bit adaptation quantity, and the position of the information bit to be punctured in the information block sequence to be encoded is punctured to obtain the punctured data.
[0282] In the second scenario, if the adaptation quantity information only includes the number of parity bit adaptations, then the parity bit position to be punched is determined from the parity bit subcode adaptation sequence based on the number of parity bit adaptations, and the parity bit position to be punched in the subcode encoding sequence is punched to obtain the punched data.
[0283] In the third scenario, if the adaptation quantity information includes the number of information bit adaptations and the number of parity bit adaptations, then the position of the information bit to be punctured is determined from the information bit subcode adaptation sequence based on the number of information bit adaptations, and the position of the information bit to be punctured in the information block sequence to be encoded is punctured. Similarly, the position of the parity bit to be punctured is determined from the parity bit subcode adaptation sequence based on the number of parity bit adaptations, and the position of the parity bit to be punctured in the subcode encoding sequence is punctured to obtain the punctured data.
[0284] Step S303: Channel transmission is performed based on the punched data.
[0285] In this process, data is transmitted via a channel to a decoding device, which decodes the data to recover the original data, i.e., the sequence of information blocks to be encoded. In some embodiments, the decoding process is described in the following examples, and will not be repeated here.
[0286] In this embodiment, during the encoding stage, a suitable punching position is directly selected from the check bit subcode adaptation sequence to punch the information block sequence to be encoded, and a suitable punching position is selected from the information bit subcode adaptation sequence to punch the subcode encoding sequence. This reduces the complexity of determining the punching position online, improves the overall encoding efficiency, and is more suitable for communication scenarios with high real-time requirements.
[0287] Figure 5 This is a flowchart illustrating another encoding method provided in this application, such as... Figure 5 As shown, the adaptation quantity information only includes the number of information bit adaptations. The method includes the following steps:
[0288] Step S401: Obtain the sequence of information blocks to be encoded and the number of adaptations; the number of adaptations includes the number of information bits adapted.
[0289] In some embodiments, the implementation of step S401 is the same as that of S301 in the previous embodiment, and will not be repeated here.
[0290] In this embodiment, according to step S302, if the adaptation quantity information includes the information bit adaptation quantity, then the position of the information bit to be punctured is determined from the information bit subcode adaptation sequence based on the information bit adaptation quantity, and the position of the information bit to be punctured in the information block sequence to be encoded is punctured to obtain the punctured data. This operation is specifically implemented as follows: steps S402-S403.
[0291] Step S402: Select multiple information bit positions to be punched sequentially from the information bit code adaptation sequence according to the order of the information bit positions in the information bit code adaptation sequence; the number of multiple information bit positions to be punched is equal to the number of information bit adaptations.
[0292] The process of generating the information bit code adaptation sequence is described in the above embodiments and will not be repeated here.
[0293] In some embodiments, the encoding device pre-stores an information bit code adaptation sequence, and when it is necessary to punch holes in the information bits of the information block sequence to be encoded, the stored information bit code adaptation sequence is obtained.
[0294] In some embodiments, the positions of multiple information bits in the information bit code adaptation sequence are sorted in a certain order. This order can reflect the priority of the information bit positions. The earlier the information bit is sorted, the higher the priority, and the later the information bit is sorted, the lower the priority. Therefore, the information bit positions with the highest priority can be selected from the information bit code adaptation sequence.
[0295] Step S403: Fill the positions of the information bits to be punched in the sequence of information blocks to be encoded with 0 to obtain the sequence of information blocks to be encoded after punching.
[0296] For example, the sequence of information blocks to be encoded is U = {u0, u1, ..., u...} L- 1},u i ∈{0,1},ui Let be the data at the (i+1)th bit position, where i ∈ {0, L-1}, and L is the length of the information block sequence to be encoded. If the multiple information bit positions to be punctured are 1, 4, 7, then 0 is filled between the 1st and 2nd bit positions, and the filled 0 becomes the new data at the 2nd bit position. The original data at the 2nd bit position becomes the new data at the 3rd bit position, and so on, to obtain U'. For U', 0 is filled between the 4th and 5th bit positions, to obtain U”. For U”, 0 is filled between the 7th and 8th bit positions, resulting in the punctured information block sequence V, where V = {v0, v1, ..., v k+s-1}, v i ∈{0,1},v i Let i be the data at the (i+1)th bit position, where i∈{0,L+S-1}.
[0297] Step S404: Encode the punched information block sequence to obtain the subcode encoding sequence.
[0298] The encoding algorithm can be preset according to actual needs, and this application does not limit it.
[0299] In some embodiments, this step is specifically implemented as follows: the punched information block sequence to be encoded is encoded according to the mother code encoding rules to obtain the check bit sequence; the punched information block sequence to be encoded is concatenated with the check bit sequence to obtain the sub-code encoding sequence.
[0300] For example, the subcode encoding sequence D = {d0, d1, ..., d...} N-1}, d i ∈{0,1},d i Let N be the data at the (i+1)th bit position, i∈{0,N-1}, where N is the code length, N=L+S+M, where L+S is the length of the information bits, and M is the length of the check bits.
[0301] In other embodiments, this step is specifically implemented as follows: the punched information block sequence to be encoded is encoded according to the parent code encoding rules to obtain the check bit sequence; the information block sequence to be encoded is concatenated with the check bit sequence to obtain the sub-code encoding sequence.
[0302] Step S405: Transmit the subcode encoded sequence through the channel.
[0303] For example, a subcode encoding sequence is transmitted on a satellite channel according to channel transmission requirements.
[0304] In some embodiments, the implementation of step S405 is the same as that of step S303, and will not be described again here.
[0305] By selecting the position of the information bit to be punched according to the order in the information bit code adaptation sequence, it can be ensured that the punching operation is precise and controllable. This precise control helps to reduce the transmission of redundant information and improve transmission efficiency while maintaining data integrity and reliability.
[0306] Figure 6 This is a flowchart illustrating another encoding method provided in this application, such as... Figure 6 As shown, the number of adaptations only includes the number of check bits adapted. The method includes the following steps:
[0307] Step S501: Obtain the sequence of information blocks to be encoded and the number of adaptations; the number of adaptations includes the number of check bits adapted.
[0308] In some embodiments, step S501 is implemented in the same way as S301 in the above embodiments, and will not be described again here.
[0309] In this embodiment, according to step S302, if the adaptation quantity information only includes the parity bit adaptation quantity, then the parity bit position to be punctured is determined from the parity bit subcode adaptation sequence based on the parity bit adaptation quantity, and the parity bit position to be punctured in the subcode encoding sequence is punctured to obtain the punctured data. Optionally, this operation is specifically implemented as the following steps S502-S504.
[0310] Step S502: Encode the sequence of information blocks to be encoded to obtain the subcode encoding sequence.
[0311] The encoding algorithm can be preset according to actual needs, and this application does not limit it.
[0312] For example, this step is specifically implemented as follows: the sequence of information blocks to be encoded is encoded according to the parent code encoding rules to obtain the check bit sequence; the sequence of information blocks to be encoded is concatenated with the check bit sequence to obtain the sub-code encoding sequence.
[0313] Step S503: Select multiple parity bit positions to be punched sequentially from the parity bit adaptation sequence according to the order of the parity bit positions in the parity bit adaptation sequence; the number of multiple parity bit positions to be punched is equal to the number of parity bit adaptations.
[0314] The process of generating the check bit code adaptation sequence is described in the above embodiment and will not be repeated here.
[0315] In some embodiments, the encoding device pre-stores a parity bit subcode adaptation sequence, and when it is necessary to punch a parity bit in the sequence of information blocks to be encoded, the stored parity bit subcode adaptation sequence is obtained.
[0316] In some embodiments, the positions of multiple parity bits in the parity bit code adaptation sequence are sorted in a certain order. This order can reflect the priority of the parity bit positions. The earlier the position is sorted, the higher the priority, and the later the position is sorted, the lower the priority. Therefore, the parity bit positions with the highest priority can be selected from the parity bit code adaptation sequence.
[0317] Step S504: Delete the data at the position of the parity bit to be punched in the subcode encoding sequence to obtain the adapted subcode encoding sequence.
[0318] For example, the length of the subcode encoding sequence is N = L + M. According to the number of parity bit adaptations Q, the first Q values are selected from the parity bit subcode adaptation sequence Pnf as the parity bit positions to be punched. The data at the bit positions indicated by these Q values are deleted from the parity bit sequence of the subcode encoding sequence to obtain the adapted subcode encoding sequence with a length of L + MQ.
[0319] Step S505: Transmit the adapted subcode encoding sequence through the channel.
[0320] For example, the adapted subcode encoding sequence is transmitted on the satellite channel according to the channel transmission requirements.
[0321] In some embodiments, the implementation of step S505 is the same as that of step S303, and will not be described again here.
[0322] By determining the parity bit positions to be punctured from the parity bit adaptation sequence and puncturing according to the number of parity bit adaptations, this process provides great flexibility for code rate adjustment. The number of parity bits punctured can be dynamically adjusted according to channel conditions and transmission requirements, thereby changing the encoded data code rate to adapt to different transmission scenarios. While maintaining necessary redundancy to ensure data transmission reliability, puncturing parity bits can reduce the amount of data transmitted. This helps reduce transmission time, save transmission resources, and improve the overall system transmission efficiency. Although puncturing increases the complexity of the encoding process, since puncturing is based on a preset parity bit adaptation sequence, this process can be automated and simplified to some extent.
[0323] Figure 7 This is a flowchart illustrating a decoding method provided in this application, such as... Figure 7 As shown, the method includes the following steps:
[0324] Step S601: Obtain the data received based on channel transmission and the number of adaptations; the data includes an information bit sequence and a check bit sequence; the number of adaptations includes at least one of the number of information bit adaptations and the number of check bit adaptations.
[0325] The data received through channel transmission is encoded by an encoding device. The specific encoding process is described in the above embodiments and will not be repeated here.
[0326] In practical applications, depending on the different transmission requirements of the satellite channel, without considering code block segmentation, the total length of the codeword in a single encoded transmission on the channel (i.e., the channel transmission length) is less than or equal to the transmission length of the mother code encoding rule (i.e., the length of the mother code, also known as the code length) N, and the length of the independently encoded information block L is less than or equal to K, where K is the information bit length.
[0327] The adaptation quantity information is used to decode the received data to recover the original data. The information bit adaptation quantity indicates the total number of information bit positions to be punctured in the information bits; the parity bit adaptation quantity indicates the total number of parity bit positions to be punctured in the parity bits.
[0328] In some embodiments, the operation of determining the number of adaptations is specifically implemented in the following three ways:
[0329] In the first scenario, if the preset length of a single encoded information block is less than the information bit length, and the channel transmission length equals the code length, then the difference between the information bit length and the length of the sequence of information blocks to be encoded is determined as the number of information bit adaptations. Here, the preset length of a single encoded information block is the length L of the independently encoded information block, which is also the length of the sequence of information blocks to be encoded. In this case, since the preset length of the single encoded information block is less than the information bit length, the encoding device needs to punch holes in the information bits, and the decoding device needs to recover the information bits. Only the number of information bit adaptations needs to be determined; the difference between the two lengths can be used to determine the number of information bit adaptations, providing a basis for decoding.
[0330] In the second scenario, if the preset length of a single encoded information block is less than the information bit length, and the channel transmission length is less than the code length, then the difference between the information bit length and the length of the sequence of information blocks to be encoded is determined as the number of information bit adaptations. The number of parity bit adaptations is then determined based on the number of information bit adaptations, the code length, the target sub-code rate, and the mother code rate. In this case, the encoding device needs to punch holes in the information bits and parity bits separately, and the decoding device needs to recover the information bits and parity bits separately. Accordingly, the number of information bit adaptations and the number of parity bit adaptations need to be determined to provide a basis for decoding.
[0331] In the third scenario, if the preset length of a single encoded information block equals the information bit length, and the channel transmission length is less than the code length, then the number of parity bits to be adapted is determined based on the number of information bit adaptations, the code length, the target sub-code rate, and the mother code rate. In this case, the encoding device needs to punch holes in the parity bits, and the decoding device needs to recover them. Only the number of parity bits to be adapted needs to be determined, which can be based on the number of information bit adaptations, the code length, the target sub-code rate, and the mother code rate, providing a basis for decoding.
[0332] In some embodiments, the number of check bits is determined based on the number of information bit adaptations, code length, target sub-code rate, and mother code rate. Specifically, this is implemented as follows:
[0333] The sum of the number of holes required for the check bits and the number of holes required for the information bits is determined as the number of check bits to be matched.
[0334] The number of punctures required for the check bits is the product of the code length and the proportion of the second check bits to be punctured; the proportion of the second check bits to be punctured is the ratio of the second code rate to be increased to the target sub-code rate, and the second code rate to be increased is the difference between the target sub-code rate and the mother code rate; the number of punctures required for the information bits is the product of the number of information bit adaptations and the ratio of check bits to information bits; the ratio of check bits to information bits is the ratio of the check bit proportion to the target sub-code rate; and the check bit proportion is the difference between 1 and the target sub-code rate.
[0335] Optionally, the operation of determining the number of check bits to be matched is implemented by the following formula:
[0336]
[0337] Where Q is the number of parity bit adaptations, N is the code length, R0 is the mother code rate, and R m S represents the target subcode bitrate, S represents the number of information bits to be adapted, and P represents the maximum number of holes to be punched in the information bits.
[0338] The number of holes required for the check bit is N(R). m -R0) / R m The proportion of the second verification bit to be punched is (R) m -R0) / R m The second bitrate to be increased is R. m -R0, the number of holes required for the information bit is S(1-R). m ) / R m The ratio of check bits to information bits is (1-R). m ) / R m The proportion of check bits is 1-R m .
[0339] In practical applications, it may be necessary to dynamically adjust the bitrate according to network conditions or transmission requirements. This solution provides a complete calculation process that can easily recalculate the number of check bits to be adapted based on the new target subcode bitrate, thereby supporting dynamic bitrate adjustment. During information transmission, resources (such as bandwidth and storage space) are often limited. By accurately calculating the number of check bits to be adapted, this solution can minimize the transmission of redundant information while ensuring the reliability of data transmission, thereby optimizing resource utilization.
[0340] Step S602: If the adaptation quantity information includes the information bit adaptation quantity, then the information bit position to be recovered is determined from the information bit subcode adaptation sequence based on the information bit adaptation quantity, and the information bit position to be recovered in the information bit sequence is recovered to obtain the recovered data; and / or, if the adaptation quantity information includes the parity bit adaptation quantity, then the parity bit position to be recovered is determined from the parity bit subcode adaptation sequence based on the parity bit adaptation quantity, and the parity bit position to be recovered in the parity bit sequence is recovered to obtain the recovered data.
[0341] It can be seen that step S602 has the following three possibilities:
[0342] In the first case, if the adaptation quantity information only includes the information bit adaptation quantity, then the position of the information bit to be recovered is determined from the information bit subcode adaptation sequence based on the information bit adaptation quantity, and the position of the information bit to be recovered in the information bit sequence is recovered to obtain the recovered data.
[0343] In the second scenario, if the adaptation quantity information only includes the number of check bit adaptations, then the position of the check bit to be recovered is determined from the check bit subcode adaptation sequence based on the number of check bit adaptations, and the position of the check bit to be recovered in the check bit sequence is recovered to obtain the recovered data.
[0344] In the third scenario, if the adaptation quantity information includes the number of information bit adaptations and the number of parity bit adaptations, then the position of the information bit to be recovered is determined from the information bit subcode adaptation sequence based on the number of information bit adaptations, and the position of the information bit to be recovered in the information bit sequence is recovered. Similarly, the position of the parity bit to be recovered is determined from the parity bit subcode adaptation sequence based on the number of parity bit adaptations, and the position of the parity bit to be recovered in the parity bit sequence is recovered to obtain the recovered data.
[0345] Step S603: Decode the recovered data to obtain the decoding result.
[0346] The decoding algorithm can be preset according to actual needs, and this application does not limit it.
[0347] During the decoding stage, a suitable position to be recovered is directly selected from the parity bit subcode adaptation sequence to recover the parity bit sequence in the received data, and a suitable position to be recovered is selected from the information bit subcode adaptation sequence to recover the information bit sequence in the received data. This reduces the complexity of determining the recovery position online, improves the overall decoding efficiency, and is more suitable for communication scenarios with high real-time requirements.
[0348] Figure 8 This is a flowchart illustrating another decoding method provided in this application, such as... Figure 8 As shown, the adaptation quantity information only includes the number of information bit adaptations. The method includes the following steps:
[0349] Step S701: Obtain the data received based on channel transmission and the number of adaptations; the data includes an information bit sequence and a check bit sequence; the number of adaptations includes the number of information bit adaptations.
[0350] In some embodiments, step S701 is implemented in the same way as S601 in the above embodiments, and will not be described again here.
[0351] In some embodiments, if the adaptation quantity information only includes the number of information bit adaptations, the encoding device can either concatenate the punctured information block sequence to be encoded with the parity bit sequence to obtain the sub-code encoding sequence, or concatenate the information block sequence to be encoded with the parity bit sequence to obtain the sub-code encoding sequence. Correspondingly, after receiving data, the decoding device first determines whether the length of the information bit sequence in the data is K. If it is K, it indicates that the information bit sequence is the punctured information block sequence to be encoded; if it is not K, it indicates that the information bit sequence is the information block sequence to be encoded.
[0352] If the information bit sequence is a punched block sequence of information to be encoded, the decoding device directly decodes the data to obtain the decoding result.
[0353] If the information bit sequence is a sequence of information blocks to be encoded, then according to step S602, the positions of the information bits to be recovered are determined from the information bit subcode adaptation sequence based on the number of information bit adaptations, and the positions of the information bits to be recovered in the information bit sequence are recovered to obtain the recovered data. Optionally, this operation is specifically implemented as follows: steps S702-S703.
[0354] Step S702: Select multiple information bit positions to be recovered sequentially from the information bit code adaptation sequence according to the order of the information bit positions in the information bit code adaptation sequence; the number of multiple information bit positions to be recovered is equal to the number of information bit adaptations.
[0355] The process of generating the information bit code adaptation sequence is described in the above embodiments and will not be repeated here.
[0356] In some embodiments, the decoding device pre-stores an information bit code adaptation sequence, and when it is necessary to recover the information bits in the sequence of information blocks to be encoded, the stored information bit code adaptation sequence is obtained.
[0357] In some embodiments, the positions of multiple information bits in the information bit subcode adaptation sequence are ordered in a certain order, which reflects the priority of the information bit positions. The earlier the information bit position is in the sequence, the higher its priority, and the later the information bit position is in the sequence, the lower its priority. The encoding device selects the information bit position with the first number of information bit adaptations from the information bit subcode adaptation sequence, and correspondingly, the decoding device also selects the information bit position with the first number of information bit adaptations from the information bit subcode adaptation sequence.
[0358] Step S703: Restore the bit positions of the information bits to be recovered in the information bit sequence to the first preset value to obtain the recovered data.
[0359] The first preset value can be set according to actual needs, such as a maximum value; this application does not limit this setting. For example, the received data is a subcode encoding sequence D, D = {d0, d1, ..., d...}. L+M-1}, d i ∈{0,1},d i For the data at the (i+1)th bit position, i∈{0,L+M-1}, the information bit sequence in D is {d0,d1,...,d...} L-1 If the positions of multiple information bits to be recovered are 1, 4, and 7 respectively, then the data at the 2nd, 5th, and 8th bit positions will be restored to the first preset value to obtain the recovered data.
[0360] Step S704: Decode the recovered data to obtain the decoding result.
[0361] In some embodiments, the implementation of step S704 is the same as that of step S603, and will not be described again here.
[0362] By selecting the positions of the information bits to be recovered according to the order in the information bit code adaptation sequence, it can be ensured that the recovery operation is precise and controllable. Corresponding to the encoding process, this precise control helps to ensure data integrity and reliability.
[0363] Figure 9 This is a flowchart illustrating another decoding method provided in this application, such as... Figure 9 As shown, the number of adaptations only includes the number of check bits adapted. The method includes the following steps:
[0364] Step S801: Obtain the data received based on channel transmission and the number of adaptations; the data includes an information bit sequence and a check bit sequence; the number of adaptations includes the number of check bit adaptations.
[0365] In some embodiments, step S801 is implemented in the same way as S601 in the above embodiments, and will not be described again here.
[0366] In this embodiment, according to step S602, if the adaptation quantity information only includes the parity bit adaptation quantity, the position of the parity bit to be recovered is determined from the parity bit subcode adaptation sequence based on the parity bit adaptation quantity, and the position of the parity bit to be recovered in the parity bit sequence is recovered to obtain the recovered data. Optionally, this operation is specifically implemented as the following steps S802-S803.
[0367] Step S802: Select multiple parity bit positions to be recovered sequentially from the parity bit adaptation sequence according to the order of the parity bit positions in the parity bit adaptation sequence; the number of multiple parity bit positions to be recovered is equal to the number of parity bit adaptations.
[0368] The process of generating the check bit code adaptation sequence is described in the above embodiment and will not be repeated here.
[0369] In some embodiments, the decoding device pre-stores a parity bit subcode adaptation sequence, and when it is necessary to recover the parity bits in the sequence of information blocks to be encoded, the stored parity bit subcode adaptation sequence is obtained.
[0370] In some embodiments, the positions of multiple parity bits in the parity bit subcode adaptation sequence are ordered in a certain order, which reflects the priority of the parity bit positions. The earlier the position is in the sequence, the higher the priority, and the later the position is in the sequence, the lower the priority. The encoding device selects the parity bit positions from the parity bit subcode adaptation sequence that are the first number of parity bit adaptations in the sequence. Correspondingly, the decoding device also selects the parity bit positions from the parity bit subcode adaptation sequence that are the first number of parity bit adaptations in the sequence.
[0371] Step S803: Restore the position of the parity bit to be restored in the parity bit sequence to the second preset value to obtain the restored data.
[0372] The second preset value can be set according to actual needs, such as 0, and this application does not limit it in this way. For example, the received data is a subcode encoding sequence D, D = {d0, d1, ..., d...} N-1}, d i ∈{0,1},d iLet D be the data at the (i+1)th bit position, i∈{0,N-1}, where N is the code length, N=L+MQ, L is the length of the information bits, MQ is the length of the check bits, and the check bit sequence in D is {d L ,d L+1 ,...,d N-1 If the positions of the multiple parity bits to be recovered are 2 and 5, then in the parity bit sequence, 0 is filled between the 2nd and 3rd bit positions. The filled 0 becomes the data at the new 3rd bit position, and the data at the original 3rd bit position becomes the data at the new 4th bit position, and so on, to obtain a new parity bit sequence. In the new parity bit sequence, 0 is filled between the 5th and 6th bit positions to obtain the recovered data. The length of the parity bit sequence in the recovered data is M.
[0373] Step S804: Decode the recovered data to obtain the decoding result.
[0374] In some embodiments, the implementation of step S804 is the same as that of step S603, and will not be described again here.
[0375] By determining the position of the parity bit to be recovered from the parity bit subcode adaptation sequence, the position of the parity bit to be recovered is restored, thereby filling the parity bit sequence to recover the parity bit sequence.
[0376] Based on the above subcode adaptation sequence generation scheme, the corresponding encoding scheme directly uses Inf and Pnf to achieve on-demand code rate conversion in different application scenarios. Below are flowchart examples of two encoding / decoding schemes.
[0377] See Figure 10 This illustrates a form involving only information bit adaptation. At the encoding end, for the information block U to be encoded, with a length of L, subcode adaptation is performed based on the information bit subcode adaptation sequence Inf to obtain an information bit sequence of length K. This is then LDPC encoded to obtain a parity bit sequence of length M. During channel transmission, the sequence consisting of the information block U to be encoded and the parity bit sequence is transmitted to the decoding end via a satellite channel. At the decoding end, the received data includes the information bit sequence and the parity bit sequence. The information bit sequence has a length of L, including LLR_k0 to LLR_k(L-1), and the parity bit sequence has a length of M, including LLR_M0 to LLR_(M-1). By recovering the information bit sequence to restore the corresponding bit positions to 1000 (LLR_k(puct) = 1000), a new information bit sequence of length K is obtained. LDPC decoding is then performed to obtain the decoding result.
[0378] See Figure 11This illustrates a form involving only parity bit adaptation. At the encoder, for the information block U to be encoded, with length L (L=K), LDPC encoding yields a parity bit sequence of length M. Then, based on the parity bit subcode adaptation sequence Pnf, subcode adaptation is performed to obtain a parity bit sequence of length MQ. During channel transmission, the sequence consisting of the information block U to be encoded and the parity bit sequence is transmitted to the decoder via a satellite channel. At the decoder, the received data includes an information bit sequence and a parity bit sequence. The information bit sequence has a length of L (L=K) and includes LLR_k0 to LLR_k(k-1). The parity bit sequence has a length of MQ and includes LLR_M0 to LLR_(MQ-1). By recovering the parity bit sequence and filling the corresponding bit positions with 0 (LLR_P(puct)=0), a new parity bit sequence of length M is obtained. LDPC decoding is then performed to obtain the decoding result.
[0379] The encoding and decoding process described above is illustrated below with specific embodiments. Assume the master code rate is 0.65, the information bit sub-code adaptation sequence is Inf, the parity bit sub-code adaptation sequence is Pnf, the maximum number of punctures for information bits is I = 1032, and the maximum number of punctures for parity bits is P = 1805. All compatible sub-codes of this master code are based on these two sets of sub-code adaptation sequences. For example, the first S sub-codes are selected sequentially from the information bit sub-code adaptation sequence according to the number of information bits adapted, and / or the first Q sub-codes are selected sequentially from the parity bit sub-code adaptation sequence according to the number of parity bits adapted. Examples of three different application scenarios are given below.
[0380] In the first application scenario, the length L of the information block sequence to be encoded is less than the information bit length K. A subcode of (KS, NS) needs to be constructed, where KS is the information bit length of the subcode and NS is the parity bit length. For example, in this application scenario, after the transmission channel is mapped, the length of the information block sequence to be encoded is L = 7223. After subcode adaptation, the transmission length is L + M = 7233 + 4445, corresponding to a target code rate R. m =0.619. See also Figure 12 The corresponding compilation and decoding process includes:
[0381] 1. Calculate the number of information bits to be adapted, S = 1032;
[0382] 2. Select the first S values from Inf as the adaptation positions for the information block sequence U1 to be encoded;
[0383] 3. In U1, insert information 0 into the adaptation positions indicated by the above S values respectively to obtain the adapted information block sequence V1 to be encoded, with a length of L+S(7233+1032).
[0384] 4. Encode V1 according to the mother code encoding rules to obtain the parity sequence, which has a length of M;
[0385] 5. According to the channel transmission requirements, the sequence consisting of the information block sequence U1 to be encoded and the parity bit sequence is transmitted to the decoding end;
[0386] 6. During decoding, the decoding end sets the decoding information at the positions indicated by the corresponding S values to the maximum value according to the adaptation position of the encoding end;
[0387] 7. Decode the master code according to the rules and output the decoding result.
[0388] In the second application scenario, the length L of the information block sequence to be encoded is equal to the information bit length K, but the channel transmission length is less than the code length N. A sub-code of (K, NQ) needs to be constructed, where K is the information bit length of the sub-code and NQ is the parity bit length of the sub-code. In this scenario, after channel mapping, the length of the information block sequence to be encoded is L = K = 8255, and after sub-code adaptation, the transmission length is NQ = 12700 - 1805, corresponding to a target code rate R. m =0.758; see also Figure 13 The corresponding compilation and decoding process includes:
[0389] 1. Calculate the number of check bits to be matched: Q = 1805;
[0390] 2. Encode the information block sequence U2 according to the mother code rules to obtain the parity sequence; correspondingly, the codeword sequence D2={U2,Parity}, with a length of L+M=N;
[0391] 3. Select the first Q values from Pnf as the fitting positions in sequence;
[0392] 4. Remove the information at the positions indicated by the Q values in Parity from D2 to obtain the adapted sequence with a length of L+MQ;
[0393] 5. Based on the channel transmission requirements, transmit the adapted sequence to the decoding end;
[0394] 6. During decoding, the decoding end sets the decoding information at the positions indicated by the corresponding Q values to 0 according to the adaptation position of the encoding end;
[0395] 7. Decode the master code according to the rules and output the decoding result.
[0396] In the third application scenario, the length L of the information block sequence to be encoded is less than the information bit length K, but the channel transmission length is less than the code length, requiring the construction of a (KS, NSQ) subcode. In this scenario, after channel mapping, the length L of the information block sequence to be encoded is 8083, and after subcode adaptation, the transmission length is 11270, corresponding to a target code rate R. m=0.717. To use a unified master code for encoding and decoding, and to ensure compatibility between Inf and Pnf with subcode, see [link to documentation]. Figure 14 The corresponding compilation and decoding process includes:
[0397] 1. Calculate the number of information bit adaptations S and the number of check bit adaptations Q, S = 172, Q = 1258;
[0398] 2. Select the first S values from Inf as the adaptation positions for the information block sequence U3 to be encoded;
[0399] 3. In U3, insert information 0 into the positions indicated by the above S values to obtain the adapted information block sequence V3 to be encoded, with a length of L+S(8083+172).
[0400] 4. Encode V3 according to the mother code encoding rules to obtain the parity sequence, with a length of M;
[0401] 5. Select the first Q values from Pnf as the fitting positions in turn;
[0402] 6. Remove the information at the positions indicated by the Q values in Parity to obtain the adapted sequence with a length of L+MQ;
[0403] 7. Based on the channel transmission requirements, transmit the adapted sequence to the decoding end;
[0404] 8. When decoding, the decoder adapts the received information according to the adaptation position of the encoder, sets the decoding information at the corresponding S indicator positions to the maximum value, and sets the decoding information at the Q indicator positions to 0.
[0405] 9. Decode the master code according to the rules and output the decoding result.
[0406] In the above three application scenarios, there are three situations:
[0407] (1) Only Inf adaptation (Q=0) is needed to meet the information block coding requirements; (2) Pnf adaptation (S=0) is needed to meet the channel transport block requirements; (3) Both adaptations are needed to flexibly achieve the required code rate.
[0408] In the first case, when Q = 0 and S ≠ 0, the corresponding compatible subcode (KS, NS) has a target code rate. The improvement lies in enhancing error correction capabilities and ensuring transmission reliability based on the master code. In the second case, when S = 0 and Q ≠ 0, the corresponding compatible subcode is (K, NQ), and the target code rate is... Improve transmission efficiency based on the master code; in the third case, when S and Q are not 0, the rate-compatible sub-code is represented as (KS, NSQ), corresponding to the code rate... Based on the master code, it can flexibly adapt to different code block transmission requirements and flexibly adapt to different transmission rates according to parameter calculations.
[0409] See Figure 15 The encoding end performs LDPC rate-compatible encoding on the information block to be encoded based on the subcode adaptation sequences Inf and Pnf. Specifically, subcode encoding adaptation is performed first, followed by LDPC encoding, then subcode transmission sequence adaptation, and then transmission through a noisy channel. The decoding end performs LDPC rate-compatible decoding based on the subcode adaptation sequence. Specifically, codeword decoding sequence adaptation is performed first, followed by LDPC decoding.
[0410] In the above encoding and decoding process, the encoding scheme directly adapts to the subcode adaptation sequences Inf and Pnf as needed, with a complexity of O(1) and a space complexity of O(I+P). This achieves code rate adaptation of the compatible code with low overhead and simple read / add / delete operations, without changing the inherent encoder / decoder structure.
[0411] See Figure 16 This application involves two processes: one is the compatibility code construction process, which involves designing compatibility codes based on LDPC code rate compatibility requirements and generating subcode adaptation sequences offline; the other is the code rate compatible encoding and decoding process, in which the encoding end performs LDPC code rate compatible encoding on the information block to be encoded based on the subcode adaptation sequence, transmits it through a satellite channel, and the decoding end performs LDPC code rate compatible decoding based on the subcode adaptation sequence.
[0412] This application addresses time-varying fading channels in satellite communication. To maximize information throughput, a high-speed code rate-compatible encoding and decoding scheme based on LDPC coding technology is designed. This solves the problem of how satellite communication systems can dynamically adapt to channel changes under limited hardware resources, while improving power and spectrum resource utilization while ensuring reliability. This application adapts to the high-speed, low-overhead, and high-reliability coding requirements of unidirectional satellite channels, providing important technical support for highly reliable data distribution based on satellite communication. In this application, the LDPC-compatible encoding and decoding scheme uses a unified encoder and decoder, achieving compatible codeword conversion between different code rates based on the encoding and decoding rules of the master code. This achieves flexible adaptation of error correction performance and encoding transmission efficiency, without involving changes to the error correction code parity-check matrix when the code type is fixed.
[0413] This application addresses the complex and ever-changing application scenarios of satellites by designing a high-speed LDPC code rate compatible encoding and decoding scheme, thus realizing the high-speed encoding and transmission requirements of diversified information in unidirectional satellite channels. This includes the design of LDPC code compatible codes and the corresponding encoding and decoding scheme. For the LDPC compatible code design, a puncturing algorithm is proposed that does not restrict the LDPC code type and can flexibly achieve compatibility with both low and high code rates without changing the parent code parity check matrix. This puncturing algorithm has a wide range of compatible subcodes, and each subcode has good error performance. Based on the proposed puncturing algorithm, a high-speed code rate compatible encoding and decoding scheme with low storage overhead and linear complexity is presented, solving the problems of limited flexibility in coding block and rate transformation and high overhead in existing technologies for satellite communication applications.
[0414] In this application, the LDPC compatible code is constructed using the proposed puncturing algorithm. This algorithm operates outside the encoding and decoding system, outputting a subcode adaptation sequence offline. The code rate compatible encoding and decoding are adapted using the subcode adaptation sequence, achieving code rate conversion between different subcodes with linear complexity on the same encoder and decoder structure.
[0415] To address the diverse transmission requirements of satellite transmission channels, this puncturing algorithm outputs two distinct sub-code adaptation sequences, Inf and Pnf, based on the required range of compatible code rates. These two sequences satisfy all the sub-codes that the parent code needs to adapt. Both sequences are sorted from highest to lowest importance for adaptation. Correspondingly, during sub-code adaptation, the selection priority of each element in the sequence is from high to low, ensuring the error performance of the sub-codes.
[0416] Specifically, the data generation method provided in this application selects puncturing nodes based on the roles of different node types in the iterative decoding process of the master code. It strictly selects puncturing nodes according to the reliability of LDPC decoding and the degree of node recovery during iteration, ensuring the error performance of the subcode as much as possible. By integrating the recovery order of the check nodes in the LDPC code structure and their contribution to decoding as the puncturing criteria for check nodes, it ensures the performance of compatible high-rate subcodes, avoids error layering, and improves transmission efficiency. Information bits are punctured based on the association between variable nodes and check nodes and their contribution to check node recovery, achieving compatibility of the master code with lower code rates and improving error correction capability. Constrained by the range of subcodes adaptable to the master code, the subcode adaptation sequence output by the algorithm is arranged from high to low according to puncturing priority, representing the set of all subcode adaptation positions. A globally optimal strategy is used to select puncturing nodes, and the puncturing nodes are grouped into subcode adaptation sequences Inf and Pnf according to node type.
[0417] The encoding method provided in this application is based on subcode adaptation sequences, which are read directly in parameter order to flexibly meet the requirements of encoded information blocks and transmission rates on different channels. The code rate is flexibly adaptable, with a complexity of O(1) and a space complexity of O(I+P). Without changing the inherent encoder / decoder structure, adaptive encoding is achieved with low overhead and simple read / addition / deletion operations. The entire encoding / decoding scheme has minimal subcode performance loss, a simple process, and low encoding / decoding system overhead, making it suitable for the high-speed, low-overhead, and high-reliability encoding requirements of one-way satellite communication.
[0418] Figure 17 This is a schematic diagram of the structure of a data generation device provided in this application, such as... Figure 17 As shown, in this embodiment, the data generation device 90 can be disposed in the generation device, and the data generation device 90 includes:
[0419] The acquisition module 901 is used to acquire the bipartite graph corresponding to the check matrix that matches the mother code pattern, the maximum number of holes punched in the information bits, and the maximum number of holes punched in the check bits; the bipartite graph includes multiple check nodes and multiple variable nodes;
[0420] The generation module 902 is used to determine multiple first punch nodes from multiple check nodes based on the connection relationship between check nodes and variable nodes in the bipartite graph, store the check bit positions corresponding to the multiple first punch nodes into the check bit subcode adaptation sequence, and determine multiple second punch nodes from multiple variable nodes, store the information bit positions corresponding to the multiple second punch nodes into the information bit subcode adaptation sequence.
[0421] The number of first punch nodes is equal to the maximum number of punches for the check bits; the number of second punch nodes is equal to the maximum number of punches for the information bits; the check bit subcode adaptation sequence and the information bit subcode adaptation sequence are used for encoding by the encoding device and for decoding by the decoding device.
[0422] In some embodiments, the generation module 902 is configured to:
[0423] Based on the bipartite graph corresponding to the i-th run, the i-th run process is performed until the number of the first punched nodes equals the maximum number of punched parity bits, and the number of the second punched nodes equals the maximum number of punched information bits; the i-th run process includes the following operations:
[0424] Based on the connection relationship between the verification nodes and variable nodes in the bipartite graph corresponding to the i-th run, determine the verification node recovery order information, the decoding contribution information of each verification node, the variable nodes connected to each verification node, and the number of surviving verification nodes associated with each variable node.
[0425] Based on the recovery order information of the check nodes and the decoding contribution information of each check node, multiple first puncture nodes are determined from multiple check nodes, and the check bit positions corresponding to the multiple first puncture nodes are stored in the check bit subcode adaptation sequence. Furthermore, based on the variable nodes connected to each check node and the number of surviving check nodes associated with each variable node, multiple second puncture nodes are determined from multiple variable nodes, and the check bit positions corresponding to the multiple second puncture nodes are stored in the information bit subcode adaptation sequence.
[0426] In some embodiments, the decoding contribution information is the decoding contribution value; the generation module 902, when determining the decoding contribution information of each verification node based on the connection relationship between the verification node and the variable node in the bipartite graph corresponding to the i-th run, is used to:
[0427] Determine the first number of each verification node in the bipartite graph corresponding to the i-th run; the first number is the number of the first punch nodes determined in the (i-1)-th run associated with the verification node;
[0428] The first preset contribution value is determined as the decoding contribution value of the first number of verification nodes equal to the first preset value;
[0429] The second preset contribution value is determined as the decoding contribution value of the first number of verification nodes that is greater than the first preset value;
[0430] The third preset contribution quantity is determined as the decoding contribution value of the verification node whose first quantity is equal to the second preset value;
[0431] Among them, the first preset value is greater than the second preset value, the first preset contribution value is greater than the second preset contribution value, and the second preset contribution value is greater than the third preset contribution value.
[0432] In some embodiments, when determining the verification node recovery order information based on the connection relationship between the verification nodes and variable nodes in the bipartite graph corresponding to the i-th run, the generation module 902 is used to:
[0433] For each verification node in the first verification node set, the variable nodes connected to the verification nodes are stored in the first variable node set; the first verification node set includes a preset number of verification nodes whose decoding contribution information is sorted first.
[0434] Determine the second number of each variable node in the first variable node set; the second number is the number of check nodes that are connected to and belong to the first check node set;
[0435] The second number of each variable node in the first variable node set is determined as the verification node recovery order information.
[0436] In some embodiments, the generation module 902 is configured to:
[0437] Based on the recovery order information of the verification nodes and the decoding contribution information of each verification node in the bipartite graph corresponding to the i-th run, the first set of verification nodes and the second set of verification nodes for the i-th run are generated respectively. The first set of verification nodes includes a preset number of verification nodes whose decoding contribution information is sorted first, and the second set of verification nodes includes multiple recoverable verification nodes.
[0438] The check node that exists in both the first check node set and the second check node set is determined as the first punch node corresponding to the i-th run, and the check bit position corresponding to the first punch node corresponding to the i-th run is stored at the end of the check bit subcode adaptation sequence to obtain the check bit subcode adaptation sequence corresponding to the i-th run.
[0439] Based on the variable nodes connected to each check node in the first check node set and the number of surviving check nodes associated with each variable node, the second punch node corresponding to the i-th run is determined from the variable nodes in the bipartite graph corresponding to the i-th run, and the information bit position corresponding to the second punch node corresponding to the i-th run is stored at the end of the information bit subcode adaptation sequence to obtain the information bit subcode adaptation sequence corresponding to the i-th run.
[0440] Remove the first and second punched nodes corresponding to the i-th run from the bipartite graph corresponding to the i-th run to obtain the updated bipartite graph.
[0441] In some embodiments, the decoding contribution information is the decoding contribution value;
[0442] The generation module 902, when generating the first set of check nodes and the second set of check nodes for the i-th run based on the check node recovery order information and the decoding contribution information of each check node in the bipartite graph corresponding to the i-th run, is used for:
[0443] Store each verification node in the bipartite graph corresponding to the i-th run in the first verification node set in ascending order of decoding contribution value;
[0444] Based on the first set of verification nodes and the information on the recovery order of verification nodes, multiple verification nodes are determined from the bipartite graph corresponding to the i-th run, and the determined multiple verification nodes are stored in the second set of verification nodes.
[0445] In some embodiments, the verification node recovery order information includes a second number of multiple variable nodes that meet the conditions; the second number is the number of verification nodes that are connected to and belong to the first verification node set.
[0446] The generation module 902, when determining multiple verification nodes from the bipartite graph corresponding to the i-th run based on the first set of verification nodes and the verification node recovery order information, and storing the determined multiple verification nodes into the second set of verification nodes, is used for:
[0447] For each verification node in the first set of verification nodes, the variable nodes connected to the verification nodes are stored in the first set of variable nodes;
[0448] According to the second number of each variable node in the first variable node set in ascending order, the check nodes connected to each variable node are stored into the second check node set in turn.
[0449] In some embodiments, when the generation module 902 determines the second punch node corresponding to the i-th run from the variable nodes in the bipartite graph corresponding to the i-th run based on the variable nodes connected to each check node in the first check node set and the number of surviving check nodes associated with each variable node, it is used to:
[0450] According to the order of the verification nodes in the first set of verification nodes, the variable nodes that meet the first condition among the variable nodes connected to each verification node are stored in the second set of variable nodes in sequence; the first condition is that the number of associated surviving verification nodes is the minimum.
[0451] The variable nodes in the second set of variable nodes are determined as the second punch nodes corresponding to the i-th run.
[0452] In some embodiments, the generation module 902 is further configured to:
[0453] According to the order of the verification nodes in the first set of verification nodes, the variable nodes that meet the second condition among the variable nodes connected to each verification node are stored in the third set of variable nodes in sequence; the second condition is that the number of associated surviving verification nodes is the largest.
[0454] If the number of the first punched nodes meets the maximum number of punched nodes for the check bit, and the number of the first punched nodes does not reach the maximum number of punched nodes for the information bit, then the variable nodes in the third variable node set are determined as the second punched nodes corresponding to the i-th run.
[0455] In some embodiments, the acquisition module 901, when acquiring the maximum number of punched holes in the information bits and the maximum number of punched holes in the check bits, is used to:
[0456] Based on the range of the mother code rate, code length, and child code rate, determine the maximum number of holes to be punched in the information bits and the maximum number of holes to be punched in the check bits.
[0457] In some embodiments, the acquisition module 901, when determining the maximum number of punctures for information bits and the maximum number of punctures for check bits based on the mother code rate, code length, and sub-code rate range, is used to:
[0458] The product of the code length and the proportion of the information bits to be punctured is determined as the maximum number of punctured information bits; where the proportion of the information bits to be punctured is the ratio of the amount of code rate to be reduced to the proportion of the parity bit; the amount of code rate to be reduced is the difference between the minimum value of the mother code rate and the child code rate range, and the proportion of the parity bit is the difference between 1 and the minimum value of the child code rate range.
[0459] The product of the code length and the proportion of the first parity bit to be punched is determined as the maximum number of parity bits to be punched; wherein, the proportion of the first parity bit to be punched is the ratio of the first bit rate to be increased to the maximum value of the sub-code bit rate range, and the first bit rate to be increased is the difference between the maximum value of the sub-code bit rate range and the mother code bit rate.
[0460] The data generation device 90 provided in this embodiment can execute the technical solution of the corresponding method embodiment. Its implementation principle and technical effect are similar to those of the corresponding method embodiment, and will not be described again here.
[0461] Figure 18 This is a schematic diagram of the structure of an encoding device provided in this application, such as... Figure 18 As shown, in this embodiment, the encoding device 100 can be disposed in the encoding device, and the encoding device 100 includes:
[0462] The acquisition module 1001 is used to acquire the sequence of information blocks to be encoded and the number of adaptations; the number of adaptations includes at least one of the number of information bits and the number of check bits.
[0463] The punching module 1002 is used to, if the adaptation quantity information includes the information bit adaptation quantity, determine the position of the information bit to be punched from the information bit subcode adaptation sequence based on the information bit adaptation quantity, and punch the information bit position to be punched in the information block sequence to be encoded to obtain punched data; and / or, if the adaptation quantity information includes the parity bit adaptation quantity, determine the position of the parity bit to be punched from the parity bit subcode adaptation sequence based on the parity bit adaptation quantity, and punch the parity bit position to be punched in the subcode encoding sequence to obtain punched data; the subcode encoding sequence is generated based on the information block sequence to be encoded;
[0464] The transmission module 1003 is used for channel transmission based on the punched data.
[0465] In some embodiments, when the punching module 1002 determines the position of the information bit to be punched from the information bit subcode adaptation sequence based on the number of information bit adaptations, and punches the position of the information bit to be punched in the sequence of information blocks to be encoded to obtain punched data, it is used to:
[0466] According to the order of the information bit positions in the information bit code adaptation sequence, multiple information bit positions to be punched are selected sequentially from the information bit code adaptation sequence; the number of multiple information bit positions to be punched is equal to the number of information bit adaptations.
[0467] Fill the positions of the information bits to be punched in the sequence of information blocks to be encoded with 0 to obtain the sequence of information blocks to be encoded after punching.
[0468] Accordingly, the transmission module 1003 is used for:
[0469] The punched information block sequence is encoded to obtain the sub-code encoding sequence;
[0470] Transmit the subcode encoded sequence through the channel.
[0471] In some embodiments, the punching module 1002, when determining the position of the parity bit to be punched from the parity bit subcode adaptation sequence based on the number of parity bit adaptations, and punching the position of the parity bit to be punched in the subcode encoding sequence, is used to:
[0472] Encode the sequence of information blocks to be encoded to obtain the subcode encoding sequence;
[0473] According to the order of the parity bit positions in the parity bit adaptation sequence, multiple parity bit positions to be punched are selected sequentially from the parity bit adaptation sequence; the number of multiple parity bit positions to be punched is equal to the number of parity bit adaptations.
[0474] The data at the position of the parity bit to be punched in the subcode encoding sequence is deleted to obtain the adapted subcode encoding sequence.
[0475] Accordingly, the transmission module 1003 is used for:
[0476] The adapted subcode encoding sequence is then transmitted through the channel.
[0477] In some embodiments, the acquisition module 1001 is used for:
[0478] If the preset length of a single encoded information block is less than the information bit length, and the channel transmission length is equal to the code length, then the difference between the information bit length and the length of the information block sequence to be encoded is determined as the number of information bit adaptations.
[0479] If the preset length of a single encoded information block is less than the information bit length and the channel transmission length is less than the code length, then the difference between the information bit length and the length of the information block sequence to be encoded is determined as the number of information bit adaptations, and the number of check bit adaptations is determined based on the number of information bit adaptations, the code length, the target subcode rate, and the mother code rate.
[0480] If the preset length of a single encoded information block is equal to the information bit length, and the channel transmission length is less than the code length, then the number of check bits to be adapted is determined based on the number of information bit adaptations, the code length, the target subcode rate, and the mother code rate.
[0481] In some embodiments, the acquisition module 1001 is used for:
[0482] The sum of the number of holes required for the check bits and the number of holes required for the information bits is determined as the number of check bits to be matched.
[0483] The number of punctures required for the check bits is the product of the code length and the proportion of the second check bits to be punctured; the proportion of the second check bits to be punctured is the ratio of the second code rate to be increased to the target sub-code rate, and the second code rate to be increased is the difference between the target sub-code rate and the mother code rate; the number of punctures required for the information bits is the product of the number of information bit adaptations and the ratio of check bits to information bits; the ratio of check bits to information bits is the ratio of the check bit proportion to the target sub-code rate; and the check bit proportion is the difference between 1 and the target sub-code rate.
[0484] The encoding device 100 provided in this embodiment can execute the technical solution of the corresponding method embodiment. Its implementation principle and technical effect are similar to those of the corresponding method embodiment, and will not be described again here.
[0485] Figure 19 This is a schematic diagram of the structure of a decoding device provided in this application, such as... Figure 19 As shown, in this embodiment, the decoding device 110 can be disposed in the decoding device, and the decoding device 110 includes:
[0486] The acquisition module 1101 is used to acquire the data received based on the channel transmission and the number of adaptations; the data includes an information bit sequence and a check bit sequence; the number of adaptations includes at least one of the number of information bit adaptations and the number of check bit adaptations;
[0487] The recovery module 1102 is used to determine the position of the information bit to be recovered from the information bit subcode adaptation sequence based on the information bit adaptation quantity if the adaptation quantity information includes the information bit adaptation quantity, and to recover the position of the information bit to be recovered in the information bit sequence to obtain the recovered data; and / or, if the adaptation quantity information includes the parity bit adaptation quantity, determine the position of the parity bit to be recovered from the parity bit subcode adaptation sequence based on the parity bit adaptation quantity, and to recover the position of the parity bit to be recovered in the parity bit sequence to obtain the recovered data.
[0488] The decoding module 1103 is used to decode based on the recovered data to obtain the decoding result.
[0489] In some embodiments, when the recovery module 1102 determines the position of the information bit to be recovered from the information bit subcode adaptation sequence based on the number of information bit adaptations, and recovers the position of the information bit to be recovered in the information bit sequence to obtain the recovered data, it is configured to:
[0490] According to the order of the information bit positions in the information bit code adaptation sequence, multiple information bit positions to be recovered are selected sequentially from the information bit code adaptation sequence; the number of multiple information bit positions to be recovered is equal to the number of information bit adaptations.
[0491] The information bit positions to be recovered in the information bit sequence are restored to the first preset value to obtain the recovered data.
[0492] In some embodiments, the recovery module 1102, when determining the position of the parity bit to be recovered from the parity bit subcode adaptation sequence based on the number of parity bit adaptations, and recovering the position of the parity bit to be recovered in the parity bit sequence to obtain the recovered data, is configured to:
[0493] According to the order of the parity bit positions in the parity bit adaptation sequence, multiple parity bit positions to be recovered are selected sequentially from the parity bit adaptation sequence; the number of multiple parity bit positions to be recovered is equal to the number of parity bit adaptations.
[0494] The parity bit positions to be recovered in the parity bit sequence are restored to the second preset value to obtain the recovered data.
[0495] In some embodiments, the acquisition module 1101 is used for:
[0496] If the preset length of a single encoded information block is less than the information bit length, and the channel transmission length is equal to the code length, then the difference between the information bit length and the length of the information block sequence to be encoded is determined as the number of information bit adaptations.
[0497] If the preset length of a single encoded information block is less than the information bit length and the channel transmission length is less than the code length, then the difference between the information bit length and the length of the information block sequence to be encoded is determined as the number of information bit adaptations, and the number of check bit adaptations is determined based on the number of information bit adaptations, the code length, the target subcode rate, and the mother code rate.
[0498] If the preset length of a single encoded information block is equal to the information bit length, and the channel transmission length is less than the code length, then the number of check bits to be adapted is determined based on the number of information bit adaptations, the code length, the target subcode rate, and the mother code rate.
[0499] In some embodiments, the acquisition module 1101, when determining the number of check bits to be adapted based on the number of information bit adaptations, code length, target sub-code rate, and mother code rate, is used to:
[0500] The sum of the number of holes required for the check bits and the number of holes required for the information bits is determined as the number of check bits to be matched.
[0501] The number of punctures required for the check bits is the product of the code length and the proportion of the second check bits to be punctured; the proportion of the second check bits to be punctured is the ratio of the second code rate to be increased to the target sub-code rate, and the second code rate to be increased is the difference between the target sub-code rate and the mother code rate; the number of punctures required for the information bits is the product of the number of information bit adaptations and the ratio of check bits to information bits; the ratio of check bits to information bits is the ratio of the check bit proportion to the target sub-code rate; and the check bit proportion is the difference between 1 and the target sub-code rate.
[0502] The decoding device 110 provided in this embodiment can execute the technical solution of the corresponding method embodiment. Its implementation principle and technical effect are similar to those of the corresponding method embodiment, and will not be described again here.
[0503] This application also provides an electronic device. This electronic device can be provided as a generating device, an encoding device, or a decoding device.
[0504] Figure 20 This is a schematic diagram of the structure of an electronic device provided in this application. For example... Figure 20 As shown, the electronic device 120 includes a processor 1201 and a memory 1202 communicatively connected to the processor 1201.
[0505] The memory 1202 stores computer-executable instructions; the processor 1201 executes the computer-executable instructions stored in the memory 1202 to implement the data generation method, encoding method, or decoding method provided in this application.
[0506] In this embodiment, the memory 1202 and the processor 1201 are connected via a bus. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. The bus can be categorized as an address bus, a data bus, a control bus, etc.
[0507] The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the application described and / or claimed herein. The various components are interconnected via different buses and can be mounted on a common motherboard or otherwise as required.
[0508] In an exemplary embodiment, a computer-readable storage medium is also provided, which stores computer-executable instructions that, when executed by a processor, are used to implement the data generation method, encoding method, or decoding method provided in this application.
[0509] In an exemplary embodiment, a computer program product is also provided, including a computer program, which, when executed by a processor, is used to implement the data generation method, encoding method, or decoding method provided in this application.
[0510] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the claims.
[0511] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.
Claims
1. A data generation method, characterized in that, Applied to a generating device, the method includes: Obtain the bipartite graph corresponding to the check matrix that matches the mother code pattern, the maximum number of holes punched in the information bits, and the maximum number of holes punched in the check bits; the bipartite graph includes multiple check nodes and multiple variable nodes; Based on the connection relationship between the verification nodes and variable nodes in the bipartite graph, multiple first punch nodes are determined from the multiple verification nodes, and the verification bit positions corresponding to the multiple first punch nodes are stored in the verification bit subcode adaptation sequence. Also, multiple second punch nodes are determined from the multiple variable nodes, and the information bit positions corresponding to the multiple second punch nodes are stored in the information bit subcode adaptation sequence. The number of the first punch nodes is equal to the maximum number of punches for the check bit; the number of the second punch nodes is equal to the maximum number of punches for the information bit; the check bit subcode adaptation sequence and the information bit subcode adaptation sequence are used for encoding by the encoding device and for decoding by the decoding device.
2. The method according to claim 1, characterized in that, The process of determining multiple first puncturing nodes from multiple verification nodes based on the connection relationship between verification nodes and variable nodes in the bipartite graph, storing the corresponding verification bit positions of the multiple first puncturing nodes in a verification bit subcode adaptation sequence, and determining multiple second puncturing nodes from multiple variable nodes, storing the corresponding information bit positions of the multiple second puncturing nodes in an information bit subcode adaptation sequence, includes: Based on the bipartite graph corresponding to the i-th run, the i-th run process is performed until the number of determined first punch nodes equals the maximum number of punches for the check bits, and the number of determined second punch nodes equals the maximum number of punches for the information bits; the i-th run process includes the following operations: Based on the connection relationship between the verification nodes and variable nodes in the bipartite graph corresponding to the i-th run, the recovery order information of the verification nodes, the decoding contribution information of each verification node, the variable nodes connected to each verification node, and the number of surviving verification nodes associated with each variable node are determined. Based on the recovery order information of the verification nodes and the decoding contribution information of each verification node, multiple first puncturing nodes are determined from the multiple verification nodes, and the parity bit positions corresponding to the multiple first puncturing nodes are stored in the parity bit subcode adaptation sequence. Furthermore, based on the variable nodes connected to each verification node and the number of surviving verification nodes associated with each variable node, multiple second puncturing nodes are determined from the multiple variable nodes, and the parity bit positions corresponding to the multiple second puncturing nodes are stored in the information bit subcode adaptation sequence.
3. The method according to claim 2, characterized in that, The decoding contribution information is the decoding contribution value; Based on the connection relationship between the verification nodes and variable nodes in the bipartite graph corresponding to the i-th run, the decoding contribution information of each verification node is determined, including: Determine the first number of each verification node in the bipartite graph corresponding to the i-th run; the first number is the number of first punch nodes determined in the (i-1)-th run associated with the verification node; The first preset contribution value is determined as the decoding contribution value of the first number of verification nodes equal to the first preset value; The second preset contribution value is determined as the decoding contribution value of the first number of verification nodes that is greater than the first preset value; The third preset contribution quantity is determined as the decoding contribution value of the verification node whose first quantity is equal to the second preset value; Wherein, the first preset value is greater than the second preset value, the first preset contribution value is greater than the second preset contribution value, and the second preset contribution value is greater than the third preset contribution value.
4. The method according to claim 2, characterized in that, Based on the connection relationship between the verification nodes and variable nodes in the bipartite graph corresponding to the i-th run, the verification node recovery order information is determined, including: For each verification node in the first verification node set, the variable nodes connected to the verification node are stored in the first variable node set; the first verification node set includes a preset number of verification nodes whose decoding contribution information is sorted first. Determine a second number for each variable node in the first variable node set; the second number is the number of verification nodes connected to and belonging to the first verification node set; The second number of each variable node in the first set of variable nodes is determined as the verification node recovery order information.
5. The method according to claim 2, characterized in that, The process of determining multiple first puncturing nodes from multiple check nodes based on the check node recovery order information and the decoding contribution information of each check node, storing the check bit positions corresponding to the multiple first puncturing nodes in a check bit subcode adaptation sequence, and determining multiple second puncturing nodes from multiple variable nodes based on the variable nodes connected to each check node and the number of surviving check nodes associated with each variable node, storing the check bit positions corresponding to the multiple second puncturing nodes in an information bit subcode adaptation sequence, includes: Based on the recovery order information of the verification nodes and the decoding contribution information of each verification node in the bipartite graph corresponding to the i-th run, a first set of verification nodes and a second set of verification nodes for the i-th run are generated respectively; the first set of verification nodes includes a preset number of verification nodes whose decoding contribution information is sorted first, and the second set of verification nodes includes multiple recoverable verification nodes. The verification node that exists in both the first verification node set and the second verification node set is determined as the first punching node corresponding to the i-th run, and the position of the verification bit corresponding to the first punching node corresponding to the i-th run is stored at the end of the verification bit subcode adaptation sequence to obtain the verification bit subcode adaptation sequence corresponding to the i-th run. Based on the variable nodes connected to each of the first set of verification nodes and the number of surviving verification nodes associated with each variable node, the second punch node corresponding to the i-th run is determined from the variable nodes in the bipartite graph corresponding to the i-th run, and the information bit position corresponding to the second punch node corresponding to the i-th run is stored at the end of the information bit subcode adaptation sequence to obtain the information bit subcode adaptation sequence corresponding to the i-th run. Remove the first and second punched nodes corresponding to the i-th run from the bipartite graph corresponding to the i-th run to obtain the updated bipartite graph.
6. The method according to claim 5, characterized in that, The decoding contribution information is the decoding contribution value; The step of generating a first set of verification nodes and a second set of verification nodes for the i-th run based on the recovery order information of the verification nodes and the decoding contribution information of each verification node in the bipartite graph corresponding to the i-th run includes: The verification nodes in the bipartite graph corresponding to the i-th run are sequentially stored into the first verification node set in ascending order of their decoding contribution values. Based on the first set of verification nodes and the information on the recovery order of the verification nodes, multiple verification nodes are determined from the bipartite graph corresponding to the i-th run, and the determined multiple verification nodes are stored in the second set of verification nodes.
7. The method according to claim 6, characterized in that, The verification node recovery order information includes a second number of multiple variable nodes that meet the conditions; the second number is the number of verification nodes that are connected to and belong to the first verification node set. The step of determining multiple verification nodes from the bipartite graph corresponding to the i-th run based on the first set of verification nodes and the verification node recovery order information, and storing the determined multiple verification nodes into the second set of verification nodes, includes: For each verification node in the first set of verification nodes, the variable nodes connected to the verification nodes are stored in the first set of variable nodes; According to the second quantity of each variable node in the first variable node set in ascending order, the verification nodes connected to each variable node are sequentially stored into the second verification node set.
8. The method according to claim 5, characterized in that, The step of determining the second punch node corresponding to the i-th run from the variable nodes in the bipartite graph corresponding to the i-th run, based on the variable nodes connected to each of the first set of verification nodes and the number of surviving verification nodes associated with each variable node, includes: According to the order of the verification nodes in the first set of verification nodes, the variable nodes that meet the first condition among the variable nodes connected to each verification node are sequentially stored in the second set of variable nodes; the first condition is that the number of associated surviving verification nodes is the minimum. The variable nodes in the second set of variable nodes are determined as the second punching nodes corresponding to the i-th run.
9. The method according to claim 8, characterized in that, Also includes: According to the order of the verification nodes in the first set of verification nodes, the variable nodes that meet the second condition among the variable nodes connected to each verification node are sequentially stored into the third set of variable nodes. The second condition is that the number of associated surviving verification nodes is the largest; If the number of determined first punch nodes meets the maximum number of punches for the check bit, and the number of determined punch nodes does not reach the maximum number of punches for the information bit, then the variable nodes in the third variable node set are determined as the second punch nodes corresponding to the i-th run.
10. The method according to claim 1, characterized in that, Obtain the maximum number of punches for the information bits and the maximum number of punches for the check bits, including: Based on the range of the mother code rate, code length, and child code rate, determine the maximum number of holes to be punched in the information bits and the maximum number of holes to be punched in the check bits.
11. The method according to claim 10, characterized in that, The determination of the maximum number of punctures for information bits and the maximum number of punctures for parity bits based on the range of mother code rate, code length, and child code rate includes: The product of the code length and the proportion of the information bits to be punctured is determined as the maximum number of punctured information bits; wherein, the proportion of the information bits to be punctured is the ratio of the amount of code rate to be reduced to the proportion of the parity bit; the amount of code rate to be reduced is the difference between the mother code rate and the minimum value of the sub-code rate range, and the proportion of the parity bit is the difference between 1 and the minimum value of the sub-code rate range. The product of the code length and the proportion of the first parity bit to be punched is determined as the maximum number of parity bits to be punched; wherein, the proportion of the first parity bit to be punched is the ratio of the first bit rate to be increased to the maximum value of the sub-code bit rate range, and the first bit rate to be increased is the difference between the maximum value of the sub-code bit rate range and the mother code bit rate.
12. An encoding method, characterized in that, Applied to an encoding device, the method includes: Obtain the sequence of information blocks to be encoded and the number of adaptations; the number of adaptations includes at least one of the number of information bit adaptations and the number of check bit adaptations; If the adaptation quantity information includes the information bit adaptation quantity, then the position of the information bit to be punctured is determined from the information bit subcode adaptation sequence based on the information bit adaptation quantity, and the information bit to be punctured in the information block sequence to be encoded is punctured to obtain punctured data; and / or, if the adaptation quantity information includes the parity bit adaptation quantity, then the position of the parity bit to be punctured is determined from the parity bit subcode adaptation sequence based on the parity bit adaptation quantity, and the parity bit to be punctured in the subcode encoding sequence is punctured to obtain punctured data; the subcode encoding sequence is generated based on the information block sequence to be encoded; Channel transmission is performed based on the data obtained after punching the holes.
13. The method according to claim 12, characterized in that, The step of determining the position of the information bit to be punctured from the information bit subcode adaptation sequence based on the number of information bit adaptations, and puncturing the information bit position to be punctured in the information block sequence to be encoded to obtain punctured data includes: According to the order of the information bit positions in the information bit code adaptation sequence, a plurality of information bit positions to be punched are selected sequentially from the information bit code adaptation sequence; the number of the plurality of information bit positions to be punched is equal to the number of information bit adaptations. Fill the information bit positions to be punched in the sequence of information blocks to be encoded with 0 to obtain the sequence of information blocks to be encoded after punching. Accordingly, the channel transmission based on the punched data includes: The punched information block sequence is encoded to obtain a sub-code encoding sequence; The subcode encoded sequence is transmitted through the channel.
14. The method according to claim 12, characterized in that, The step of determining the parity bit position to be punctured from the parity bit subcode adaptation sequence based on the number of parity bit adaptations, and puncturing the parity bit position to be punctured in the subcode encoding sequence includes: The sequence of information blocks to be encoded is encoded to obtain a subcode encoding sequence; According to the order of the parity bit positions in the parity bit adaptation sequence, a plurality of parity bit positions to be punched are selected sequentially from the parity bit adaptation sequence; the number of the plurality of parity bit positions to be punched is equal to the number of parity bit adaptations. The data at the position of the parity bit to be punched in the subcode encoding sequence is deleted to obtain the adapted subcode encoding sequence; Accordingly, the channel transmission based on the punched data includes: The adapted subcode encoding sequence is then transmitted through the channel.
15. The method according to claim 12, characterized in that, Also includes: If the preset length of a single encoded information block is less than the information bit length, and the channel transmission length is equal to the code length, then the difference between the information bit length and the length of the information block sequence to be encoded is determined as the number of information bit adaptations. If the preset length of a single encoded information block is less than the information bit length and the channel transmission length is less than the code length, then the difference between the information bit length and the length of the information block sequence to be encoded is determined as the number of information bit adaptations, and the number of check bit adaptations is determined based on the number of information bit adaptations, the code length, the target subcode rate, and the mother code rate. If the preset length of a single encoded information block is equal to the information bit length, and the channel transmission length is less than the code length, then the number of check bits to be adapted is determined based on the number of information bit adaptations, the code length, the target sub-code rate, and the mother code rate.
16. The method according to claim 15, characterized in that, The determination of the number of check bits to be adapted based on the number of information bits adapted, the code length, the target sub-code rate, and the mother code rate includes: The sum of the number of holes required for the check bits and the number of holes required for the information bits is determined as the number of check bits to be matched. Wherein, the number of punctures required for the check bits is the product of the code length and the proportion of the second check bits to be punctured; the proportion of the second check bits to be punctured is the ratio of the second code rate to be increased to the target sub-code rate, and the second code rate to be increased is the difference between the target sub-code rate and the mother code rate; the number of punctures required for the information bits is the product of the number of information bit adaptations and the ratio of check bits to information bits; the ratio of check bits to information bits is the ratio of the check bit proportion to the target sub-code rate; and the check bit proportion is the difference between 1 and the target sub-code rate.
17. A decoding method, characterized in that, Applied to a decoding device, the method includes: Obtain the data received based on channel transmission and the number of adaptations; the data includes an information bit sequence and a parity bit sequence; the number of adaptations includes at least one of the number of information bit adaptations and the number of parity bit adaptations; If the adaptation quantity information includes the information bit adaptation quantity, then the information bit position to be recovered is determined from the information bit subcode adaptation sequence based on the information bit adaptation quantity, and the information bit position to be recovered in the information bit sequence is recovered to obtain the recovered data; and / or, if the adaptation quantity information includes the parity bit adaptation quantity, then the parity bit position to be recovered is determined from the parity bit subcode adaptation sequence based on the parity bit adaptation quantity, and the parity bit position to be recovered in the parity bit sequence is recovered to obtain the recovered data; Decoding is performed based on the recovered data to obtain the decoding result.
18. The method according to claim 17, characterized in that, The step of determining the position of the information bit to be recovered from the information bit subcode adaptation sequence based on the number of information bit adaptations, and recovering the position of the information bit to be recovered in the information bit sequence to obtain the recovered data includes: According to the order of the information bit positions in the information bit code adaptation sequence, a plurality of information bit positions to be recovered are selected sequentially from the information bit code adaptation sequence; the number of the plurality of information bit positions to be recovered is equal to the number of information bit adaptations; The information bit positions to be recovered in the information bit sequence are restored to the first preset value to obtain the recovered data.
19. The method according to claim 17, characterized in that, The step of determining the position of the parity bit to be recovered from the parity bit subcode adaptation sequence based on the number of parity bit adaptations, and recovering the position of the parity bit to be recovered in the parity bit sequence to obtain the recovered data includes: According to the order of the parity bit positions in the parity bit adaptation sequence, a plurality of parity bit positions to be recovered are selected sequentially from the parity bit adaptation sequence; the number of the plurality of parity bit positions to be recovered is equal to the number of parity bit adaptations. The parity bit position to be recovered in the parity bit sequence is restored to the second preset value to obtain the recovered data.
20. The method according to claim 17, characterized in that, Also includes: If the preset length of a single encoded information block is less than the information bit length, and the channel transmission length is equal to the code length, then the difference between the information bit length and the length of the information block sequence to be encoded is determined as the number of information bit adaptations. If the preset length of a single encoded information block is less than the information bit length and the channel transmission length is less than the code length, then the difference between the information bit length and the length of the information block sequence to be encoded is determined as the number of information bit adaptations, and the number of check bit adaptations is determined based on the number of information bit adaptations, the code length, the target subcode code rate, and the mother code rate. If the preset length of a single encoded information block is equal to the information bit length, and the channel transmission length is less than the code length, then the number of check bits to be adapted is determined based on the number of information bit adaptations, the code length, the target sub-code rate, and the mother code rate.
21. The method according to claim 20, characterized in that, The determination of the number of check bits to be adapted based on the number of information bits adapted, the code length, the target sub-code rate, and the mother code rate includes: The sum of the number of holes required for the check bits and the number of holes required for the information bits is determined as the number of check bits to be matched. Wherein, the number of punctures required for the check bits is the product of the code length and the proportion of the second check bits to be punctured; the proportion of the second check bits to be punctured is the ratio of the second code rate to be increased to the target sub-code rate, and the second code rate to be increased is the difference between the target sub-code rate and the mother code rate; the number of punctures required for the information bits is the product of the number of information bit adaptations and the ratio of check bits to information bits; the ratio of check bits to information bits is the ratio of the check bit proportion to the target sub-code rate; and the check bit proportion is the difference between 1 and the target sub-code rate.
22. A data generation apparatus, characterized in that, The apparatus, located in the generating device, includes: The acquisition module is used to acquire the bipartite graph corresponding to the check matrix that matches the mother code pattern, the maximum number of holes punched in the information bits, and the maximum number of holes punched in the check bits; the bipartite graph includes multiple check nodes and multiple variable nodes; The generation module is used to determine multiple first punch nodes from multiple verification nodes based on the connection relationship between verification nodes and variable nodes in the bipartite graph, store the verification bit positions corresponding to the multiple first punch nodes into a verification bit subcode adaptation sequence, and determine multiple second punch nodes from multiple variable nodes, store the information bit positions corresponding to the multiple second punch nodes into an information bit subcode adaptation sequence. The number of the first punch nodes is equal to the maximum number of punches for the check bit; the number of the second punch nodes is equal to the maximum number of punches for the information bit; the check bit subcode adaptation sequence and the information bit subcode adaptation sequence are used for encoding by the encoding device and for decoding by the decoding device.
23. An encoding device, characterized in that, The device, disposed in an encoding device, includes: The acquisition module is used to acquire the sequence of information blocks to be encoded and the number of adaptations; the number of adaptations includes at least one of the number of information bit adaptations and the number of check bit adaptations. A punching module is configured to, if the adaptation quantity information includes an information bit adaptation quantity, determine the position of the information bit to be punched from the information bit subcode adaptation sequence based on the information bit adaptation quantity, and punch the information bit position to be punched in the information block sequence to be encoded to obtain punched data; and / or, if the adaptation quantity information includes a parity bit adaptation quantity, determine the position of the parity bit to be punched from the parity bit subcode adaptation sequence based on the parity bit adaptation quantity, and punch the parity bit position to be punched in the subcode encoding sequence to obtain punched data; the subcode encoding sequence is generated based on the information block sequence to be encoded; A transmission module is used for channel transmission based on the punched data.
24. A decoding device, characterized in that, The device, located in a decoding device, includes: An acquisition module is used to acquire data received based on channel transmission and adaptation quantity information; the data includes an information bit sequence and a check bit sequence; the adaptation quantity information includes at least one of the information bit adaptation quantity and the check bit adaptation quantity. The recovery module is configured to, if the adaptation quantity information includes the information bit adaptation quantity, determine the position of the information bit to be recovered from the information bit subcode adaptation sequence based on the information bit adaptation quantity, and recover the position of the information bit to be recovered in the information bit sequence to obtain the recovered data; and / or, if the adaptation quantity information includes the parity bit adaptation quantity, determine the position of the parity bit to be recovered from the parity bit subcode adaptation sequence based on the parity bit adaptation quantity, and recover the position of the parity bit to be recovered in the parity bit sequence to obtain the recovered data; The decoding module is used to decode the recovered data to obtain the decoding result.
25. An electronic device, characterized in that, include: A processor and a memory communicatively connected to the processor; The memory stores computer-executed instructions; The processor executes computer execution instructions stored in the memory to implement the data generation method as described in any one of claims 1 to 11, the encoding method as described in any one of claims 12 to 16, or the decoding method as described in any one of claims 17 to 21.
26. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions, which, when executed by a processor, are used to implement the data generation method as described in any one of claims 1 to 11, the encoding method as described in any one of claims 12 to 16, or the decoding method as described in any one of claims 17 to 21.
27. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the data generation method as described in any one of claims 1 to 11, the encoding method as described in any one of claims 12 to 16, or the decoding method as described in any one of claims 17 to 21.