Differential coplanar capacitance detection probe

Abstract

The invention relates to the technical field of electromagnetic nondestructive testing, and particularly provides a differential coplanar capacitance detection probe which comprises a differential coplanar capacitance unit, a differential signal amplification module, a probe shell and a signal transmission interface, wherein the differential coplanar capacitor unit comprises a first receiving electrode, a second receiving electrode and a common excitation electrode, the common excitation electrode is connected with the input end of the signal transmission interface, and the first receiving electrode and the second receiving electrode are connected with the differential signal amplification module; the first receiving electrode and the second receiving electrode output detection signals, and the output detection signals are output to the output end of the signal transmission interface after being processed by the differential signal amplification module. The detection probe is high in anti-interference capability and high in field adaptability, the defect misjudgment rate can be effectively reduced, and the influence of factors such as probe shaking and the detection lift-off effect on the detection result is small.

Description

Technical Field

[0001] This invention relates to the field of electromagnetic nondestructive testing technology, specifically to a differential coplanar capacitance detection probe. Background Technology

[0002] With the widespread application of non-metallic and composite materials in industry, higher demands are being placed on their non-destructive testing (NDT) technology. Traditional testing methods, such as ultrasonic testing and X-ray testing, suffer from low sensitivity, cumbersome operation, and high cost when processing non-conductive composite materials, making it difficult to meet the urgent needs of modern industry for rapid and accurate testing. Coplanar capacitance testing technology, as a novel electromagnetic NDT method, leverages the edge effect of coplanar capacitor plates to identify defects by analyzing changes in capacitance values, offering advantages such as high sensitivity, ease of operation, and low cost. This technology employs a volume averaging measurement method, effectively avoiding interference from material inhomogeneities, enabling full-thickness testing, and efficiently screening for surface and internal volumetric defects in non-conductive composite materials, providing a new approach for industrial testing.

[0003] A conventional coplanar capacitance detection probe mainly consists of a pair of coplanar excitation plates and a receiving plate. During detection, an AC excitation signal is applied to the excitation plate. Due to the potential difference between the excitation and receiving plates, capacitive coupling is formed between them. When detecting insulating samples, because the dielectric constant of the defect differs from that of the sample material, the presence of a defect in the detection domain will disturb the potential distribution in the space, causing electric field distortion. This, in turn, interferes with the capacitive coupling between the plates, ultimately altering the output signal of the receiving plate.

[0004] However, existing coplanar capacitance detection technology faces significant challenges in practical applications. During the detection process, probe jitter (such as displacement caused by hand operation or mechanical vibration) and the detection lift-off effect (i.e., a slight change in the distance between the probe and the surface being measured) directly interfere with the capacitive coupling state, causing fluctuations in the receiving plate signal, which in turn leads to misjudgments in defect identification. Summary of the Invention

[0005] To address the above problems, this invention provides a differential coplanar capacitance detection probe, which includes a differential coplanar capacitance unit, a differential signal amplification module, a probe housing, and a signal transmission interface; wherein: The differential coplanar capacitor unit includes a first receiving electrode, a second receiving electrode, and a common excitation electrode. The common excitation electrode is connected to the input terminal of the signal transmission interface. The first receiving electrode and the second receiving electrode are connected to the differential signal amplification module. The first receiving electrode and the second receiving electrode output a detection signal. The output detection signal is processed by the differential signal amplification module and then output to the output terminal of the signal transmission interface.

[0006] Based on the above scheme, the differential coplanar capacitor unit further includes a backplate shield, an inter-electrode shield, and a substrate. The backplate shield and the inter-electrode shield are connected to the zero potential of the differential signal amplification module. The first receiving electrode and the second receiving electrode are printed on the substrate. The backplate shield is printed on the non-electrode side of the substrate. The inter-electrode shield is printed between the electrodes on the electrode side of the substrate.

[0007] Specifically, the differential signal amplification module includes a first signal isolation unit, a first signal gain unit, a second signal isolation unit, a second signal gain unit, a differential amplification unit, a third signal isolation unit, and a third signal gain unit; The input terminal of the first signal isolation unit is connected to the first receiving electrode, and the output terminal is connected to the input terminal of the first signal gain unit. The output terminal of the first signal gain unit is connected to the non-inverting input terminal of the differential amplifier unit. The input terminal of the second signal isolation unit is connected to the second receiving electrode, and the output terminal is connected to the input terminal of the second signal gain unit. The output terminal of the second signal gain unit is connected to the inverting input terminal of the differential amplifier unit. The output of the differential amplifier unit is connected to the input of the third signal isolation unit, the output of the third signal isolation unit is connected to the input of the third signal gain unit, and the output of the third signal gain unit is connected to the output of the signal transmission interface.

[0008] Based on the above scheme, the first signal isolation unit is a voltage buffer composed of a first operational amplifier chip. The non-inverting input terminal of the first signal isolation unit is connected to the first receiving electrode, the inverting input terminal of the first signal isolation unit is connected to the output terminal of the first signal isolation unit, and the output terminal of the first signal isolation unit is also connected to the input terminal of the first signal gain unit.

[0009] Based on the above scheme, the first signal gain unit is a non-inverting amplifier composed of the second operational amplifier chip. The non-inverting input terminal of the first signal gain unit is connected to the output terminal of the first signal isolation unit. The inverting input terminal of the first signal gain unit is connected to the output terminal of the first signal gain unit through the first feedback resistor. The inverting input terminal of the first signal gain unit is also connected to zero potential through the first external resistor.

[0010] Based on the above scheme, the second signal isolation unit is a voltage buffer composed of a third operational amplifier chip. The non-inverting input terminal of the second signal isolation unit is connected to the second receiving electrode, the inverting input terminal of the second signal isolation unit is connected to the output terminal of the first signal isolation unit, and the output terminal of the second signal isolation unit is also connected to the input terminal of the second signal gain unit.

[0011] Based on the above scheme, the second signal gain unit is a non-inverting amplifier composed of a fourth operational amplifier chip. The non-inverting input terminal of the second signal gain unit is connected to the output terminal of the second signal isolation unit. The inverting input terminal of the second signal gain unit is connected to the output terminal of the second signal gain unit through a second feedback resistor. The inverting input terminal of the second signal gain unit is also connected to zero potential through a second external resistor.

[0012] Furthermore, the differential amplifier unit includes a fifth operational amplifier chip, the reference voltage terminal of the differential amplifier unit is connected to zero potential, and a potentiometer is connected between the first gain setting terminal and the second gain setting terminal of the differential amplifier unit.

[0013] Based on the above scheme, the third signal isolation unit is a voltage buffer composed of the sixth operational amplifier chip. The non-inverting input terminal of the third signal isolation unit is connected to the output terminal of the differential amplifier unit, the inverting input terminal of the third signal isolation unit is connected to the output terminal of the third signal isolation unit, and the output terminal of the third signal isolation unit is also connected to the input terminal of the third signal gain unit.

[0014] Based on the above scheme, the third signal gain unit is a non-inverting amplifier composed of the seventh operational amplifier chip. The non-inverting input terminal of the third signal gain unit is connected to the output terminal of the third signal isolation unit. The inverting input terminal of the third signal gain unit is connected to the output terminal of the third signal gain unit through the third feedback resistor. The inverting input terminal of the third signal gain unit is also connected to zero potential through the third external resistor.

[0015] Compared with the prior art, the beneficial effects of the present invention are as follows: 1. By setting up a differential coplanar capacitance unit, when the probe tilts or lifts off during the detection process, the capacitance signals of the two receiving electrodes exhibit complementary changing trends. After differential processing, common-mode interference can be effectively canceled, thereby significantly reducing the impact of probe attitude changes and lift-off fluctuations on the detection signal and improving detection stability. 2. By setting backplate shielding and inter-electrode shielding on the substrate, the diffusion of electric field to the back of the probe is effectively suppressed, the focusing of electric field in the detection direction is enhanced, and crosstalk between adjacent electrodes and external electromagnetic interference are reduced, thereby improving detection sensitivity and signal-to-noise ratio. 3. By designing a differential signal amplification module, the weak capacitance signals output from the first and second receiving electrodes are subjected to multi-stage isolation and gain processing. The difference between the two signals is extracted by the differential amplification unit, which effectively suppresses common-mode noise, improves signal amplitude and anti-interference capability, and thus outputs a stable detection signal with a high signal-to-noise ratio. Attached Figure Description

[0016] Figure 1 A schematic diagram of the differential coplanar capacitance detection probe structure provided by the present invention; Figure 2 A schematic diagram of the first isolation unit and the first gain unit circuit provided by the present invention; Figure 3 A schematic diagram of the second isolation unit and the second gain unit circuit provided by the present invention; Figure 4 A schematic diagram of the differential amplifier unit circuit provided by the present invention; Figure 5 The circuit diagram of the third isolation unit and the third gain unit provided by the present invention.

[0017] Figure label: 1. Differential coplanar capacitor unit; 11. First receiving electrode; 12. First inter-electrode shield; 13. Common excitation electrode; 14. Second inter-electrode shield; 15. Second receiving electrode; 16. Plate shield; 2. Differential signal amplification module. Detailed Implementation

[0018] The present invention will be further described below with reference to the accompanying drawings: In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0019] like Figure 1 As shown, this invention provides a differential coplanar capacitance detection probe, which includes a differential coplanar capacitance unit 1, a differential signal amplification module 2, a probe housing, and a signal transmission interface; wherein: The differential coplanar capacitor unit includes a first receiving electrode 11, a second receiving electrode 15, a common excitation electrode 13, and a substrate. The common excitation electrode is connected to the input terminal Vin of the signal transmission interface via a connecting line. The common excitation electrode is printed on the substrate using printed circuit board technology. The first receiving electrode and the second receiving electrode are printed on the substrate using printed circuit board technology and connected to the differential signal amplification module via connecting lines.

[0020] The first and second receiving electrodes detect and output detection signals. The output detection signals are processed by the differential signal amplification module and then output to the output terminal of the signal transmission interface. The output terminal is connected to an external detection system to analyze the signal output by the differential signal amplification module.

[0021] Furthermore, the differential coplanar capacitor unit also includes a backplate shield and an inter-electrode shield. The backplate shield and the inter-electrode shield are respectively connected to the zero potential GND of the differential signal amplification module. The backplate shield 16 is printed on the non-electrode side of the substrate, and the inter-electrode shield is printed between each electrode on the electrode side of the substrate. Figure 1 As shown, a first inter-electrode shield 12 is provided between the first receiving electrode and the common excitation electrode, and a second inter-electrode shield 14 is provided between the common excitation electrode and the second receiving electrode.

[0022] Through the aforementioned differential coplanar capacitor unit, when an excitation signal is applied to the common excitation electrode, the first and second receiving electrodes induce symmetrical capacitive coupling signals. When a lift-off change occurs between the probe and the surface of the object being measured, or when the probe tilts, the capacitive signals induced by the two receiving electrodes exhibit opposite trends, forming complementary characteristics. This structure effectively suppresses common-mode interference components in subsequent differential processing, thereby reducing the impact of probe attitude changes on the detection results.

[0023] According to this embodiment, the backplate shielding layer is connected to zero potential, which can block the electric field from spreading to the inside of the probe and the back side, so that the electric field energy is concentrated in the direction to be measured and the detection sensitivity is enhanced; the inter-electrode shield is located between each electrode, which effectively suppresses the direct electric field coupling between the electrodes and improves the response accuracy of the electrodes to changes in the electric field of the measured area.

[0024] The differential signal amplification module includes a first signal isolation unit, a first signal gain unit, a second signal isolation unit, a second signal gain unit, a differential amplification unit, a third signal isolation unit, and a third signal gain unit.

[0025] According to a preferred embodiment of this application: like Figure 2 As shown, the first signal isolation unit is a voltage buffer U1.1 composed of the first operational amplifier chip, specifically: The non-inverting input terminal of the first signal isolation unit is connected to the first receiving electrode and is used to directly receive the first detection signal C1 output from the first receiving electrode. The inverting input terminal of the first signal isolation unit is connected to the output terminal of the first signal isolation unit to form a unity-gain buffer; The output of the first signal isolation unit is also connected to the input of the first signal gain unit, so that the buffered first detection signal is transmitted to the first signal gain unit for further amplification.

[0026] This embodiment provides high input impedance and low output impedance by setting a buffer, thereby avoiding the load effect on the first receiving electrode and ensuring that the signal is not distorted due to the influence of external circuits during transmission.

[0027] The first signal gain unit is a non-inverting amplifier U1.2 composed of the second operational amplifier chip, specifically: The non-inverting input of the first signal gain unit is connected to the output of the first signal isolation unit to receive the buffered first detection signal. The inverting input terminal of the first signal gain unit is connected to the output terminal of the first signal gain unit through the first feedback resistor R1, and the inverting input terminal of the first signal gain unit is also connected to zero potential GND through the first external resistor R2. The output of the first signal gain unit is connected to the non-inverting input of the differential amplifier unit, and the amplified signal S1 is input into the differential amplifier unit.

[0028] With the aforementioned in-phase amplifier configuration, the first signal gain unit linearly amplifies the output signal of the first signal isolation unit, and its voltage gain is determined by the ratio of the first feedback resistor to the first external resistor. Through this amplification stage, the amplitude of the first detection signal is increased, enhancing its anti-interference capability and providing a sufficiently strong input signal for subsequent differential processing.

[0029] like Figure 3 As shown, the second signal isolation unit is a voltage buffer U2.1 composed of the third operational amplifier chip. The second signal isolation unit specifically includes: The non-inverting input terminal of the second signal isolation unit is connected to the second receiving electrode of the differential coplanar capacitor unit via a connecting line, and is used to receive the second detection signal C2 output by the second receiving electrode; The inverting input terminal of the second signal isolation unit is connected to its output terminal via a connecting line to form a voltage buffer; The output of the second signal isolation unit is also connected to the non-inverting input of the second signal gain unit via a connecting line.

[0030] In this embodiment, the second signal isolation unit has the same function as the first signal isolation unit. This structure ensures that the weak signal output by the second receiving electrode is not attenuated or distorted during transmission, thereby achieving high-fidelity signal transmission.

[0031] The second signal gain unit is a non-inverting amplifier composed of the fourth operational amplifier chip, and the second signal gain unit specifically includes: The non-inverting input of the second signal gain unit is connected to the output of the second signal isolation unit to receive the buffered second detection signal. The inverting input terminal of the second signal gain unit is connected to the output terminal of the second signal gain unit through the second feedback resistor R3. At the same time, the inverting input terminal is also connected to the zero potential GND of the differential signal amplification module through the second external resistor R4. The output of the second signal gain unit is connected to the inverting input of the differential amplifier unit, and the amplified signal S2 is input into the differential amplifier unit.

[0032] According to this embodiment, the second signal gain unit amplifies the second detection signal in phase.

[0033] like Figure 4 As shown, the differential amplifier unit is a differential amplifier circuit composed of the fifth operational amplifier chip, specifically including: The non-inverting input of the differential amplifier unit is connected to the output of the first signal gain unit to receive the amplified first detection signal; The inverting input of the differential amplifier unit is connected to the output of the second signal gain unit to receive the amplified second detection signal; The reference voltage terminal of the differential amplifier unit is connected to the zero potential GND of the differential signal amplifier module to set the output reference level; The first gain setting terminal and the second gain setting terminal of the differential amplifier unit are connected by an adjustable potentiometer R7 for precisely setting the differential gain. The output of the differential amplifier unit is connected to the non-inverting input of the third signal isolation unit via a connecting line.

[0034] According to this embodiment, the output of the differential amplifier unit is the difference between the two input signals multiplied by a set gain. Through this differential amplifier unit, the common-mode components caused by environmental interference, temperature drift, or probe lift-off / tilt in the two signals can be effectively suppressed, while highlighting the differential signal that reflects the defects or dielectric properties of the material under test, significantly improving the stability and sensitivity of the detection.

[0035] like Figure 5 As shown, the third signal isolation unit is a voltage buffer U3.1 composed of the sixth operational amplifier chip, and its specific structure includes: The non-inverting input terminal of the third signal isolation unit is connected to the output terminal of the differential amplifier unit via a connecting line, and is used to receive the signal S0 processed by the differential amplifier unit; The inverting input terminal of the third signal isolation unit is connected to its output terminal via a connecting line to form a voltage buffer structure; The output of the third signal isolation unit is connected to the non-inverting input of the third signal gain unit via a connecting line.

[0036] The third isolation unit performs impedance transformation on the differentially amplified signal, enhances the signal driving capability, prevents subsequent circuits from affecting the differential amplification result, and ensures signal integrity.

[0037] The third signal gain unit is a non-inverting amplifier U3.2 composed of the seventh operational amplifier chip, specifically including: The non-inverting input of the third signal gain unit is connected to the output of the third signal isolation unit via a connecting line, and is used to receive the buffered signal S0. The inverting input terminal of the third signal gain unit is connected to the output terminal of the third signal gain unit through the third feedback resistor R5. At the same time, the inverting input terminal is also connected to the zero potential GND of the differential signal amplification module through the third external resistor R6. The output of the third signal gain unit is connected to the output Vout of the signal transmission interface.

[0038] In this embodiment, the third signal gain unit performs final-stage gain adjustment on the differentially processed and buffered signal so that the final output signal meets the voltage input range requirements of the external detection system (such as a data acquisition card, oscilloscope, etc.) and achieves standardized output.

[0039] The working process of the detection probe in this invention is as follows: An external excitation source applies a high-frequency AC voltage signal to the common excitation electrode through the input terminal Vin of the signal transmission interface. This excitation signal establishes an alternating electric field between the excitation electrode and the surface of the object under test. The distribution of the electric field is affected by the dielectric properties and surface condition of the object under test. The first receiving electrode and the second receiving electrode respectively sense and receive the capacitive coupling signal generated by the electric field.

[0040] The two detection signals are impedance isolated by their respective channel voltage buffers and then enter the in-phase proportional amplifier for pre-amplification. Subsequently, the two amplified signals are sent to the differential amplifier unit for differential processing to effectively suppress common-mode interference. The differential output signal is then buffered by the third signal isolation unit and amplified by the third signal gain unit. Finally, it is output to the external detection system for analysis through the output terminal of the signal transmission interface.

[0041] By setting up multi-stage circuit units that include isolation, gain and differential processing, the problems of susceptibility to interference and weak driving capability of capacitive signals are effectively solved. It has high-fidelity transmission, low-distortion amplification and strong common-mode rejection capabilities, which significantly enhances the detection reliability and sensitivity of the probe under complex working conditions.

[0042] The detection probe of this application has a wide range of applications and can effectively detect and identify various types of defects. Specifically, the probe can be applied to in-situ non-destructive testing and evaluation of commonly used non-conductive material structures or components in engineering such as fiberglass storage tanks. During the testing process, there is no need to disassemble or sample the object being tested, and no physical damage is caused. It can quickly identify and locate typical defects such as delamination, debonding, cracks, porosity, and aging.

[0043] The foregoing has shown and described the basic principles and main features of the present invention. It will be apparent to those skilled in the art that the present invention is not limited to the details of the above exemplary embodiments. Therefore, the embodiments should be considered as exemplary and not restrictive. The scope of the present invention is defined by the appended claims rather than the foregoing description. Therefore, it is intended that all variations falling within the meaning and scope of the equivalents of the claims be included within the present invention.

[0044] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A differential coplanar capacitance detection probe, characterized in that, The detection probe includes a differential coplanar capacitance unit, a differential signal amplification module, a probe housing, and a signal transmission interface; wherein: The differential coplanar capacitor unit includes a first receiving electrode, a second receiving electrode, and a common excitation electrode. The common excitation electrode is connected to the input terminal of the signal transmission interface. The first receiving electrode and the second receiving electrode are connected to the differential signal amplification module. The first receiving electrode and the second receiving electrode output a detection signal. The output detection signal is processed by the differential signal amplification module and then output to the output terminal of the signal transmission interface.

2. The differential coplanar capacitance detection probe according to claim 1, characterized in that, The differential coplanar capacitor unit further includes a backplate shield, an inter-electrode shield, and a substrate. The backplate shield and the inter-electrode shield are connected to the zero potential of the differential signal amplification module. The first receiving electrode and the second receiving electrode are printed on the substrate. The backplate shield is printed on the non-electrode side of the substrate. The inter-electrode shield is printed between the electrodes on the electrode side of the substrate.

3. The differential coplanar capacitance detection probe according to claim 1, characterized in that, The differential signal amplification module includes a first signal isolation unit, a first signal gain unit, a second signal isolation unit, a second signal gain unit, a differential amplification unit, a third signal isolation unit, and a third signal gain unit; The input terminal of the first signal isolation unit is connected to the first receiving electrode, and the output terminal is connected to the input terminal of the first signal gain unit. The output terminal of the first signal gain unit is connected to the input terminal of the differential amplification unit. The input terminal of the second signal isolation unit is connected to the second receiving electrode, and the output terminal is connected to the input terminal of the second signal gain unit. The output terminal of the second signal gain unit is connected to the input terminal of the differential amplification unit. The output of the differential amplifier unit is connected to the input of the third signal isolation unit, and the output of the third signal isolation unit is connected to the input of the third signal gain unit.

4. The differential coplanar capacitance detection probe according to claim 3, characterized in that, The first signal isolation unit is a voltage buffer composed of a first operational amplifier chip. The non-inverting input terminal of the first signal isolation unit is connected to the first receiving electrode, the inverting input terminal of the first signal isolation unit is connected to the output terminal of the first signal isolation unit, and the output terminal of the first signal isolation unit is also connected to the input terminal of the first signal gain unit.

5. The differential coplanar capacitance detection probe according to claim 4, characterized in that, The first signal gain unit is a non-inverting amplifier composed of a second operational amplifier chip. The non-inverting input terminal of the first signal gain unit is connected to the output terminal of the first signal isolation unit. The inverting input terminal of the first signal gain unit is connected to the output terminal of the first signal gain unit through a first feedback resistor. The inverting input terminal of the first signal gain unit is also connected to zero potential through a first external resistor.

6. The differential coplanar capacitance detection probe according to claim 3, characterized in that, The second signal isolation unit is a voltage buffer composed of a third operational amplifier chip. The non-inverting input terminal of the second signal isolation unit is connected to the second receiving electrode, the inverting input terminal of the second signal isolation unit is connected to the output terminal of the first signal isolation unit, and the output terminal of the second signal isolation unit is also connected to the input terminal of the second signal gain unit.

7. The differential coplanar capacitance detection probe according to claim 6, characterized in that, The second signal gain unit is a non-inverting amplifier composed of a fourth operational amplifier chip. The non-inverting input terminal of the second signal gain unit is connected to the output terminal of the second signal isolation unit. The inverting input terminal of the second signal gain unit is connected to the output terminal of the second signal gain unit through a second feedback resistor. The inverting input terminal of the second signal gain unit is also connected to zero potential through a second external resistor.

8. The differential coplanar capacitance detection probe according to claim 5 or 7, characterized in that, The differential amplifier unit includes a fifth operational amplifier chip. The reference voltage terminal of the differential amplifier unit is connected to zero potential, and a potentiometer is connected between the first gain setting terminal and the second gain setting terminal of the differential amplifier unit.

9. The differential coplanar capacitance detection probe according to claim 8, characterized in that, The third signal isolation unit is a voltage buffer composed of the sixth operational amplifier chip. The non-inverting input terminal of the third signal isolation unit is connected to the output terminal of the differential amplifier unit, the inverting input terminal of the third signal isolation unit is connected to the output terminal of the third signal isolation unit, and the output terminal of the third signal isolation unit is also connected to the input terminal of the third signal gain unit.

10. The differential coplanar capacitance detection probe according to claim 9, characterized in that, The third signal gain unit is a non-inverting amplifier composed of the seventh operational amplifier chip. The non-inverting input terminal of the third signal gain unit is connected to the output terminal of the third signal isolation unit. The inverting input terminal of the third signal gain unit is connected to the output terminal of the third signal gain unit through the third feedback resistor. The inverting input terminal of the third signal gain unit is also connected to zero potential through the third external resistor.

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