Epitaxial process for improving continuous length consistency of single-chip furnace

Abstract

The invention discloses an epitaxial process for improving continuous consistency of a single-wafer furnace, which comprises the following steps: S1, placing a silicon wafer in an epitaxial furnace, introducing hydrogen, and raising the temperature in the furnace; s2, under the hydrogen atmosphere, hydrogen chloride is introduced for gas-phase polishing; s3, closing hydrogen chloride, and baking in a hydrogen atmosphere; s4, introducing trichlorosilane and phosphorane in a hydrogen atmosphere, and growing an epitaxial layer on the silicon wafer; s5, closing trichlorosilane and phosphorane, waiting for cooling of the epitaxial furnace, closing hydrogen, introducing nitrogen, and taking out the epitaxial wafer; s6, repeating the steps S1 to S5 for multiple times, and carrying out continuous flaking; and S7, introducing hydrogen and hydrogen chloride, and carrying out etching treatment on the epitaxial furnace. According to the method, the baking process is added before the epitaxial layer is grown, so that the furnace chamber is heated uniformly, the temperature field consistency in the epitaxial furnace is improved, the silicon epitaxial layer is grown, the epitaxial silicon wafer with the thickness smaller than or equal to 10 microns can be continuously prepared, and compared with a traditional process, the inter-wafer difference between the continuously prepared epitaxial wafers can be reduced, and the thickness consistency is improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to an epitaxial process for improving the consistency of the continuous length of a single-wafer furnace. Background Technology

[0002] Silicon epitaxial wafers are semiconductor materials made by epitaxially growing single-crystal thin films on the surface of a single-crystal silicon substrate. Currently, the commonly used silicon epitaxial wafer manufacturing process is as follows: the silicon wafer is placed in an epitaxial furnace, hydrogen gas is introduced, and then the temperature is raised to 1110~1150 °C. Hydrogen chloride is introduced for vapor phase polishing. The hydrogen chloride is turned off, and hydrogen gas is used to remove impurity gases in the furnace. Then, trichlorosilane and phosphine are introduced again to grow the epitaxial layer. The temperature is lowered to below 50 °C, and the silicon wafer is removed. The above steps are repeated for continuous wafer fabrication. Finally, hydrogen chloride is introduced to etch and clean the epitaxial furnace.

[0003] However, because silicon not only grows on the silicon wafer during the fabrication process but also deposits inside the cavity, differences in heat transfer and heat reflection within the cavity lead to significant inter-wafer thickness variations in the final silicon epitaxial wafers. To reduce these inter-wafer variations, hydrogen chloride etching is required after each wafer is fabricated. However, this method would prevent continuous fabrication of silicon epitaxial wafers, reducing fabrication efficiency.

[0004] Therefore, there is an urgent need for an epitaxial process that can achieve continuous silicon epitaxial wafer fabrication and ensure the consistency of continuously fabricated silicon epitaxial wafers. Summary of the Invention

[0005] Purpose of the invention: To address the above-mentioned shortcomings, the present invention provides an epitaxial process that improves the consistency of the continuous length of a single-wafer furnace.

[0006] Technical solution: To solve the above problems, the present invention employs an epitaxial process to improve the consistency of the continuous length of a single-wafer furnace, comprising the following steps: S1. Place the silicon wafer in the epitaxial furnace, introduce hydrogen gas, and raise the temperature inside the furnace; S2. Under a hydrogen atmosphere, hydrogen chloride is introduced for gas-phase polishing; S3. Turn off the hydrogen chloride and bake for 60-180 seconds in a hydrogen atmosphere at a furnace temperature of 1110-1150℃. S4. Under a hydrogen atmosphere, trichlorosilane and phosphine are introduced to grow an epitaxial layer on a silicon wafer. S5. Turn off trichlorosilane and phosphine, wait for the epitaxial furnace to cool down, turn off hydrogen, introduce nitrogen, and remove the epitaxial wafer. S6. Repeat S1-S5 multiple times to perform continuous slide preparation; S7. Introduce hydrogen and hydrogen chloride to perform etching on the epitaxial furnace.

[0007] Furthermore, in step S1, the furnace temperature is controlled to 1110-1150℃.

[0008] Furthermore, in step S1, the hydrogen flow rate is 20-80 L / min.

[0009] Furthermore, in step S2, the hydrogen chloride flow rate is 300-700 sccm, and the vapor phase polishing time is 10-60 s.

[0010] Furthermore, in step S4, the flow rate of trichlorosilane is 10-20 L / min, the flow rate of phosphine is 10-300 sccm, and the gas is maintained for 1-50 min.

[0011] Furthermore, the phosphine concentration is 30-3000 ppm.

[0012] Furthermore, in step S5, the epitaxial furnace is cooled to 50°C.

[0013] Furthermore, after purging nitrogen gas for 20 minutes in step S5, the slide is removed.

[0014] Furthermore, step S6 repeats steps S1-S5 three times to achieve the continuous preparation of four epitaxial wafers.

[0015] Furthermore, in step S7, the hydrogen flow rate is 5-80 L / min, the hydrogen chloride flow rate is 10-20 L / min, and the etching time is 1-30 min.

[0016] Beneficial effects: Compared with the prior art, the significant advantage of this invention is that by adding a baking process before growing the epitaxial layer, the heating in the furnace cavity is uniform, the temperature field consistency in the epitaxial furnace is improved, and the silicon epitaxial layer is regrown. This enables the continuous preparation of epitaxial silicon wafers with a thickness of ≤10μm. Compared with the traditional process, it can reduce the inter-wafer difference between continuously prepared epitaxial wafers and improve the thickness consistency. Attached Figure Description

[0017] Figure 1 These are SRP test images of epitaxial wafers prepared according to various embodiments of the present invention. Detailed Implementation

[0018] Example 1

[0019] An epitaxial process for improving the consistency of the continuous length of a single-wafer furnace, as described in this embodiment, includes the following steps: S1. Place the silicon wafer in the epitaxial furnace, introduce hydrogen gas at a flow rate of 30 L / min, and raise the furnace temperature to 1120°C.

[0020] S2. Under a hydrogen atmosphere, hydrogen chloride is introduced for gas-phase polishing. The flow rate of hydrogen chloride is 400 sccm, and the gas-phase polishing time is 30 s.

[0021] S3. Turn off the hydrogen chloride and bake for 60 seconds in a hydrogen atmosphere at an oven temperature of 1110℃.

[0022] S4. In a hydrogen atmosphere, trichlorosilane and phosphine are introduced. The flow rate of trichlorosilane is 15 L / min, the flow rate of phosphine is 100 sccm, and the concentration of phosphine is 30 ppm. The gas is introduced for 1 min to grow an epitaxial layer on the silicon wafer.

[0023] S5. Turn off trichlorosilane and phosphine, wait for the epitaxial furnace to cool down to 50°C, turn off hydrogen, introduce nitrogen for 20 minutes, and then remove the epitaxial wafer.

[0024] S6. Repeat S1-S5 three times to perform continuous film preparation.

[0025] S7. Introduce hydrogen and hydrogen chloride to perform etching in the epitaxial furnace. The hydrogen flow rate is 20 L / min, the hydrogen chloride flow rate is 10 L / min, and the etching time is 3 min.

[0026] Example 2

[0027] An epitaxial process for improving the consistency of the continuous length of a single-wafer furnace, as described in this embodiment, includes the following steps: S1. Place the silicon wafer in the epitaxial furnace, introduce hydrogen gas at a flow rate of 30 L / min, and raise the furnace temperature to 1120°C.

[0028] S2. Under a hydrogen atmosphere, hydrogen chloride is introduced for gas-phase polishing. The flow rate of hydrogen chloride is 400 sccm, and the gas-phase polishing time is 30 s.

[0029] S3. Turn off the hydrogen chloride and bake for 180 seconds in a hydrogen atmosphere at an oven temperature of 1150°C.

[0030] S4. In a hydrogen atmosphere, trichlorosilane and phosphine are introduced. The flow rate of trichlorosilane is 15 L / min, the flow rate of phosphine is 100 sccm, and the concentration of phosphine is 30 ppm. The gas is introduced for 1 min to grow an epitaxial layer on the silicon wafer.

[0031] S5. Turn off trichlorosilane and phosphine, wait for the epitaxial furnace to cool down to 50°C, turn off hydrogen, introduce nitrogen for 20 minutes, and then remove the epitaxial wafer.

[0032] S6. Repeat S1-S5 three times to perform continuous film preparation.

[0033] S7. Introduce hydrogen and hydrogen chloride to perform etching in the epitaxial furnace. The hydrogen flow rate is 20 L / min, the hydrogen chloride flow rate is 10 L / min, and the etching time is 3 min.

[0034] Example 3

[0035] An epitaxial process for improving the consistency of the continuous length of a single-wafer furnace, as described in this embodiment, includes the following steps: S1. Place the silicon wafer in the epitaxial furnace, introduce hydrogen gas at a flow rate of 30 L / min, and raise the furnace temperature to 1120°C.

[0036] S2. Under a hydrogen atmosphere, hydrogen chloride is introduced for gas-phase polishing. The flow rate of hydrogen chloride is 400 sccm, and the gas-phase polishing time is 30 s.

[0037] S3. Turn off the hydrogen chloride and bake for 100 seconds in a hydrogen atmosphere at an oven temperature of 1130°C.

[0038] S4. In a hydrogen atmosphere, trichlorosilane and phosphine are introduced. The flow rate of trichlorosilane is 15 L / min, the flow rate of phosphine is 100 sccm, and the concentration of phosphine is 30 ppm. The gas is introduced for 1 min to grow an epitaxial layer on the silicon wafer.

[0039] S5. Turn off trichlorosilane and phosphine, wait for the epitaxial furnace to cool down to 50°C, turn off hydrogen, introduce nitrogen for 20 minutes, and then remove the epitaxial wafer.

[0040] S6. Repeat S1-S5 three times to perform continuous film preparation.

[0041] S7. Introduce hydrogen and hydrogen chloride to perform etching in the epitaxial furnace. The hydrogen flow rate is 20 L / min, the hydrogen chloride flow rate is 10 L / min, and the etching time is 3 min.

[0042] Comparative Example 1

[0043] In this embodiment, the epitaxial process does not involve baking and includes the following steps: S1. Place the silicon wafer in the epitaxial furnace, introduce hydrogen gas at a flow rate of 30 L / min, and raise the furnace temperature to 1120°C.

[0044] S2. Under a hydrogen atmosphere, hydrogen chloride is introduced for gas-phase polishing. The flow rate of hydrogen chloride is 400 sccm, and the gas-phase polishing time is 30 s.

[0045] S3. In a hydrogen atmosphere, trichlorosilane and phosphine are introduced. The flow rate of trichlorosilane is 15 L / min, the flow rate of phosphine is 100 sccm, and the concentration of phosphine is 30 ppm. The gas is introduced for 1 min to grow an epitaxial layer on the silicon wafer.

[0046] S4. Turn off trichlorosilane and phosphine, wait for the epitaxial furnace to cool down to 50°C, turn off hydrogen, introduce nitrogen for 20 minutes, and then remove the epitaxial wafer.

[0047] S5. Repeat S1-S4 three times to perform continuous film preparation.

[0048] S6. Introduce hydrogen and hydrogen chloride to perform etching in the epitaxial furnace. The hydrogen flow rate is 20 L / min, the hydrogen chloride flow rate is 10 L / min, and the etching time is 3 min.

[0049] This comparative example uses a conventional continuous wafer fabrication process. Each step is a mature process, and adjustments to parameters such as flow rate and time are well-known techniques in the field; therefore, no further examples are listed. Specifically, in step S1 of this comparative example, the hydrogen flow rate can be 20-80 L / min, and the furnace temperature can be increased to 1110-1150℃; in step S2, the hydrogen chloride flow rate can be 300-700 sccm, and the vapor phase polishing time can be 10-60 s; in step S3, the trichlorosilane flow rate can be 10-20 L / min, the phosphine flow rate can be 10-300 sccm, the phosphine concentration can be 30-3000 ppm, the hydrogen flow rate can be 20-80 L / min, and the gas supply is maintained for 1-50 min; in step S6, the hydrogen flow rate is 5-80 L / min, the hydrogen chloride flow rate can be 10-20 L / min, and the etching time can be 1-30 min.

[0050] Parameter testing

[0051] Examples 1-3 and Comparative Example 1 all achieved continuous fabrication of four epitaxial wafers. One wafer was selected from each example for SRP parameter testing, and the results are as follows: Figure 1 As shown in the figure, there is no significant difference in the SRP parameters of the epitaxial wafers obtained in each embodiment, indicating that adding the baking step does not affect the resistivity of the epitaxial wafer.

[0052] The thickness of the four epitaxial wafers prepared in each embodiment was measured, and the results are shown in the table below.

[0053]

[0054] As can be seen from the table, the thickness of the prepared epitaxial wafers was approximately 4.7 μm. Compared to Comparative Example 1, the inter-wafer differences in Examples 1-3 were smaller, and the consistency of epitaxial wafer thickness was improved. Furthermore, Example 2, with the highest baking temperature and longest baking time, showed the smallest inter-wafer difference. Theoretically, higher temperatures and longer baking times could further reduce inter-wafer differences, but due to the inherent testing errors in thickness measurement equipment, the 0.02% inter-wafer difference was essentially close to zero, indicating that the best results had been achieved, and there was no need to further increase the temperature and baking time.

[0055] In summary, traditional processes suffer from silicon deposition within the furnace cavity after each epitaxial growth, leading to temperature deviations and uneven temperature fields, resulting in significant differences between continuously produced epitaxial wafers. The epitaxial process of this invention effectively improves the problem of uneven temperature fields caused by silicon deposition within the epitaxial furnace by adding a baking process before epitaxial layer growth. This improves the temperature field consistency within the epitaxial furnace, reduces the differences between continuously produced epitaxial wafers, and enhances thickness consistency.

Claims

1. An epitaxial process for improving the uniformity of the continuous length of a single-wafer furnace, characterized in that, Includes the following steps: S1. Place the silicon wafer in the epitaxial furnace, introduce hydrogen gas, and raise the temperature inside the furnace; S2. Under a hydrogen atmosphere, hydrogen chloride is introduced for gas-phase polishing; S3. Turn off the hydrogen chloride and bake for 60-180 seconds in a hydrogen atmosphere at a furnace temperature of 1110-1150℃. S4. Under a hydrogen atmosphere, trichlorosilane and phosphine are introduced to grow an epitaxial layer on a silicon wafer. S5. Turn off trichlorosilane and phosphine, wait for the epitaxial furnace to cool down, turn off hydrogen, introduce nitrogen, and remove the epitaxial wafer. S6. Repeat S1-S5 multiple times to perform continuous slide preparation; S7. Introduce hydrogen and hydrogen chloride to perform etching on the epitaxial furnace.

2. The epitaxial process for improving the continuity of a single-wafer furnace as described in claim 1, characterized in that, Step S1 raises the furnace temperature to 1110-1150℃.

3. The epitaxial process for improving the continuity of a single-wafer furnace as described in claim 1, characterized in that, In step S1, the hydrogen flow rate is 20-80 L / min.

4. The epitaxial process for improving the continuity of a single-wafer furnace as described in claim 1, characterized in that, In step S2, the hydrogen chloride flow rate is 300-700 sccm, and the vapor phase polishing time is 10-60 s.

5. The epitaxial process for improving the continuity of a single-wafer furnace as described in claim 1, characterized in that, In step S4, the flow rate of trichlorosilane is 10-20 L / min, the flow rate of phosphine is 10-300 sccm, and the gas is maintained for 1-50 min.

6. The epitaxial process for improving the continuity of a single-wafer furnace as described in claim 5, characterized in that, Phosphine concentration is 30-3000 ppm.

7. The epitaxial process for improving the continuity of a single-wafer furnace as described in claim 1, characterized in that, Step S5: Cool the epitaxial furnace to 50°C.

8. The epitaxial process for improving the continuity of a single-wafer furnace as described in claim 1, characterized in that, After purging nitrogen gas for 20 minutes in step S5, the slide is removed.

9. The epitaxial process for improving the continuity of a single-wafer furnace as described in claim 1, characterized in that, Step S6 is repeated three times from steps S1 to S5 to achieve continuous preparation of four epitaxial wafers.

10. The epitaxial process for improving the continuity of a single-wafer furnace as described in claim 1, characterized in that, In step S7, the hydrogen flow rate is 5-80 L / min, the hydrogen chloride flow rate is 10-20 L / min, and the etching time is 1-30 min.

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