Data acquisition device for chip aging test

By designing a data acquisition device for chip aging testing, using a ring conveyor assembly and magnetic structure, parallel aging testing of multiple chips is achieved, solving the problem of inaccurate detection under centralized architecture and improving testing accuracy and efficiency.

CN121784522APending Publication Date: 2026-04-03KUNSHAN CHIPINFOS ELECTRONIC TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-12-30
Publication Date
2026-04-03

AI Technical Summary

Technical Problem

Existing chip aging test equipment uses a centralized architecture, which results in insufficient chip detection accuracy, inability to achieve efficient integrated testing, and the loss of critical details in test data.

Method used

Design a data acquisition device comprising a chamber, a ring conveyor assembly, a magnetic structure, and a data acquisition assembly to achieve parallel aging tests of multiple chips. The test boxes are automatically conveyed via the magnetic assembly, the ring path structure saves equipment space, the support frame displays real-time data, multi-channel signal transmission is supported, the support mesh simulates various environments, and the static eliminator ensures the safety of the test environment.

Benefits of technology

It enables high-parallel aging testing of multiple chips, acquires performance data in real time, improves testing accuracy and efficiency, reduces human error, and adapts to the needs of large-scale batch testing.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a data acquisition device for a chip aging test, and relates to the technical field of chip detection, the data acquisition device comprises a bin body, opening and closing doors are arranged on the front side and the rear side of the bin body, the opening and closing doors slide along a door frame of the bin body through electric control to realize opening and closing, and an annular conveying assembly is arranged in the bin body; the conveying assembly is used for conveying and transferring a test box used for loading chips, the test box comprises a box body, a limiting groove for storing the chips is formed in the box body, a plurality of jacks are formed in the top of the limiting groove and used for being connected with a data acquisition line, and the two ends of the first supporting plate are in contact connection with the limiting groove. A first telescopic rod is fixedly installed on the side face of the second supporting plate, a third supporting plate is fixedly installed at the end of the first telescopic rod, chips are clamped through the third supporting plate and the first supporting plate, long-time and high-parallelism aging testing can be carried out on multiple chips at a time, performance data of the chips in the aging process can be obtained and recorded in real time, and the testing efficiency is improved. And comprehensive data support is provided for chip reliability verification.
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Description

Technical Field

[0001] This invention relates to the field of chip testing technology, specifically to a data acquisition device for chip aging testing. Background Technology

[0002] Chip aging testing is a core step in the chip manufacturing process to ensure product reliability. It simulates the extreme environment (such as high temperature and high voltage) of chip operation over a long period of time, and collects key parameters such as voltage, current and temperature of the chip to identify potential early failure risks. As the core component of the aging test system, the data acquisition device directly determines the accuracy and real-time performance of the test data.

[0003] Currently, mainstream chip aging test data acquisition devices in the industry generally adopt a centralized architecture: that is, a single central control unit connects to a single chip, tests the chip, and acquires the test data of a single chip. Although this architecture simplifies hardware integration and reduces initial costs, it has a key drawback: integrated chip aging testing cannot be carried out. Chips can only be sampled for testing, resulting in inaccurate chip aging test data and loss of key details in the test data. This not only reduces the reliability of aging test results, but may also allow chips with potential failure risks to enter the market, increasing the quality risks of downstream equipment. Therefore, it is necessary to design a data acquisition device for chip aging testing. Summary of the Invention

[0004] The purpose of this invention is to provide a data acquisition device for chip aging testing, so as to solve the problems mentioned in the background art.

[0005] To solve the above-mentioned technical problems, the present invention provides the following technical solution: a data acquisition device for chip aging test, including a chamber, with opening and closing doors provided on both the front and rear sides of the chamber. The opening and closing doors are opened and closed by sliding along the door frame of the chamber via electronic control. A ring conveying assembly is provided inside the chamber for conveying and transferring test boxes for loading chips. The test box includes a box body, with a limiting groove for chip storage provided inside the box body. Several connectors are provided on the top of the limiting groove for connecting data acquisition lines.

[0006] According to the above technical solution, the limiting groove includes a first support plate and a second support plate fixedly installed inside the box. Both ends of the first support plate are in contact with the limiting groove. A first telescopic rod is fixedly installed on the side of the second support plate, and a third support plate is fixedly installed at the end of the first telescopic rod. The chip is clamped by the third support plate and the first support plate.

[0007] According to the above technical solution, two output mechanisms are symmetrically arranged inside the chamber. Each output mechanism includes a motor located at the bottom of the chamber. The output end of the motor faces upward and is fixedly mounted with gears. The two gears are connected to a chain. A support rod is fixedly mounted on the side of the chain. Several magnetic components are fixedly mounted on the top of the support rod. A magnetic ring matching the magnetic components is set at the bottom of the box.

[0008] According to the above technical solution, a support frame is set between the two gears, and a display screen is installed on the side wall of the support frame. The display screen is used to display the test data of the chip.

[0009] According to the above technical solution, a testing area and a disassembly area are respectively set on both sides of the support frame. The testing area is used to acquire data from the chip, and the disassembly area is used to remove the chip to be tested and replace it with an untested chip.

[0010] According to the above technical solution, a first guide rail is set on the inner side wall of the container, and a support net is slidably connected on the first guide rail. Several slide rails are set above the support net, and each slide rail corresponds to each magnetic suction component. The magnetic suction component is set between the slide rail and the support net.

[0011] According to the above technical solution, an annular bracket is set between the slide rail and the chain, and several sets of alignment components and several sets of data acquisition components are evenly arranged on the annular bracket. The alignment assembly includes a first support column fixedly installed on the top of the annular bracket. The top middle area of ​​the first support column is a hollow structure with multiple second guide rails inside. A top plate is slidably connected to the second guide rails, and a third guide rail is installed on the top of the top plate. A side plate is slidably connected to the third guide rail.

[0012] According to the above technical solution, the data acquisition component includes a second support column installed on the top of the ring bracket, a second telescopic rod fixedly installed on the top of the second support column, a terminal block fixedly installed on the top of the second telescopic rod, a power connection port provided at the bottom of the terminal block, a third telescopic rod provided inside the power connection port, an internal wire on the third telescopic rod, a connector provided at the end of the wire, and the connector connected to the terminal block.

[0013] According to the above technical solution, a conveying hole is provided at the top of the chamber, the conveying hole is connected to a conduit, and the conduit is connected to a temperature chamber.

[0014] According to the above technical solution, multiple static eliminators are installed inside the silo.

[0015] Compared with the prior art, the beneficial effects achieved by the present invention are as follows: The present invention, by setting up a chamber, can perform long-term, highly parallel aging tests on multiple chips at one time, and acquire and record the performance data of the chips in real time during the aging process, providing comprehensive data support for chip reliability verification. Attached Figure Description

[0016] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used in conjunction with embodiments of the invention to explain the invention and do not constitute a limitation thereof. In the drawings: Figure 1 This is a schematic diagram of the overall three-dimensional structure of the present invention; Figure 2 This is a schematic diagram of the overall exploded structure of the present invention; Figure 3 This is a schematic diagram of the in-warehouse conveying assembly of the present invention. Figure 1 ; Figure 4 This is a schematic diagram of the in-warehouse conveying assembly of the present invention. Figure 2 ; Figure 5 This is a schematic diagram of the test box of the present invention; Figure 6 This is the invention Figure 3 Enlarged structural diagram of region A in the middle; Figure 7 This is a schematic diagram of the alignment component structure of the present invention; Figure 8 This is a schematic diagram of the data acquisition component structure of the present invention; In the diagram: 1. Chamber body; 2. Opening / closing door; 3. Test box; 4. Box body; 5. Limiting groove; 6. Connecting port; 7. First support plate; 8. Second support plate; 9. First telescopic rod; 10. Third support plate; 11. Motor; 12. Gear; 13. Chain; 14. Support rod; 15. Magnetic suction assembly; 16. Support frame; 17. Display screen; 18. Detection area; 19. Disassembly area; 20. First guide rail; 21. Support net; 22. Slide rail; 23. Circular bracket; 24. First support column; 25. Second guide rail; 26. Top plate; 27. Third guide rail; 28. Side plate; 29. ​​Second support column; 30. Second telescopic rod; 31. Terminal block; 32. Power port; 33. Third telescopic rod; 34. Connector; 35. Conveying hole; 36. Conduit; 37. Temperature chamber; 38. Static eliminator. Detailed Implementation

[0017] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0018] Please see Figure 1-8This invention provides a technical solution: a data acquisition device for chip aging testing, comprising a chamber 1. The chamber 1 is made of high-performance heat-insulating and anti-static composite material, which can effectively isolate external temperature fluctuations and prevent electrostatic interference, maintaining a clean and stable testing environment inside. Electrically controlled opening and closing doors 2 are provided on both the front and rear sides. The opening and closing doors 2 are driven by high-precision guide rails and servo motors, and can slide smoothly along the door frame of the chamber 1, achieving fast and quiet automatic opening and closing, facilitating the safe and efficient placement and removal of test boxes 3. A precision ring conveying assembly is installed inside the chamber 1. This assembly consists of a motor, chain, guide rail, and magnetic structure, which can automatically and continuously convey and accurately position the test boxes 3 used to load chips during testing. The ring conveying assembly completely replaces the traditional manual handling method, significantly reducing human error and interference, ensuring high repeatability of the test boxes 3 between the testing area and the disassembly area. Its ring path structure also effectively saves the overall footprint of the equipment and improves space utilization efficiency.

[0019] When test box 3 needs to be placed or removed, the motor can be driven to open and close the door 2 by manual command or automatic induction trigger, so that it slides smoothly along the guide rail on the door frame of the chamber 1, realizing rapid and reliable automatic opening and closing. The operation is convenient and the sealing is good. After the test box 3 is placed inside the chamber, the ring conveyor component is started. The internal transmission mechanism automatically transports the test box to the predetermined work position and achieves millimeter-level precise positioning with the help of position sensors. Whether entering the testing area or returning to the disassembly area, the whole process does not require manual intervention. The ring conveyor component not only improves the handling efficiency, but also avoids vibration or positioning deviation caused by manual operation. Its ring layout further optimizes the spatial structure of the equipment and adapts to the layout requirements of high-density production lines.

[0020] The test box 3 is one of the core carriers of the device, including a protective box 4. The box 4 adopts an impact-resistant and dustproof shielding design, and has multiple sets of limiting slots 5 for fixing chips inside. Each limiting slot 5 has several high-reliability connectors 6 arranged on its top. These connectors are used to connect the data acquisition lines to achieve a stable electrical connection with the chip pins, ensuring complete signal transmission and low noise. After the chip to be tested is placed into the limiting slot 5 in the box 4, the data transmission structure inside the limiting slot that matches the chip pins can automatically achieve physical and electrical connection without manual alignment. Each connector 6 is designed to be mechanically and electrically compatible with the connectors of the data acquisition components, providing a foundation for subsequent high-speed, multi-channel signal transmission. The protective box 4 effectively protects the chip from physical collisions or environmental interference during transportation and testing, while the standardized connectors 6 greatly reduce the risk of data errors caused by poor contact.

[0021] The internal structure of the limiting groove 5 includes a first support plate 7 and a second support plate 8 fixedly installed at the bottom of the housing 4. The two ends of the first support plate 7 are in close contact with the inner sidewall of the limiting groove 5, providing a solid foundation support for the chip. A first telescopic rod 9 is fixedly installed on the side of the second support plate 8. The end of the first telescopic rod 9 is connected to a third support plate 10. By controlling the telescopic movement of the first telescopic rod 9 through the test system, the third support plate 10 and the first support plate 7 can work together to achieve flexible and stable clamping of the chip from both sides, avoiding connection interruption due to vibration or displacement during the test. The specific workflow is as follows: Test system drive The first telescopic rod 9 extends, causing the third support plate 10 to move away from the first support plate 7. At this time, the distance between the two increases, making it easier to insert the chip. After the chip is accurately inserted manually or by a robotic arm, the system drives the first telescopic rod 9 to retract, causing the third support plate 10 to move towards the chip and finally clamp the chip together with the first support plate 7. After the test is completed, the first telescopic rod 9 extends again, the third support plate 10 resets, and the chip can be easily removed. This clamping structure not only enhances the mechanical stability during testing, but can also be adjusted by the program to adapt to chips of different sizes and package types, significantly improving the versatility and flexibility of the equipment.

[0022] The chamber 1 is symmetrically equipped with two sets of high-reliability output mechanisms. Each mechanism includes a servo motor 11 installed at the bottom of the chamber 1. The output shaft of the motor 11 is vertically upward and a high-precision gear 12 is fixedly installed at the end. The two gears 12 are synchronously connected by a high-strength chain 13. A support rod 14 is fixedly installed on the outside of the chain 13. The top of the support rod 14 is equipped with multiple sets of magnetic suction components 15. At the corresponding position at the bottom of the test box 3, a magnetic ring matching the magnetic suction components 15 is embedded. When the test system controls the motor 11 to run, it drives the gear 12 to rotate, which in turn drives the chain 13 to move. The chain 13 pushes the support rod 14 and the magnetic suction components 15 on it to move along a predetermined circular path. Finally, the test box 3 is driven to be transported smoothly and accurately by magnetic attraction. The magnetic attraction force can be automatically adjusted according to the weight of the test box, which not only ensures that there is no slippage during the transportation process, but also facilitates rapid release after reaching the target position. This electromagnetic attraction method avoids the hard contact and wear problems in traditional mechanical connections, and at the same time greatly improves the chip replacement efficiency, making it particularly suitable for large-scale batch testing scenarios.

[0023] A support frame 16 is provided at a key position between the two gears 12. A high-resolution display screen 17 is installed on the side wall of the support frame 16. The display screen is used to display various key parameters during the chip testing process in real time, including operating voltage, current, temperature curves and signal status, so that operators can comprehensively monitor the testing process and promptly detect data anomalies or trend changes. The display screen integrates multi-channel data visualization functions, which improves the information transparency and user-friendliness of the testing process and reduces test interruptions or result deviations caused by human error.

[0024] The support frame 16 is divided into a testing area 18 and a disassembly area 19 on both sides. The testing area 18 has a built-in high-precision sensing circuit and signal conditioning module, which can perform comprehensive electrical performance testing and data acquisition on the chip to ensure that the test data is accurate and reliable. The disassembly area 19 has sufficient operating space to facilitate the safe disassembly of the tested chip by the operator or the robotic arm and replace it with a new chip to be tested, which greatly reduces the risk of chip damage caused by crowded operation. The test box 3 enters the testing area 18 and the disassembly area 19 in sequence under the drive of the ring conveyor assembly, realizing the fully automated production line operation of testing, disassembly and reloading, which significantly improves the overall testing efficiency and equipment utilization.

[0025] A first guide rail 20 is installed on the inner wall of the chamber 1. A liftable support net 21 is slidably connected to the first guide rail 20. The support net 21 is densely covered with multiple voltage lines. The test system can programmatically control the voltage level and timing of each line to simulate test environments with different high voltage intensities. At the same time, the support net 21 can move up and down along the first guide rail 20 to adjust the distance between the chip and the high voltage simulation environment, further enhancing the flexibility of test conditions. Multiple high-strength slide rails 22 are arranged in parallel above the support net 21. Each slide rail 22 corresponds vertically to a magnetic suction component 15. The magnetic suction component 15 is located between the slide rail 22 and the support net 21, together forming a stable three-dimensional transport and guiding structure. During the transport of the test box 3, the magnetic suction component 15 moves below the slide rail 22. The slide rail 22 restricts the horizontal displacement of the test box, while the support net 21 prevents the test box from falling accidentally. It can also adjust the test height through its lifting function to realize comprehensive aging tests on the chip under different environmental parameters.

[0026] An annular support 23 is provided between the slide rail 22 and the chain 13. Multiple sets of alignment components and multiple sets of data acquisition components are evenly arranged circumferentially on the annular support 23. The alignment component includes a first support column 24 fixed to the top of the annular support 23. The first support column 24 is designed as a hollow structure and contains multiple second guide rails 25. A top plate 26 is slidably installed on the second guide rails 25. A third guide rail 27 is provided above the top plate 26. A side plate 28 is further slidably connected to the third guide rail 27. Through this multi-degree-of-freedom adjustment mechanism, the chip position in different types of test boxes can be quickly and accurately positioned. During the alignment process, the test system drives the top plate 26 to slide up and down along the second guide rail 25 to adjust to the height of the chip. Then, it controls the side plate 28 to slide horizontally along the third guide rail 27 to accurately align the chip with the connector position of the data acquisition component. Finally, the side plate 28 abuts against the box body 4 to complete the positioning. This process can automatically determine whether the test box has reached the preset position and adapt to chips of different package sizes, greatly improving the equipment's versatility and positioning accuracy.

[0027] The data acquisition component includes a second support column 29 mounted on a ring bracket 23. A second telescopic rod 30 is fixedly mounted on the top of the second support column 29. A high-strength wiring board 31 is connected to the top of the second telescopic rod 30. The bottom of the wiring board 31 has a set of modular power connectors 32. Each power connector 32 contains an independently telescopic third telescopic rod 33. The third telescopic rod 33 integrates shielded data wires, and its end has a gold-plated connector 34. The second telescopic rod 30 and the third telescopic rod 33 cooperate to allow the power connectors 32 to be matched and plugged into any chip. During operation, the connector 34 mates with the connector 6 on the test box to achieve high-speed signal and high-current power transmission and alignment. After completion, the test system drives the second telescopic rod 30 to extend, causing the junction box 31 to descend and the power interface 32 to approach the connector 6 on the test box. Subsequently, the third telescopic rod 33 extends, pushing the connector 34 into the connector 6. Signal acquisition and power supply are completed through the internally integrated wires. After the test, the third telescopic rod 33 retracts first, separating the connector from the connector. Then, the second telescopic rod 30 retracts to reset the entire component. The telescopic rod design can adapt to test boxes and chip positions of different heights. The telescopic connector avoids mechanical damage caused by hard contact, extending the service life of the component. The internally integrated wires reduce external wiring clutter and improve signal transmission stability and anti-interference ability.

[0028] Through the coordinated design of the aforementioned mechanical structure and electronic control system, this device can perform long-term, highly parallel aging tests on multiple chips at once, and acquire and record the chip performance data in real time during the aging process, providing comprehensive data support for chip reliability verification.

[0029] The top of the chamber 1 has multiple delivery holes 35, which are connected to external insulated heat-insulating conduits 36. The other end of the conduits 36 is connected to a high-precision temperature chamber 37. The temperature chamber 37 can be adjusted according to the test requirements and delivers a constant temperature airflow into the chamber 1 to simulate the aging test conditions of the chip under different ambient temperatures, including high temperature, low temperature and temperature cycling tests. Before the test begins, the operator sets the target temperature value, and the temperature chamber 37 quickly generates a stable airflow, which is injected into the chamber 1 through the conduits 36 and delivery holes 35. Combined with the hollow design of the support mesh 21, the airflow can be evenly distributed inside the chamber, ensuring a stable temperature field without dead zones and avoiding the impact of local temperature differences on test consistency. This function significantly improves the realism and coverage of the test and can adapt to the diverse aging temperature requirements of various chips.

[0030] In addition, high-efficiency static eliminators 38 are installed in several key locations inside the chamber 1 to eliminate static electricity that may accumulate during testing due to friction or airflow circulation. This ensures the safety and data accuracy of the chip testing process. The static eliminators 38 continuously release positive and negative ions to neutralize the static charge inside the chamber, maintaining a low static environment throughout the testing process. This prevents electrostatic discharge from causing chip breakdown or signal interference, making it particularly suitable for testing high-precision, nanoscale chips that are sensitive to static electricity, thereby ensuring that the test results are true and reliable.

[0031] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.

[0032] Finally, it should be noted that the above descriptions are merely preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A data acquisition device for chip aging testing, comprising a housing (1), characterized in that, The front and rear sides of the chamber (1) are provided with opening and closing doors (2). The opening and closing doors (2) are opened and closed by sliding along the door frame of the chamber (1) through electronic control. The chamber (1) is provided with a ring conveying assembly. The conveying assembly is used to convey and transfer test boxes (3) for loading chips. The test box (3) includes a box body (4). The box body (4) is provided with a limiting groove (5) for chip storage. The top of the limiting groove (5) is provided with several connectors (6). The connectors (6) are used to connect the data acquisition line.

2. The data acquisition device for chip aging test according to claim 1, characterized in that, The limiting groove (5) includes a first support plate (7) and a second support plate (8) fixedly installed inside the box (4). Both ends of the first support plate (7) are in contact with the limiting groove (5). A first telescopic rod (9) is fixedly installed on the side of the second support plate (8). A third support plate (10) is fixedly installed at the end of the first telescopic rod (9). The chip is clamped by the third support plate (10) and the first support plate (7).

3. The data acquisition device for chip aging test according to claim 2, characterized in that, Two output mechanisms are symmetrically arranged inside the chamber (1). Each output mechanism includes a motor (11) located at the bottom of the chamber (1). The output end of the motor (11) faces upward and is fixedly mounted with a gear (12). The two gears (12) are connected to a chain (13). A support rod (14) is fixedly mounted on the side of the chain (13). Several magnetic components (15) are fixedly mounted on the top of the support rod (14). A magnetic ring matching the magnetic components (15) is provided at the bottom of the box (4).

4. The data acquisition device for chip aging test according to claim 3, characterized in that, A support frame (16) is provided between the two gears (12), and a display screen (17) is installed on the side wall of the support frame (16). The display screen (17) is used to display the test data of the chip.

5. A data acquisition device for chip aging test according to claim 4, characterized in that, The support frame (16) has a detection area (18) and a disassembly area (19) on its two sides respectively. The detection area (18) is used to acquire data from the chip, and the disassembly area (19) is used to remove the chip to be tested and replace it with an untested chip.

6. A data acquisition device for chip aging testing according to claim 5, characterized in that, A first guide rail (20) is provided on the inner side wall of the compartment (1). A support net (21) is slidably connected on the first guide rail (20). Several slide rails (22) are provided above the support net (21). Each slide rail (22) corresponds to each magnetic suction component (15). The magnetic suction component (15) is located between the slide rail (22) and the support net (21).

7. A data acquisition device for chip aging test according to claim 6, characterized in that, An annular bracket (23) is provided between the slide rail (22) and the chain (13), and several sets of alignment components and several sets of data acquisition components are evenly arranged on the annular bracket (23); The alignment component includes a first support column (24) fixedly installed on the top of the annular bracket (23). The top middle area of ​​the first support column (24) is a hollow structure with multiple second guide rails (25) inside. A top plate (26) is slidably connected to the second guide rails (25). A third guide rail (27) is installed on the top of the top plate (26). A side plate (28) is slidably connected to the third guide rail (27).

8. A data acquisition device for chip aging test according to claim 7, characterized in that, The data acquisition component includes a second support column (29) installed on the top of the ring bracket (23), a second telescopic rod (30) fixedly installed on the top of the second support column (29), a terminal block (31) fixedly installed on the top of the second telescopic rod (30), a power connection port (32) provided at the bottom of the terminal block (31), a third telescopic rod (33) provided inside the power connection port (32), a wire built into the third telescopic rod (33), and a connector (34) provided at the end of the wire, the connector (34) being connected to the connector (6).

9. A data acquisition device for chip aging test according to claim 8, characterized in that, The top of the chamber (1) is provided with a conveying hole (35), the conveying hole (35) is connected to a conduit (36), and the conduit (36) is connected to a temperature chamber (37).

10. A data acquisition device for chip aging test according to claim 9, characterized in that, Multiple static eliminators (38) are installed inside the chamber (1).