Automobile chip type selection method and system, electronic equipment and readable medium

Abstract

The invention provides an automobile chip type selection method, which belongs to the technical field of chip type selection and comprises the following steps: acquiring a chip candidate set; the hierarchical adaptive similarity model is adopted for model selection in the chip candidate set to obtain a target chip, the algorithm time complexity is close to O (1) by constructing a multi-level Hash matching mode of Hash table + LSH double-layer filtering, millisecond-level response of a million-level chip library is supported, meanwhile, by adopting the hierarchical adaptive similarity model, the algorithm time complexity is close to O (1), and the algorithm time complexity is close to O (1). Public parameters and non-public parameters are covered, and multi-scene chip scheme type selection in automobile intelligent upgrading is supported through parameterization design.

Description

Technical Field

[0001] This invention relates to the field of chip selection technology, and in particular to a method, system, electronic device, and computer-readable medium for selecting automotive chips. Background Technology

[0002] Amid the global wave of electrification and intelligent transformation in the automotive industry, the security of the chip supply chain, as the core carrier of automotive intelligence, has become a key bottleneck for industrial upgrading. Currently, the chip market is affected by fluctuations in the international situation, and the stability of imported chip supply faces severe challenges, leading to the following core pain points for automakers: ① Supply chain risk: Over-reliance on imported chips makes them vulnerable to supply disruptions due to changes in the international situation, resulting in production line shutdowns; ② Low selection efficiency: Traditional methods rely on manual database traversal or single-scenario matching, making it difficult to quickly locate alternative solutions from a vast library of domestically produced chips; ③ Poor technology adaptability: Existing solutions focus on a single field, lacking cross-domain expansion capabilities, and cannot meet the differentiated needs of multiple scenarios (such as autonomous driving, power control, and intelligent cockpit) in the upgrading of automotive intelligence.

[0003] Therefore, in response to the government's call for the localization of chips, there is an urgent need for a multi-domain adaptable, efficient and accurate chip replacement algorithm to assist automakers in selecting chips for the intelligent upgrading of automobiles, achieve a smooth switch from imported chips to domestic solutions, ensure supply chain security and promote technological independence and control. Summary of the Invention

[0004] The present invention aims to solve at least one of the technical problems existing in the prior art, and proposes a method and system for selecting automotive chips.

[0005] In a first aspect, the present invention provides a method for selecting automotive chips, comprising:

[0006] Obtain the chip candidate set;

[0007] A hierarchical adaptive similarity model is used to select the target chip from the candidate chip set.

[0008] In some embodiments, the step of obtaining a candidate chip set includes:

[0009] Generate candidate set U1 based on the chip's common parameters;

[0010] Generate candidate set U2 based on the chip's non-common parameters;

[0011] The common parameter candidate set and the non-common parameter candidate set are combined to form the final chip candidate set U.

[0012] In some embodiments, the chip common parameters refer to parameters that are included in all types of chips, including package, maximum operating temperature, minimum operating temperature, number of terminals, lifespan, and AEC-Q.

[0013] The non-common parameters of the chip refer to chip types that are not present in all chip models, including parameters such as the number of gates and the number of LAB / CLB in high-end FPGA MCU chips, and the input impedance, operating current and meter type in power metering chips.

[0014] In some embodiments, the step of generating the candidate set U1 based on chip common parameters includes:

[0015] Define a set of common parameters Each parameter The corresponding weights are ,satisfy , This represents the total number of common parameters for the chip.

[0016] Retrieve the encoded values ​​of common parameters;

[0017] Concatenate the encoded values ​​of all common parameters in descending order of weight, and then obtain the weighted hash key. : ,in, This indicates concatenation in descending order of weight. This is a concatenation function;

[0018] Construct a weighted hash table K, The key is H, and the value is a list of chip model IDs. For the chip to be replaced, the value of H of its common parameters is calculated, and the matching chip model ID set U1 is searched in hash table K.

[0019] In some embodiments, the step of generating candidate set U2 based on chip non-common parameters includes:

[0020] Define a set of non-common parameters , This represents the total number of non-common parameters of the chip.

[0021] The encoded and normalized values ​​of all non-common parameters are combined into a high-dimensional feature vector;

[0022] Build Each chip uses a separate hash table, with different combinations of hash functions, to construct hash tables for different chip models. : ;

[0023] For the high-dimensional feature vector of non-common parameters of the target chip Calculate its hash code in all hash tables, use the generated hash code to retrieve all hash tables, remove duplicate chip model IDs, and retain the candidate set of non-common parameters that are similar to the non-common parameters. .

[0024] In some embodiments, combining the common parameter candidate set and the non-common parameter candidate set to form the final chip candidate set U includes:

[0025] The obtained common parameter candidate set U1 and non-common parameter candidate set U2 are merged and duplicate chip models are removed to obtain the final candidate set U=U1∪U2.

[0026] In some embodiments, the selection of target chips from the chip candidate set using a hierarchical adaptive similarity model includes:

[0027] Based on the generated candidate set For each chip model in the dataset, calculate the similarity of common parameters and the similarity of non-common parameters, where:

[0028] The formula for calculating the similarity of common parameters is:

[0029]

[0030] in, , This is the weight vector;

[0031] The formula for calculating the similarity of non-common parameters is:

[0032]

[0033] in, , This indicates the number of non-common parameters shared by chip model A and chip model B. This indicates the number of unique non-common parameters that are jointly formed by chip model A and chip model B;

[0034] To obtain the final similarity score, ,in, Similarity weights;

[0035] Based on the final similarity score (Sim), sort the chip models and output the top N chip models.

[0036] Secondly, the present invention also provides an automotive chip selection system, comprising:

[0037] Candidate units are used to obtain a set of chip candidates;

[0038] The selection unit is used to select the target chip from the chip candidate set using a hierarchical adaptive similarity model.

[0039] Thirdly, the present invention also provides an electronic device, comprising:

[0040] One or more processors;

[0041] Memory, used to store one or more programs;

[0042] When the one or more programs are executed by the one or more processors, the one or more processors implement any of the methods.

[0043] Fourthly, the present invention also provides a computer-readable medium on which a computer program is stored, wherein the computer program, when executed by a processor, implements the steps in any of the methods described.

[0044] The automotive chip selection method provided by this invention obtains a chip candidate set; a hierarchical adaptive similarity model is used to select the target chip from the chip candidate set. This invention uses a multi-level hash matching method with hash table + LSH double-layer filtering, and the algorithm time complexity is close to O(1), supporting millisecond-level response of a million-level chip library. At the same time, by using a hierarchical adaptive similarity model, it covers common parameters and non-common parameters, and uses parameterized design to support the selection of chip solutions for multiple scenarios in the intelligent upgrade of automobiles. Attached Figure Description

[0045] Figure 1 This is a schematic diagram illustrating the steps of an embodiment of the automotive chip selection method of the present invention;

[0046] Figure 2 This is a schematic diagram of an embodiment of the chip candidate set acquisition method of the present invention;

[0047] Figure 3 This is a schematic diagram of an embodiment of the automotive chip selection system of the present invention;

[0048] Figure 4 This is a schematic diagram of the structure of an embodiment of the electronic device of the present invention. Detailed Implementation

[0049] To enable those skilled in the art to better understand the technical solutions of the present invention, exemplary embodiments of the present invention are described below in conjunction with the accompanying drawings, including various details of the embodiments of the present invention to aid understanding. These should be considered merely exemplary. Therefore, those skilled in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present invention. Similarly, for clarity and brevity, descriptions of well-known functions and structures are omitted in the following description.

[0050] Where there is no conflict, the various embodiments of the present invention and the features thereof may be combined with each other.

[0051] As used herein, the term “and / or” includes any and all combinations of one or more related enumerated entries.

[0052] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used herein, the singular forms “a” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that when the terms “comprising” and / or “made of” are used in this specification, the presence of the stated feature, integral, step, operation, element, and / or component is specified, but the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof is not excluded. Terms such as “connected” or “linked” are not limited to physical or mechanical connections but can include electrical connections, whether direct or indirect.

[0053] Unless otherwise specified, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having the meaning consistent with their meaning in the context of the relevant art and the invention, and will not be interpreted as having an idealized or overly formal meaning unless expressly so defined herein.

[0054] In the technical solution of this invention, the collection, storage, use, processing, transmission, provision, and disclosure of user personal information all comply with relevant laws and regulations and do not violate public order and good morals. The use of user data in this technical solution follows relevant national laws and regulations (e.g., the "Information Security Technology - Personal Information Security Specification"). For example: appropriate measures are taken for personal information access control; restrictions are imposed on the display of personal information; the purpose of using personal information does not exceed the scope of direct or reasonable association; and explicit identity targeting is eliminated when using personal information to avoid precisely locating a specific individual.

[0055] In related technologies, existing chip selection schemes rely on database traversal matching, which is inefficient and time-consuming. It is difficult to quickly locate alternative solutions from massive chip libraries, and the chip selection schemes mainly rely on preset rules to adjust the selection ratio, lacking the ability to dynamically respond to business scenarios. At the same time, they only target power system selection, which has a large limitation on the scenario and lacks cross-domain expansion capabilities. It is difficult to meet the differentiated needs of multiple scenarios (such as autonomous driving, power control, and intelligent cockpit) in the intelligent upgrade of automobiles. Relying on single-scenario matching, the matching efficiency is low when the number of candidate chips is large.

[0056] To address at least one of the technical problems existing in the aforementioned related technologies, the present invention provides a method for selecting automotive chips.

[0057] Figure 1 A flowchart illustrating the steps of an automotive chip selection method provided in this embodiment of the invention includes the following steps:

[0058] Step S10: Obtain the chip candidate set.

[0059] Candidate set generation is a crucial step in the chip replacement process, aiming to quickly filter candidate chip models from the chip database that are completely identical to the chip to be replaced in common parameters or similar in non-common parameters. This process consists of three main steps: common parameter matching (using weighted hashing), non-common parameter matching (using locality-sensitive hashing), and candidate set merging. The following details the specific implementation schemes for each step and the logical relationships between them.

[0060] Please see Figure 2 The step of obtaining the chip candidate set includes:

[0061] Step S11: Generate candidate set U1 based on chip common parameters.

[0062] In this embodiment, chip parameters are divided into common parameters and non-common parameters. Common parameters refer to parameters that are included in all types of chips, such as: package, maximum operating temperature, minimum operating temperature, number of terminals, lifespan, AEC-Q, etc.

[0063] It is understandable that, given the common parameters of chips, the goal is to accurately match a set of chips that are identical to the chip to be replaced. Furthermore, since different common parameters have varying degrees of importance for different chip models, weighted hashing is used for fast matching to obtain a candidate set of common parameters. Specifically, the following solutions are included:

[0064] Define a set of common parameters Each parameter The corresponding weights are ,satisfy , This represents the total number of common parameters for the chip.

[0065] Weighted hash table K for different chip models:

[0066]

[0067] Where H is the weighted hash key.

[0068] Specifically, for the set of common parameters Each parameter The corresponding weights are ,satisfy , This represents the total number of common parameters for the chip.

[0069] Get the encoded value of the common parameters.

[0070] Furthermore, regarding common parameters such as packaging... Weighted One-Hot encoding is used. The length of the classification common parameter encoding is... Its weight Proportional, that is ,in The maximum encoding length, The rounding function ultimately yields the classification common parameter encoding value. .

[0071] For common numerical parameters such as maximum operating temperature It adopts a value-by-value segmented encoding. For common numerical parameters with a limited range of values, it directly uses fixed-length binary encoding; for common numerical parameters with a large range of values, it uses MD5 compression to convert them into fixed-length encoding.

[0072] Concatenate the encoded values ​​of all common parameters in descending order of weight, and then obtain the weighted hash key. : ,in, This indicates concatenation in descending order of weight. This is a concatenation function.

[0073] Construct a weighted hash table K, The key is H, and the value is a list of chip model IDs. For the chip to be replaced, the value of H of its common parameters is calculated, and the matching chip model ID set U1 is searched in hash table K.

[0074] Understandably, common parameter matching prioritizes accuracy, while weights ensure that important parameters dominate the hash key, reducing false matches. This step generates a candidate set U1, providing a foundation for subsequent merging.

[0075] Step S12: Generate candidate set U2 based on chip non-common parameters.

[0076] In this embodiment, non-common parameters refer to chip types that are not present in all chip models, such as the number of gates and LAB / CLBs in high-end FPGA MCU chips, and the input impedance, operating current, and meter type in energy metering chips.

[0077] It is understandable that, for the non-common parameters of chips, the goal is to quickly match an approximate set of chips. Since there are many non-common parameters, locality-sensitive hashing is used for fast matching to obtain a candidate set of common parameters. Build Each chip uses a separate hash table, with different combinations of hash functions, to construct hash tables for different chip models. : Specifically, it includes the following steps:

[0078] Define a set of non-common parameters , This represents the total number of non-common parameters of the chip.

[0079] The encoded and normalized values ​​of all non-common parameters are combined into a high-dimensional feature vector. It is necessary to calculate its hash code in all hash tables, use the generated hash code to retrieve all hash tables, remove duplicate chip model IDs, and retain the candidate set of non-common parameters with similar non-common parameters. .

[0080] Specifically, for the set of non-common parameters , This represents the total number of non-public parameters of the chip.

[0081] For non-common parameters such as meter type Perform One-Hot encoding Subsequently, a random plane projection is used to map the high-dimensional vector to a low-dimensional hash code. The specific calculation formula is as follows: ,in For a random hyperplane, It is a symbolic function.

[0082] For input impedance and other numerical non-common parameters The min-max normalization process is performed, and the specific calculation formula is as follows: .

[0083] Subsequently, MinHash is used to map the high-dimensional vector to a low-dimensional hash code. The specific calculation formula is as follows: ,in, For hash functions, The total number of hash functions, It is a minimum value function.

[0084] Then, use the generated hash code to search all hash tables, remove duplicate chip model IDs, and retain the candidate set of non-common parameters with similar non-common parameters. .

[0085] Understandably, non-common parameter matching prioritizes approximation and efficiency, while LSH reduces the probability of missed matches through multiple hash tables. This step generates a candidate set U2 to supplement the shortcomings of common parameter matching.

[0086] Step S13: Combine the common parameter candidate set and the non-common parameter candidate set to form the final chip candidate set U.

[0087] Specifically, regarding the aforementioned candidate set of public parameters Non-common parameter candidate set The samples were merged, and duplicate chip models were removed to obtain the final candidate set. .

[0088] Understandably, the merging step combines the advantages of exact matching and approximate matching, ensuring that the candidate set includes both chips with consistent common parameters and chips with similar non-common parameters. Common parameter matching and non-common parameter matching are performed in parallel and independently, and merging them improves coverage and recall.

[0089] It should be noted that the candidate set generation utilizes weighted hashing and locality-sensitive hashing techniques to efficiently handle the matching of common and non-common parameters in chip replacement. Common parameter matching ensures basic consistency, while non-common parameter matching expands the similarity range, resulting in a comprehensive candidate set after merging. The entire process balances accuracy and efficiency, providing a reliable foundation for chip replacement.

[0090] Step S20: Use a hierarchical adaptive similarity model to select the target chip from the chip candidate set.

[0091] In this embodiment, for the candidate set generated above For each chip model in the dataset, calculate:

[0092] Common parameter similarity: For core parameters such as package, maximum operating temperature, minimum operating temperature, number of terminals, lifespan, and AEC-Q, the similarity calculation formula is as follows:

[0093]

[0094] in, , This is the weight vector.

[0095] For non-common parameter similarity, dynamic Jaccard similarity is used for calculation:

[0096]

[0097] in, , This indicates the number of non-common parameters shared by chip model A and chip model B. This indicates the number of unique non-common parameters that are jointly formed by chip model A and chip model B.

[0098] For parameters of different types among the non-common parameters, construct a type-adaptive similarity function:

[0099]

[0100] Specifically, for numerical non-common parameters such as operating voltage, operating current, and number of cores:

[0101]

[0102] in, , Indicates the parameter type. This indicates taking the maximum value of the parameters. This indicates taking the minimum value of the parameters. For a given chip type, To assign a value to another chip type.

[0103] For non-common parameters of interface types, similarity matrix embedding based on industry experience is used for judgment:

[0104] Where M is a predefined matrix, constructed according to the following rules: For implementations of the same type that are completely matched, a value of 1 is assigned; types with similar functions are assigned higher values; and types with significantly different functions are assigned lower values. For example, taking interface types (SPI, I2C, UART) as an example, the predefined matrix could be:

[0105]

[0106] For range-type non-common parameters such as voltage input range, their similarity is obtained by calculating overlapping and joint regions. The specific calculation formula is as follows:

[0107]

[0108] in, For a range of values ​​for a single chip type, To be the minimum value, It is the maximum value; For another range of chip types, To be the minimum value, This is the maximum value.

[0109] To obtain the final similarity score: ,in, This represents the similarity weight.

[0110] Based on the final similarity Sort the chip models and output the top N chip models.

[0111] When sorting, the similarity can be arranged in descending order from high to low. Here, N is a set value that can be set as needed. Based on the aforementioned descending sort, the top N chip models are output, which can be used as the final alternatives.

[0112] The automotive chip selection method provided by this invention obtains a chip candidate set; a hierarchical adaptive similarity model is used to select the target chip from the chip candidate set. This invention constructs a multi-level hash matching method with hash table + LSH double-layer filtering, and the algorithm time complexity is close to O(1) (time complexity evaluation index), supporting millisecond-level response of a million-level chip library. At the same time, by adopting a hierarchical adaptive similarity model, it covers common parameters and non-common parameters, and uses parameterized design to support the selection of chip solutions for multiple scenarios in the intelligent upgrade of automobiles.

[0113] Please see Figure 3 The present invention also provides an automotive chip selection system. Applied to the automotive chip selection method provided in the above embodiments, it specifically includes: a candidate unit and a selection unit.

[0114] Among them, the candidate unit is used to obtain the chip candidate set.

[0115] In this embodiment, chip parameters are divided into common parameters and non-common parameters. Common parameters refer to parameters that are included in all types of chips, such as: package, maximum operating temperature, minimum operating temperature, number of terminals, lifespan, AEC-Q, etc.

[0116] It is understandable that, given the common parameters of chips, the goal is to accurately match a set of chips that are identical to the chip to be replaced. Furthermore, since different common parameters have varying degrees of importance for different chip models, weighted hashing is used for fast matching to obtain a candidate set of common parameters. Specifically, the following solutions are included:

[0117] Define a set of common parameters Each parameter The corresponding weights are ,satisfy , This represents the total number of common parameters for the chip.

[0118] Weighted hash table K for different chip models:

[0119]

[0120] Where H is the weighted hash key.

[0121] Specifically, for the set of common parameters Each parameter The corresponding weights are ,satisfy , This represents the total number of common parameters for the chip.

[0122] Get the encoded value of the common parameters.

[0123] Furthermore, regarding common parameters such as packaging... Weighted One-Hot encoding is used. The length of the classification common parameter encoding is... Its weight Proportional, that is ,in The maximum encoding length, The rounding function ultimately yields the classification common parameter encoding value. .

[0124] For common numerical parameters such as maximum operating temperature It adopts a value-by-value segmented encoding. For common numerical parameters with a limited range of values, it directly uses fixed-length binary encoding; for common numerical parameters with a large range of values, it uses MD5 compression to convert them into fixed-length encoding.

[0125] Concatenate the encoded values ​​of all common parameters in descending order of weight, and then obtain the weighted hash key. : ,in, This indicates concatenation in descending order of weight. This is a concatenation function.

[0126] Construct a weighted hash table K, The key is H, and the value is a list of chip model IDs. For the chip to be replaced, the value of H of its common parameters is calculated, and the matching chip model ID set U1 is searched in hash table K.

[0127] Understandably, common parameter matching prioritizes accuracy, while weights ensure that important parameters dominate the hash key, reducing false matches. This step generates a candidate set U1, providing a foundation for subsequent merging.

[0128] Candidate set U2 is generated based on the chip's non-common parameters.

[0129] In this embodiment, non-common parameters refer to chip types that are not present in all chip models, such as the number of gates and LAB / CLBs in high-end FPGA MCU chips, and the input impedance, operating current, and meter type in energy metering chips.

[0130] It is understandable that, for the non-common parameters of chips, the goal is to quickly match an approximate set of chips. Since there are many non-common parameters, locality-sensitive hashing is used for fast matching to obtain a candidate set of common parameters. Build Each chip uses a separate hash table, with different combinations of hash functions, to construct hash tables for different chip models. : Specifically, it includes the following steps:

[0131] Define a set of non-common parameters , This represents the total number of non-common parameters of the chip.

[0132] The encoded and normalized values ​​of all non-common parameters are combined into a high-dimensional feature vector. It is necessary to calculate its hash code in all hash tables, use the generated hash code to retrieve all hash tables, remove duplicate chip model IDs, and retain the candidate set of non-common parameters with similar non-common parameters. .

[0133] Specifically, for the set of non-common parameters , This represents the total number of non-public parameters of the chip.

[0134] For non-common parameters such as meter type Perform One-Hot encoding Subsequently, a random plane projection is used to map the high-dimensional vector to a low-dimensional hash code. The specific calculation formula is as follows: ,in For a random hyperplane, It is a symbolic function.

[0135] For input impedance and other numerical non-common parameters The min-max normalization process is performed, and the specific calculation formula is as follows: .

[0136] Subsequently, MinHash is used to map the high-dimensional vector to a low-dimensional hash code. The specific calculation formula is as follows: ,in, For hash functions, The total number of hash functions, It is a minimum value function.

[0137] Then, use the generated hash code to search all hash tables, remove duplicate chip model IDs, and retain the candidate set of non-common parameters with similar non-common parameters. .

[0138] Understandably, non-common parameter matching prioritizes approximation and efficiency, while LSH reduces the probability of missed matches through multiple hash tables. This step generates a candidate set U2 to supplement the shortcomings of common parameter matching.

[0139] The common parameter candidate set and the non-common parameter candidate set are combined to form the final chip candidate set U.

[0140] Specifically, regarding the aforementioned candidate set of public parameters Non-common parameter candidate set The samples were merged, and duplicate chip models were removed to obtain the final candidate set. .

[0141] Understandably, the merging step combines the advantages of exact matching and approximate matching, ensuring that the candidate set includes both chips with consistent common parameters and chips with similar non-common parameters. Common parameter matching and non-common parameter matching are performed in parallel and independently, and merging them improves coverage and recall.

[0142] It should be noted that the candidate set generation utilizes weighted hashing and locality-sensitive hashing techniques to efficiently handle the matching of common and non-common parameters in chip replacement. Common parameter matching ensures basic consistency, while non-common parameter matching expands the similarity range, resulting in a comprehensive candidate set after merging. The entire process balances accuracy and efficiency, providing a reliable foundation for chip replacement.

[0143] The selection unit is used to select the target chip from the chip candidate set using a hierarchical adaptive similarity model.

[0144] In this embodiment, for the candidate set generated above For each chip model in the dataset, calculate:

[0145] Common parameter similarity: For core parameters such as package, maximum operating temperature, minimum operating temperature, number of terminals, lifespan, and AEC-Q, the similarity calculation formula is as follows:

[0146]

[0147] in, , This is the weight vector.

[0148] For non-common parameter similarity, dynamic Jaccard similarity is used for calculation:

[0149]

[0150] in, , This indicates the number of non-common parameters shared by chip model A and chip model B. This indicates the number of unique non-common parameters that are jointly formed by chip model A and chip model B.

[0151] For parameters of different types among the non-common parameters, construct a type-adaptive similarity function:

[0152]

[0153] Specifically, for numerical non-common parameters such as operating voltage, operating current, and number of cores:

[0154]

[0155] in, , Indicates the parameter type. This indicates taking the maximum value of the parameters. This indicates taking the minimum value of the parameters. For a given chip type, To assign a value to another chip type.

[0156] For non-common parameters of interface types, similarity matrix embedding based on industry experience is used for judgment:

[0157] Where M is a predefined matrix, constructed according to the following rules: For implementations of the same type that are completely matched, a value of 1 is assigned; types with similar functions are assigned higher values; and types with significantly different functions are assigned lower values. For example, taking interface types (SPI, I2C, UART) as an example, the predefined matrix could be:

[0158]

[0159] For range-type non-common parameters such as voltage input range, their similarity is obtained by calculating overlapping and joint regions. The specific calculation formula is as follows:

[0160]

[0161] in, For a range of values ​​for a single chip type, To be the minimum value, It is the maximum value; For another range of chip types, To be the minimum value, This is the maximum value.

[0162] To obtain the final similarity score: ,in, This represents the similarity weight.

[0163] Based on the final similarity Sort the chip models and output the top N chip models.

[0164] The automotive chip selection system provided by this invention obtains a chip candidate set; a hierarchical adaptive similarity model is used to select the target chip from the chip candidate set. This invention uses a multi-level hash matching method with hash table + LSH double-layer filtering, and the algorithm time complexity is close to O(1), supporting millisecond-level response of a million-level chip library. At the same time, by using a hierarchical adaptive similarity model, it covers common parameters and non-common parameters, and uses parameterized design to support the selection of chip solutions for multiple scenarios in the intelligent upgrade of automobiles.

[0165] Based on the same inventive concept, embodiments of the present invention also provide an electronic device. Figure 4 This is a structural block diagram of an electronic device provided in an embodiment of the present invention. Figure 4 As shown, an embodiment of the present invention provides an electronic device including: one or more processors 101, a memory 102, and one or more I / O interfaces 103. The memory 102 stores one or more programs, which, when executed by the one or more processors, cause the one or more processors to implement any of the automotive chip selection methods described in the above embodiments; the one or more I / O interfaces 103 are connected between the processors and the memory, configured to enable information interaction between the processors and the memory.

[0166] The processor 101 is a device with data processing capabilities, including but not limited to a central processing unit (CPU); the memory 102 is a device with data storage capabilities, including but not limited to random access memory (RAM, more specifically SDRAM, DDR, etc.), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), and flash memory (FLASH); the I / O interface (read / write interface) 103 is connected between the processor 101 and the memory 102, and can realize information interaction between the processor 101 and the memory 102, including but not limited to a data bus (Bus).

[0167] In some embodiments, the processor 101, memory 102, and I / O interface 103 are interconnected via bus 104, and thus connected to other components of the computing device.

[0168] In some embodiments, the one or more processors 101 include a field-programmable gate array.

[0169] This invention also provides a computer-readable medium. The computer-readable medium stores a computer program, which, when executed by a processor, implements the steps in any of the automotive chip selection methods described above. The computer-readable storage medium can be volatile or non-volatile.

[0170] This invention also provides a computer program product, including computer-readable code, or a non-volatile computer-readable storage medium carrying computer-readable code. When the computer-readable code is run in the processor of an electronic device, the processor in the electronic device executes the above-described automotive chip selection method.

[0171] Those skilled in the art will understand that all or some of the steps, systems, and apparatuses disclosed above, and their functional modules / units, can be implemented as software, firmware, hardware, or suitable combinations thereof. In hardware implementations, the division between functional modules / units mentioned above does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed collaboratively by several physical components. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit (ASIC). Such software can be distributed on a computer-readable storage medium, which may include computer storage media (or non-transitory media) and communication media (or transient media).

[0172] As is known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information, such as computer-readable program instructions, data structures, program modules, or other data. Computer storage media includes, but is not limited to, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), static random access memory (SRAM), flash memory or other memory technologies, portable compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and is accessible to a computer. Furthermore, it is known to those skilled in the art that communication media typically contain computer-readable program instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.

[0173] The computer-readable program instructions described herein can be downloaded from computer-readable storage media to various computing / processing devices, or downloaded via a network, such as the Internet, local area network, wide area network, and / or wireless network, to an external computer or external storage device. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards them to the computer-readable storage media in the respective computing / processing device.

[0174] The computer program instructions used to perform the operations of this invention may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, etc., and conventional procedural programming languages ​​such as the "C" language or similar programming languages. The computer-readable program instructions may be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, electronic circuitry, such as programmable logic circuitry, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), is personalized by utilizing state information from the computer-readable program instructions. This electronic circuitry can execute the computer-readable program instructions to implement various aspects of the invention.

[0175] The computer program product described herein can be implemented specifically through hardware, software, or a combination thereof. In one alternative embodiment, the computer program product is specifically embodied in a computer storage medium; in another alternative embodiment, the computer program product is specifically embodied in a software product, such as a software development kit (SDK), etc.

[0176] Various aspects of the present invention are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0177] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine such that, when executed by the processor of the computer or other programmable data processing apparatus, they create means for implementing the functions / actions specified in one or more blocks of the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium that causes a computer, programmable data processing apparatus, and / or other device to operate in a particular manner; thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing aspects of the functions / actions specified in one or more blocks of the flowchart and / or block diagram.

[0178] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.

[0179] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of an instruction, which contains one or more executable instructions for implementing a specified logical function. In some alternative implementations, the functions marked in the blocks may occur in a different order than those shown in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0180] Example embodiments have been disclosed herein, and while specific terminology has been used, it is for illustrative purposes only and should be construed as such, and is not intended to be limiting. In some instances, it will be apparent to those skilled in the art that features, characteristics, and / or elements described in conjunction with particular embodiments may be used alone, or in combination with features, characteristics, and / or elements described in conjunction with other embodiments, unless otherwise expressly indicated. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the scope of the invention as set forth in the appended claims.

Claims

1. A method for selecting automotive chips, characterized in that, It includes: Obtain the chip candidate set; A hierarchical adaptive similarity model is used to select the target chip from the candidate chip set.

2. The automotive chip selection method according to claim 1, characterized in that, The steps for obtaining a candidate chip set include: Generate candidate set U1 based on the chip's common parameters; Generate candidate set U2 based on the chip's non-common parameters; The common parameter candidate set and the non-common parameter candidate set are combined to form the final chip candidate set U.

3. The automotive chip selection method according to claim 2, characterized in that, The common chip parameters refer to parameters that are included in all types of chips, including package, maximum operating temperature, minimum operating temperature, number of terminals, lifespan, and AEC-Q. The non-common parameters of the chip refer to chip types that are not present in all chip models, including parameters such as the number of gates and the number of LAB / CLB in high-end FPGA MCU chips, and the input impedance, operating current and meter type in power metering chips.

4. The automotive chip selection method according to claim 2, characterized in that, The step of generating candidate set U1 based on chip common parameters includes: Define a set of common parameters Each parameter The corresponding weights are ,satisfy , This represents the total number of common parameters for the chip. Retrieve the encoded values ​​of common parameters; Concatenate the encoded values ​​of all common parameters in descending order of weight, and then obtain the weighted hash key. : ,in, This indicates concatenation in descending order of weight. This is a concatenation function; Construct a weighted hash table K, The key is H, and the value is a list of chip model IDs. For the chip to be replaced, the value of H of its common parameter is calculated, and the matching chip model ID set U1 is searched in hash table K.

5. The automotive chip selection method according to claim 2, characterized in that, The step of generating candidate set U2 based on chip non-common parameters includes: Define a set of non-common parameters , This represents the total number of non-common parameters of the chip. The encoded and normalized values ​​of all non-common parameters are combined into a high-dimensional feature vector; Build Each chip uses a separate hash table, with different combinations of hash functions, to construct hash tables for different chip models. : ; For the high-dimensional feature vector of non-common parameters of the target chip Calculate its hash code in all hash tables, use the generated hash code to retrieve all hash tables, remove duplicate chip model IDs, and retain the candidate set of non-common parameters that are similar to the non-common parameters. .

6. The automotive chip selection method according to claim 2, characterized in that, The common parameter candidate set and the non-common parameter candidate set are combined to form the final chip candidate set U, including: The obtained common parameter candidate set U1 and non-common parameter candidate set U2 are merged and duplicate chip models are removed to obtain the final candidate set U=U1∪U2.

7. The automotive chip selection method according to claim 1, characterized in that, The selection of target chips from the candidate chip set using a hierarchical adaptive similarity model includes: Based on the generated candidate set For each chip model in the dataset, calculate the similarity of common parameters and the similarity of non-common parameters, where: The formula for calculating the similarity of common parameters is: in, , This is the weight vector; The formula for calculating the similarity of non-common parameters is: in, , This indicates the number of non-common parameters shared by chip model A and chip model B. This indicates the number of unique non-common parameters that are jointly formed by chip model A and chip model B; To obtain the final similarity score, ,in, Similarity weights; Based on the final similarity score (Sim), the chip models are sorted, and the top N chip models are output.

8. An automotive chip selection system, characterized in that, include: Candidate units are used to obtain a set of chip candidates; The selection unit is used to select the target chip from the chip candidate set using a hierarchical adaptive similarity model.

9. An electronic device, characterized in that, include: One or more processors; Memory, used to store one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement the method as described in any one of claims 1 to 7.

10. A computer-readable medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method as described in any one of claims 1 to 7.

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