HFSS rapid modeling method based on AutoCAD plane feeder network
By drawing and assigning layer information in AutoCAD, and combining HFSS automatic numbering and script-generated 3D models, the problem of low efficiency in converting RF feeder networks from 2D to 3D was solved, achieving efficient and standardized model conversion and simulation verification.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-01-29
- Publication Date
- 2026-04-03
AI Technical Summary
In the existing technology, the process of converting RF feeder networks from AutoCAD design to HFSS simulation verification requires step-by-step manual modeling, which leads to low efficiency and error-proneness, making it difficult to achieve a fast and standardized conversion.
The HFSS rapid modeling method based on AutoCAD planar feeder network is adopted. By drawing two-dimensional design drawings and assigning layers in AutoCAD, importing layer information into HFSS and automatically numbering it, and combining layer names, geometric shapes and positional relationships, an HFSS three-dimensional modeling script is generated to achieve automated and standardized model conversion.
It improves the modeling efficiency of RF feeder networks, reduces human error, supports rapid iterative design of multi-layer board structures, and is suitable for small-batch rapid iterative development scenarios.
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Figure CN121787029A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of antenna and microwave technology, and in particular to a rapid HFSS modeling method based on AutoCAD planar feed network. Background Technology
[0002] The feeder system is a core component of an RF communication system, primarily used to transmit RF signals to the antenna in a specific amplitude and phase combination, or to transmit received signals from the antenna to the receiver. Ansys HFSS (hereinafter referred to as HFSS) is a three-dimensional full-wave electromagnetic field simulation software based on the finite element method, widely used in RF circuits, microwave antenna design, and other fields, providing accurate electromagnetic characteristic analysis. For RF feeder systems, HFSS is one of the important tools for ultimately verifying their performance. Generally, the structural modules of the feeder system itself are relatively fixed, usually composed of cascaded modules such as power dividers, couplers, filters, and transmission lines. If modeling is done manually step by step in HFSS, it is necessary not only to draw signal traces, vias, pads, grooves, resistors, capacitors, and other structures layer by layer, but also to manually set material properties, port excitations, and boundary conditions. The design process is cumbersome, error-prone, and inefficient.
[0003] AutoCAD (hereinafter referred to as CAD) is a general-purpose computer-aided design software. Its layer management function enables the layered drawing of different structural elements, and it is often used to draw planar layout diagrams of multi-layer circuit board structures. Therefore, CAD is widely used in actual RF system engineering for design, drawing each module on a two-dimensional plane and distinguishing signal lines, vias, pads, avoidance structures, etc. through layer management. This method is highly efficient, easy to modify, and flexible in combination, making it a rapid design method for feeder networks.
[0004] Because CAD design results cannot be directly used for simulation verification, there is a lack of reliability assurance regarding the correctness of the design and whether its performance meets standards. Therefore, after the design is completed, the planar structure needs to be imported into HFSS for 3D modeling and simulation analysis. This operation currently relies heavily on repetitive manual work. RF feeder networks are generally multi-layered board designs with complex structures and strong logical connections between layers (such as signal layers, via layers, pad layers, and clearance layers). Manual modeling is extremely inefficient and prone to errors, significantly hindering the efficiency of simulation verification and product verification. Therefore, there is an urgent need for an HFSS modeling method based on automatic CAD layer recognition to automate, standardize, and efficiently convert CAD planar feeder network designs into HFSS 3D simulation models. Summary of the Invention
[0005] To address the existing technical problems, this invention provides a rapid HFSS modeling method based on AutoCAD planar feeder networks.
[0006] The specific content of this invention is as follows: A rapid HFSS modeling method based on AutoCAD planar feeder networks, comprising the following steps:
[0007] Step (1) CAD planar feeder network graphic design: In AutoCAD software, draw a two-dimensional design drawing based on the structural characteristics of the RF feeder network, and assign them to independent layers according to their functions;
[0008] Step (2) Import CAD planar network into HFSS: Import the AutoCAD drawing file into AnsysHFSS software, identify layer information and graphic objects through the built-in import function, and automatically number them according to HFSS naming rules;
[0009] Step (3) Modeling based on planar network: Based on layer name, geometric shape, and positional relationship features, select the structure type corresponding to each graphic object, and construct the vertical stacking logic and structural relationship between layers;
[0010] Step (4) Model processing and adding excitation: Based on the stacked logic and structural relationship, generate HFSS 3D modeling script using a generalized processing method.
[0011] Furthermore, in step (1), the graphic elements of the two-dimensional design drawing include shape, signal line, via, pad, clearance, resistor, and slot.
[0012] Further, step (2) includes: opening the HFSS software and creating a new HFSS simulation model, using the model import method to import the CAD file in step (1) as a planar graphic. Based on the naming rules of HFSS, the naming format of all planar graphics is A_B, where A is the layer name of the graphic and B is the graphic number, starting from 1, with the maximum value equal to the total number of graphics contained in the CAD drawing.
[0013] Further, step (3) includes: for the outline layer, establishing a three-dimensional model of the multilayer board, setting the thickness and material information, including the prepreg of the printed circuit board and the bonding printed circuit board; for the signal layer, moving the signal pattern to the layer, and then setting the thickness and material information; for the resistor, moving the resistor pattern to the layer, and setting the required boundary conditions; for the avoidance layer and the pad layer, moving the avoidance pattern and the pad pattern to the layer respectively, and setting the thickness and material information; for the via and slot layer, moving the pattern to the starting position, setting the via and slot depth, and setting the material.
[0014] Furthermore, steps (3) and (4) can be implemented using HFSS scripts. The scripts can be used to move and copy the planar graphics, set information such as thickness, material, color, transparency, and boundary conditions, complete Boolean operations, and add excitation and solution frequency range.
[0015] Furthermore, step (4) includes:
[0016] (41) Project the two-dimensional graphic object onto the corresponding layer position in three-dimensional space, and set the thickness and material properties;
[0017] (42) Based on the structure type, perform geometric transformations such as translation, rotation, and copying to construct a three-dimensional solid model;
[0018] (43) For areas where materials intersect or overlap, Boolean operations are automatically performed, including union and difference processing, to ensure the uniqueness of the geometric model;
[0019] (44) Identify the pad area in the model, apply port excitation at the corresponding position, and set the simulation frequency range, boundary conditions and solution control parameters;
[0020] (45) Finally, a complete HFSS three-dimensional structural simulation model file that can be used for electromagnetic simulation is generated.
[0021] Furthermore, Boolean operations include automatic processing of the following structures: Boolean operations on areas where clearance pads intersect with large-area circuits; Boolean subtraction operations on through-holes and multilayer board structures; and Boolean operations on boundary contact or overlapping areas between different materials.
[0022] Furthermore, the added stimuli include: automatically identifying the location of the pad and its corresponding clearance area, setting it as a lumped port for the waveguide port, and automatically configuring the frequency scanning parameters.
[0023] Furthermore, the modeling script is an automatically generated HFSS script that calls the API interface provided by HFSS to execute. It has the ability to change parameters and reuse templates, and supports generalized model generation and rapid iterative design.
[0024] This invention constructs an automated modeling method system that can be widely applied to RF multilayer boards with different feeder structures and different numbers of layers. Through generalized logical rules and automated script processes, the traditional manual drawing conversion process is transformed into a standardized and modular operation process, which greatly improves R&D efficiency, reduces the risk of human error, and is particularly suitable for small-batch rapid iterative development scenarios of RF communication products. Attached Figure Description
[0025] The invention will be further explained below with reference to the accompanying drawings.
[0026] Figure 1This is a flowchart of the present invention;
[0027] Figure 2 This is a schematic diagram of an eight-layer board feeder network planar circuit in one embodiment of the present invention.
[0028] Among them, 1. Printed board 1; 21. L1 layer pads and clearances; 22. L2 layer signal traces; 23. L4-L5 layer clearance holes; 24. L7 layer signal traces; 25. L8 layer pads and clearances; 3. Film resistors; 41-46. Vias. Detailed Implementation
[0029] Combination Figure 1 This invention provides a rapid HFSS modeling method based on CAD planar feeder networks. In CAD software, the various graphic elements of the RF feeder network are drawn according to their functional structure and assigned to corresponding layers. The CAD file is imported into HFSS software, and geometric object information from the layers is extracted. Based on layer naming and geometric features, the structure type is identified, and logical relationships between structures are established. Based on the identification results, an HFSS script is generated to automate the modeling, Boolean operations, material settings, and excitation source configuration of the 3D geometric structure. Layer naming is divided into multiple subcategories according to functional modules, including but not limited to: signal layers, pad layers, clearance layers, via layers, slotted layers, resistor layers, and structural outline boundary layers. Based on the circuit logic relationships between layers, the via connection positions between signal layers are determined, the positions of pads and clearances are identified, Boolean intersection operations between vias and traces / printed boards are performed, and the penetration logic between prepregs and printed boards is processed.
[0030] Specifically, the steps include the following:
[0031] (1) CAD planar feeder network graphic design
[0032] Based on the engineering design requirements, the RF feeder network graphics were drawn in CAD, including graphic elements such as shape, signal lines, vias, pads, clearance pads, resistors, and slots. These elements were distributed in independent layers according to their structural functions. The file was saved after the design was completed.
[0033] (2) Importing CAD planar networks into HFSS
[0034] Open the HFSS software and create a new HFSS simulation model. Using the model import method, import the CAD file from step (1) as a planar graphic. Identify layer information and graphic objects through the built-in import function and automatically number them according to the HFSS naming rules. Based on the HFSS naming rules, the naming format for all planar graphics is A_B, where A is the layer name of the graphic and B is the graphic number, starting from 1, with a maximum value equal to the total number of graphics contained in the CAD drawing.
[0035] (3) Modeling based on planar network
[0036] Based on the CAD planar network imported in step (2), the structure type is identified according to the rules such as layer name, geometry, and positional relationship, and the logical relationship between the structures is established (the vertical stacking logic between layers and the structural association relationship). Finally, a simulation model is established based on the logical relationship.
[0037] Specifically, the process is as follows: For the outline layer, a multilayer 3D model of the board is created, and information such as thickness and material is set, mainly including the prepreg of the printed circuit board and the bonding printed circuit board; for the signal layer, the signal pattern is moved to its respective layer, and then information such as thickness and material is set; for the resistor, the resistor pattern is moved to its respective layer, and the required boundary conditions are set; for the clearance layer and pad layer, the clearance pattern and pad pattern are moved to their respective layers, and information such as thickness and material is set; for the via and slot layer, the pattern is moved to the starting position, the via and slot depths are set, and the material is set.
[0038] (4) Model processing and adding incentives
[0039] Through step (3), a three-dimensional model is basically obtained from the planar graph of the feeder network. Before forming a model that can be simulated and analyzed, the model needs to be processed and stimuli added. Model processing mainly involves Boolean operations to uniquely process the interference parts of different material models, including operations between different layers such as clearance pads and surface circuit layers, via layers, slotted layers and intermediate circuit layers, prepreg layers, signal layers and prepreg layers, and via layers. Adding stimuli mainly involves adding signal inputs and outputs to the RF circuit. It is necessary to select the pad layer in the surface circuit and add port stimuli at the pad and clearance positions. Finally, the solution frequency range and scanning mode are set in the tree structure on the left side of the software to complete the model stimuli and simulation settings.
[0040] The specific steps are as follows:
[0041] a) Project the 2D graphic object onto the corresponding layer in 3D space, and set the thickness and material properties;
[0042] b) Based on the structure type, perform geometric transformations such as translation, rotation, and copying to construct a three-dimensional solid model;
[0043] c) For areas where materials intersect or overlap, Boolean operations are automatically performed, including union and difference operations, to ensure the uniqueness of the geometric model. Boolean operations include automatic processing of the following structures: Boolean operations on the intersection of clearance disks and large-area circuits; Boolean subtraction operations on the through-holes and multilayer board structures; and Boolean operations on the boundary contact or overlapping areas between different materials.
[0044] d) Identify the pad region in the model, apply port excitation at the corresponding position, and set the simulation frequency range, boundary conditions and solution control parameters; the excitation settings include automatically identifying the location of the pad and its corresponding avoidance area, setting it as the lumped port of the waveguide port, and automatically configuring the frequency scanning parameters.
[0045] e) Finally, a complete HFSS three-dimensional structural simulation model file that can be used for electromagnetic simulation is generated.
[0046] Steps (3) and (4) are cumbersome, inefficient, and prone to errors when performed manually. They can be implemented using HFSS scripts. Scripts can be used to move and copy planar graphics, set thickness, material, color, transparency, boundary conditions, and perform Boolean operations, adding excitation and solving for the frequency range. The modeling script is an automatically generated HFSS script that calls the API provided by HFSS. It features parameter variability and template reuse capabilities, supporting generalized model generation and rapid iterative design. This method supports multi-layer structure modeling and is suitable for four-layer, eight-layer, and higher-layer RF feeder network structures. Through modular construction logic, it can adapt to various RF circuit design requirements, exhibiting good versatility and scalability.
[0047] Based on the content described in steps (3) and (4), the rapid modeling process between CAD and HFSS can be streamlined, supporting the conversion of various complex structures from 2D to 3D. Design templates can be reused, significantly reducing manual operations and error rates, and improving modeling accuracy and efficiency in batch project design and iterative verification. The method supports the generation of HFSS scripts using any programming language, and is particularly suitable for typical application scenarios such as rapid modeling of feeder networks for RF multilayer boards.
[0048] The method of this application will be further explained below with specific examples.
[0049] refer to Figure 2 This is a simplified schematic diagram of an eight-layer board feeder network planar circuit according to an embodiment of the present invention. It consists of the following structural elements: printed circuit board 1, L1 layer pads and clearances 21, L2 layer signal traces 22, L4 and L5 layer clearance vias 23, L7 layer signal traces 24, L8 layer pads and clearances 25, film resistor 3, L1-L2 vias 41, L1-L4 vias 42, L2-L7 vias 43, L5-L8 vias 44, L7-L8 vias 45, and L1-L8 vias 46.
[0050] This simplified model basically covers most of the elements of an eight-layer board feeder network. The printed circuit board 1 serves as the carrier of the entire structure. The signal enters from the pad 25 on the L1 layer, passes through the via 41 on the L1-L2 layer, reaches the signal trace 22 on the L2 layer, then transitions to the signal trace 24 on the L7 layer through the via 43 on the L2-L7 layer, and finally reaches the pad 25 on the L8 layer through the via 45 on the L7-L8 layer for output. The vias 42 on the L1-L4 layer, 44 on the L5-L8 layer, and 46 on the L1-L8 layer are generally used as shielding vias to shield external signals. The clearance vias 23 on the L4 and L5 layers are generally used in conjunction with the vias 43 on the L2-L7 layers to prevent short circuits in the internal circuitry. The membrane resistor 3 is generally used to isolate the two outputs of the power divider or as the load terminal of the coupler.
[0051] According to the reference Figure 2 The planar circuit shown is converted into a 3D simulation model as follows:
[0052] 1. Based on printed circuit board 1, establish an eight-layer feeder network printed circuit board model, including four printed circuit boards, three prepreg layers, and four grounding circuit layers L1, L4, L5, and L8, and set the corresponding materials for the model;
[0053] 2. Establish routing models at the corresponding locations based on L2 layer signal trace 22 and L7 layer signal trace 24;
[0054] 3. Based on the film resistance 3, establish a resistance model in the corresponding layer, set boundary conditions, and assign appropriate materials to the model;
[0055] 4. Based on the information of L1-L2 via 41, L1-L4 via 42, L2-L7 via 43, L5-L8 via 44, L7-L8 via 45, and L1-L8 via 46, establish via models between the corresponding layers. At the same time, add L4 and L5 layer avoidance holes 23 where L2-L7 via 43 passes, establish an avoidance model, and set the corresponding materials for the model.
[0056] 5. Establish signal surface layer input / output ports based on L1 layer pads and clearance 21 and L8 layer pads and clearance holes 25, and set the corresponding materials for the model;
[0057] 6. Perform Boolean operations on the model, and add stimulus and simulation settings to complete the entire modeling operation.
[0058] By abstracting the above steps into a unified rule of "drawing planar layers - defining structure types - geometric operations - selecting physical properties" in the automated program, a script automation module is established to map these structures into the HFSS 3D model, set the thickness, height, material, boundary conditions and excitation sources, and finally automatically build the complete model.
[0059] The method described in this invention provides a generalized, modular, and reusable automatic modeling approach that can adapt to feeder network models with various layers and functional structures, offering the following four advantages: 1. Standardized modeling logic abstraction: The process of "drawing planar layers - defining structure types - geometric operations - selecting physical attributes" is abstracted into unified rules; 2. Batch model processing capability: Not limited to a single design file, it can import, identify, and model various feeder network models; 3. Minimal manual intervention and maximum controllability: Model construction does not rely on manual judgment by engineers, automatically completing inter-layer logical mapping and structural Boolean processing; 4. Significantly reduced repetitive work: Particularly suitable for stages in product design where frequent parameter changes and repeated simulation verification are required.
[0060] Many specific details have been set forth in the foregoing description to provide a thorough understanding of the present invention. However, the above description is merely a preferred embodiment of the present invention, and the present invention can be implemented in many other ways different from those described herein. Therefore, the present invention is not limited to the specific embodiments disclosed above. Furthermore, any person skilled in the art can make many possible variations and modifications to the technical solutions of the present invention, or modify them into equivalent embodiments, using the methods and techniques disclosed above, without departing from the scope of the present invention. Any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention, without departing from the content of the present invention, shall still fall within the protection scope of the present invention.
Claims
1. A rapid HFSS modeling method based on AutoCAD planar feeder networks, characterized in that: Includes the following steps: Step (1) CAD planar feeder network graphic design: In AutoCAD software, draw a two-dimensional design drawing based on the structural characteristics of the RF feeder network, and assign them to independent layers according to their functions; Step (2) Import CAD planar network into HFSS: Import the AutoCAD drawing file into AnsysHFSS software, identify layer information and graphic objects through the built-in import function, and automatically number them according to HFSS naming rules; Step (3) Modeling based on planar network: Based on layer name, geometric shape, and positional relationship features, select the structure type corresponding to each graphic object, and construct the vertical stacking logic and structural relationship between layers; Step (4) Model processing and adding excitation: Based on the stacked logic and structural relationship, generate HFSS 3D modeling script using a generalized processing method.
2. The HFSS rapid modeling method based on AutoCAD planar feeder network according to claim 1, characterized in that: In step (1), the graphic elements of the two-dimensional design include shape, signal line, via, pad, clearance, resistor, and slot.
3. The HFSS rapid modeling method based on AutoCAD planar feeder network according to claim 1, characterized in that: Step (2) includes: opening the HFSS software and creating a new HFSS simulation model. Using the model import method, the CAD file in step (1) is imported as a planar graphic. Based on the naming rules of HFSS, the naming format of all planar graphics is A_B, where A is the layer name of the graphic and B is the graphic number, starting from 1. The maximum value is equal to the total number of graphics contained in the CAD drawing.
4. The HFSS rapid modeling method based on AutoCAD planar feeder network according to claim 1, characterized in that: Step (3) includes: for the outline layer, establishing a three-dimensional model of the multilayer board, setting the thickness and material information, including the prepreg of the printed circuit board and the bonding printed circuit board; for the signal layer, moving the signal pattern to the layer, and then setting the thickness and material information; for the resistor, moving the resistor pattern to the layer, and setting the required boundary conditions; for the avoidance layer and the pad layer, moving the avoidance pattern and the pad pattern to the layer respectively, and setting the thickness and material information; for the via and slot layer, moving the pattern to the starting position, setting the via and slot depth, and setting the material.
5. The HFSS rapid modeling method based on AutoCAD planar feeder network according to claim 1, characterized in that: Steps (3) and (4) can be implemented using HFSS scripts. The scripts can be used to move and copy the planar graphics, set information such as thickness, material, color, transparency, and boundary conditions, complete Boolean operations, and add excitation and solve frequency range.
6. The HFSS rapid modeling method based on AutoCAD planar feeder network according to claim 1, characterized in that: Step (4) includes: Step (41) Project the two-dimensional graphic object onto the corresponding layer position in three-dimensional space, and set the thickness and material properties; Step (42) Based on the structure type, perform geometric transformations such as translation, rotation, and copying to construct a three-dimensional solid model; Step (43) automatically performs Boolean operations, including union and difference processing, for areas where materials intersect or overlap, to ensure the uniqueness of the geometric model; Step (44) Identify the pad regions in the model, apply port excitation at the corresponding positions, and set the simulation frequency range, boundary conditions and solution control parameters; Step (45) finally generates a complete HFSS three-dimensional structural simulation model file that can be used for electromagnetic simulation.
7. The HFSS rapid modeling method based on AutoCAD planar feeder network according to claim 6, characterized in that: Boolean operations include automatic processing of the following structures: Boolean operations on areas where clearance pads intersect with large-area circuits; Boolean subtraction operations on through-holes and multilayer board structures; and Boolean operations on boundary contact or overlapping areas between different materials.
8. The HFSS rapid modeling method based on AutoCAD planar feeder network according to claim 6, characterized in that: Adding stimuli includes: automatically identifying the location of the pad and its corresponding clearance area, setting it as a lumped port for the waveguide port, and automatically configuring the frequency scanning parameters.
9. The HFSS rapid modeling method based on AutoCAD planar feeder network according to claim 6, characterized in that: The modeling script is an automatically generated HFSS script that calls the API interface provided by HFSS to execute. It has the ability to change parameters and reuse templates, and supports generalized model generation and rapid iterative design.