Wafer, manufacturing method thereof and adsorption fixing method

Abstract

The invention provides a wafer, a manufacturing method thereof and an adsorption fixing method, and belongs to the technical field of semiconductor manufacturing. The wafer comprises an insulating substrate and a conducting layer located on the back face of the insulating substrate. According to the invention, the wafer can be adsorbed and fixed on the equipment through Coulomb force, so that the processing efficiency of the chip is improved.

Description

Technical Field

[0001] This disclosure belongs to the field of semiconductor manufacturing technology, and specifically relates to a wafer, a method for fabricating the wafer, and an adsorption and fixation method. Background Technology

[0002] As the "canvas" for chip manufacturing, the wafer must remain absolutely stable through hundreds of processes such as photolithography and etching. The wafer substrate is usually attached to semiconductor processing equipment by electrostatic force to enable chip fabrication. If the wafer is unstable, any micron-level displacement will lead to a decrease in chip yield.

[0003] In related technologies, a wafer includes a substrate and a functional structure located on the front side of the substrate. When the wafer is attached to an electrostatic chuck, the back side of the substrate is placed on the attachment surface of the electrostatic chuck. Then, a high voltage is applied to the electrodes of the electrostatic chuck, and the wafer is attached and fixed to the electrostatic chuck by Coulomb force or Johnson-Labec force.

[0004] However, because the substrate is typically made of a highly insulating material with extremely high resistivity and insulating properties, when it is attracted to the electrostatic chuck, the charge cannot move freely or accumulate within the insulating substrate, preventing the formation of an effective electrostatic field and thus an effective Coulomb force between the electrostatic chuck and the substrate. In this case, the Johnson-Labec force must be used to attract the substrate to the electrostatic chuck. However, generating the Johnson-Labec force usually requires applying a voltage much higher than the Coulomb force to the electrodes of the electrostatic chuck. This not only increases the safety design and energy consumption requirements of the equipment but may also pose a potential electrical stress risk to other sensitive areas of the wafer. Moreover, the establishment and elimination of the Johnson-Labec force are both slow processes, affecting processing efficiency. Summary of the Invention

[0005] This disclosure provides a wafer, a method for fabricating the wafer, and an adsorption and fixation method, which enable the wafer to be adsorbed and fixed onto a device using Coulomb forces, thereby improving chip processing efficiency. The technical solution is as follows: This disclosure provides a wafer including an insulating substrate and a conductive layer located on the back side of the insulating substrate.

[0006] In yet another implementation of this disclosure, the conductive layer covers the entire back side of the insulating substrate.

[0007] In another implementation of this disclosure, the conductive layer includes a metal layer, a conductive oxide layer, or a conductive polymer layer.

[0008] In another implementation of this disclosure, the metal layer includes a titanium layer, a tantalum layer, a chromium layer, an aluminum layer, a tungsten layer, a molybdenum layer, a copper layer, or an alloy layer formed of at least two of the following metals: titanium, tantalum, chromium, aluminum, tungsten, molybdenum, and copper.

[0009] In another implementation of this disclosure, the thickness of the metal layer is 50nm-500nm.

[0010] In another implementation of this disclosure, the surface roughness of the conductive layer on the surface away from the insulating substrate is between 0.05 μm and 1.5 μm.

[0011] In another implementation of this disclosure, the insulating substrate is a sapphire substrate, a glass substrate, or a quartz substrate.

[0012] Secondly, embodiments of this disclosure also provide a method for fabricating a wafer, the method comprising: A conductive layer is formed on the back side of an insulating substrate.

[0013] In another implementation of this disclosure, forming a conductive layer on the back side of the insulating substrate includes: placing the insulating substrate in the reaction chamber of a chemical vapor deposition apparatus; introducing a Ti source into the reaction chamber and controlling the temperature of the reaction chamber to be 300°C-500°C, so as to form a titanium layer on the back side of the insulating substrate.

[0014] Thirdly, embodiments of this disclosure also provide an adsorption and fixation method for a wafer, the adsorption and fixation method comprising: The back side of the wafer is placed on the adsorption surface of the electrostatic chuck; a voltage is applied to the electrostatic chuck, and the wafer is adsorbed and fixed on the electrostatic chuck by Coulomb force. The wafer includes an insulating substrate and a conductive layer located on the back side of the insulating substrate, the conductive layer being in contact with the adsorption surface.

[0015] The beneficial effects of the technical solutions provided in this disclosure are: When the wafer provided in this embodiment is adsorbed onto an electrostatic chuck, since the wafer includes an absolute substrate and a conductive layer on the back side of the insulating substrate, the conductivity of the back side of the insulating substrate can be improved through the conductive layer. When a voltage is applied to the electrodes inside the electrostatic chuck, the electric field penetrates the insulating layer on the adsorption surface of the electrostatic chuck and reaches the conductive layer on the back side of the insulating substrate. Since the conductive layer is conductive and is an equipotential body, the charge can be freely and rapidly redistributed across the entire surface of the conductive layer. These freely moving charges, together with the electrodes inside the electrostatic chuck, form a parallel-plate capacitor described by the electrostatic force formula. This naturally creates an adsorption force dominated by Coulomb force between the conductive layers of the electrostatic chuck, thus changing the adsorption mechanism from the slow Johnson-Labeck effect, which depends on charge accumulation, to the efficient Coulomb force effect, which depends on the instantaneous response of the charge. This significantly reduces the operating voltage and improves manufacturing efficiency. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of the wafer structure provided in an embodiment of the present disclosure; Figure 2 A flowchart illustrating a wafer fabrication method provided in this embodiment of the disclosure; Figure 3 A flowchart of the wafer adsorption and fixation method provided in the embodiments of this disclosure; Figure 4 A comparison chart showing the adsorption voltage when different wafers are adsorbed onto an electrostatic chuck. Figure 5 A comparison chart showing the adsorption time and desorption time of different wafers when adsorbed on an electrostatic chuck; Figure 6 A comparison chart showing the back He flow rate when different wafers are adsorbed on an electrostatic chuck.

[0018] The symbols in the diagram represent the following meanings: 1. Insulating substrate; 2. Conductive layer. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.

[0020] Electrostatic chucks suitable for insulating substrates mainly rely on the Johnson-Rahbek (JR) effect to generate the Johnson-Rahbek force, rather than the traditional Coulomb force adsorption. That is, in this case, the electrostatic chuck needs to be replaced by a Johnson-Rahbek type electrostatic chuck.

[0021] The Johnson-Labek effect is a physical mechanism used in electrostatic chucks to adsorb materials with moderate resistivity (semi-insulating). When an insulating substrate is adsorbed and fixed to the electrostatic chuck, the back side of the substrate is in contact with the adsorption surface of the chuck. A high voltage is then applied to the electrodes of the chuck. Because the back side of the insulating substrate and the adsorption surface of the chuck cannot be perfectly flat, but have some microscopic bumps, applying a high voltage to the electrodes inside the chuck generates a very strong electric field inside the chuck. This electric field weakens the potential barrier at the contact point between the insulating substrate and the chuck. Due to quantum tunneling or field emission, electrons are forcibly "pulled" or "injected" from one side (usually the side with the lower work function) to the surface or shallow region of the other side. The injected charges do not flow freely because they are trapped by "trapped" energy levels in the insulating material of the other side. Thus, a stable, charge-separated double layer (one side positively charged, the other negatively charged) is formed at the contact interface between the insulating substrate and the chuck. According to Coulomb's law, the mutual attraction between positive and negative charges (i.e., the Johnson-Rabec force) can firmly attach the insulating substrate to the electrostatic chuck.

[0022] While the Johnson-Labeck effect can resolve the issue between the insulating substrate and the electrostatic chuck, establishing the Johnson-Labeck force typically requires a very high operating voltage. This not only increases the safety and energy consumption requirements of the equipment but may also pose a potential electrical stress risk to sensitive devices. Secondly, the relatively slow establishment of the Johnson-Labeck force affects the machine's throughput and cycle time. Finally, after the process, the difficulty in dissipating the charge in the dipole layer often leads to incomplete or delayed desorption, which can affect wafer transfer efficiency and poses a risk of fragmentation or wafer drop, thus hindering further improvements in production efficiency and yield.

[0023] It should be noted that Coulomb force adsorption refers to the attraction between opposite charges induced on the back side of the substrate after applying a high voltage (such as 3000V) to the electrodes of an electrostatic chuck. The fixation of the two is achieved through the attraction between opposite charges.

[0024] Coulomb force electrostatic chucks differ significantly from Johnson-Labec (JR) type electrostatic chucks, primarily in the conductivity of the dielectric material between the electrodes and the wafer. Coulomb force electrostatic chucks use a high-resistivity insulator (resistivity > 10⁻⁶) between the electrodes and the wafer. 15 Ω·cm). That is, the adsorption surface of a Coulomb force type electrostatic chuck is an insulating structure. The adsorption surface of a Coulomb force type electrostatic chuck is made of a high-resistivity pure insulating material, such as high-purity alumina ceramic. The electrode of a Johnson-Labec type electrostatic chuck has a low resistivity (generally less than 10 Ω·cm) between it and the wafer. 9 -10 12 A conductor with a conductivity of Ω·cm allows charge to migrate between the electrode and the wafer. That is, the adsorption surface of a Johnson-Labec type electrostatic chuck is a conductive layer. The adsorption surface of a Johnson-Labec type electrostatic chuck uses doped conductive materials, such as TiO2-containing alumina or aluminum nitride ceramics.

[0025] Therefore, this disclosure provides a wafer whose structure is improved so that the wafer and an electrostatic chuck can be attracted together by Coulomb force.

[0026] Figure 1 This is a schematic diagram of the wafer structure provided in the embodiments of this disclosure, combined with... Figure 1 The wafer includes an insulating substrate 1 and a conductive layer 2 located on the back side of the insulating substrate 1.

[0027] When the wafer provided in this embodiment is adsorbed onto a (Coulomb force type) electrostatic chuck, since the wafer includes an insulating substrate 1 and a conductive layer 2 on the back side of the insulating substrate 1, the conductivity of the back side of the insulating substrate 1 can be improved through the conductive layer 2. When a voltage is applied to the electrodes inside the electrostatic chuck, the electric field penetrates the insulating layer on the adsorption surface of the electrostatic chuck and reaches the conductive layer 2 on the back side of the insulating substrate 1. Since the conductive layer 2 is conductive and is an equipotential body, the charge can be freely and rapidly redistributed across the entire surface of the conductive layer 2. These freely moving charges, together with the electrodes inside the electrostatic chuck, form a parallel-plate capacitor described by the electrostatic force formula. This naturally creates an adsorption force dominated by Coulomb force between the conductive layers 2 of the electrostatic chuck, thus changing the adsorption mechanism from the slow Johnson-Labeck effect that depends on charge accumulation to the efficient Coulomb force effect that depends on the instantaneous response of the charge, thereby greatly reducing the operating voltage and improving manufacturing efficiency.

[0028] In this embodiment of the disclosure, the front side of the insulating substrate 1 is the side surface used for device structure processing or epitaxial layer deposition, and the back side of the insulating substrate 1 refers to the surface opposite to the back side.

[0029] Optionally, the conductive layer 2 covers the entire back side of the insulating substrate 1. That is, the conductive layer 2 is a continuous layer structure located on the back side of the insulating substrate 1. Here, "continuous layer structure" refers to a continuous film layer without any cutouts.

[0030] In the above implementation, covering the entire back side of the insulating substrate 1 with the conductive layer 2 creates a complete and continuous equipotential surface on the back side of the insulating substrate 1. This ensures that the Coulomb force generated by the electrostatic chuck is highly uniform across the entire wafer area, thus avoiding uneven local stress or micro-bending or slippage caused by uneven adsorption forces. Furthermore, the complete conductive layer is less prone to overheating or damage due to excessively high local current density, and its mechanical strength is more uniform. It also facilitates fabrication.

[0031] In other examples, the conductive layer 2 may also be a whole layer covering the middle of the back side of the insulating substrate 1, or a whole layer located in other areas on the back side of the insulating substrate 1.

[0032] Optionally, the conductive layer may include a metal layer, a conductive oxide layer, or a conductive polymer layer.

[0033] In the above implementation, the metal layer can provide good conductivity, and the manufacturing process of the metal layer is mature, which can improve the manufacturing efficiency.

[0034] Conductive oxide layers offer both sufficient electrical conductivity and good light transmittance. Conductive polymer layers, on the other hand, are suitable for flexible electronics or applications requiring extremely low processing temperatures, offering low manufacturing costs and flexibility.

[0035] For example, the conductive oxide layer includes an indium tin oxide layer, an aluminum-doped zinc oxide layer, or a fluorine-doped tin oxide layer.

[0036] For example, the conductive polymer layer includes poly(3,4-ethylenedioxythiophene)-polystyrene sulfonate, polyaniline, or polypyrrole layer.

[0037] Optionally, the metal layer includes a titanium layer, a tantalum layer, a chromium layer, an aluminum layer, a tungsten layer, a molybdenum layer, a copper layer, or an alloy layer formed of at least two of the following metals: titanium, tantalum, chromium, aluminum, tungsten, molybdenum, and copper.

[0038] All of these metals or alloys can form strong chemical bonds with the sapphire substrate, thus ensuring that the conductive layer can be stacked on the substrate without detaching. Furthermore, these metals and alloys also possess good electrical conductivity.

[0039] Optionally, the thickness of the metal layer is 50nm-500nm.

[0040] In the above implementation, a metal layer of the specified thickness ensures good conductivity of the conductive layer and is also easy to manufacture. If the thickness is too small, the difference in thermal expansion coefficients between the conductive layer and sapphire will introduce excessive internal stress, leading to wafer warping or conductive layer peeling. Conversely, excessive thickness will increase manufacturing costs and affect process cycle time.

[0041] Optionally, the surface roughness of the conductive layer 2 away from the insulating substrate 1 is between 0.05 μm and 1.5 μm.

[0042] The surface roughness of the conductive layer is crucial because it directly affects the actual adhesion between the electrostatic chuck and the wafer. If the surface roughness of the conductive layer is too low (too smooth), it may result in insufficient contact area with the electrostatic chuck electrodes, affecting adhesion. If the surface roughness of the conductive layer is too high (too rough), it may cause uneven stress at the contact points between the wafer and the chuck surface, generating localized stress and affecting the stability and uniformity of adhesion.

[0043] Optionally, the insulating substrate 1 is a sapphire substrate, a glass substrate, or a quartz substrate.

[0044] In the above implementation methods, sapphire, glass, or quartz all have high conductivity, which can prevent leakage. Moreover, sapphire, glass, or quartz are low-cost substrates.

[0045] For example, sapphire substrates, due to their excellent physicochemical properties such as extremely high hardness, chemical inertness, superior electrical insulation, and broad-spectrum light transmittance, are widely used in key fields such as semiconductor optoelectronic devices, radio frequency front-end devices, and optical windows. However, these advantages of sapphire substrates, especially their extremely high resistivity and insulating properties, make it difficult for them to be attracted to electrostatic chucks in semiconductor manufacturing equipment using Coulomb forces.

[0046] Glass substrates typically refer to ordinary silicate glass or other amorphous materials with complex compositions, potentially containing various oxides. Quartz substrates specifically refer to single-crystal or polycrystalline materials made of high-purity silicon dioxide (SiO2), with a single composition and extremely high purity.

[0047] This disclosure also provides a method for fabricating a wafer, such as... Figure 2 As shown, the manufacturing method includes: S201: A conductive layer is formed on the back side of an insulating substrate.

[0048] The above manufacturing methods have the same beneficial effects as the aforementioned wafers, and will not be repeated here.

[0049] Optionally, when the conductive layer on the back side of the insulating substrate is a titanium layer, the step of forming the conductive layer on the back side of the insulating substrate can be implemented in the following manner: First, the insulating substrate is placed in the reaction chamber of the plasma-enhanced chemical vapor deposition apparatus.

[0050] Next, a Ti source is introduced into the reaction chamber, and the temperature of the reaction chamber is controlled at 300-500℃ and the pressure is not greater than 10 Torr, so as to form a layer of metallic titanium on the back side of the insulating substrate.

[0051] A titanium-containing precursor gas (such as TiCl4) and a reactant gas (such as N2 or H2) are introduced into the reaction chamber. A glow discharge is excited by a radio frequency power supply, ionizing the gas molecules to form plasma. High-energy electrons (approximately 10 eV) collide with the gas molecules, breaking chemical bonds and generating reactive groups (such as TiCl3, Cl...). - (etc.) and ions. Active groups diffuse towards the substrate surface in the plasma. Upon reaching the substrate surface, the active groups are adsorbed and react chemically with the surface, forming nuclei for a solid film. The nuclei gradually grow into a continuous film, and byproducts released during the process (such as HCl) are removed by a vacuum pump.

[0052] During the reaction, the gas enters the process chamber from the inlet and diffuses to the substrate surface. Under the action of the electric field excited by the radio frequency source, it decomposes into electrons, ions and free radicals, etc., and undergoes chemical reaction to generate the initial components and by-reactants that form the film. These components are adsorbed onto the substrate surface in the form of chemical bonds to form crystal nuclei. The crystal nuclei grow into islands and then form a continuous thin film. The by-products are detached from the film surface and discharged under the action of the vacuum pump.

[0053] In other examples, the conductor layer can be formed using the methods described above or other methods for depositing thin films.

[0054] This disclosure also provides a method for adsorption and fixation of wafers, such as... Figure 3 As shown, the adsorption and fixation methods include: S301: Place the back side of the wafer on the adsorption surface of the electrostatic chuck.

[0055] S302: Apply voltage to the electrostatic chuck and use Coulomb force to adsorb and fix the wafer on the electrostatic chuck.

[0056] The wafer includes an insulating substrate 1 and a conductive layer 2 located on the back side of the insulating substrate 1, with the conductive layer 2 in contact with the adsorption surface.

[0057] In other examples, the same Johnson-Labecley force can be used to attach the wafer to the electrostatic chuck.

[0058] The above adsorption and fixation methods have the same beneficial effects as the aforementioned wafers, and will not be repeated here.

[0059] The wafer can be fixed on an electrostatic chuck using the adsorption and fixation method described above, thus facilitating subsequent processing. These subsequent processes include etching, deposition, or photolithography.

[0060] The following specific experiments further illustrate that the wafers provided in the embodiments of this disclosure can effectively improve the adsorption effect.

[0061] In this embodiment, by setting up two different test groups and comparing the test results in the test groups, the wafer provided in this embodiment can be further improved to effectively enhance the adsorption effect.

[0062] In the first group of wafers, all wafers are wafers provided in the relevant technology, that is, wafers without a conductive layer.

[0063] All wafers in the second group are wafers provided in this embodiment, that is, each wafer includes an insulating substrate and a conductor layer stacked on the back side of the insulating substrate.

[0064] It should be noted that the conductive layer in the second set of wafers is a metal layer, specifically a Ti metal layer.

[0065] The substrate for each wafer in both the first and second groups is sapphire.

[0066] The structural comparison between the first group of wafers and the second group of wafers can be found in Table 1 below.

[0067] Table 1

[0068] The second set of wafers can be obtained in the following manner: Step 1: Provide a sapphire substrate that is exactly the same as the first set of wafers.

[0069] Step 2: A metallic Ti layer is formed on the sapphire substrate using plasma vapor deposition.

[0070] This completes the fabrication of the first and second sets of wafers.

[0071] Then, the adsorption and desorption of the first and second groups of wafers were verified.

[0072] During the operation, the back side of the substrate of each wafer is placed on the corresponding electrostatic chuck, and a voltage is applied to the electrodes of the electrostatic chuck. The time required for the wafer to adhere to the electrostatic chuck (i.e., the adsorption time in this embodiment), the desorption time after adsorption is completed, and the voltage applied to the electrodes of the electrostatic chuck are then recorded.

[0073] During the experiment, a pressure sensor can be integrated into the electrostatic chuck or the back of the wafer to measure the adsorption force in real time. The stability of the adsorption force is then used to determine the adsorption and desorption times. During the experiment, an oscilloscope monitors the voltage change applied to the electrodes in the electrostatic chuck, and the time from voltage application to the adsorption force reaching a stable value is recorded; this time is the adsorption time.

[0074] After the experiment, the voltage of the electrodes in the electrostatic chuck was turned off, and the residual charge was eliminated through the discharge circuit. At the same time, the time from when the voltage was turned off until the adsorption force completely disappeared was recorded. This time is the desorption time.

[0075] After the experiment, the recorded results were as follows: When the first set of wafers (without a Ti layer deposited on the back side of the substrate) is adsorbed onto the electrostatic chuck via the Johnson-Labeck effect, the voltage applied to the electrodes on the electrostatic chuck must be no less than 9000V. The adsorption time between the wafer and the electrostatic chuck is 15s. After adsorption is complete, the desorption time is 20s.

[0076] The second group of wafers (during Ti layer deposition on the back side of the substrate) were adsorbed onto the electrostatic chuck via the Johnson-Labeck effect. The voltage applied to the electrodes on the electrostatic chuck was 2500V, and the adsorption time between the wafers and the electrostatic chuck was 5 seconds. After adsorption, the desorption time was 5 seconds.

[0077] To further verify that the second set of wafers is suitable for the Coulomb force electrostatic chuck, the first and second sets of wafers were respectively arranged on the adsorption surface of the same Coulomb force electrostatic chuck. Then, voltage was applied to the electrodes on the electrostatic chuck, and the back He flow rate corresponding to the adsorption of the wafers was recorded.

[0078] The back He flow rate refers to the flow rate of helium (He) gas introduced through the internal channels of the electrostatic chuck. The reason for introducing helium gas into the internal channels of the electrostatic chuck during wafer adsorption is that helium, as a highly efficient thermal conductor, can transfer the heat generated during processes such as etching to the cooling system, maintaining the temperature uniformity of the wafer. Furthermore, by monitoring changes in the back He flow rate, it is possible to indirectly determine whether the wafer is stably adsorbed or if leakage exists.

[0079] Because a sealed space is formed between the back He channel and the back of the wafer, helium gas flows through this space. If the wafer is stably adsorbed, it adheres tightly to the surface of the electrostatic chuck, and the resistance to the helium gas flow path is constant, so the helium gas flow rate is stable.

[0080] If the wafer is not completely adsorbed onto the surface of the electrostatic chuck, helium gas will leak through the gap between the wafer and the chuck, causing an abnormal increase in the back-side helium flow rate. Therefore, a flow meter can monitor the helium flow rate in real time, thereby quickly identifying adsorption anomalies or leakage problems through flow rate changes, ensuring the reliability and safety of semiconductor processes.

[0081] In the experiment, when the first group of wafers was adsorbed onto the Coulomb force electrostatic chuck, the back He flow rate was 50 sccm (a flow rate greater than 30 sccm indicates that stable adsorption is not possible). When the second group of wafers was adsorbed onto the Coulomb force electrostatic chuck, the back He flow rate was 10 sccm (a flow rate less than 30 sccm indicates that stable adsorption is possible).

[0082] Therefore, it can be concluded that the first set of wafers is only suitable for Johnson-Labek type electrostatic chucks. The second set of wafers is suitable for Coulomb force type electrostatic chucks.

[0083] The experimental data obtained from the above experiments can be found in Table 2.

[0084] Table 2

[0085] Based on the above experimental data, corresponding voltage comparison charts, adsorption time comparison charts, and back He flow rate comparison charts can be obtained.

[0086] Figure 4 This is a comparison chart of adsorption voltages when different wafers are adsorbed onto an electrostatic chuck, combined with... Figure 4 As can be seen, when the wafer provided in this embodiment is adsorbed onto the electrostatic chuck through the Johnson-Labeck effect, the voltage (also known as the adsorption voltage) applied to the electrode on the electrostatic chuck is reduced from the original 9000V to 2500V, which greatly reduces energy consumption requirements and improves the safety of the equipment.

[0087] Figure 5 A comparison chart showing the adsorption and desorption times of different wafers when adsorbed onto an electrostatic chuck, combined with... Figure 5 In this embodiment, when the wafer is adsorbed onto the electrostatic chuck via the Johnson-Labeck effect, the adsorption time is reduced from 15s to 5s and the desorption time is reduced from 20s to 5s, greatly improving efficiency.

[0088] Figure 6 A comparison graph showing the back He flow rate when different wafers are adsorbed onto an electrostatic chuck, combined with... Figure 6 In this embodiment, when the wafer is adsorbed onto the electrostatic chuck by Coulomb force, the back He flow rate is significantly reduced and falls below the set value. This indicates that the wafer provided in this embodiment can be adsorbed onto the electrostatic chuck using Coulomb force.

[0089] In summary, in the wafer provided by this embodiment, by depositing a metallic Ti layer on the back side of the sapphire substrate, the electrical conductivity of the sapphire can be improved, thereby allowing the wafer to be adsorbed onto an electrostatic chuck using Coulomb force. Furthermore, if adsorption onto the electrostatic chuck via the Johnson-Labeck effect is required, the voltage during Johnson-Labeck adsorption can be significantly reduced, as can the adsorption and desorption times, thereby improving efficiency.

[0090] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” “third,” and similar terms used in this patent application specification and claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an” or “a” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “comprising” or “including” and similar terms mean that the elements or objects preceding “comprising” or “including” encompass the elements or objects listed following “comprising” or “including” and their equivalents, and do not exclude other elements or objects. The terms “connected” or “linked” and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” “right,” etc., are used only to indicate relative positional relationships; when the absolute position of the described objects changes, the relative positional relationship may also change accordingly.

[0091] The above description is merely an optional embodiment of this disclosure and is not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.

Claims

1. A wafer, characterized in that, The wafer includes an insulating substrate (1) and a conductive layer (2) located on the back side of the insulating substrate (1).

2. The wafer according to claim 1, characterized in that, The conductive layer (2) covers the entire back side of the insulating substrate (1).

3. The wafer according to claim 2, characterized in that, The conductive layer (2) includes a metal layer, a conductive oxide layer, or a conductive polymer layer.

4. The wafer according to claim 3, characterized in that, The metal layer includes a titanium layer, a tantalum layer, a chromium layer, an aluminum layer, a tungsten layer, a molybdenum layer, a copper layer, or an alloy layer formed of at least two of the following metals: titanium, tantalum, chromium, aluminum, tungsten, molybdenum, and copper.

5. The wafer according to claim 3, characterized in that, The thickness of the metal layer is 50nm-500nm.

6. The wafer according to claim 2, characterized in that, The surface roughness of the conductive layer (2) away from the insulating substrate (1) is between 0.05 μm and 1.5 μm.

7. The wafer according to any one of claims 1-6, characterized in that, The insulating substrate (1) is a sapphire substrate, a glass substrate or a quartz substrate.

8. A method for fabricating a wafer, characterized in that, The manufacturing method includes: A conductive layer is formed on the back side of the insulating substrate.

9. The manufacturing method according to claim 8, characterized in that, The formation of a conductive layer on the back side of the insulating substrate includes: The insulating substrate is placed in the reaction chamber of a plasma-enhanced chemical vapor deposition apparatus; A Ti source is introduced into the reaction chamber, and the temperature of the reaction chamber is controlled at 300℃-500℃ to form a layer of metallic titanium on the back side of the insulating substrate.

10. A method for adsorption and fixation of a wafer, characterized in that, The adsorption and immobilization method includes: Place the back side of the wafer on the adsorption surface of the electrostatic chuck; A voltage is applied to the electrostatic chuck, and the wafer is adsorbed and fixed on the electrostatic chuck by the Coulomb force. The wafer includes an insulating substrate and a conductive layer located on the back side of the insulating substrate, the conductive layer being in contact with the adsorption surface.

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