Automated testing system and method for integrated microsystem, medium and product

Abstract

The invention provides an automatic test system and method for an integrated microsystem, a medium and a product, which not only control an external automatic test device, but also independently control a programmable logic unit in a to-be-tested microsystem through two parallel and mutually independent control paths. Cooperative control of each device in the automatic test device and internal logic of the to-be-tested microsystem is realized, so that the to-be-tested microsystem is converted into an active participant of the test, and the test coverage rate is improved. According to the method, the high-low temperature test process is conditionally started, qualification judgment is carried out in the normal temperature test process, and the high-low temperature test process is conditionally started only when the to-be-tested microsystem passes the test of all types of to-be-tested items under the normal temperature condition, so that the invalid test time of defective products is saved, the test efficiency is improved, and the problems that the multi-temperature test process is tedious and resources are wasted are solved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronic testing, and in particular to an automated test system, method, medium and product for integrated microsystems. BACKGROUND

[0002] With the rapid development of semiconductor technology, integrated circuits are evolving towards high integration, multi-function and miniaturization. System-in-a-package (SiP) technology emerges as the times require, which integrates multiple chips with different functions, such as radio frequency transceivers, digital-to-analog converters, field programmable gate arrays, integrated processors (SOC), etc., in one package, forming a complete microsystem. Such microsystems are widely used in fields with extremely high performance and reliability requirements, such as communication, automotive electronics, aerospace, etc.

[0003] The field of automated testing of integrated microsystems mainly faces the following technical challenges, which directly limit the efficiency, reliability and coverage of the test.

[0004] (1) The traditional production test flow requires verification of the microsystem's functionality at multiple temperature points (e.g. -55°C, 25°C, 85°C). To achieve this goal, the industry generally relies on "warm boxes" to achieve this goal. The warm box must heat or cool the entire cavity, test fixture and all accessories, which have a huge thermal mass, resulting in extremely time-consuming temperature cycling (e.g. up to 2 hours, or a temperature change rate of less than 3°C per minute), which severely limits the test throughput and test efficiency. In addition, in low-temperature testing (such as -55°C), environmental moisture is extremely easy to frost on the DUT or test fixture, which may cause electrical short circuits or measurement errors. At the same time, the warm box subjects the test fixture, probes and expensive RF cables to the same extreme temperatures as the DUT, causing electrical performance drift or mechanical contact failure, increasing the uncertainty and maintenance cost of the test.

[0005] (2) The traditional test treats the DUT being tested as a "black box". The test system can only apply excitation from the external pins and observe the response. The tester cannot access and control the internal working state of the DUT (such as registers, switches), so it is difficult to cover all internal logic paths and functional states, and the test coverage is limited. When the test fails, the "black box" mode makes it difficult to accurately pinpoint the internal root cause of the failure, resulting in a time-consuming and costly debugging process. In order to make the DUT enter a certain internal test mode, the automated test equipment (ATE) may need to perform a series of complex, non-intuitive external excitation sequences, which is both time-consuming and unreliable.

[0006] (3) The traditional flow is usually fixed and linear. A DUT must perform all test items in a preset order, and cannot be dynamically adjusted according to real-time test results. Even if a DUT has exposed a fatal defect in the first item (such as normal temperature test), it will still be sent to perform all subsequent expensive and time-consuming test items (such as high-low temperature cycling) according to the existing process. This results in a large amount of test time, energy consumption and valuable equipment machine time being wasted on known defective products, reducing overall test efficiency and increasing product test costs. SUMMARY

[0007] In view of the above-mentioned disadvantages of the prior art, the purpose of the present application is to provide an automated test system, method, medium and product for integrated microsystems, which solves the technical problems of low test efficiency and insufficient coverage in the existing microsystem test method.

[0008] To achieve the above-mentioned purpose and other related purposes, the first aspect of the present application provides an automated test system for integrated microsystems, comprising: a host computer and an automatic test device in communication connection with the host computer; the host computer and the automatic test device are both in communication connection with a microsystem to be tested; wherein the host computer is configured to perform the following steps: in response to a self-check success signal, controlling the automatic test device to test the microsystem to be tested under normal temperature conditions to lock the microsystem to be tested marked as a qualified product; in response to a normal temperature performance test pass signal, controlling the automatic test device to test the microsystem to be tested marked as a qualified product under temperature rising and falling conditions, and generating a test result report of the microsystem to be tested; wherein the test of different types of test items is performed in the following manner: sending a first control instruction to the microsystem to be tested, so that the microsystem to be tested configures its internal functional chip to enter a working state matched with different types of test items; at the same time, sending a second control instruction to the automatic test device, so that the automatic test device completes parameter configuration and then controls the automatic test device to test the microsystem to be tested with different types of test items.

[0009] In some embodiments of the first aspect of the present application, the automatic test device comprises a test source supply device, which is configured to provide test signals corresponding to different types of test items to the microsystem to be tested.

[0010] In some embodiments of the first aspect of the present application, the automatic test device further comprises a radio frequency switch matrix and a spectrum analyzer, the radio frequency switch matrix is configured to establish a connection path between the test source supply device and the microsystem under test, and establish a connection path between the microsystem under test and the spectrum analyzer, so as to introduce the test signals corresponding to different types of test items provided by the test source supply device to the corresponding input ports of the microsystem under test, and introduce the output signals on the corresponding output ports of the microsystem under test to the spectrum analyzer.

[0011] In some embodiments of the first aspect of the present application, the manner of sending the first control instruction to the microsystem under test to configure the functional chips inside the microsystem under test to enter the working state matched with the type of the current test item comprises: sending the first control instruction to the microsystem under test according to the type of the current test item; controlling the microsystem under test to parse the first control instruction to generate a plurality of control signals; and controlling the microsystem under test to send each of the control signals to the corresponding functional chip inside the microsystem under test, so as to configure the functional chip to enter the working state matched with the current test item.

[0012] In some embodiments of the first aspect of the present application, the manner of sending the second control instruction to the automatic test device to enable the automatic test device to complete the parameter configuration comprises: in response to a test start signal, configuring and uploading the parameter files of each device in the automatic test device; and sending the second control instruction to the automatic test device according to the type of the current test item, so as to enable each device in the automatic test device to perform parameter configuration according to the second control instruction and the corresponding parameter file.

[0013] In some embodiments of the first aspect of the present application, the manner of controlling the automatic test device to perform the test of different types of test items on the microsystem under test comprises: in response to a configuration completion signal, controlling the automatic test device to provide the test signal corresponding to the current test item to the microsystem under test to perform the test of the current test item; in response to a test completion signal, obtaining the test result data of the current test item from the microsystem under test; comparing the test result data of the current test item with a preset qualified data range, and determining whether the test of the current test item passes based on the comparison result; if the test of the current test item passes, controlling the automatic test device to perform the test of the next test item on the microsystem under test; and if the test of the current test item fails, marking the microsystem under test as unqualified, and terminating the test of all subsequent test items.

[0014] In some embodiments of the first aspect of the present application, the automatic testing device further comprises a temperature control device; wherein, under the temperature changing condition, the manner in which the automatic testing device controls the testing of the to-be-tested micro system marked as a qualified product on different types of to-be-tested items comprises: in response to a normal temperature performance test pass signal, sending a third control instruction to the temperature control device to control the temperature control device to blow temperature-controlled air flow to the surface of the to-be-tested micro system marked as a qualified product according to preset temperature values of a plurality of temperature test points, so that the temperature of the to-be-tested micro system marked as a qualified product reaches the preset temperature values; and when it is monitored that the temperature of the to-be-tested micro system marked as a qualified product reaches the preset temperature values, controlling the automatic testing device to test the to-be-tested micro system marked as a qualified product on different types of to-be-tested items.

[0015] To achieve the above object and other related objects, the second aspect of the present application provides an automatic testing method for integrated micro systems, which is applied to an upper computer in an automatic testing system, and the upper computer is respectively connected to an automatic testing device and a to-be-tested micro system in communication. The automatic testing method comprises: in response to a self-check success signal, controlling the automatic testing device to test the to-be-tested micro system on different types of to-be-tested items under a normal temperature condition to lock the to-be-tested micro system marked as a qualified product; and in response to a normal temperature performance test pass signal, controlling the automatic testing device to test the to-be-tested micro system marked as a qualified product on different types of to-be-tested items under a temperature changing condition and generating a test result report of the to-be-tested micro system; wherein, the manner in which the to-be-tested micro system is tested on different types of to-be-tested items comprises: sending a first control instruction to the to-be-tested micro system to control the to-be-tested micro system to configure a functional chip inside the to-be-tested micro system to enter a working state matched with different types of to-be-tested items; and at the same time, sending a second control instruction to the automatic testing device to control the automatic testing device to complete parameter configuration and then control the automatic testing device to test the to-be-tested micro system on different types of to-be-tested items.

[0016] To achieve the above object and other related objects, the third aspect of the present application provides a computer readable storage medium, which stores a computer program, and the computer program is executed by a processor to implement the automatic testing method for integrated micro systems as described above.

[0017] To achieve the above object and other related objects, the fourth aspect of the present application provides a computer program product, which comprises computer program codes, and when the computer program codes are run on a computer, the computer is caused to implement the automatic testing method for integrated micro systems as described above.

[0018] As described above, the automatic testing system, method, medium and product for integrated micro systems have the following beneficial effects:

[0019] (1) The host computer controls not only the external automatic test device but also the programmable logic unit inside the microsystem to be tested through two parallel and independent control paths, realizes the cooperative control of each device in the automatic test device and the internal logic of the microsystem to be tested, makes the microsystem to be tested become the active participant of the test, and improves the test coverage.

[0020] (2) The temperature control device is used to rapidly change the temperature of the microsystem to be tested while keeping the test fixture and the probe array at a relatively stable temperature, so that the high mechanical positioning accuracy and high-frequency signal integrity can be ensured at extreme temperatures, and the contradiction between mechanical contact reliability and rapid temperature change in traditional oven testing is solved.

[0021] (3) The pass / fail judgment is performed during the normal temperature test, and the high and low temperature test process is conditionally started only when the microsystem to be tested passes the test of all types of test items under normal temperature conditions, thereby saving the invalid test time of defective products, improving the test efficiency, and solving the problems of long multi-temperature test process and waste of resources. BRIEF DESCRIPTION OF DRAWINGS

[0022] Figure 1 The figure shows the overall architecture block diagram of the automatic test system for integrated microsystems in an embodiment of the present application.

[0023] Figure 2 The figure shows the structure schematic diagram of the test fixture in an embodiment of the present application.

[0024] Figure 3 The figure shows the structure schematic diagram of the temperature control device in an embodiment of the present application.

[0025] Figure 4 The figure shows the architecture schematic diagram of the dual-path cooperative control in an embodiment of the present application.

[0026] Figure 5 The figure shows the software architecture diagram of the host computer in an embodiment of the present application.

[0027] Figure 6 The figure shows the software interface diagram of the host computer in an embodiment of the present application.

[0028] Figure 7 The figure shows the flow schematic diagram of the test of the microsystem to be tested in an embodiment of the present application.

[0029] Figure 8 The figure shows the overall flow schematic diagram of the test of the microsystem to be tested in an embodiment of the present application.

[0030] Figure 9The diagram shown is a flowchart illustrating an automated testing method for integrated microsystems according to an embodiment of this application. Detailed Implementation

[0031] The following specific examples illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. This application can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this application. It should be noted that, unless otherwise specified, the following embodiments and features in the embodiments can be combined with each other.

[0032] Before providing a further detailed description of the present invention, the nouns and terms used in the embodiments of the present invention are explained, and the nouns and terms used in the embodiments of the present invention are subject to the following interpretations:

[0033] <1> DUT (Device Under Test): The device under test or the device to be tested is the equipment or component that is evaluated, measured, or inspected during testing, verification, calibration, or analysis.

[0034] <2> BGA (Ball Grid Array): A ball grid array or solder ball array is a two-dimensional array of tiny solder balls that serve as electrical and mechanical connection points between the chip and the printed circuit board. It is a surface mount packaging technology used for integrated circuits.

[0035] <3> FPGA: Field Programmable Gate Array, is a "blank" digital circuit chip composed of a large number of basic logic units. Users can "program" these basic units to connect them, thereby "creating" a dedicated digital circuit system that meets their own needs inside the chip.

[0036] <4> GPIB: Universal Interface Bus, a stable and reliable parallel bus standard, mainly used for connecting and controlling test and measurement instruments.

[0037] <5> USB: Universal Serial Bus, is currently the most widely used standard for connecting computer peripherals. It is used to connect keyboards, mice, printers, external hard drives, and various instruments and devices, supporting plug-and-play and hot-swapping.

[0038] <6> LAN: Local Area Network, refers to a computer network formed within a limited geographical area (such as a home, office, or laboratory). In the field of instrumentation, devices with LAN ports (network ports) can be remotely controlled and transmit data via a network.

[0039] <7> RS232: A serial communication standard that defines logic levels, physical connectors, etc., and is commonly used for point-to-point communication between computers and modems, printers, or some industrial equipment.

[0040] <8> UART: Universal Asynchronous Receiver / Transmitter, is a hardware chip or module inside a microcontroller that is responsible for handling asynchronous serial communication.

[0041] <9> SCPI: Standard commands for programmable instruments, used to control programmable test and measurement instruments.

[0042] <10> DAC: Digital-to-Analog Converter, a device that converts digital signals (binary code) into analog signals (voltage or current).

[0043] <11> ADC: Analog-to-Digital Converter, is a device that converts continuous analog signals into discrete digital signals.

[0044] <12> Vivado is a software development platform that integrates all the tools needed for different aspects of FPGA or system-on-a-chip (SoC) design into a unified software interface.

[0045] <13> ILA: Integrated Logic Analyzer, whose function is to capture and display the waveforms of signals inside the FPGA in real time, and to debug and verify whether the internal design of the FPGA is running correctly.

[0046] <14> TCL: Tool Command Language. In Vivado, TCL is the basic control language.

[0047] <15> MATLAB: A mathematical software primarily used for algorithm development, data analysis, numerical computation, and visualization.

[0048] <16> GPIO: General Purpose Input / Output, refers to a type of pin on a chip or circuit board whose function is not yet defined. Its specific function (whether as an input or an output) can be flexibly configured by software.

[0049] The following technical problems exist in the automated testing of existing integrated microsystems: First, the testing efficiency is low, mainly due to the extremely time-consuming heating and cooling cycles of traditional temperature chambers, and the risk of frosting and electrical performance drift in low-temperature testing. Second, the test coverage is insufficient. Because the DUT is treated as a "black box," its internal working state cannot be accessed or controlled, making it difficult to fully cover the internal functional paths and locate faults. Third, the testing process is rigid. The use of a fixed linear process cannot be dynamically adjusted according to real-time results, causing known defective products to continue to undergo subsequent tests, resulting in a waste of testing resources and time.

[0050] To address the shortcomings of the existing technology, this application provides an automated testing system, method, medium, and product for integrated microsystems, aiming to solve the technical problems of low testing efficiency and insufficient coverage in existing microsystem testing methods.

[0051] To facilitate understanding of the embodiments of this application, firstly, in conjunction with Figure 1 Detailed explanation. Figure 1 This invention illustrates the overall architecture block diagram of an automated testing system for integrating microsystems according to an embodiment of the present invention. The automated testing system for integrating microsystems in this embodiment mainly includes: a host computer and an automated testing device communicatively connected to the host computer; both the host computer and the automated testing device are communicatively connected to the microsystem under test; wherein, the host computer is used to perform the following steps:

[0052] (1) In response to the self-test success signal, under normal temperature conditions, the automatic testing device is controlled to perform different types of tests on the microsystem under test to lock the microsystem under test marked as qualified;

[0053] (2) In response to the room temperature performance test pass signal, under the conditions of temperature rise and fall, the automatic testing device is controlled to perform different types of test items on the micro system under test marked as qualified, and a test result report of the micro system under test is generated.

[0054] The method for testing different types of test items includes: sending a first control command to the microsystem under test to configure its internal functional chips to enter a working state that matches the different types of test items; and simultaneously sending a second control command to the automatic testing device to configure the automatic testing device to perform different types of test items on the microsystem under test.

[0055] In this embodiment, the Automated Test Equipment (ATE) is used to perform different types of tests on the microsystem under test (DUT). The ATE includes a test fixture and a power supply. The test fixture is used to fix the DUT; the power supply is used to supply power to the test fixture and the DUT. The power supply can be a DC power supply, and both the DC power supply and the test fixture are communicatively connected to a host computer.

[0056] In this embodiment, the automatic testing device (ATE) also includes a temperature control device that is connected to a host computer. The temperature control device is used to adjust the temperature of the microsystem under test so as to perform different types of tests on the microsystem under test under temperature rise and fall conditions.

[0057] In this embodiment, as Figure 2The diagram shows a schematic representation of the test fixture in an embodiment of the present invention. The test fixture performs three key functions simultaneously: mechanical positioning, electrical connection, and heat conduction. Its design aims to provide the microsystem under test (DUT) with a highly stable environment that remains relatively stationary throughout the entire testing process.

[0058] In this embodiment, the test fixture includes a limiting frame, a probe array, and a test board. The limiting frame provides mechanical positioning for the microsystem under test (DUT). Customized to the shape of the DUT, the limiting frame provides micron-level repeatability for the ball grid array (BGA) packaged DUT, ensuring reliable contact between hundreds of solder balls and the probe array, which is the physical basis for the stability of automated testing. The probe array at the bottom of the test fixture provides electrical connections. One end of the probe array contacts the ball grid array of the DUT, and the other end connects to the test board. The probe array is responsible for guiding all electrical signals (including high-speed digital, high-frequency RF, precision analog, and DC signals) from the DUT to the test board, and then from the test board to the automated test equipment (ATE), ensuring high-quality signal integrity throughout the temperature cycle. Under heating and cooling conditions, when performing different types of tests on the DUT, the test fixture acts as a heat exchange medium between the DUT and the temperature control equipment, playing a role in heat conduction.

[0059] In this embodiment, as Figure 3 The diagram shown illustrates the structure of a temperature control device in an embodiment of the present invention. The temperature control device can employ a high-low temperature rapid temperature stamping machine, using an air pipe, such as... Figure 3 The air tubes 1 and 2 directly blow temperature-controlled, dry cold / hot airflow onto the surface of the microsystem under test, achieving rapid temperature changes and improving testing efficiency. The advantages of the high and low temperature rapid temperature punch are:

[0060] (1) High efficiency: Because the high and low temperature rapid temperature extruder directly blows temperature-controlled dry cold / hot air onto the surface of the microsystem under test, the airflow only heats or cools the microsystem itself, resulting in a small heat mass. This allows it to reach the target stable temperature (e.g., -55℃ or 85℃) in a short time (e.g., 10 minutes). In contrast, traditional temperature chambers require a long heating time and can cause frosting. The high and low temperature rapid temperature extruder uses dry air, which avoids frosting problems in low-temperature testing, thereby improving testing efficiency.

[0061] (2) High stability and accuracy: Since only the microsystem under test is subjected to drastic temperature changes, while the temperature changes of key components such as the test fixture, probe array and test board are much smaller than those of the microsystem under test, the stability of the mechanical structure and the reliability of the contact between the probe array and the ball grid array are guaranteed, thus improving the stability and accuracy of the test.

[0062] (3) Energy saving: Compared with the traditional method of heating or cooling the entire temperature chamber, this local temperature control method can save energy. At the same time, it avoids thermal shock to test accessories such as RF cables, extends the instrument life and ensures calibration accuracy. The heat transfer process between the airflow and the surface of the microsystem under test can be described by the convection heat transfer formula, which is as follows:

[0063] Formula (1)

[0064] in, It represents the rate of heat transfer (the amount of heat transferred per unit time), and its unit is watt (W). It represents the convective heat transfer coefficient, which depends on airflow velocity, fluid properties, etc., and is a key parameter for measuring heat exchange efficiency; This represents the surface area of ​​the microsystem under test in contact with the airflow; This indicates the temperature of the airflow provided by the high and low temperature rapid temperature jetting machine; This indicates the surface temperature of the microsystem under test.

[0065] In this embodiment, when performing different types of tests on the microsystem under temperature rise and fall conditions, the host computer sends a third control command to the high and low temperature rapid temperature stamping machine, causing the high and low temperature rapid temperature stamping machine to adjust the convective heat transfer coefficient by controlling the airflow speed and temperature. and airflow temperature This allows for control of the temperature change rate.

[0066] In this embodiment, the automatic testing device includes a test source supply device, which provides test signals corresponding to different types of test items to the microsystem under test. The test source supply device includes signal source 1, signal source 2, signal source 3, and signal source 4. Signal source 1, signal source 2, signal source 3, and signal source 4 are all communicatively connected to a host computer.

[0067] In this embodiment, signal source 1 provides corresponding test signals to the input port of the microsystem under test (MSD) for tests such as transmit / receive gain, transmit power, and frequency range of the RF transceiver. Signal source 2 provides another test signal to the input port of the MSD for in-band and out-of-band frequency hopping tests of the RF transceiver. Signal source 3 provides a first local oscillator signal to the MSD, and signal source 4 provides a second local oscillator signal. The local oscillator signal is fundamental to the normal operation of the MSD, enabling it to "load" low-frequency information onto a high-frequency carrier for transmission and to "extract" low-frequency information from received high-frequency signals. Signal sources 1 and 2 test the RF transceiver function of the MSD by providing test signals to it.

[0068] In this embodiment, the automatic testing device further includes a power amplifier and a power divider. The power amplifier is connected to signal source 3, signal source 4, and the power divider via RF cables. The power divider is connected to the test board via RF cables. The power amplifier amplifies the first local oscillator signal provided by signal source 3 and the second local oscillator signal provided by signal source 4, preventing the power of the first and second local oscillator signals from being too low after passing through the power divider, which would result in a low gain of the RF transceiver on the microsystem under test. The power divider splits the amplified local oscillator signal into two paths, which are then input to two identical RF transceivers integrated on the microsystem under test via RF cables and the test board, providing support for RF channel gain testing, RF channel transmit power testing, and other related test items for each RF transceiver.

[0069] In this embodiment, the automatic testing device further includes an RF switch matrix and a spectrum analyzer. The RF switch matrix is ​​used to establish a connection path between the test source supply device and the microsystem under test, and to establish a connection path between the microsystem under test and the spectrum analyzer, so as to introduce the test signals provided by the test source supply device corresponding to different types of test items to the corresponding input ports of the microsystem under test, and to introduce the output signals of the corresponding output ports of the microsystem under test to the spectrum analyzer.

[0070] In this embodiment, the RF switch matrix and spectrum analyzer are communicatively connected to the host computer, with the spectrum analyzer connected to the RF switch matrix via an RF cable. The RF switch matrix is ​​the nerve center of the automated test device, providing a programmable and flexible signal routing platform. It can dynamically connect different test devices to the corresponding input or output ports of the microsystem under test according to the requirements of the test project. Through the RF switch matrix, the entire complex test sequence can be executed automatically under a single hardware setting, eliminating the need for manual rewiring and improving test efficiency and repeatability.

[0071] In this embodiment, the spectrum analyzer is used to receive the output signal from the output port of the microsystem under test (MSD) and display the accurate signal frequency and power. According to the requirements of the test project, the host computer controls signal source 1 or signal source 2 to provide the corresponding test signal to the MSD, which is then introduced to the corresponding input port of the MSD through an RF switch matrix. The output signal from the corresponding output port of the MSD is introduced to the spectrum analyzer through the RF switch matrix for analysis of the test results.

[0072] In this embodiment, the automatic testing device further includes an oscilloscope and a source measurement unit, both of which are communicatively connected to a host computer. The oscilloscope receives logic level signals derived from the microsystem under test (MSB) and measures the rise and fall times of these signals. The source measurement unit achieves accuracy at the mA and mV levels and is used to measure the quiescent current, logic low-level voltage, and logic high-level voltage of the FPGA and integrated processor on the MSB.

[0073] In this embodiment, the test fixtures, power supply equipment, temperature control equipment, signal sources 1-4, RF switch matrix, spectrum analyzer, oscilloscope, and source measurement unit in the automatic test apparatus are connected to a host computer via a programmable interface (such as GPIB, USB, LAN, RS232), and combined with the customized test fixtures to form a complete system-level test solution. This system can perform comprehensive functional and performance verification on complex microsystems under test (MSDs) integrating multiple functions such as RF, mixed-signal, and digital logic, under unified software control. The host computer establishes communication directly with the FPGA on the MSD through an independent serial communication interface (such as UART). The host computer sends customized, high-level instructions to the FPGA. These instructions are not direct test signals, but rather commands used to control the internal operating state of the MSD. Thus, the host computer not only controls the various devices in the automatic test apparatus but also independently controls the FPGA on the MSD, making the MSD an active participant in the test.

[0074] In this embodiment, as Figure 4 The diagram illustrates the architecture of the dual-path collaborative control in this embodiment of the invention. The host computer achieves collaborative control of the various devices in the automatic testing apparatus and the internal logic of the microsystem under test through two parallel and independent control paths. The two control paths are described below:

[0075] (1) First control path: The host computer establishes communication with test fixtures, power supply equipment, temperature control equipment, signal sources 1-4, RF switch matrix, spectrum analyzer, oscilloscope, source measurement unit and other equipment through standard industrial interfaces such as GPIB, LAN, RS232. The C# program in the host computer configures the parameters of each device (such as frequency, power), triggers measurement actions and reads test data by sending second control instructions (such as SCPI standard instructions).

[0076] (2) Second control path: The host computer establishes communication directly with the FPGA on the microsystem under test (DUT) through an independent serial communication interface (UART). The host computer sends the first control command to the FPGA. These commands are not direct test excitation signals, but commands used to control the internal working state of the microsystem under test.

[0077] In this embodiment, the FPGA on the microsystem under test (DUT) is pre-programmed with corresponding control logic. When the FPGA receives the first control command through the second control path, it autonomously executes a series of complex internal configuration operations, such as setting the internal attenuator, switching the RF switch path, and configuring relevant chip registers. This mechanism transforms the DUT from a passive "black box" that receives probe signals into an intelligent partner capable of understanding the test intent and actively configuring itself to cooperate with the test, thus turning the DUT into an active participant in the test and improving test coverage.

[0078] In this embodiment, the Automatic Test Equipment (ATE) and the Microsystem Under Test (DUT) receive different instructions from the host computer at the same time and in parallel, and work together to complete the test of the same type of test item, realizing a real-time collaborative control architecture of "host computer-ATE-DUT".

[0079] In this embodiment, as Figure 5 The diagram shown illustrates the software architecture of the host computer in an embodiment of the present invention. Figure 6 The diagram shown illustrates the software interface of the host computer in an embodiment of the present invention. The presentation layer is a graphical user interface (GUI), as shown below. Figure 6 As shown, the interface includes windows for various test-related devices, information on insertion loss files, information about the microsystem under test (DUT), and test report information. In the business logic layer, the test sequencer is responsible for executing the complete test process, enabling an "adaptive" test flow; the data analyzer is responsible for real-time analysis of data read from the hardware to determine whether the test passes or fails; the configuration manager is responsible for configuring the test items to be run, specifying which test items to run, their parameters, and informing the test sequencer accordingly. In the hardware abstraction layer, the interaction between the host computer and the automated test equipment (ATE) is primarily handled. A general interface is defined for each type of device in the ATE, containing common operations for the test equipment, such as setting the frequency, power, enabling output, and disabling output for signal sources. Under this general interface, a class implements this interface for each specific model of test equipment. When the ATE needs to change to a different test equipment model, no interface code needs modification; only the implementation class needs to be changed, achieving decoupling and maintainability, making the ATE hardware scalable and modular. The data access layer is responsible for writing and reading data. It can read the required data from test equipment such as spectrum analyzers, signal sources, and DC power supplies. When generating the final report, it can write the processed data into the report.

[0080] In this embodiment, the types of test items include, but are not limited to: RF channel gain test, RF channel transmit power test, RF channel instantaneous bandwidth test, RF channel isolation test, out-of-band frequency hopping test, in-band frequency hopping test, DAC transmit power test, ADC signal-to-noise ratio test, channel synchronization test, device current test, logic output pin voltage test, logic output pin level transition test, and power consumption test. The host computer controls the automatic testing device to first perform different types of test items on the microsystem under test under normal temperature conditions. After each type of test item passes, the host computer controls the automatic testing device to perform different types of test items on the microsystem under test under rising and falling temperature conditions to verify the performance of the microsystem under test. Thus, the high and low temperature test process is conditionally initiated only when the normal temperature test passes, thereby saving ineffective testing time on defective products and improving testing efficiency.

[0081] In this embodiment, the test items for the microsystem under test are the same under both room temperature and temperature cycling conditions. Specifically, sending a first control command to the microsystem under test to configure its internal functional chips into operating states matching different types of test items includes:

[0082] (1) Send a first control command to the microsystem under test according to the type of the current test item;

[0083] (2) Control the microsystem under test to parse the first control command to generate multiple control signals;

[0084] (3) Control the microsystem under test to send each of the control signals to the corresponding functional chip inside it, so as to configure the functional chip to enter the working state that matches the current test item.

[0085] In this embodiment, sending a second control command to the automatic testing device to instruct the automatic testing device to complete parameter configuration includes:

[0086] (1) In response to the test start signal, configure and upload the parameter files of each device in the automatic test device;

[0087] (2) Based on the type of the current test item, send a second control command to the automatic test device so that each device in the automatic test device can configure parameters according to the second control command and the corresponding parameter file.

[0088] In this embodiment, when testing the microsystem to be tested, the host computer first clicks... Figure 6The "Self-Test" button shown on the interface checks whether the communication between the host computer and each device is normal. If a device fails to communicate, an error message will be displayed, requiring you to check whether the cable connection between the device and the host computer is stable and whether the device's interface and address settings are correct. After the communication test is successful, in response to the self-test success signal, the host computer sends a power supply command to the DC power supply, enabling the DC power supply to power the test board and the microsystem under test on the test fixture. After successful power supply, the test process is started. In response to the test start signal, the host computer sends SCPI commands to configure the parameter files of each device in the automatic test device, sends each parameter file to the memory of the corresponding device, and then sends a command to activate the parameter file.

[0089] In this embodiment, the host computer sends a first control command to the microsystem under test (MSD) for a specific test item. The FPGA on the MSD parses the first control command, generates multiple control signals, and sends these signals to the corresponding functional chips in the MSD. The functional chips in the MSD are configured according to the corresponding control signals to enter a working state matching the current test item. Simultaneously, the host computer sends a second control command to the automatic testing device for the same test item, instructing the corresponding devices in the automatic testing device to configure parameters according to the second control command and their internal parameter files.

[0090] In this embodiment, for example, the output power of the RF transceiver on the microsystem under test is tested. The frequency of signal source 1 is set to 18 GHz, and the reference power is -40 dBm. Signal source 1 will automatically calculate the path loss at this frequency according to the parameter file to improve the output power. The frequency of signal source 3 is 40 GHz, and the frequency of signal source 4 is 19.75 GHz. Their power requirements are to ensure 15 dBm or more when reaching the microsystem under test. The RF switch matrix routes the input and output signals to the set links. The spectrum analyzer is set to a center frequency of 2.25 GHz and a marker is set to the center frequency point.

[0091] In this embodiment, as Figure 7 The diagram illustrates a process for testing the microsystem under test in an embodiment of the present invention. The methods for controlling the automatic testing device to perform different types of tests on the microsystem under test include:

[0092] S701: In response to the configuration completion signal, control the automatic test device to provide a test signal corresponding to the current test item to the microsystem under test, so as to perform the test of the current test item.

[0093] S702: In response to the test completion signal, obtain the test result data of the current test item from the microsystem under test.

[0094] S703: Compare the test result data of the current test item with the preset qualified data range, and determine whether the test of the current test item passes based on the comparison result.

[0095] S704: If the current test item passes the test, control the automatic testing device to perform the next test item test on the microsystem under test.

[0096] S705: If the current test item fails, mark the microsystem under test as a non-conforming product and terminate the testing of all subsequent test items.

[0097] In this embodiment, when testing the microsystem under test, firstly, under normal temperature conditions, after the host computer controls the microsystem under test and the automatic testing device to complete the configuration, it controls the automatic testing device to perform different types of tests on the microsystem under test. When the test of the current test item is completed, depending on the type of the current test item, the test result data of the current test item can be obtained from the microsystem under test through a spectrum analyzer, oscilloscope, or source measurement unit. The test result data of the current test item is compared with the preset qualified data range required in the design manual of the microsystem under test. If the test result data is within the preset qualified data range, the test of the current test item is passed, and the test of the next test item is performed. If the test result data is not within the preset qualified data range, the test of the current test item fails, the microsystem under test is marked as unqualified, and the testing of all subsequent test items is terminated. When the microsystem under test passes all types of test items under normal temperature conditions, the microsystem under test is marked as qualified. Then, under the conditions of temperature rise and fall, after the host computer controls the microsystem under test and the automatic testing device to complete the configuration, it controls the automatic testing device to perform different types of tests on the microsystem under test marked as qualified.

[0098] In this embodiment, the automatic testing device further includes a temperature control device; wherein, under heating and cooling conditions, the method of controlling the automatic testing device to perform different types of tests on the microsystem to be tested that is marked as qualified includes:

[0099] (1) In response to the normal temperature performance test pass signal, a third control command is sent to the temperature control device so that the temperature control device blows a temperature-controlled airflow onto the surface of the microsystem under test marked as qualified, according to the preset temperature values ​​of several temperature test points, so that the temperature of the microsystem under test marked as qualified reaches the preset temperature value.

[0100] (2) When the temperature of the microsystem under test marked as qualified reaches the preset temperature value, the automatic testing device is controlled to perform different types of tests on the microsystem under test marked as qualified.

[0101] In this embodiment, after the microsystem under test passes all types of test items under normal temperature conditions, it is marked as a qualified product and then subjected to testing under heating and cooling conditions. The host computer sends a third control command to the temperature control device, instructing the temperature control device to blow temperature-controlled dry cold air or hot air onto the surface of the marked qualified microsystem under test according to preset temperature values ​​at several temperature test points. Once the temperature of the marked qualified microsystem under test reaches the preset temperature value, the host computer controls the configuration of the microsystem under test and the automatic testing device, and controls the automatic testing device to perform different types of test items on the marked qualified microsystem under test. The testing process under heating and cooling conditions is similar to that under normal temperature conditions and will not be described in detail here.

[0102] In this embodiment, as Figure 8 The diagram illustrates the overall process of testing the microsystem under test in an embodiment of the present invention. To facilitate understanding of the present invention, the overall testing process of the microsystem under test is described below:

[0103] S801: Check whether the communication between the host computer and each device of the automatic testing device, and the communication between the host computer and the microsystem under test are normal.

[0104] S802: If communication is not normal, check the line and troubleshoot until communication is normal, then proceed to step S803.

[0105] S803: If communication is normal, in response to the self-test success signal, the host computer sends a power supply command to the DC power supply so that the DC power supply supplies power to the test board and the microsystem under test on the test fixture, and executes step S804.

[0106] S804: Under normal temperature conditions, control the automatic testing device to perform different types of tests on the microsystem under test.

[0107] S805: Send a first control command to the microsystem under test (MSB) to configure its internal functional chips to enter a working state that matches different types of test items; simultaneously, send a second control command to the automatic testing device to configure the automatic testing device to perform different types of test items on the MSB.

[0108] S806: Based on the test result data of different types of test items, determine whether the microsystem under test has passed the tests of all types of test items under normal temperature conditions.

[0109] S807: If the microsystem under test fails a certain test item under normal temperature conditions, the microsystem under test shall be marked as a defective product, and all subsequent tests shall be terminated, and the test shall end.

[0110] S808: If the microsystem under test passes all types of test items under normal temperature conditions, then mark the microsystem under test as qualified and proceed to step S809.

[0111] S809: Under temperature rise and fall conditions, the automatic testing device is controlled to perform different types of tests on the microsystem under test that is marked as qualified. The method is as follows:

[0112] (1) In response to the normal temperature performance test pass signal, a third control command is sent to the temperature control device so that the temperature control device blows a temperature-controlled airflow onto the surface of the microsystem under test marked as qualified, according to the preset temperature values ​​of several temperature test points, so that the temperature of the microsystem under test marked as qualified reaches the preset temperature value.

[0113] (2) When the temperature of the microsystem under test marked as qualified reaches the preset temperature value, the automatic testing device is controlled to perform different types of tests on the microsystem under test marked as qualified, and step S805 is executed.

[0114] S810: After the test is completed, a test result report of the microsystem under test is generated.

[0115] In this embodiment, when the automatic testing device performs different types of tests on the microsystem under test, the specific operations of each device are as follows:

[0116] (1) RF Channel Gain Test: This test includes two RF transceivers on the microsystem under test (DUT), testing the receive direct link, receive mixer link, transmit direct link, and transmit mixer link of each RF transceiver. For example, when testing the receive mixer link, signal source 1 will automatically calculate the path loss at this frequency according to the parameter file and increase the output power. The host computer controls signal source 1 to output RF signals and routes them to the entrance of the receive mixer link of the microsystem under test (DUT) through the RF switch matrix. The frequency of signal source 3 is fixed at 22 GHz compared to the frequency of signal source 1. For example, if the frequency of signal source 1 is 9 GHz, the frequency of signal source 3 will be 31 GHz, and the frequency of signal source 4 will be fixed at 19.75 GHz. At almost the same time, the host computer sends a command to the FPGA inside the microsystem under test (DUT) through UART. The decoder module written inside the FPGA parses the command and configures the microsystem under test (DUT) to enter the receive mixer mode. The intermediate frequency (IF) signal output from the microsystem under test (DUT) is routed to a spectrum analyzer via an RF switch matrix. The center frequency and bandwidth of the spectrum analyzer are set via a host computer, and the signal frequency and power can be read from the marker on the spectrum analyzer. The difference between this power and the output signal power of signal source 1, plus the link loss at the corresponding frequency, constitutes the gain at that frequency.

[0117] (2) RF Channel Transmit Power Test: The host computer controls the frequency of signal source 1 to be set to 2.25 GHz, which is routed to the entrance of the transmit mixing link of the microsystem under test (DUT) through the RF switch matrix. Signal source 1 will automatically calculate the path loss at this frequency according to the parameter file and increase the output power. The frequency of signal source 3 is fixed at 40 GHz, and the frequency of signal source 4 is fixed at 19.75 GHz. At almost the same time, the host computer sends a command to the FPGA inside the DUT through UART. The decoder module written inside the FPGA parses the command and configures the DUT to enter the transmit mixing mode. The output RF signal of the DUT is routed to the spectrum analyzer through the RF switch matrix. The host computer sets the center frequency of the spectrum analyzer to 18 GHz, reads the power of the output RF signal through the marker, calculates the gain (as the "standard gain"), and gradually increases the output power of signal source 1 until the calculated gain is less than 1 dB of the "standard gain". At this time, the signal power read on the spectrum analyzer is the transmit power.

[0118] (3) Instantaneous bandwidth test of RF channel: This test includes two RF transceivers on the microsystem under test (DUT), the receive mixing link of each RF transceiver, and the transmit mixing link. For example, when testing the receive mixing link, signal source 1 will automatically calculate the path loss at this frequency according to the parameter file and increase the output power. The host computer controls signal source 1 to output an RF signal range of 16.8GHz~18GHz, and routes it to the entrance of the receive mixing link of the microsystem under test (DUT) through the RF switch matrix. Signal source 3 is fixed at 39.4GHz, and signal source 4 is fixed at 19.75GHz. At almost the same time, the host computer sends a command to the FPGA inside the microsystem under test (DUT) through UART. The decoder module written inside the FPGA parses the command and configures the microsystem under test (DUT) to enter the receive mixing mode. The DUT's output intermediate frequency signal is routed to the spectrum analyzer via an RF switch matrix. By setting the center frequency of the spectrum analyzer to 2.25 GHz and the bandwidth to be greater than 1.2 GHz via the host computer, a bandwidth with a frequency range of 1.2 GHz can be observed on the spectrum analyzer.

[0119] (4) RF Channel Isolation Test: The host computer controls signal source 1 to output an intermediate frequency signal of 2.25 GHz, which is routed to the transmit mixing link entry of RF transceiver 1 on the microsystem under test (DUT) through an RF switch matrix. The frequency of signal source 3 is fixed at 40 GHz, and the frequency of signal source 4 is fixed at 19.75 GHz. At the same time, the host computer sends a command to the DUT, which configures RF transceiver 1 to enter transmit mixing mode and RF transceiver 2 to enter receive mixing mode. The signal on the receive mixing link of RF transceiver 2 is routed to the spectrum analyzer through the RF switch matrix. The host computer controls the center frequency of the spectrum analyzer to 2.25 GHz, and the power is read by the marker. The power minus the output signal power of signal source 1 is the channel isolation.

[0120] (5) Out-of-band frequency hopping test: The host computer controls signal source 1 to output an intermediate frequency signal of 2.25 GHz and signal source 2 to output an intermediate frequency signal of 2.35 GHz. The signals from signal source 1 and signal source 2 are routed to the signal input of the microsystem under test (DUT) through an RF switch matrix. Only one signal can reach the input at a time, controlled by the RF switch matrix. The frequency of signal source 3 is fixed at 23.8 GHz, and the frequency of signal source 4 is fixed at 19.75 GHz. At the same time, the host computer sends a command to the DUT, and the DUT configures itself to enter out-of-band frequency hopping mode. The host computer controls the spectrum analyzer to enter the frequency hopping measurement mode, measures the time interval between the two frequencies, and calculates the frequency hopping rate per second.

[0121] (6) In-band frequency hopping test: The host computer sends a command to the microsystem under test (DUT), and the DUT configures the internal frequency hopping source of the DAC to perform frequency hopping. At the same time, the DAC output signal is routed to the spectrum analyzer through the RF switch matrix. The host computer controls the spectrum analyzer to enter the frequency hopping measurement mode, measures the frequency hopping time interval, and calculates the frequency hopping rate.

[0122] (7) DAC transmit power test: The host computer sends a command to the microsystem under test (DUT), and the DUT configures the DAC to output signals of different frequencies. The DAC output signal is routed to the spectrum analyzer through the RF switch matrix. At the same time, the host computer controls the center frequency of the spectrum analyzer to be the DAC output signal frequency, and reads the power of the output signal through the marker.

[0123] (8) ADC Signal-to-Noise Ratio Test: The host computer controls signal source 1 to output an analog signal, which is routed through the RF switch matrix to the ADC port of the test fixture and then enters the microsystem under test (DUT). Simultaneously, the host computer sends a command to the DUT, which actively configures itself to enter ADC sampling mode. Subsequently, the host computer uses the Integrated Logic Analyzer (ILA) in Vivado to observe the signal waveform in real time and captures the digital sampled values ​​of the analog signal input from signal source 1 after ADC conversion by calling the TCL script command built into Vivado. All captured sampled data is exported and stored as a CSV file. Finally, the host computer calls MATLAB software to read the CSV file, performs Fast Fourier Transform (FFT) analysis on the data, and calculates the signal-to-noise ratio of the ADC sampled signal.

[0124] (9) Channel synchronization test: Perform three ADC tests on multiple ADC channels. Use the Integrated Logic Analyzer (ILA) in Vivado to view the waveforms and call the tool's TCL script commands to obtain the phase of each sampled signal and calculate the phase difference between each channel. After the three ADC tests are completed, compare the maximum phase difference between multiple channels. If it is less than 10°, it is considered as channel synchronization.

[0125] (10) Device current test: The host computer sends a current test command to the microsystem under test (DUT). After the DUT parses the command, it configures the internal power monitoring chip, reads the static current of the FPGA and integrated processor transmitted back by the sensor, and then transmits it back to the host computer via UART.

[0126] (11) Logic output pin voltage test: The host computer sends a command to the microsystem under test (DUT), and the DUT configures the GPIO pin output to be 0 or 1. The GPIO pin signal is connected to the source measurement unit, and the high-precision characteristics of the source measurement unit are used to measure the voltage value of the GPIO pin in the 0 logic and 1 logic states.

[0127] (12) Logic Output Pin Level Transition Test: The host computer controls the oscilloscope to prepare for testing the rise time or fall time of the logic output pin. Simultaneously, the host computer sends a command to the microsystem under test (DUT), configuring the DUT's GPIO pin output to transition from 0 to 1. This signal is connected to the oscilloscope, allowing the oscilloscope to capture the rise time. Then, the DUT configures its GPIO pin output to transition from 1 to 0, allowing the oscilloscope to measure the fall time.

[0128] (13) Power consumption test: The host computer sends a command to the microsystem under test (DUT), and the DUT is configured to enter the receiving mixing mode with two RF transceivers and configure both channels of the ADC to work. At the same time, the host computer reads the power value displayed on the DC power supply, which is the operating power consumption of the DUT.

[0129] It is worth noting that the automated testing system for integrated microsystems of the present invention has the following advantages:

[0130] (1) The host computer controls not only the external automatic test device through two parallel and independent control paths, but also independently controls the programmable logic unit inside the microsystem under test. This realizes the coordinated control of each device in the automatic test device and the internal logic of the microsystem under test, turning the microsystem under test into an active participant in the test and improving the test coverage.

[0131] (2) The temperature control equipment is used to rapidly change the temperature of the micro system under test, while keeping the test fixture and probe array at a relatively stable temperature. This ensures high mechanical positioning accuracy and high frequency signal integrity under extreme temperatures, thus solving the contradiction between mechanical contact reliability and rapid temperature change in traditional temperature chamber testing.

[0132] (3) The pass / fail determination is carried out during the room temperature test, and the high and low temperature test process is conditionally started only when the micro system under test passes all types of test items under room temperature conditions. This saves the ineffective test time for defective products, improves test efficiency, and solves the problem of the long and wasteful multi-temperature test process.

[0133] In the embodiments of this application, terms such as "first" and "second" are used to distinguish identical or similar items with essentially the same function and effect. For example, the first control instruction and the second control instruction are only used to distinguish different control instructions and do not limit their order. Those skilled in the art will understand that terms such as "first" and "second" do not limit the quantity or execution order, and that terms such as "first" and "second" do not necessarily imply that they are different.

[0134] It should be noted that, in the embodiments of this application, the words "exemplary" or "for example" indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0135] In this application embodiment, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0136] Figure 9 This is a flowchart illustrating an automated testing method for integrated microsystems provided in an embodiment of this application. Figure 9 As shown, the automated testing method is applied to the host computer in the automated testing system. The host computer is communicatively connected to the automated testing device and the microsystem under test. The automated testing method includes:

[0137] S901: In response to a successful self-test signal, under normal temperature conditions, the automatic testing device is controlled to perform different types of tests on the microsystem under test to identify the microsystem under test that is marked as qualified.

[0138] S902: In response to the room temperature performance test pass signal, under heating and cooling conditions, the automatic testing device is controlled to perform different types of tests on the microsystem under test marked as qualified, and a test result report of the microsystem under test is generated.

[0139] In this embodiment, the method of testing different types of test items includes: sending a first control command to the microsystem under test to configure its internal functional chips to enter a working state that matches the different types of test items; and simultaneously sending a second control command to the automatic testing device to control the automatic testing device to perform different types of test items on the microsystem under test after completing parameter configuration.

[0140] It should be understood that the specific process of performing the corresponding methods in each step has been described in detail in the above system embodiments, and will not be repeated here for the sake of brevity.

[0141] It should also be understood that the module division in the embodiments of this application is illustrative and only represents a logical functional division; in actual implementation, there may be other division methods. Furthermore, the functional modules in the various embodiments of this application can be integrated into a single processor, exist as separate physical entities, or be integrated into a single module. The integrated modules described above can be implemented in hardware or as software functional modules.

[0142] According to the method provided in the embodiments of this application, this application also provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the automated testing method for integrated microsystems as described above.

[0143] According to the method provided in the embodiments of this application, this application also provides a computer program product, which includes computer program code. When the computer program code is run on a computer, the computer implements the automated testing method for integrated microsystems as described above.

[0144] As used in this specification, the terms "component," "module," "system," etc., are used to refer to computer-related entities, hardware, firmware, combinations of hardware and software, software, or software in execution. For example, a component can be, but is not limited to, a process running on a processor, a processor, an object, an executable file, an execution thread, a program, and / or a computer. As illustrated, applications running on computing devices and computing devices can both be components. One or more components may reside in a process and / or an execution thread, and components may be located on a single computer and / or distributed among two or more computers. Furthermore, these components can be executed from various computer-readable media on which various data structures are stored. Components can communicate, for example, via local and / or remote processes based on signals having one or more data packets (e.g., data from two components interacting with another component between a local system, a distributed system, and / or a network, such as the Internet interacting with other systems via signals).

[0145] Those skilled in the art will recognize that the various illustrative logical blocks and steps described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this application.

[0146] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0147] In the embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0148] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0149] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0150] In the above embodiments, the functions of each functional unit can be implemented entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. A computer program product includes one or more computer instructions (programs). When the computer program instructions (programs) are loaded and executed on a computer, all or part of the flow or function according to the embodiments of this application is generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. Computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available media can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., high-density digital video discs, DVDs), or semiconductor media (e.g., solid-state disks, SSDs, etc.).

[0151] If a function is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0152] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0153] In summary, this application provides an automated testing system, method, medium, and product for integrated microsystems. Through two parallel and independent control paths, it controls not only the external automated testing device but also the programmable logic unit (PLU) within the microsystem under test (MST). This achieves coordinated control of the various devices within the automated testing device and the internal logic of the MST, transforming the MST into an active participant in the testing process and improving test coverage. Furthermore, it performs pass / fail determination during room temperature testing. Only when the MST passes all types of test items under room temperature conditions is the high / low temperature testing process conditionally initiated. This saves time spent on ineffective testing of defective products, improves testing efficiency, and solves the problems of lengthy and resource-wasting multi-temperature testing processes. Therefore, this application effectively overcomes the various shortcomings of existing technologies and has high industrial applicability.

[0154] The above embodiments are merely illustrative of the principles and effects of this application and are not intended to limit this application. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this application. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this application should still be covered by the claims of this application.

Claims

1. An automated testing system for integrated microsystems, characterized in that, Includes: a host computer and an automatic testing device communicatively connected to the host computer; both the host computer and the automatic testing device are communicatively connected to the microsystem under test; wherein, the host computer is used to perform the following steps: In response to a successful self-test signal, under normal temperature conditions, the automatic testing device is controlled to perform different types of tests on the microsystem under test to identify the microsystem under test that is marked as qualified. In response to the pass signal of the room temperature performance test, under the conditions of temperature rise and fall, the automatic testing device is controlled to perform different types of tests on the microsystem under test marked as qualified, and a test result report of the microsystem under test is generated. The methods for testing different types of items to be tested include: A first control command is sent to the microsystem under test (MSB) to configure its internal functional chips to enter a working state that matches different types of test items. At the same time, a second control command is sent to the automatic testing device to configure the parameters and then control the automatic testing device to perform different types of test items on the MSB.

2. The automated testing system for integrated microsystems according to claim 1, characterized in that, The automatic testing device includes a test source supply device, which is used to provide the microsystem under test with test signals corresponding to different types of test items.

3. The automated testing system for integrated microsystems according to claim 2, characterized in that, The automatic testing device further includes an RF switch matrix and a spectrum analyzer. The RF switch matrix is ​​used to establish a connection path between the test source supply device and the microsystem under test, and to establish a connection path between the microsystem under test and the spectrum analyzer, so as to introduce the test signals provided by the test source supply device corresponding to different types of test items to the corresponding input ports of the microsystem under test, and to introduce the output signals of the corresponding output ports of the microsystem under test to the spectrum analyzer.

4. The automated testing system for integrated microsystems according to claim 1, characterized in that, Sending a first control command to the microsystem under test (MSB) to configure its internal functional chips into operating states that match different types of test items includes the following methods: Based on the type of the current test item, send a first control command to the microsystem under test; The system under test is controlled to parse the first control command to generate multiple control signals; The control system under test sends each of the control signals to its corresponding internal functional chip to configure the functional chip to enter a working state that matches the current test item.

5. The automated testing system for integrated microsystems according to claim 1, characterized in that, Sending a second control command to the automatic testing device to instruct it to complete parameter configuration includes the following methods: In response to the test start signal, the parameter files of each device in the automatic test apparatus are configured and uploaded; Based on the type of the item to be tested, a second control command is sent to the automatic testing device, so that each device in the automatic testing device can configure parameters according to the second control command and the corresponding parameter file.

6. The automated testing system for integrated microsystems according to claim 1, characterized in that, The methods for controlling the automatic testing device to perform different types of tests on the microsystem under test include: In response to the configuration completion signal, the automatic testing device is controlled to provide the microsystem under test with a test signal corresponding to the current test item, so as to perform the test of the current test item; In response to the test completion signal, the test result data of the current test item is obtained from the microsystem under test; The test result data of the current test item is compared with the preset qualified data range, and based on the comparison result, it is determined whether the test of the current test item has passed. If the current test item passes the test, the automatic testing device is controlled to test the next test item of the microsystem under test; If the current test item fails, the microsystem under test is marked as non-conforming, and testing of all subsequent test items is terminated.

7. The automated testing system for integrated microsystems according to claim 1, characterized in that, The automatic testing device further includes a temperature control device; wherein, under heating and cooling conditions, the method of controlling the automatic testing device to perform different types of tests on the microsystem to be tested that is marked as qualified includes: In response to the signal that the room temperature performance test has passed, a third control command is sent to the temperature control device, so that the temperature control device blows a temperature-controlled airflow onto the surface of the microsystem under test marked as qualified, according to the preset temperature values ​​of several temperature test points, so that the temperature of the microsystem under test marked as qualified reaches the preset temperature value. When the temperature of the microsystem under test marked as qualified reaches a preset temperature value, the automatic testing device is controlled to perform different types of tests on the microsystem under test marked as qualified.

8. An automated testing method for integrated microsystems, applied to a host computer in an automated testing system, wherein the host computer is communicatively connected to an automated testing device and the microsystem under test, characterized in that, The automated testing method includes: In response to a successful self-test signal, under normal temperature conditions, the automatic testing device is controlled to perform different types of tests on the microsystem under test to identify the microsystem under test that is marked as qualified. In response to the pass signal of the room temperature performance test, under the conditions of temperature rise and fall, the automatic testing device is controlled to perform different types of tests on the microsystem under test marked as qualified, and a test result report of the microsystem under test is generated. The methods for testing different types of items to be tested include: A first control command is sent to the microsystem under test (MSB) to configure its internal functional chips to enter a working state that matches different types of test items. At the same time, a second control command is sent to the automatic testing device to configure the parameters and then control the automatic testing device to perform different types of test items on the MSB.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the automated testing method for integrated microsystems as described in claim 8.

10. A computer program product, characterized in that, The computer program product includes computer program code that, when run on a computer, enables the computer to implement the automated testing method for integrated microsystems as described in claim 8.

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