Display panel and display device

Abstract

The invention provides a display panel and a display device. The display panel comprises a first electrode layer, a second electrode layer and a plurality of data lines, the first electrode layer comprises a plurality of common electrode blocks, the second electrode layer comprises a plurality of common electrode lines, the first electrode lines extend in the second direction, and the second electrode lines extend in the second direction. One common electrode wire is arranged between every two adjacent common electrode blocks in the first direction, and one common electrode wire covers one data line; the common electrode blocks are electrically connected with the first constant voltage source, the common electrode lines are electrically connected with the second constant voltage source, and when the coupling capacitors between the data lines and the common electrode lines enable the common signals on the common electrode lines to be abnormal, the voltages on the common electrode blocks are not affected by the coupling capacitors, so that the common signals on the common electrode lines are not affected. The stability of the voltage for driving the liquid crystal to deflect is ensured, the technical problem that the brightness of the display panel is disturbed is solved, and the display effect of the display panel is improved.

Description

Technical Field

[0001] This application relates to the field of display technology, and more particularly to a display panel and display device. Background Technology

[0002] Liquid crystal display (LCD) panels are widely used in various electronic devices such as mobile phones, digital cameras, computer screens, or laptop screens.

[0003] In current display panels, abrupt changes in the data signal on the data line can cause abnormalities in the common signal on the common electrode line due to the coupling capacitance between the data line and the common electrode line. This can lead to crosstalk in the brightness of the display panel and result in abnormal display. Summary of the Invention

[0004] This application provides a display panel and display device to improve the technical problem of brightness crosstalk in existing display panels.

[0005] To address the above issues, the technical solution provided in this application is as follows:

[0006] This application discloses a display panel comprising: First substrate; A first electrode layer is disposed on one side of the first substrate, and the first electrode layer includes a plurality of common electrode blocks arranged along a first direction and a second direction. A second electrode layer is disposed on the side of the first electrode layer away from the first substrate. The second electrode layer includes multiple common electrode lines extending along a second direction, and a common electrode line is disposed between two adjacent common electrode blocks in the first direction. Multiple data lines are disposed on one side of the first substrate, and one of the common electrode lines covers one of the data lines; The common electrode block is electrically connected to the first constant voltage source, and the common electrode line is electrically connected to the second constant voltage source.

[0007] Optionally, the display panel further includes: Multiple first electrode lines extend along the first direction and are arranged along the second direction, and the first electrode lines are electrically connected to multiple common electrode blocks arranged along the first direction and have overlapping portions; Multiple second electrode lines extend along the second direction and are arranged along the first direction. A second electrode line is provided between two adjacent common electrode lines, and the second electrode line and the common electrode line are electrically connected. The first electrode line and the second electrode line are arranged in different layers.

[0008] Optionally, the second electrode layer further includes a common extension segment connected to the common electrode line, the common extension segment extending along the first direction; The common extension segment is located between two adjacent common electrode blocks along the second direction, and the common extension segment is electrically connected to the second electrode line.

[0009] Optionally, the display panel includes: The first peripheral bus is located on the periphery of the plurality of common electrode blocks, and both ends of the plurality of first electrode lines in the first direction are electrically connected to the first peripheral bus; The second peripheral bus is located between the first peripheral bus and the plurality of common electrode blocks, and the plurality of second electrode lines and / or the common electrode lines are electrically connected to the second peripheral bus at both ends in the second direction; The display panel is further provided with a first terminal and a second terminal, the first peripheral bus is connected to the first terminal, and the second peripheral bus is connected to the second terminal.

[0010] Optionally, the second electrode layer further includes a plurality of pixel electrode blocks, one pixel electrode block corresponding to one common electrode block, and a common electrode line and a data line are provided between two pixel electrode blocks in the first direction; The common electrode block includes a common overlapping portion that overlaps with the common electrode line, and the width of the common overlapping portion in the first direction is greater than or equal to 0.

[0011] Optionally, the common electrode block is arranged without overlapping with the two adjacent data lines.

[0012] Optionally, the display panel includes: Multiple sub-pixel groups are arranged along the first direction and the second direction. Each sub-pixel group includes two sub-pixels. Each sub-pixel includes a driving device and a pixel electrode electrically connected to the driving device. The two pixel electrodes constitute a pixel electrode block. Multiple scan lines are arranged at intervals along the second direction, with two scan lines between two adjacent rows of the sub-pixel groups; A common electrode line and a data line are provided between two adjacent sub-pixel groups, and a second electrode line is located between two pixel electrodes in the sub-pixel group.

[0013] Optionally, the display panel further includes a plurality of first light-shielding portions and a plurality of second light-shielding portions, wherein in the second direction, the plurality of first light-shielding portions and the plurality of second light-shielding portions are arranged at intervals; and in the first direction, the plurality of first light-shielding portions and the plurality of second light-shielding portions are arranged at intervals. The driving devices are all located within the area of ​​the first light-shielding part, and the area of ​​the first light-shielding part is larger than the area of ​​the second light-shielding part.

[0014] Optionally, the display panel further includes a plurality of support columns, with each support column corresponding to a first light-shielding part.

[0015] Optionally, the polarities of two adjacent data lines are opposite, and the polarities of the two sub-pixels in each sub-pixel group are different.

[0016] This application also proposes a display device that includes the aforementioned display panel.

[0017] Other features and advantages of this application will be described in detail in the following detailed description section. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] To gain a more complete understanding of this application and its beneficial effects, the following description will be provided in conjunction with the accompanying drawings, wherein the same reference numerals in the following description denote the same parts.

[0020] Figure 1 This is a simplified diagram of the first possible structure of the display panel in this application; Figure 2 This is a diagram of the film structure of the display panel in this application; Figure 3 for Figure 1 The first structural diagram of region M; Figure 4 for Figure 1 The second structural diagram of region M; Figure 5 This is a simplified diagram of a second structural design for the display panel of this application; Figure 6 This is a first schematic diagram of a portion of the film layer in the display panel of this application; Figure 7 This is a second schematic diagram of a portion of the film layer in the display panel of this application; Figure 8This is the pattern of the black matrix in the display panel of this application. Detailed Implementation

[0021] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the protection scope of this application.

[0022] Please see Figures 1 to 8 This application provides a display panel 100, which includes a pixel area AA and a non-pixel area NA located on one side of the pixel area AA. The pixel area AA can be an area used to perform display functions, and the non-pixel area NA can be a border area of ​​the display panel 100.

[0023] In this embodiment, the display panel 100 includes a first substrate 111, a first electrode layer 112 disposed on one side of the first substrate 111, a second electrode layer 118 disposed on the side of the first electrode layer 112 away from the first substrate 111, and a plurality of data lines Data disposed on one side of the first substrate 111.

[0024] In this embodiment, the first electrode layer 112 includes a plurality of common electrode blocks CE arranged along the first direction X and the second direction Y; the first electrode line 210 extends along the second direction Y, and a common electrode line 240 is provided between two adjacent common electrode blocks CE in the first direction X, and the common electrode line 240 covers a data line Data.

[0025] In this embodiment, the common electrode block CE is electrically connected to the first constant voltage source, and the common electrode line 240 is electrically connected to the second constant voltage source.

[0026] This application connects the common electrode block CE to a first constant voltage source and the common electrode line 240 to a second constant voltage source. When the coupling capacitance between the data line Data and the common electrode line 240 causes an abnormality in the common signal on the common electrode line 240, the voltage on the common electrode block CE is not affected by the coupling capacitance. This ensures the stability of the voltage driving the liquid crystal deflection, avoids the technical problem of brightness disturbance in the display panel 100, and improves the display effect of the display panel 100.

[0027] In this embodiment, a plurality of sub-pixel groups 10 are provided in the pixel region AA. The plurality of sub-pixel groups 10 are arranged along the first direction X and the second direction Y. Each sub-pixel group 10 includes at least one sub-pixel PL. For example, this application describes the case where each sub-pixel group 10 includes two sub-pixels PL. Each sub-pixel PL includes a driving device and a pixel electrode electrically connected to the driving device. The pixel electrodes in each sub-pixel group 10 are arranged along the first direction X.

[0028] In this embodiment, the pixel area AA is also provided with multiple scan lines Scan, multiple data lines Data, and a common electrode line CM. The multiple scan lines Scan are arranged at intervals along the second direction Y, and two scan lines Scan are provided between two adjacent rows of sub-pixel groups 10. The multiple data lines Data are arranged at intervals along the first direction X, and one data line Data is provided between two adjacent columns of sub-pixel groups 10.

[0029] It should be noted that the scan lines extend along the first direction X, and the data lines extend along the second direction Y. The angle between the first direction X and the second direction Y in this application can be greater than 0 and less than or equal to 90 degrees. For example, the angle between the first direction X and the second direction Y in this application can be 90 degrees.

[0030] It should be noted that the polarities of two adjacent data lines are opposite, and the polarities of the two sub-pixels in each sub-pixel group 10 are different.

[0031] For example in Figure 3 In the structure, the polarities of the two sub-pixels PL in each sub-pixel group 10 are positive and negative, respectively, and the polarity of the data line Data is the same as that of the two adjacent sub-pixels PL. For sub-pixel groups 10 in odd-numbered rows, when the data line Data is positive, the polarity of the sub-pixels PL on both sides of the data line Data is positive, and when the data line Data is negative, the polarity of the sub-pixels PL on both sides of the data line Data is negative; while for sub-pixel groups 10 in even-numbered rows, when the data line Data is positive, the polarity of the sub-pixels PL on both sides of the data line Data is negative, and when the data line Data is negative, the polarity of the sub-pixels PL on both sides of the data line Data is positive.

[0032] Taking the first and third data lines as positive and the second data line as negative as an example.

[0033] Please see Figure 3In the sub-pixel group 10 in the first row and first column, the first sub-pixel 10a connects the third scan line and the first data line Data, and the second sub-pixel 10b connects the second scan line and the second data line Data; in the sub-pixel group 10 in the first row and second column, the first sub-pixel 10a connects the third scan line and the second data line Data, and the second sub-pixel 10b connects the second scan line and the third data line Data; that is, the polarities of the four sub-pixels PL in the first row are positive, negative, negative, and positive, respectively.

[0034] Please see Figure 3 In the sub-pixel group 10 in the second row and first column, the first sub-pixel 10a connects the fifth scan line and the second data line Data, and the second sub-pixel 10b connects the fourth scan line and the first data line Data; in the sub-pixel group 10 in the second row and second column, the first sub-pixel 10a connects the fifth scan line and the third data line Data, and the second sub-pixel 10b connects the fourth scan line and the second data line Data; that is, the polarities of the four sub-pixels PL in the second row are negative, positive, positive, and negative, respectively.

[0035] It should be noted that the connection methods of the data line Data and sub-pixels PL in the above embodiments of this application are merely examples. For instance, in two adjacent sub-pixel groups 10, the sub-pixels PL closer to the data line Data are both connected to the same data line Data; or in two adjacent sub-pixel groups 10, the sub-pixels PL farther from the data line Data are both connected to the same data line Data; or, in two adjacent sub-pixel groups 10, the sub-pixels PL closer to the data line Data in one sub-pixel group 10 and the sub-pixels PL farther from the data line Data in another sub-pixel group 10 are both connected to the same data line Data.

[0036] Please see Figure 2 , Figure 2 This is a film layer structure diagram of the display panel 100 of this application. The display panel 100 includes a first substrate 110, a second substrate 120 disposed opposite to the first substrate 110, and a liquid crystal layer LC located between the first substrate 110 and the second substrate 120. The first substrate 110 can be an array substrate, and the second substrate 120 can be a color filter substrate.

[0037] Please see Figure 2The first substrate 110 may include a first substrate 111 and an array layer located on the first substrate 111. The array layer may include multiple thin-film transistors. The thin-film transistors may be etch-block type, back-channel etch type, or classified into bottom-gate thin-film transistors, top-gate thin-film transistors, etc., according to the position of the gate and the active layer 115. The following description of the display panel film layer structure of this application takes a high transmission fringe field switching (HFS) type display product as an example.

[0038] Please see Figure 2 The first substrate 110 may include a first electrode layer 112 on the first substrate 111, a gate layer 113 on the first electrode layer 112, an inter-insulating layer 114 on the gate layer 113, an active layer 115 on the inter-insulating layer 114, a source-drain layer 116 on the active layer 115, a passivation layer 117 on the source-drain layer 116, and a second electrode layer 118 on the passivation layer 117.

[0039] In this embodiment, both the first electrode layer 112 and the second electrode layer 118 can be made of transparent conductive materials.

[0040] exist Figure 2 In the structure, the second electrode layer 118 is a pixel electrode layer, and the first electrode layer 112 is a common electrode layer, i.e. Figure 2 The pixel electrode layer is on the top layer, and the common electrode layer is on the bottom layer.

[0041] Please see Figure 2 The second substrate 120 may include a second substrate 121, a color filter layer 122 located on the second substrate 121, and a planarization layer 123 located on the color filter layer 122. The color filter layer 122 includes a plurality of spaced color resist units and a black matrix BM disposed between two adjacent color resist units. The black matrix BM may be in the form of a mesh structure.

[0042] Please see Figure 2 The display panel 100 also includes a support post 130 disposed between the first substrate 110 and the second substrate 120, the support post 130 corresponding to the area where the black matrix BM and the thin film transistor are located.

[0043] Please see Figure 2The display panel 100 also includes a second polarizer POL2 and a first polarizer POL1. The second polarizer POL2 is disposed on the surface of the second substrate 120 away from the first substrate 110, and the first polarizer POL1 is disposed on the surface of the first substrate 110 away from the second substrate 120. That is, the second polarizer POL2 is disposed on the surface of the second substrate 121 away from the first substrate 110, and the first polarizer POL1 is disposed on the surface of the first substrate 111 away from the second substrate 120.

[0044] It should be noted that, Figure 2 The film layer structure of the display panel 100 is merely an example of this application, and the film layer structure of this application is not limited to... Figure 2 The structure.

[0045] It should be noted that the driving device can be a thin-film transistor.

[0046] The technical solution of this application will now be described in conjunction with specific embodiments.

[0047] Please see Figure 3 Each subpixel group 10 includes a first subpixel 10a and a second subpixel 10b. The first subpixel 10a includes a first driving device and a first pixel electrode PE1 electrically connected to the first driving device. The second subpixel 10b includes a second driving device and a second pixel electrode PE2 electrically connected to the second driving device.

[0048] Please see Figure 3 and Figure 4 The first electrode layer 112 includes a plurality of common electrode blocks CE, and one common electrode block CE corresponds to one of the sub-pixel groups 10; since the sub-pixel group 10 is provided with two sub-pixels PL, the common electrode block CE of this application can be two common sub-blocks arranged at intervals, or continuous common sub-blocks, and one common sub-block corresponds to one pixel electrode.

[0049] Please see Figure 3 and Figure 4 The second electrode layer 118 further includes a plurality of pixel electrode blocks PE, one pixel electrode block PE corresponds to one common electrode block CE, that is, two pixel electrodes constitute one pixel electrode block PE.

[0050] Please see Figure 3 and Figure 4A common electrode line 240 and a data line Data are provided between the two pixel electrode blocks PE in the first direction X. The orthogonal projection of the data line Data on the first substrate 111 is located within the orthogonal projection of the common electrode line 240 on the first substrate 111. That is, the common electrode line 240 completely covers the data line Data to shield the coupling capacitance between the data line Data and the pixel electrode.

[0051] Please see Figure 3 and Figure 4 The display panel 100 further includes multiple first electrode lines 210 and multiple second electrode lines 220. The multiple first electrode lines 210 extend along the first direction X and are arranged along the second direction Y. The first electrode lines 210 are electrically connected to the multiple common electrode blocks CE arranged along the first direction X and have overlapping portions. The multiple second electrode lines 220 extend along the second direction Y and are arranged along the first direction X. A second electrode line 220 is provided between two adjacent common electrode lines 240, and the second electrode line 220 and the common electrode line 240 are electrically connected.

[0052] exist Figure 3 In this configuration, a common electrode line 240 and a data line Data are provided between two adjacent sub-pixel groups 10, and a second electrode line 220 is located between two pixel electrodes in the sub-pixel group 10.

[0053] In this embodiment, the first electrode line 210 and the second electrode line 220 are disposed in different layers; for example, the gate layer 113 of this application includes multiple first electrode lines 210, and the source-drain layer 116 includes multiple second electrode lines 220, that is, the common electrode block CE, the first electrode line 210, the second electrode line 220 and the common electrode line 240 of this application are all disposed in different layers.

[0054] Meanwhile, since the display panel 100 of this application is a DLS architecture, there is no need to set a data line Data between two sub-pixels PL in the sub-pixel group 10. Therefore, this application can set the second electrode line 220 between two pixel electrodes in a sub-pixel group 10 without occupying the opening space of the sub-pixel PL. While maintaining the stability of the display panel 100, the aperture ratio of the display panel 100 is improved.

[0055] This application utilizes the material of the gate layer 113 to fabricate the first electrode line 210 and the material of the source / drain layer 116 to fabricate the second electrode line 220. Simultaneously, the voltage on the first electrode line 210 originates from a first constant voltage source, and the voltage on the second electrode line 220 originates from a second constant voltage source. When the coupling capacitance between the data line (Data) and the common electrode line 240 causes an abnormality in the common signal on the common electrode line 240, the voltage on the common electrode block (CE) is not affected by this coupling capacitance. This ensures the stability of the voltage driving the liquid crystal deflection, avoids the technical problem of brightness disturbance in the display panel 100, and improves the display effect of the display panel 100.

[0056] Please see Figure 4 The second electrode layer 118 further includes a common extension segment 230 connected to the common electrode line 240, the common extension segment 230 extending along the first direction X; the common extension segment 230 is disposed between two adjacent common electrode blocks CE along the second direction Y, and the common extension segment 230 and the second electrode line 220 are electrically connected.

[0057] To further reduce the voltage drop across the second electrode line 220 and the common electrode line 240, this application can utilize the second electrode layer 118 to provide the common extension section 230, so that the second electrode line 220 and the common electrode line 240 are connected in parallel, thereby reducing the impedance across the second electrode line 220 and the common electrode line 240, and thus reducing the voltage drop across the second electrode line 220 and the common electrode line 240, ensuring the stability of the transmitted second constant voltage source.

[0058] In this embodiment, the present application may provide a plurality of the common extension segments 230 to increase the connection points of the second electrode line 220 and the common electrode line 240.

[0059] In this embodiment, where space permits, the common extension section 230 can electrically connect two adjacent common electrode lines 240, so that multiple second electrode lines 220 and multiple common electrode lines 240 form a crisscrossing mesh structure through the common extension section 230.

[0060] Please see Figure 5 The display panel 100 may further include a first peripheral bus BL1, which is located around the plurality of common electrode blocks CE. Both ends of the plurality of first electrode lines 210 in the first direction X are electrically connected to the first peripheral bus BL1.

[0061] In this embodiment, the non-display area NA of the display panel 100 is provided with a plurality of first terminals PD1. One end of the first peripheral bus BL1 is electrically connected to one of the first terminals PD1, and the other end of the first peripheral bus BL1 is electrically connected to another first terminal PD1. That is, the two first terminals PD1 and the first peripheral bus BL1 form a loop, and the first constant voltage source is transmitted to the first peripheral bus BL1 through the two first terminals PD1.

[0062] Meanwhile, both ends of the multiple first electrode lines 210 extending along the first direction X are electrically connected to the first peripheral bus BL1, so that the multiple first electrode lines 210 and the multiple common electrode blocks CE all receive the same voltage, thereby reducing the impedance of the first peripheral bus BL1 and the multiple first electrode lines 210, reducing the voltage drop on the aforementioned wires, and ensuring the stability of the transmitted second constant voltage source.

[0063] Please see Figure 5 The display panel 100 may further include a second peripheral bus BL2, which is located between the first peripheral bus BL1 and the plurality of common electrode blocks CE. Meanwhile, the non-display area NA of the display panel 100 is provided with a plurality of second terminals PD2. One end of the second peripheral bus BL2 is electrically connected to one second terminal PD2, and the other end of the second peripheral bus BL2 is electrically connected to another second terminal PD2. That is, the two second terminals PD2 and the second peripheral bus BL2 form a loop, and the second constant voltage source is transmitted to the second peripheral bus BL2 through the two second terminals PD2.

[0064] Please see Figure 5 The first terminal PD1 and the second terminal PD2 located on one side of the non-display area NA are both electrically connected to one of the flexible circuit boards, and the other first terminal PD1 and the other second terminal PD2 located on the other side of the non-display area NA are both electrically connected to another flexible circuit board.

[0065] In this embodiment, both ends of the plurality of second electrode lines 220 in the second direction Y are electrically connected to the second peripheral bus BL2; or, both ends of the plurality of common electrode lines 240 in the second direction Y are electrically connected to the second peripheral bus BL2; or, both ends of the plurality of second electrode lines 220 and the plurality of common electrode lines 240 in the second direction Y are electrically connected to the second peripheral bus BL2.

[0066] In other words, at least one of the second electrode line 220 and the common electrode line 240 can be electrically connected to the second peripheral bus BL2, which is equivalent to at least one of the second electrode line 220 and the common electrode line 240 being connected in parallel with the second peripheral bus BL2. This reduces the impedance of the second electrode line 220, the common electrode line 240 and the second peripheral bus BL2, reduces the voltage drop on the aforementioned wires, and ensures the stability of the transmitted second constant voltage source.

[0067] Please see Figure 6 and Figure 7 The common electrode block CE includes a common overlapping portion CEb that overlaps with the common electrode line 240, and the width of the common overlapping portion CEb in the first direction X is greater than or equal to 0.

[0068] For example, in Figure 6 In the structure, the boundary of the common electrode block CE is flush with the boundary of the common electrode line 240, that is, the width of the common overlapping portion CEb in the first direction X is equal to 0; Figure 7 In the structure, the end of the common electrode block CE near the common electrode line 240 overlaps with the end of the common electrode line 240 near the common electrode block CE, that is, the width of the common overlapping part CEb in the first direction X is greater than 0.

[0069] In this embodiment, since there is a coupling capacitance between the data line Data and the pixel electrode, the potential on the pixel electrode will be disturbed when the signal on the data line Data changes. This application provides a common electrode line 240 and a common electrode block CE on the upper and lower sides of the data line Data in the longitudinal direction, respectively. The sandwich structure formed by the common electrode line 240 and the common electrode block CE shields the capacitance formed by the data line Data, thereby reducing the coupling electric field between the data line Data and the pixel electrode, ensuring the stability of the potential on the pixel electrode, and improving the display effect of the display panel 100. At the same time, the width of the common overlapping part CEb in the first direction X is equal to 0, which can reduce the distance between the pixel electrode and the data line Data in the first direction X, increase the area of ​​the pixel electrode, and improve the aperture ratio of the sub-pixel PL.

[0070] In this embodiment, when the common electrode block CE and the data line Data overlap, the coupling capacitance between the common electrode block CE and the data line Data increases, causing abnormalities in the common signal on the common electrode block CE, resulting in crosstalk in the brightness of the display panel 100 and causing abnormal display of the display panel 100. Therefore, this application sets the common electrode block CE to be non-overlapping with the two adjacent data lines Data, reducing the coupling capacitance between the common electrode block CE and the data line Data, and ensuring the stability of the voltage on the common electrode block CE.

[0071] Please see Figure 3 In two adjacent sub-pixel groups 10 in the second direction Y, a first driving device in one sub-pixel group 10 and a second driving device in the other sub-pixel group 10 are disposed between two adjacent first sub-pixel 10a electrodes; or, in two adjacent sub-pixel groups 10 in the second direction Y, a second driving device in one sub-pixel group 10 and a first driving device in the other sub-pixel group 10 are disposed between two adjacent second sub-pixel 10b electrodes.

[0072] That is, the first driving device in the sub-pixel group 10 of the first row and the first column and the second driving device in the sub-pixel group 10 of the second row and the first column can both be located between the two first sub-pixel 10a electrodes in the two adjacent sub-pixel groups 10 of the first row and the first column and the second row and the first column; the first driving device in the sub-pixel group 10 of the second row and the first column and the second driving device in the sub-pixel group 10 of the third row and the second column can both be located between the two second sub-pixel 10b electrodes in the two adjacent sub-pixel groups 10 of the second row and the first column and the first column of the third row and the first column, and so on.

[0073] Please see Figure 8 The display panel 100 further includes a plurality of first light-shielding parts BM1 and a plurality of second light-shielding parts BM2. In the second direction Y, the plurality of first light-shielding parts BM1 and the plurality of second light-shielding parts BM2 are arranged at intervals; in the first direction X, the plurality of first light-shielding parts BM1 and the plurality of second light-shielding parts BM2 are arranged at intervals. In this embodiment, all the driving devices are located in the area where the first light-shielding part BM1 is located, and the area of ​​the first light-shielding part BM1 is larger than the area of ​​the second light-shielding part BM2; for example, the first driving device and the second driving device disposed between two adjacent sub-pixel groups 10 in the second direction Y are both disposed in the area where the corresponding first light-shielding part BM1 is located, and no corresponding driving device is disposed in the area where the second light-shielding part BM2 is located.

[0074] In other words, this application converges two driving devices between two first pixel electrodes PE1 or two second pixel electrodes PE2 in the second direction Y, and uses the first light-shielding part BM1 to block the two driving devices, so that the area where the driving devices were originally set can be set with pixel electrodes, thereby increasing the area of ​​the pixel electrodes and improving the aperture ratio of the display panel 100.

[0075] Please see Figure 3 The display panel 100 also includes a plurality of support columns 130, one of which is located within a first light-shielding portion BM1, and the plurality of support columns 130 are staggered in the first direction X and the second direction Y.

[0076] This application also proposes a display device, which includes a terminal body and the aforementioned display panel, wherein the terminal body and the display panel are integrated into one unit. The terminal body may include components such as a circuit board bonded to the display panel, and a cover plate disposed on the display panel. Mobile terminals may include electronic devices such as vehicle-mounted screens, mobile phones, televisions, and laptops.

[0077] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0078] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0079] The embodiments, implementation methods, and related technical features of this application can be combined and substituted for each other without conflict.

[0080] The above are merely preferred embodiments of this application and are not intended to limit this application in any way. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of this application without departing from the scope of the technical solution of this application shall still fall within the scope of the technical solution of this application.

Claims

1. A display panel, characterized in that, include: First substrate; A first electrode layer is disposed on one side of the first substrate, and the first electrode layer includes a plurality of common electrode blocks arranged along a first direction and a second direction. A second electrode layer is disposed on the side of the first electrode layer away from the first substrate. The second electrode layer includes multiple common electrode lines extending along a second direction, and a common electrode line is disposed between two adjacent common electrode blocks in the first direction. Multiple data lines are disposed on one side of the first substrate, and one of the common electrode lines covers one of the data lines; The common electrode block is electrically connected to the first constant voltage source, and the common electrode line is electrically connected to the second constant voltage source.

2. The display panel as described in claim 1, characterized in that, The display panel also includes: Multiple first electrode lines extend along the first direction and are arranged along the second direction, and the first electrode lines are electrically connected to multiple common electrode blocks arranged along the first direction and have overlapping portions; Multiple second electrode lines extend along the second direction and are arranged along the first direction. A second electrode line is provided between two adjacent common electrode lines, and the second electrode line and the common electrode line are electrically connected. The first electrode line and the second electrode line are arranged in different layers.

3. The display panel as described in claim 2, characterized in that, The second electrode layer further includes a common extension segment connected to the common electrode line, the common extension segment extending along the first direction; The common extension segment is located between two adjacent common electrode blocks along the second direction, and the common extension segment is electrically connected to the second electrode line.

4. The display panel as described in claim 2, characterized in that, The display panel includes: The first peripheral bus is located on the periphery of the plurality of common electrode blocks, and both ends of the plurality of first electrode lines in the first direction are electrically connected to the first peripheral bus; The second peripheral bus is located between the first peripheral bus and the plurality of common electrode blocks, and the plurality of second electrode lines and / or the common electrode lines are electrically connected to the second peripheral bus at both ends in the second direction; The display panel is further provided with a first terminal and a second terminal, the first peripheral bus is connected to the first terminal, and the second peripheral bus is connected to the second terminal.

5. The display panel as described in any one of claims 2 to 4, characterized in that, The second electrode layer further includes a plurality of pixel electrode blocks, one pixel electrode block corresponding to one common electrode block, and a common electrode line and a data line are provided between two pixel electrode blocks in the first direction; The common electrode block includes a common overlapping portion that overlaps with the common electrode line, and the width of the common overlapping portion in the first direction is greater than or equal to 0.

6. The display panel as described in claim 5, characterized in that, The common electrode block is arranged without overlapping with the two adjacent data lines.

7. The display panel as described in claim 5, characterized in that, The display panel includes: Multiple sub-pixel groups are arranged along the first direction and the second direction. Each sub-pixel group includes two sub-pixels. Each sub-pixel includes a driving device and a pixel electrode electrically connected to the driving device. The two pixel electrodes constitute a pixel electrode block. Multiple scan lines are arranged at intervals along the second direction, with two scan lines between two adjacent rows of the sub-pixel groups; A common electrode line and a data line are provided between two adjacent sub-pixel groups, and a second electrode line is located between two pixel electrodes in the sub-pixel group.

8. The display panel as described in claim 7, characterized in that, The display panel further includes a plurality of first light-shielding portions and a plurality of second light-shielding portions. In the second direction, the plurality of first light-shielding portions and the plurality of second light-shielding portions are arranged at intervals; in the first direction, the plurality of first light-shielding portions and the plurality of second light-shielding portions are arranged at intervals. The driving devices are all located within the area of ​​the first light-shielding part, and the area of ​​the first light-shielding part is larger than the area of ​​the second light-shielding part.

9. The display panel as described in claim 8, characterized in that, The display panel also includes a plurality of support columns, with each support column corresponding to a first light-shielding part.

10. The display panel as claimed in claim 7, characterized in that, The polarities of two adjacent data lines are opposite, and the polarities of the two sub-pixels in each sub-pixel group are different.

11. A display device, characterized in that, The display device includes a display panel as described in any one of claims 1 to 10.

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