A soft-switching DC-AC converter based on single-module four-tube Buck-Boost and a control circuit thereof

Abstract

The application discloses a kind of soft switching DC-AC converters and control circuit based on single module four-tube Buck-Boost, belong to power converter technical field, including first switch tube, second switch tube, third switch tube, fourth switch tube, first resistance, first inductance, first capacitor, the first end of first switch tube is connected with the first end of first resistance, the second end of first switch tube is connected with the first end of second switch tube and the first end of first inductance, the second end of second switch tube is connected with the second end of fourth switch tube and the second end of first capacitor, the second end of first resistance is connected with the first end of third switch tube and the first end of first capacitor, the second end of third switch tube is connected with the second end of first inductance and the first end of fourth switch tube, the voltage of both ends of first resistance is output voltage.The application can realize zero voltage switching of all switch tubes under constant switching frequency, can reduce loss, improve economic benefit.

Description

Technical Field

[0001] This invention relates to the field of power converter technology, and in particular to a soft-switching DC-AC converter and control circuit based on a single-module four-transistor Buck-Boost converter. Background Technology

[0002] DC-AC converters have wide applications in new energy power generation units, motor drives, and portable energy storage power supplies. With the continuous development of wide-bandgap semiconductor devices, power converters can achieve higher switching frequencies to realize higher power densities. Based on this, implementing soft switching of the switching transistors can reduce switching losses and thus improve the overall efficiency of the converter. The main methods for implementing soft switching of DC-AC converter switching transistors are resonant and critical conduction modes. The resonant DC-link DC-AC converter is a typical resonant soft-switching DC-AC converter topology. It incorporates a resonant network composed of a resonant inductor and a resonant capacitor, causing the DC bus voltage to periodically return to zero, thus creating zero-voltage switching conditions for the switching transistors. However, its switching transistor voltage stress is greater than twice the DC-side voltage, and the resonant inductor losses are relatively large. Simultaneously, the resonant DC-link DC-AC converter uses discrete pulse modulation, resulting in larger output current harmonics at the same switching frequency. Critical conduction mode creates conditions for soft switching of the switching transistors by increasing the inductor current ripple to zero or over-negative values, but its switching frequency variation range is large, which is detrimental to electromagnetic compatibility design.

[0003] The four-transistor Buck-Boost converter offers advantages such as step-up / step-down capability, low switching voltage stress, and positive output voltage. Furthermore, its symmetrical circuit topology inherently provides bidirectional power flow capability. Employing pulse-width modulation (PWM) combined with phase-shift control, it achieves zero-voltage switching for all transistors at a constant switching frequency. By modulating its output voltage into a DC-biased sine wave, it can be applied to the design of DC-AC converters. Summary of the Invention

[0004] The present invention aims to provide a soft-switching DC-AC converter and control circuit based on a single-module four-transistor Buck-Boost converter.

[0005] To achieve the above objectives, the technical solution of the present invention is as follows:

[0006] A soft-switching DC-AC converter based on a single-module four-transistor Buck-Boost converter includes a first switching transistor, a second switching transistor, a third switching transistor, a fourth switching transistor, a first resistor, a first inductor, and a first capacitor. The first terminal of the first switching transistor is connected to the positive terminal of the input voltage and the first terminal of the first resistor. The second terminal of the first switching transistor is connected to the first terminal of the second switching transistor and the first terminal of the first inductor. The second terminal of the second switching transistor is connected to the negative terminal of the input voltage, the second terminal of the fourth switching transistor, and the second terminal of the first capacitor. The second terminal of the first resistor is connected to the first terminal of the third switching transistor and the first terminal of the first capacitor. The second terminal of the third switching transistor is connected to the second terminal of the first inductor and the first terminal of the fourth switching transistor. The voltage across the first resistor is the output voltage.

[0007] Furthermore, when operating in pseudo-discontinuous mode, the first and fourth switching transistors are turned on during the 0-t1 time period, and the inductor current increases linearly.

[0008] At time t1, the fourth switch is turned off and the third switch is turned on.

[0009] During the time period t1-t2, the first and third switching transistors are turned on. When the input voltage is greater than the output voltage, the inductor current increases, and when the input voltage is lower than the output voltage, the inductor current decreases.

[0010] At time t2, the first switch is turned off;

[0011] During the time period t2-t3, the second and third switching transistors are turned on, and the inductor current decreases linearly.

[0012] At time t3, when the inductor current reaches -I ZVS The third switch is turned off, and the fourth switch is turned on.

[0013] During the time period t3-t4, the second and fourth switching transistors are turned on simultaneously, and the inductor current remains unchanged.

[0014] Furthermore, when operating in pseudo-critical conduction mode, the first and fourth switching transistors are turned on during the 0-t1 time period, and the inductor current increases linearly.

[0015] At time t1, the fourth switch is turned off and the third switch is turned on.

[0016] During the time period t1-t2, the first and third switching transistors are turned on. When the input voltage is greater than the output voltage, the inductor current increases, and when the input voltage is lower than the output voltage, the inductor current decreases.

[0017] At time t2, the first switch is turned off;

[0018] During the time period t2-t3, the second and third switching transistors are turned on, and the inductor current decreases linearly.

[0019] At time t3, when the inductor current reaches -I ZVS The third switch is turned off, and the fourth switch is turned on.

[0020] During the time period t3-t4, the first and fourth switching transistors are turned on, and the inductor current increases linearly.

[0021] Furthermore, it also includes a second capacitor and a third capacitor. The first terminal of the second capacitor is connected to the positive terminal of the input voltage and the first terminal of the first switching transistor. The second terminal of the second capacitor is connected to the first terminal of the first resistor and the first terminal of the third capacitor. The second terminal of the third capacitor is connected to the negative terminal of the input voltage and the second terminal of the second switching transistor.

[0022] A soft-switching DC-AC converter control circuit based on a single-module four-transistor Buck-Boost converter includes a voltage regulation module, a commutation trigger module, a phase-shifting clock signal generation module, and a peak / valley current control module.

[0023] Furthermore, the voltage regulation module includes multiple resistors, multiple transistors, multiple operational amplifiers, multiple capacitors, multiple switches, a comparator, and a trigger. The second end of the second resistor is connected to the first end of the first operational amplifier and the first end of the fourth resistor. The second end of the third resistor is connected to the first end of the eighth capacitor. The second end of the eighth capacitor is connected to the third end of the first operational amplifier and the first end of the first switch. The second end of the third resistor is connected to the first end of the first transistor and the second end of the first operational amplifier. The second end of the first transistor is grounded. The second end of the fifth resistor is connected to the first end of the second operational amplifier and the first end of the seventh resistor. The second end of the seventh resistor is connected to the first end of the ninth capacitor. The second end of the ninth capacitor is connected to the third end of the second operational amplifier and the second end of the first switch. The second end of the sixth resistor is connected to the second end of the second transistor and the second end of the second operational amplifier. The first end of the second transistor is grounded. The third end of the first switch is connected to the second end of the first comparator. The third end of the first comparator is connected to the first end of the first trigger. The third end of the first trigger is connected to the third end of the second switch. The fourth end of the first trigger is connected to the third end of the third switch.

[0024] Furthermore, the commutation trigger module includes multiple comparators, multiple resistors, multiple capacitors, multiple logic gates, and a flip-flop. The third terminal of the second comparator is connected to the first terminal of the eighth resistor and the first terminal of the first AND gate. The second terminal of the eighth resistor is connected to the first terminal of the tenth capacitor and the first terminal of the first inverter. The second terminal of the tenth capacitor is grounded. The second terminal of the first inverter is connected to the second terminal of the first AND gate. The third terminal of the first AND gate is connected to the first terminal of the third AND gate. The second terminal of the third AND gate is connected to the first terminal of the fourth AND gate. The third terminal of the third AND gate is connected to the first terminal of the second flip-flop. The third terminal of the third comparator is connected to the first terminal of the ninth resistor and the first terminal of the second AND gate. The second terminal of the ninth resistor is connected to the first terminal of the eleventh capacitor and the first terminal of the second inverter. The second terminal of the eleventh capacitor is grounded. The second terminal of the second inverter is connected to the second terminal of the second AND gate. The third terminal of the second AND gate is connected to the second terminal of the fourth AND gate. The third terminal of the fourth AND gate is connected to the second terminal of the second flip-flop.

[0025] Furthermore, the phase-shift clock signal generation module includes multiple resistors, multiple switches, multiple operational amplifiers, multiple diodes, a multiplier / divider, a comparator, and multiple logic gates. The third terminal of the fourth switch is connected to the first terminal of the tenth resistor. The second terminal of the tenth resistor is connected to the first terminal of the third operational amplifier and the first terminal of the thirteenth resistor. The first terminal of the eleventh resistor is grounded. The second terminal of the eleventh resistor is connected to the first terminal of the twelfth resistor. The second terminal of the twelfth resistor is connected to the third terminal of the fifth switch and the third terminal of the first multiplier / divider. The second terminal of the thirteenth resistor is connected to the third terminal of the third operational amplifier and the first terminal of the fourteenth resistor. The second terminal of the fourteenth resistor is connected to the cathode of the first diode and the second terminal of the first multiplier / divider. The anode of the first diode is grounded. The first terminal of the first multiplier / divider is connected to the second terminal of the first comparator in the voltage regulation module. The fourth terminal of the first multiplier / divider is connected to the first terminal of the sixteenth resistor. The second terminal of the sixteenth resistor is connected to the second terminal of the seventeenth resistor and the fourth operational amplifier. The second terminal of the fifteenth resistor is grounded. The second terminal of the fifteenth resistor is connected to the first terminal of the fourth operational amplifier and the first terminal of the eighteenth resistor. The second terminal of the eighteenth resistor is connected to the third terminal of the fourth operational amplifier and the anode of the second diode. The second terminal of the nineteenth resistor is connected to the first terminal of the fifth operational amplifier and the first terminal of the twenty-third resistor. The second terminal of the twenty-third resistor is connected to the third terminal of the fifth operational amplifier and the anode of the third diode. The first terminal of the twentieth resistor is grounded. The second terminal of the twentieth resistor is connected to the second terminals of the twenty-first resistor, the twenty-second resistor, and the fifth operational amplifier. The cathode of the second diode is connected to the cathode of the third diode and the first terminal of the fourth comparator. The third terminal of the fourth comparator is connected to the first terminal of the third inverter and the first terminal of the twenty-fourth resistor. The second terminal of the twenty-fourth resistor is connected to the first terminal of the twelfth capacitor and the second terminal of the fifth AND gate. The second terminal of the twelfth capacitor is grounded. The second terminal of the third inverter is connected to the first terminal of the fifth AND gate.

[0026] Furthermore, the peak / valley current control module includes multiple comparators, a logic gate, a flip-flop, and multiple switches. The third terminal of the fifth comparator is connected to the first terminal of the sixth switch, the third terminal of the sixth comparator is connected to the second terminal of the sixth switch, the third terminal of the sixth switch is connected to the second terminal of the first OR gate, the third terminal of the first OR gate is connected to the first terminal of the third flip-flop, the third terminal of the third flip-flop is connected to the third terminal of the seventh switch, and the fourth terminal of the third flip-flop is connected to the third terminal of the eighth switch.

[0027] Furthermore, the first transistor is a PNP transistor, the second transistor is an NPN transistor, the first terminal of each transistor is its emitter, the second terminal of each transistor is its collector, and the third terminal of each transistor is its base.

[0028] Beneficial effects: This invention provides a soft-switching DC-AC converter based on a single-module four-transistor Buck-Boost converter by superimposing a DC voltage component. This achieves effective AC voltage output. Without adding a resonant circuit, zero-voltage switching of all switching transistors can be achieved at a constant switching frequency. Furthermore, compared to a dual-path four-transistor Buck-Boost differential output zero-voltage switching inverter, eliminating one four-transistor Buck-Boost transistor further reduces losses and improves economic efficiency.

[0029] To make the above-mentioned features and advantages of the invention more apparent and understandable, specific embodiments are described below, and detailed descriptions are provided in conjunction with the accompanying drawings. Attached Figure Description

[0030] Figure 1 This is a circuit topology diagram of a first specific embodiment of a soft-switching DC-AC converter based on a single-module four-transistor Buck-Boost converter according to the present invention.

[0031] Figure 2 This is the output waveform diagram of the first specific embodiment of the present invention.

[0032] Figure 3 This is a waveform diagram of the working state in the pseudo-discontinuous mode (PDCM) of the first specific embodiment of the present invention.

[0033] Figure 4 This is a waveform diagram of the pseudo-critical conduction mode (PCRM) in the first specific embodiment of the present invention.

[0034] Figure 5 This is a circuit topology diagram of a second specific embodiment of a soft-switching DC-AC converter based on a single-module four-transistor Buck-Boost converter according to the present invention.

[0035] Figure 6 This is a schematic diagram of a soft-switching DC-AC converter control circuit based on a single-module four-transistor Buck-Boost converter according to the present invention. Detailed Implementation

[0036] To make the objectives and technical solutions of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0037] Figure 1This is a circuit topology diagram of a first specific embodiment of a soft-switching DC-AC converter based on a single-module four-transistor Buck-Boost converter according to the present invention. Figure 1 As shown, a soft-switching DC-AC converter based on a single-module four-transistor Buck-Boost converter includes: switching transistors Q1, Q2, Q3, and Q4, and resistor R. Ld Inductor L c Capacitor C f The first terminal of the switching transistor Q1 is connected to the input voltage. V in The positive terminal and resistor R Ld The first terminal of the switching transistor Q1 is connected to the second terminal of the switching transistor Q2 and the inductor L. c The first terminal and the second terminal of the switching transistor Q2 are connected to the input voltage. V in The negative terminal, the second terminal of the switching transistor Q4, and the capacitor C f The second terminal, resistor R Ld The second terminal is connected to the first terminal of the switching transistor Q3 and the capacitor C. f The first terminal of the switching transistor Q3 is connected to the inductor L. c The second terminal and the first terminal of the switching transistor Q4, resistor R Ld The voltage across the two ends is the output voltage. V o .

[0038] Furthermore, diode D1 is the parasitic diode of switching transistor Q1, and capacitor C1 is the parasitic capacitance of switching transistor Q1.

[0039] Furthermore, diode D2 is the parasitic diode of switching transistor Q2, and capacitor C2 is the parasitic capacitance of switching transistor Q2.

[0040] Furthermore, diode D3 is the parasitic diode of switching transistor Q3, and capacitor C3 is the parasitic capacitance of switching transistor Q3.

[0041] Furthermore, diode D4 is the parasitic diode of switching transistor Q4, and capacitor C4 is the parasitic capacitance of switching transistor Q4.

[0042] Furthermore, the switching transistors Q1, Q2, Q3, and Q4 are MOSFETs, with the first terminal of the switching transistor being the drain of the MOSFET and the second terminal being the source of the MOSFET.

[0043] Furthermore, switch Q1 and switch Q2 form the first bridge arm; switch Q3 and switch Q4 form the second bridge arm.

[0044] Furthermore, the resistance R Ld It is the load resistor, and its function is to consume the electrical energy output by the converter.

[0045] Furthermore, capacitor C f This is an output filter capacitor, whose function is to filter out ripple in the output voltage, stabilize the output waveform, and ensure the quality of AC output.

[0046] The following will continue the introduction. Figure 1 The working principle of the circuit. Since a single four-transistor Buck-Boost converter cannot output negative voltage, a DC voltage component must be superimposed on the AC voltage. This ensures that the output voltage value remains constantly positive, where, The converter's output waveform is as follows: Figure 2 As shown, where, The output voltage of the sine bridge arm peak value sinusoidal output voltage peak value For the bridge arm output voltage, For phase difference, For output current, This refers to the instantaneous output power.

[0047] Furthermore, the bridge arm output voltage The expression is:

[0048] ,

[0049] in, sinusoidal output voltage peak value It is a time variable.

[0050] Furthermore, the output voltage The expression is:

[0051] .

[0052] When the output current is positive, the DC-AC converter operates in forward mode. When the output current is negative, it operates in reverse mode.

[0053] Furthermore, by employing pulse width modulation (PWM) with fixed amplitude and phase shift control to adjust the phase, the DC-AC converter operates in pseudo discontinuous current mode (PDCM), and its waveform is as follows: Figure 3 As shown. Figure 3 As shown, during the time period 0-t1, switching transistors Q1 and Q4 are turned on, and inductor L... c The voltage across the terminals is the input voltage. Inductor L c The current increases linearly.

[0054] Furthermore, at time t1, switch Q4 is turned off and switch Q3 is turned on, ensuring that the current at point P is greater than the minimum soft-switching current I. ZVS This means that the voltage across the parasitic capacitance C3 of the switching transistor Q3 can be reduced to 0 within the dead time, thereby achieving soft switching.

[0055] Furthermore, during the time period t1-t2, switching transistors Q1 and Q3 are turned on, and inductor L... c The voltage across the two ends is When the input voltage Greater than the output voltage Inductor current i Lc Rise, when the input voltage Below the output voltage Inductor current i Lc decline.

[0056] Furthermore, at time t2, switch Q1 is turned off, ensuring that the current at point Q is greater than the minimum soft-switching current I. ZVS This enables soft switching of the switching transistor Q1.

[0057] Furthermore, during the time period t2-t3, switching transistors Q2 and Q3 are turned on, and inductor L... c The voltage across the terminals is Inductor current i Lc Linear decrease.

[0058] Furthermore, at time t3, when the inductor current is detected... i Lc Reaching -I ZVS When switching transistor Q3 is turned off and switching transistor Q4 is turned on, soft switching of switching transistor Q4 can be achieved.

[0059] Furthermore, during the time period t3-t4, switching transistors Q2 and Q4 are simultaneously turned on, and the inductor current... i Lc The current remains unchanged, and it will still be -I when the next cycle arrives and the switching transistor Q1 turns on. ZVS This enables soft switching of the switching transistor Q1.

[0060] When the load increases, the DC-AC converter enters pseudo-critical continuous current mode (PCRM), and its operating waveform is as follows: Figure 4 As shown, both point P and point Q are greater than the minimum soft-switching current I. ZVS And at the end of the cycle, the inductor current iLc Decrease to -I ZVS Because the converter has a symmetrical topology, it has the ability to flow power in both directions. When working in reverse, it is only necessary to exchange the drive signals of the first bridge arm and the second bridge arm. The rest of the working principle is the same as when working in pseudo-discontinuous mode, and will not be described in detail here.

[0061] Figure 5 This is a circuit topology diagram of a second specific embodiment of a soft-switching DC-AC converter based on a single-module four-transistor Buck-Boost converter according to the present invention. Figure 5 As shown, a soft-switching DC-AC converter based on a single-module four-transistor Buck-Boost converter also includes: capacitor C in1 and capacitor C in2 Capacitor C in1 The first terminal is connected to the input voltage. V in The positive terminal and the first terminal of the switching transistor Q1, capacitor C in1 The second terminal is connected to resistor R Ld The first terminal and capacitor C in2 The first terminal, capacitor C in2 The second terminal is connected to the input voltage. V in The negative terminal and the second terminal of the switching transistor Q2. Other parts of this specific embodiment are related to... Figure 1 The circuit topology is the same in the specific embodiments, and will not be described in detail here.

[0062] Furthermore, the voltage stress of the second bridge arm is When the input voltage is high, the voltage stress on the second bridge arm is greater. Therefore, when the input voltage is high, a capacitor C is added to its input side. in1 and capacitor C in2 This is used to divide the voltage and reduce the voltage stress on the bridge arm switching transistors.

[0063] Furthermore, when the capacitance values ​​of the two capacitors are the same, at this time... Then the output voltage The expression is:

[0064] .

[0065] The working principle of this embodiment is the same as that of the first specific embodiment, and will not be described in detail here.

[0066] The control circuit of the DC-AC converter will be described in detail below. The topologies of the first and second specific embodiments described above are applicable to both. Figure 6This is a schematic diagram of a soft-switching DC-AC converter control circuit based on a single-module four-transistor Buck-Boost converter according to the present invention. The soft-switching DC-AC converter control circuit based on a single-module four-transistor Buck-Boost converter includes: a voltage regulation module 1, a commutation trigger module 2, a phase shift angle clock signal generation module 3, and a peak / valley current control module 4.

[0067] Furthermore, the voltage regulation module 1 includes multiple resistors, multiple transistors, multiple operational amplifiers, multiple capacitors, multiple switches, a comparator, and a trigger. The second terminal of resistor R1 is connected to the first terminal of operational amplifier EA1 and the first terminal of resistor R3. The second terminal of resistor R3 is connected to the first terminal of capacitor C5. The second terminal of capacitor C5 is connected to the third terminal of operational amplifier EA1 and the first terminal of switch S1. The second terminal of resistor R2 is connected to transistor Q. a The first terminal and the second terminal of operational amplifier EA1, transistor Q a The second terminal of resistor R4 is grounded; the second terminal of resistor R4 is connected to the first terminal of operational amplifier EA2 and the first terminal of resistor R6; the second terminal of resistor R6 is connected to the first terminal of capacitor C6; the second terminal of capacitor C6 is connected to the third terminal of operational amplifier EA2 and the second terminal of switch S1; the second terminal of resistor R5 is connected to transistor Q. b The second terminal of the transistor Q is connected to the second terminal of the operational amplifier EA2. b The first terminal is grounded; the third terminal of switch S1 is connected to the second terminal of comparator comp1, the third terminal of comparator comp1 is connected to the first terminal of flip-flop RS1, the third terminal of flip-flop RS1 is connected to the third terminal of switch S2, and the fourth terminal of flip-flop RS1 is connected to the third terminal of switch S3.

[0068] Optionally, transistor Q a It is a PNP transistor, transistor Q b These are NPN transistors, with the first terminal of each transistor being its emitter, the second terminal being its collector, and the third terminal being its base.

[0069] Optionally, the first terminal of operational amplifiers EA1 and EA2 is an inverting input terminal, the second terminal of operational amplifiers EA1 and EA2 is a non-inverting input terminal, and the third terminal of operational amplifiers EA1 and EA2 is an output terminal.

[0070] Furthermore, operational amplifier EA1, resistor R3, and capacitor C5 form the first error amplifier; operational amplifier EA2, resistor R6, and capacitor C6 form the second error amplifier.

[0071] Optionally, the first terminal of comparator comp1 is the non-inverting input terminal, the second terminal of comparator comp1 is the inverting input terminal, and the third terminal of comparator comp1 is the output terminal.

[0072] Optionally, flip-flop RS1 is an RS flip-flop. The first terminal of flip-flop RS1 is the R-terminal reset terminal; the second terminal of flip-flop RS1 is the S-terminal set terminal; the third terminal of flip-flop RS1 is the Q-terminal original code output terminal; and the fourth terminal of flip-flop RS1 is... End-to-end inverse code output.

[0073] Optionally, switches S1, S2, and S3 are analog gating switches, with the first end of switches S1, S2, and S3 being contact 1 and the second end of switches S1, S2, and S3 being contact 2.

[0074] The control method of voltage regulation module 1 is described below. When the DC-AC converter is operating in the forward direction, drive signals for switching transistors Q1 and Q2 are generated, along with commutation trigger signals. V TR When the signal is high, the analog gating switch is connected to contact 1, and the first error amplifier operates. The voltage sampling signal is then... v as Connect the first terminal of resistor R1, and the reference voltage. v refa The first terminal of resistor R2 is connected to the commutation trigger signal. V TR Connect transistor Q a The third terminal. The voltage output by the first error amplifier is the error voltage. v error1 .

[0075] Similarly, when the DC-AC converter operates in reverse, it generates drive signals for switching transistors Q3 and Q4, and a commutation trigger signal V. TR When the signal is low, the analog gating switch is connected to contact 2, and the second error amplifier operates. This is the opposite of the first error amplifier's operating logic during forward operation; it samples the voltage signal... v as Connect the first terminal of resistor R5 to the reference voltage. v refa Connect the first terminal of resistor R4 to the commutation trigger signal V. TR Connect transistor Q b The third terminal. The voltage output through the second error amplifier is the error voltage. v error2 .

[0076] Furthermore, the error voltage v error1 or error voltage verror2 After being selected by the gating switch, the sawtooth wave signal is input to the second terminal of comparator comp1. V saw Input the first terminal of comparator comp1. When the error voltage > sawtooth wave voltage, comparator comp1 outputs a low level; when the error voltage < sawtooth wave voltage, comparator comp1 outputs a high level. Input the period start signal CLK1a into the second terminal of flip-flop RS1, and the sawtooth wave signal... V saw Synchronized with the period start signal CLK1a. When the period start signal CLK1a is active, the flip-flop RS1 is set. Q Terminal output high level, When the comparator comp1 outputs a low level, the flip-flop RS1 is reset. Q Terminal output low level, The output is high. The trigger RS1... Q Terminal signals and The terminal signals are distributed to the four drive signals through switches S2 and S3, thereby controlling the on and off of the switching transistors.

[0077] Furthermore, the commutation trigger module 2 includes multiple comparators, multiple resistors, multiple capacitors, multiple logic gates, and one flip-flop. The third terminal of comparator comp2 is connected to the first terminal of resistor R7 and the first terminal of AND gate AND1. The second terminal of resistor R7 is connected to the first terminal of capacitor C7 and the first terminal of inverter INV1. The second terminal of capacitor C7 is grounded. The second terminal of inverter INV1 is connected to the second terminal of AND gate AND1. The third terminal of AND gate AND1 is connected to the first terminal of AND gate AND3. The second terminal of AND gate AND3 is connected to the first terminal of AND gate AND4. The third terminal of AND gate AND3 is connected to the first terminal of flip-flop RS2. The third terminal of comparator comp3 is connected to the first terminal of resistor R8 and the first terminal of AND gate AND2. The second terminal of resistor R8 is connected to the first terminal of capacitor C8 and the first terminal of inverter INV2. The second terminal of capacitor C8 is grounded. The second terminal of inverter INV2 is connected to the second terminal of AND gate AND2. The third terminal of AND gate AND2 is connected to the second terminal of AND gate AND4. The third terminal of AND gate AND4 is connected to the second terminal of flip-flop RS2.

[0078] Optionally, the first terminals of comparators comp2 and comp3 are non-inverting input terminals, the second terminals of comparators comp2 and comp3 are inverting input terminals, and the third terminals of comparators comp2 and comp3 are output terminals.

[0079] Optionally, flip-flop RS2 is an RS flip-flop. The first terminal of flip-flop RS2 is the R-terminal reset terminal; the second terminal of flip-flop RS2 is the S-terminal set terminal; the third terminal of flip-flop RS2 is the Q-terminal original code output terminal; and the fourth terminal of flip-flop RS2 is... End-to-end inverse code output.

[0080] Optionally, the first terminal of inverter INV1 and inverter INV2 is the input terminal, and the second terminal of inverter INV1 and inverter INV2 is the output terminal.

[0081] Optionally, the first terminal of AND gate AND1, AND gate AND2, AND gate AND3, and AND gate AND4 is the first input terminal, the second terminal of AND gate AND1, AND gate AND2, AND gate AND3, and AND gate AND4 is the second input terminal, and the third terminal of AND gate AND1, AND gate AND2, AND gate AND3, and AND gate AND4 is the output terminal.

[0082] The control method of commutation trigger module 2 is described below. During the power frequency cycle, the converter alternates between forward and reverse operation, so it is necessary to determine the power flow direction of the converter to the commutation point. DC-AC converter output current. Equal to the average current of switch Q3 and capacitor C f current The sum of and There is an amplitude and phase difference, and under no-load conditions It is 0, therefore This cannot be used as a basis for judgment. Furthermore, the current ripple of switching transistor Q3 is relatively large, requiring filtering to obtain its average value over the switching cycle. This introduces a delay and places high demands on the accuracy of current detection. Since the DC-AC converter is close to no-load before each commutation, the output voltage of voltage regulation module 1 reaches its minimum value. Therefore, the output voltage of voltage regulation module 1 can be used as the commutation basis for the DC-AC converter. Let the minimum value of the output voltage of voltage regulation module 1 (commutation point) during forward operation be... V min1 When operating in reverse, the minimum output voltage of voltage regulation module 1 (commutation point) is: V min2 .

[0083] Furthermore, when operating in the forward direction, the first error amplifier outputs an error voltage. v error1 Less than the minimum output voltage of voltage regulation module 1 during forward operation. V min1At this time, the output of comparator comp2 becomes high. Its rising edge is extracted through AND gate AND1 and inverter INV1, and then ANDed with the period start signal CLK1a to obtain the commutation trigger signal. This signal is then input to flip-flop RS2, causing... V TR It goes low.

[0084] Similarly, when operating in reverse, the second error amplifier outputs an error voltage. v error2 Less than the minimum output voltage of voltage regulation module 1 when operating in reverse. V min2 hour, V TR It becomes high level.

[0085] Note that to prevent incorrect commutation caused by output fluctuations of the other error amplifier while one error amplifier is operating, the non-inverting input terminals of the two error amplifiers in voltage regulation module 1 must be grounded through PNP and NPN transistors respectively, with the bases connected to... V TR This ensures that when one error amplifier is working, the other output is always 0.

[0086] Furthermore, the phase-shift clock signal generation module 3 includes multiple resistors, multiple switches, multiple operational amplifiers, multiple diodes, a multiplier / divider, a comparator, and multiple logic gates. The third terminal of switch S4 is connected to the first terminal of resistor R9, and the second terminal of resistor R9 is connected to the first terminal of operational amplifier EA3 and resistor R 12 The first terminal, resistor R 10 The first terminal is grounded, and the resistor R 10 The second terminal is connected to resistor R 11 The first terminal and the second terminal of operational amplifier EA3, resistor R 11 The second terminal is connected to the third terminal of switch S5 and the third terminal of multiplier / divider MUD, and resistor R... 12 The second terminal is connected to the third terminal of operational amplifier EA3 and resistor R. 13 The first terminal, resistor R 13 The second terminal is connected to diode D a The cathode and the second terminal of the multiplier / divider MUD, diode D a The anode is grounded; the first terminal of the multiplier / divider MUD is connected to the second terminal of the comparator comp1 in the voltage regulation module 1, and the fourth terminal of the multiplier / divider MUD is connected to the resistor R. 15 The first terminal, resistor R 15 The second terminal is connected to resistor R 16 The second terminal and the second terminal of operational amplifier EA4, resistor R 14 The first terminal is grounded, and the resistor R 14The second terminal is connected to the first terminal of operational amplifier EA4 and resistor R. 17 The first terminal, resistor R 17 The second terminal is connected to the third terminal of operational amplifier EA4 and diode D. b The anode, resistance R 18 The second terminal is connected to the first terminal of operational amplifier EA5 and resistor R. 22 The first terminal, resistor R 22 The second terminal is connected to the third terminal of operational amplifier EA5 and diode D. c The anode, resistance R 19 The first terminal is grounded, and the resistor R 19 The second terminal is connected to resistor R 20 The second terminal, resistor R 21 The second terminal and the second terminal of operational amplifier EA5, diode D b Cathode connected diode D c The cathode is connected to the first terminal of comparator comp4, and the third terminal of comparator comp4 is connected to the first terminal of inverter INV3 and resistor R. 23 The first terminal, resistor R 23 The second terminal is connected to the first terminal of capacitor C9 and the second terminal of AND gate AND5. The second terminal of capacitor C9 is grounded, and the second terminal of inverter INV3 is connected to the first terminal of AND gate AND5.

[0087] Optionally, the first terminal of operational amplifiers EA3, EA4, and EA5 is an inverting input terminal, the second terminal of operational amplifiers EA3, EA4, and EA5 is a non-inverting input terminal, and the third terminal of operational amplifiers EA3, EA4, and EA5 is an output terminal.

[0088] Furthermore, operational amplifier EA3 and resistor R 12 Form the first subtractor; operational amplifier EA4 and resistor R 17 The first adder is formed; operational amplifier EA5 and resistor R 22 To form the second adder.

[0089] Optionally, the first terminal of comparator comp4 is the non-inverting input terminal, the second terminal of comparator comp4 is the inverting input terminal, and the third terminal of comparator comp4 is the output terminal.

[0090] Optionally, switches S4 and S5 are analog gating switches, with the first end of switches S4 and S5 being contact 1 and the second end of switches S4 and S5 being contact 2.

[0091] Optionally, the first terminal of inverter INV3 is the input terminal, and the second terminal of inverter INV3 is the output terminal.

[0092] Optionally, the first terminal of AND gate AND5 is the first input terminal, the second terminal of AND gate AND5 is the second input terminal, and the third terminal of AND gate AND5 is the output terminal.

[0093] The control method for phase-shift clock signal generation module 3 will be described below. This module is used to generate a phase-shift clock signal. Switches S4 and S5 select the voltage sampling signal. v as or input voltage V in sampling signal v ins The input is to the first subtractor, and the output of the first subtractor is y, which is the error voltage output from the voltage regulation module 1. v error1 or error voltage v error2 As x, the signal selected by switch S5 is taken as z. x, y, and z are input into the multiplier / divider MUD for calculation. The resulting voltage is input into the first adder to obtain the phase shift angle amplitude of the pseudo-discontinuous mode (PDCM). The output current sampling signal i os Input resistance R 18 First terminal, voltage sampling signal v as Input resistance R 20 The first terminal will have a constant voltage V con Input resistance R 21 The first end, after passing through the second adder, yields the pseudo-critical conduction mode PCRM phase shift angle amplitude. The DC-AC converter operates in pseudo-discontinuous mode (PDCM) with a phase shift angle amplitude of [missing value]. and the phase shift angle amplitude of PPCRM in pseudo-critical conduction mode Through diode D b diode D c Gating yields a larger value The first input to comparator comp4 is a sawtooth wave signal. V saw The input is to the second terminal of comparator comp4, and the output of comparator comp4 is used to extract its falling edge clock signal CLK2a through inverter INV3 and AND gate AND3.

[0094] Furthermore, the peak / valley current control module 4 includes multiple comparators, a logic gate, a flip-flop, and multiple switches. The third terminal of comparator comp5 is connected to the first terminal of switch S6, the third terminal of comparator comp6 is connected to the second terminal of switch S6, the third terminal of switch S6 is connected to the second terminal of OR gate OR1, the third terminal of OR gate OR1 is connected to the first terminal of flip-flop RS3, the third terminal of flip-flop RS3 is connected to the third terminal of switch S7, and the fourth terminal of flip-flop RS3 is connected to the third terminal of switch S8.

[0095] Optionally, the first terminals of comparators comp5 and comp6 are non-inverting input terminals, the second terminals of comparators comp5 and comp6 are inverting input terminals, and the third terminals of comparators comp5 and comp6 are output terminals.

[0096] Optionally, flip-flop RS3 is an RS flip-flop. The first terminal of flip-flop RS3 is the R-terminal reset terminal; the second terminal of flip-flop RS3 is the S-terminal set terminal; the third terminal of flip-flop RS3 is the Q-terminal original code output terminal; and the fourth terminal of flip-flop RS3 is... End-to-end inverse code output.

[0097] Optionally, switches S6, S7, and S8 are analog gating switches, with the first end of switches S6, S7, and S8 being contact 1 and the second end of switches S6, S7, and S8 being contact 2.

[0098] Optionally, the first terminal of OR1 is the first input terminal, the second terminal of OR1 is the second input terminal, and the third terminal of OR1 is the output terminal.

[0099] The control method of peak / valley current control module 4 is described below. During forward operation, it generates drive signals for switching transistors Q3 and Q4, and during reverse operation, it generates drive signals for switching transistors Q1 and Q2. (The remaining text appears to be incomplete and requires further context.) ZVS and inductor current i Lc Input the first and second terminals of comparator comp5 to convert the inductor current i Lc and minimum soft-switching current I ZVS Input the first and second terminals of comparator comp6 respectively; in positive direction, when the inductor current... i Lc Less than -I ZVS When the comparator comp5 outputs a high level, it turns off the switching transistor Q3. In reverse operation, when the inductor current... i Lc Greater than the minimum soft-switching current I ZVSWhen the clock signal CLK1a is applied, the comparator comp6 output goes high, turning off switch Q1. To ensure correct timing, the cycle start signal CLK1a is input to the first terminal of OR gate OR1, ensuring that either the forward-operating switch Q4 or the reverse-operating switch Q2 is on at the beginning of each cycle. The clock signal CLK2a is input to the second terminal of flip-flop RS3, and the Q signal of flip-flop RS3 is... The terminal signal is distributed to the four drive signals through switches S7 and S8, thereby controlling the switching transistor to achieve zero-voltage conduction and reducing switching losses.

[0100] This invention discloses a soft-switching DC-AC converter based on a single-module four-transistor Buck-Boost converter, which superimposes a DC voltage component. This achieves effective AC voltage output. Without adding a resonant circuit, zero-voltage switching of all switching transistors can be achieved at a constant switching frequency. Furthermore, compared to a dual-path four-transistor Buck-Boost differential output zero-voltage switching inverter, eliminating one four-transistor Buck-Boost transistor further reduces losses and improves economic efficiency.

[0101] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

Claims

1. A soft-switching DC-AC converter based on a single-module four-transistor Buck-Boost converter, characterized in that, The system includes a first switching transistor, a second switching transistor, a third switching transistor, a fourth switching transistor, a first resistor, a first inductor, and a first capacitor. The first terminal of the first switching transistor is connected to the positive terminal of the input voltage and the first terminal of the first resistor. The second terminal of the first switching transistor is connected to the first terminal of the second switching transistor and the first terminal of the first inductor. The second terminal of the second switching transistor is connected to the negative terminal of the input voltage, the second terminal of the fourth switching transistor, and the second terminal of the first capacitor. The second terminal of the first resistor is connected to the first terminal of the third switching transistor and the first terminal of the first capacitor. The second terminal of the third switching transistor is connected to the second terminal of the first inductor and the first terminal of the fourth switching transistor. The voltage across the first resistor is the output voltage. When the soft-switching DC-AC converter based on a single-module four-transistor Buck-Boost operates in pseudo-discontinuous mode, the first and fourth switching transistors are turned on during the 0-t1 time period, and the inductor current increases linearly. At time t1, the fourth switch is turned off and the third switch is turned on. During the time period t1-t2, the first and third switching transistors are turned on. When the input voltage is greater than the output voltage, the inductor current increases, and when the input voltage is lower than the output voltage, the inductor current decreases. At time t2, the first switch is turned off; During the time period t2-t3, the second and third switching transistors are turned on, and the inductor current decreases linearly. At time t3, when the inductor current reaches -I ZVS The third switch is turned off, and the fourth switch is turned on. During the time period t3-t4, the second and fourth switching transistors are turned on simultaneously, and the inductor current remains unchanged.

2. The soft-switching DC-AC converter based on a single-module four-transistor Buck-Boost converter as described in claim 1, characterized in that, When the soft-switching DC-AC converter based on a single-module four-transistor Buck-Boost operates in pseudo-critical conduction mode, the first and fourth switching transistors are turned on during the 0-t1 time period, and the inductor current increases linearly. At time t1, the fourth switch is turned off and the third switch is turned on. During the time period t1-t2, the first and third switching transistors are turned on. When the input voltage is greater than the output voltage, the inductor current increases, and when the input voltage is lower than the output voltage, the inductor current decreases. At time t2, the first switch is turned off; During the time period t2-t3, the second and third switching transistors are turned on, and the inductor current decreases linearly. At time t3, when the inductor current reaches -I ZVS The third switch is turned off, and the fourth switch is turned on. During the time period t3-t4, the first and fourth switching transistors are turned on, and the inductor current increases linearly.

3. The soft-switching DC-AC converter based on a single-module four-transistor Buck-Boost converter as described in claim 1, characterized in that, It also includes a second capacitor and a third capacitor. The first terminal of the second capacitor is connected to the positive terminal of the input voltage and the first terminal of the first switching transistor. The second terminal of the second capacitor is connected to the first terminal of the first resistor and the first terminal of the third capacitor. The second terminal of the third capacitor is connected to the negative terminal of the input voltage and the second terminal of the second switching transistor.

4. A control circuit for a soft-switching DC-AC converter based on a single-module four-transistor Buck-Boost converter, used in the soft-switching DC-AC converter based on a single-module four-transistor Buck-Boost converter as described in claim 1, characterized in that, It includes a voltage regulation module, a commutation trigger module, a phase shift angle clock signal generation module, and a peak / valley current control module.

5. The control circuit for a soft-switching DC-AC converter based on a single-module four-transistor Buck-Boost converter as described in claim 4, characterized in that, The voltage regulation module includes multiple resistors, multiple transistors, multiple operational amplifiers, multiple capacitors, multiple switches, a comparator, and a trigger. The second end of the second resistor is connected to the first end of the first operational amplifier and the first end of the fourth resistor. The second end of the third resistor is connected to the first end of the eighth capacitor. The second end of the eighth capacitor is connected to the third end of the first operational amplifier and the first end of the first switch. The second end of the third resistor is connected to the first end of the first transistor and the second end of the first operational amplifier. The second end of the first transistor is grounded. The second end of the fifth resistor is connected to the first end of the second operational amplifier and the first end of the seventh resistor. The second end of the seventh resistor is connected to the first end of the ninth capacitor. The second end of the ninth capacitor is connected to the third end of the second operational amplifier and the second end of the first switch. The second end of the sixth resistor is connected to the second end of the second transistor and the second end of the second operational amplifier. The first end of the second transistor is grounded. The third end of the first switch is connected to the second end of the first comparator. The third end of the first comparator is connected to the first end of the first trigger. The third end of the first trigger is connected to the third end of the second switch. The fourth end of the first trigger is connected to the third end of the third switch.

6. The control circuit for a soft-switching DC-AC converter based on a single-module four-transistor Buck-Boost converter as described in claim 5, characterized in that, The commutation trigger module includes multiple comparators, multiple resistors, multiple capacitors, multiple logic gates, and one flip-flop. The third terminal of the second comparator is connected to the first terminal of the eighth resistor and the first terminal of the first AND gate. The second terminal of the eighth resistor is connected to the first terminal of the tenth capacitor and the first terminal of the first inverter. The second terminal of the tenth capacitor is grounded. The second terminal of the first inverter is connected to the second terminal of the first AND gate. The third terminal of the first AND gate is connected to the first terminal of the third AND gate. The second terminal of the third AND gate is connected to the first terminal of the fourth AND gate. The third terminal of the third AND gate is connected to the first terminal of the second flip-flop. The third terminal of the third comparator is connected to the first terminal of the ninth resistor and the first terminal of the second AND gate. The second terminal of the ninth resistor is connected to the first terminal of the eleventh capacitor and the first terminal of the second inverter. The second terminal of the eleventh capacitor is grounded. The second terminal of the second inverter is connected to the second terminal of the second AND gate. The third terminal of the second AND gate is connected to the second terminal of the fourth AND gate. The third terminal of the fourth AND gate is connected to the second terminal of the second flip-flop.

7. The soft-switching DC-AC converter control circuit based on a single-module four-transistor Buck-Boost converter as described in claim 6, characterized in that, The phase-shift clock signal generation module includes multiple resistors, multiple switches, multiple operational amplifiers, multiple diodes, a multiplier / divider, a comparator, and multiple logic gates. The third terminal of the fourth switch is connected to the first terminal of the tenth resistor. The second terminal of the tenth resistor is connected to the first terminal of the third operational amplifier and the first terminal of the thirteenth resistor. The first terminal of the eleventh resistor is grounded. The second terminal of the eleventh resistor is connected to the first terminal of the twelfth resistor. The second terminal of the twelfth resistor is connected to the third terminal of the fifth switch and the third terminal of the first multiplier / divider. The second terminal of the thirteenth resistor is connected to the third terminal of the third operational amplifier and the first terminal of the fourteenth resistor. The second terminal of the fourteenth resistor is connected to the cathode of the first diode and the second terminal of the first multiplier / divider. The anode of the first diode is grounded. The first terminal of the first multiplier / divider is connected to the second terminal of the first comparator in the voltage regulation module. The fourth terminal of the first multiplier / divider is connected to the first terminal of the sixteenth resistor. The second terminal of the sixteenth resistor is connected to the second terminal of the seventeenth resistor and the second terminal of the fourth operational amplifier. The first terminal of the fifteenth resistor is grounded. The second terminal of the fifteenth resistor is connected to the first terminal of the fourth operational amplifier and the first terminal of the eighteenth resistor. The second terminal of the eighteenth resistor is connected to the third terminal of the fourth operational amplifier and the anode of the second diode. The second terminal of the nineteenth resistor is connected to the first terminal of the fifth operational amplifier and the first terminal of the twenty-third resistor. The second terminal of the twenty-third resistor is connected to the third terminal of the fifth operational amplifier and the anode of the third diode. The first terminal of the twentieth resistor is grounded. The second terminal of the twentieth resistor is connected to the second terminals of the twenty-first resistor, the twenty-second resistor, and the fifth operational amplifier. The cathode of the second diode is connected to the cathode of the third diode and the first terminal of the fourth comparator. The third terminal of the fourth comparator is connected to the first terminal of the third inverter and the first terminal of the twenty-fourth resistor. The second terminal of the twenty-fourth resistor is connected to the first terminal of the twelfth capacitor and the second terminal of the fifth AND gate. The second terminal of the twelfth capacitor is grounded. The second terminal of the third inverter is connected to the first terminal of the fifth AND gate.

8. The soft-switching DC-AC converter control circuit based on a single-module four-transistor Buck-Boost converter as described in claim 7, characterized in that, The peak / valley current control module includes multiple comparators, a logic gate, a flip-flop, and multiple switches. The third terminal of the fifth comparator is connected to the first terminal of the sixth switch, the third terminal of the sixth comparator is connected to the second terminal of the sixth switch, the third terminal of the sixth switch is connected to the second terminal of the first OR gate, the third terminal of the first OR gate is connected to the first terminal of the third flip-flop, the third terminal of the third flip-flop is connected to the third terminal of the seventh switch, and the fourth terminal of the third flip-flop is connected to the third terminal of the eighth switch.

9. The control circuit for a soft-switching DC-AC converter based on a single-module four-transistor Buck-Boost converter as described in claim 8, characterized in that, The first transistor is a PNP transistor, the second transistor is an NPN transistor, the first terminal of each transistor is its emitter, the second terminal of each transistor is its collector, and the third terminal of each transistor is its base.

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