Output chip and light-operated relay
By integrating high-voltage HEMT transistors and clamping circuits into the design of a photo-controlled relay, the problems of slow response speed and large chip area of existing photo-controlled relays in high-voltage applications are solved. Nanosecond-level switching speed, low on-resistance and high integration are achieved, making it suitable for high-voltage scenarios such as new energy vehicles and power systems.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-23
- Publication Date
- 2026-04-07
AI Technical Summary
Existing light-controlled relays in high-voltage applications suffer from problems such as large passive conduction components, slow response speed, large chip area, and high cost, making it difficult to meet the requirements of miniaturization, high speed, and high integration.
An integrated design of high-voltage HEMT transistors and clamping circuits is adopted, which are isolated by an electrical isolation structure. The clamping circuit is used to accelerate the charging and discharging of the gate capacitance of the high-voltage HEMT transistors. Combined with the parallel structure of low-voltage depletion-mode and enhancement-mode HEMT transistors and passive devices, rapid control of the high-voltage HEMT transistors is achieved.
It achieves nanosecond-level switching speed, low on-resistance, low power consumption, chip area reduction of more than 50%, supports bidirectional conduction design, is compatible with AC/DC switching, and is suitable for high voltage environments from 40V to 1kV and above. It also features a smaller package size and lower cost.
Smart Images
Figure CN121814072A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to an output chip and a light-controlled relay. Background Technology
[0002] With the development of industrial and IoT technologies, optocouplers are evolving towards miniaturization, high speed, and intelligence. Especially in high-voltage applications such as new energy vehicles and power systems, higher demands are being placed on the voltage tolerance, response speed, and integration of optocouplers.
[0003] Currently, photorelays with voltages above 600V mainly use silicon-based MOSFETs as output devices, which have problems such as large passive conduction capacity, slow response speed (microsecond level), and high gate turn-on voltage (10V~15V). In addition, to achieve high-voltage drive, a large number of photodiodes are usually required in series, which leads to an increase in chip area and cost.
[0004] Therefore, there is an urgent need in this field for a photoelectric relay chip solution that features high integration, fast response speed, small passive conduction components, and suitability for high-voltage environments. Summary of the Invention
[0005] The purpose of this invention is to provide an output chip and a light-controlled relay to solve one or more problems existing in the existing light-controlled relay output chips.
[0006] To solve the above technical problems, the present invention provides an output chip for a light-controlled relay, wherein the output chip integrates a high-voltage HEMT transistor and a clamping circuit, and the high-voltage HEMT transistor and the clamping circuit are isolated from each other by an electrical isolation structure.
[0007] The gate of the high-voltage HEMT transistor is used to receive the photovoltaic voltage signal from the photovoltaic element;
[0008] The clamping circuit is connected between the gate and source of the high-voltage HEMT transistor and is configured to accelerate the charging and discharging of the gate capacitance of the high-voltage HEMT transistor based on the photovoltaic voltage signal.
[0009] Optionally, in the output chip of the light-controlled relay, the clamping circuit includes a low-voltage depletion-mode HEMT transistor, a low-voltage enhancement-mode HEMT transistor, and a passive device; the low-voltage depletion-mode HEMT transistor, the low-voltage enhancement-mode HEMT transistor, and the passive device are electrically isolated from each other.
[0010] Optionally, in the output chip of the light-controlled relay, the high-voltage HEMT transistor is an enhancement-mode transistor;
[0011] The gate of the low-voltage depletion-type HEMT transistor, the source of the low-voltage enhancement-type HEMT transistor, and the first terminal of the passive device are connected to a first node.
[0012] The source of the low-voltage depletion-type HEMT transistor, the gate of the low-voltage enhancement-type HEMT transistor, the drain of the low-voltage enhancement-type HEMT transistor, and the second terminal of the passive device are connected to a second node.
[0013] The drain of the low-voltage depletion-type HEMT transistor is connected to the gate of the high-voltage HEMT transistor;
[0014] The first node is used to connect to the cathode of the photovoltaic element;
[0015] The second node is connected to the source of the high-voltage HEMT transistor.
[0016] Optionally, in the output chip of the light-controlled relay, the low-voltage depletion-type HEMT transistor includes two depletion-type HEMT units connected in parallel, and the gates of the two depletion-type HEMT units are electrically connected to each other.
[0017] Optionally, in the output chip of the light-controlled relay, the high-voltage HEMT transistor is a depletion-type transistor;
[0018] The source of the low-voltage enhancement-mode HEMT transistor, the gate of the low-voltage depletion-mode HEMT transistor, and the first terminal of the passive device are connected to a third node.
[0019] The source of the low-voltage depletion-type HEMT transistor and the second terminal of the passive device are connected to the fourth node;
[0020] The drain of the low-voltage enhancement-mode HEMT transistor and the drain of the low-voltage depletion HEMT transistor are connected to a fifth node;
[0021] The gate of the low-voltage enhancement-mode HEMT transistor is used to connect to the anode of the photovoltaic element;
[0022] The third node is used to connect to the cathode of the photovoltaic element;
[0023] The fourth node is connected to the source of the high-voltage HEMT transistor;
[0024] The fifth node is connected to the gate of the high-voltage HEMT transistor.
[0025] Optionally, in the output chip of the light-controlled relay, the passive device is an integrated resistor implemented based on two-dimensional electronic gas.
[0026] Optionally, in the output chip of the light-controlled relay, the high-voltage HEMT transistor is composed of two high-voltage HEMT dies independently formed in the epitaxial layer, cascaded in reverse.
[0027] The sources of the two high-voltage HEMT dies are electrically connected to each other, the gates are electrically connected to each other, and each has a drain to form a bidirectional switch.
[0028] Optionally, in the output chip of the light-controlled relay, the high-voltage HEMT transistor is a single-unit integrated bidirectional transistor structure, including a shared source, a shared gate, and two independent drains, with the two drains located on both sides of the shared source.
[0029] Optionally, in the output chip of the light-controlled relay, the output chip includes a substrate and an epitaxial layer formed on the substrate; the electrical isolation structure extends from the surface of the epitaxial layer to the substrate; the electrical isolation structure is a trench isolation structure or an implantation isolation structure.
[0030] The present invention also provides a light-controlled relay, comprising:
[0031] Light-emitting chips are used to emit light signals;
[0032] A photovoltaic element chip, used to receive the optical signal and generate a photovoltaic voltage signal; and,
[0033] The output chip as described in any of the preceding statements.
[0034] In summary, the output chip provided by this invention integrates a high-voltage HEMT transistor and a clamping circuit. The high-voltage HEMT transistor and the clamping circuit are electrically isolated. The gate of the high-voltage HEMT transistor is used to receive a photovoltaic voltage signal from a photovoltaic element. The clamping circuit is connected between the gate and source of the high-voltage HEMT transistor and is configured to accelerate the charging and discharging of the gate capacitance of the high-voltage HEMT transistor based on the photovoltaic voltage signal. Therefore, the output chip provided by this invention and the light-controlled relay containing the output chip have the following advantages compared to the prior art:
[0035] (1) Integrating the clamping circuit and the high-voltage HEMT on the same GaN chip simplifies the packaging structure, reduces costs, and improves reliability;
[0036] (2) Utilize the high-speed characteristics of HEMT to achieve nanosecond-level switching speed;
[0037] (3) The on-resistance can be reduced to below 50mΩ, resulting in low power consumption;
[0038] (4) HEMT has a low turn-on voltage, which can significantly reduce the chip area and save more than 50% of the chip area;
[0039] (5) Supports bidirectional conduction design, and a single chip can achieve AC / DC switching;
[0040] (6) The number of photorelay chips has been reduced from 4 to 3, and the package size is smaller;
[0041] (7) Supports enhanced and depletion-type designs, adapting to various application scenarios of normally open / normally closed;
[0042] (8) Wide voltage range, capable of realizing high voltage optical relays from 40V to 1kV and above. Attached Figure Description
[0043] Figure 1 This is an equivalent circuit diagram of the HV-HEMT and clamping circuit in Embodiment 1 of the present invention;
[0044] Figure 2 This is another equivalent circuit diagram of the HV-HEMT and clamping circuit in Embodiment 1 of the present invention;
[0045] Figure 3 This is a schematic cross-sectional view of the output chip in Embodiment 1 of the present invention;
[0046] Figure 4 This is a schematic diagram of the layout of HV-HEMT in Embodiment 1 of the present invention;
[0047] Figure 5 A schematic diagram of the composition of a light-controlled relay provided in an embodiment of the present invention;
[0048] Figure 6 This is an equivalent circuit diagram of the HV-HEMT and clamping circuit in Embodiment 2 of the present invention;
[0049] Figure 7 This is another equivalent circuit diagram of the HV-HEMT and clamping circuit in Embodiment 2 of the present invention;
[0050] Figure 8 This is a schematic cross-sectional view of the output chip in Embodiment 2 of the present invention;
[0051] Figure 9 This is a schematic diagram of the layout of HV-HEMT in Embodiment 2 of the present invention;
[0052] In the attached image:
[0053] 10 - Substrate; 20 - Channel layer; 30 - Barrier layer; 40 - Electrically isolated structure; 50 - Hole injection layer;
[0054] 100 - Light-emitting chip; 200 - Photovoltaic element chip; 300 - Output chip. Detailed Implementation
[0055] The output chip and light-controlled relay proposed in this invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and use non-precise scales, used only to facilitate and clarify the illustration of the embodiments of the invention. Furthermore, the structures shown in the drawings are often part of the actual structure. In particular, different figures may have different emphases and sometimes use different scales. It should be understood that relative terms such as "above," "below," "upper," and "lower" shown in the drawings can be used to describe the relationships between various elements. These relative terms are intended to cover different orientations of elements other than those depicted in the drawings. For example, if the device is inverted relative to the view in the drawings, an element described as "above" another element will now be below that element. It should also be understood that, unless specifically stated or indicated, the terms "first," "second," "third," etc., in the specification are only used to distinguish various components, elements, steps, etc., in the specification, and are not used to indicate logical or sequential relationships between various components, elements, steps, etc.
[0056] Example 1
[0057] Please see Figure 1 and Figure 2 and combined Figure 3 This embodiment provides an output chip that integrates a high-voltage HEMT transistor (HV-HEMT) and a clamping circuit. The gate of the high-voltage HEMT transistor is used to receive a photovoltaic voltage signal from a photovoltaic element PDA. The clamping circuit is connected between the gate and source of the high-voltage HEMT transistor and is configured to accelerate the charging and discharging of the gate capacitance of the high-voltage HEMT transistor based on the photovoltaic voltage signal.
[0058] Please combine Figure 3 The high-voltage HEMT transistor and the clamping circuit are electrically isolated from each other by an isolation structure 40. Specifically, the clamping circuit includes a low-voltage depletion-type HEMT transistor, a low-voltage enhancement-type HEMT transistor, and a passive device, which may be an integrated resistor R1 implemented based on a two-dimensional electron gas. The cooperation of these three components accelerates the charging and discharging of the gate capacitance of the high-voltage HEMT transistor. Similarly, the low-voltage depletion-type HEMT transistor, the low-voltage enhancement-type HEMT transistor, and the passive device are also electrically isolated from each other by the isolation structure 40.
[0059] More specifically, such as Figure 3As shown, the output chip provided in this embodiment includes a substrate 10 and an epitaxial layer covering the substrate 10. The epitaxial layer includes a channel layer 20 and a barrier layer 30 formed on the channel layer 20. Specifically, the channel layer 20 can be a GaN channel layer, and the barrier layer 30 can be an AlGaN barrier layer or an AlN barrier layer. The passive device is an integrated resistor realized based on the two-dimensional electron gas generated at the interface between the channel layer 20 and the barrier layer 30. Figure 1 and Figure 2 In this context, R1 is used to represent... Figure 3 It is represented by 2DEG resistor.
[0060] The electrical isolation structure 40 extends from the surface of the epitaxial layer to the substrate 10, thereby isolating the high-voltage HEMT transistor from the clamping circuit, and separating the low-voltage depletion-type HEMT transistor, the low-voltage enhancement-type HEMT transistor, and the passive device within the clamping circuit. Optionally, the electrical isolation structure 40 is a trench isolation structure or an injection isolation structure. Optionally, the low-voltage depletion-type HEMT transistor, the low-voltage enhancement-type HEMT transistor, and the passive device are arranged side-by-side in sequence.
[0061] Corresponding to the high-voltage HEMT transistor, the low-voltage depletion-type HEMT transistor, the low-voltage enhancement-type HEMT transistor, and the passive device, electrode structures are provided on the surface of the epitaxial layer. For the high-voltage HEMT transistor, the low-voltage depletion-type HEMT transistor, and the low-voltage enhancement-type HEMT transistor, the electrode structure includes a source (S), a gate (G), and a drain (D). The source and drain are formed on both sides of the gate and are electrically in contact with the channel layer 20. For the passive device, the electrode structure includes a source and a drain, and similarly, its source and drain are electrically in contact with the channel layer 20. In this embodiment, specifically, the high-voltage HEMT transistor and the low-voltage enhancement-type HEMT transistor have a hole injection layer 50 formed below their gate structures. The hole injection layer 50 is used to deplete the two-dimensional electron gas in the channel below. The hole injection layer 50 can be, for example, a P-GaN layer.
[0062] Optionally, the substrate 10 can be made of silicon (Si), silicon carbide (SiC), GaN, etc. When the insulation performance requirement is high, the substrate 10 can also be an SOI substrate. The SOI substrate includes a bottom silicon layer, a buried insulating layer formed on the bottom silicon layer, and a top silicon layer formed on the buried insulating layer. The high-voltage HEMT transistor and the clamping circuit are both formed on the top silicon layer, and each of the electrical isolation structures 40 extends downward to the buried insulating layer for connection.
[0063] The output chip provided in this embodiment has a hole injection layer 50 formed below the gate of the high-voltage HEMT transistor, making the high-voltage HEMT transistor an enhancement-mode transistor, thereby making the output chip provided in this embodiment suitable for normally-off light-controlled relays. Based on this, in this embodiment, the gate of the low-voltage depletion-mode HEMT transistor, the source of the low-voltage enhancement-mode HEMT transistor, and the first terminal of the passive device are connected to a first node; the source of the low-voltage depletion-mode HEMT transistor, the gate of the low-voltage enhancement-mode HEMT transistor, the drain of the low-voltage enhancement-mode HEMT transistor, and the second terminal of the passive device are connected to a second node; the drain of the low-voltage depletion-mode HEMT transistor is connected to the gate of the high-voltage HEMT transistor; the first node is used to connect to the cathode of the photovoltaic element PDA; the second node is connected to the source of the high-voltage HEMT transistor.
[0064] In this embodiment, preferably, as follows: Figure 1 and Figure 2 As shown, the low-voltage depletion-mode HEMT transistor includes two parallel depletion-mode HEMT cells, and the gates of the two depletion-mode HEMT cells are electrically connected to each other. By connecting the two HEMT cells in parallel, the equivalent channel width is effectively increased, thereby significantly reducing the on-resistance of the transistor. This provides an ultra-low impedance discharge path for the gate charge of the high-voltage HEMT transistor. Thanks to this low-impedance discharge path, the discharge speed of the gate capacitance of the high-voltage HEMT transistor is greatly improved, thereby significantly shortening the turn-off time of the photo-controlled relay and providing a key guarantee for achieving nanosecond-level switching speeds. In addition, the parallel structure effectively increases the current handling capability of the device and improves the robustness and reliability of the clamping circuit driving the high-voltage gate.
[0065] Alternatively, in a preferred solution, please refer to Figure 1 The high-voltage HEMT transistor is composed of two high-voltage HEMT dies independently formed in the epitaxial layer and cascaded in reverse; wherein the sources of the two high-voltage HEMT dies are electrically connected to each other, the gates are electrically connected to each other, and each has a drain to form a bidirectional switch.
[0066] In one preferred embodiment, please refer to [link / reference]. Figure 2 and combined Figure 3 The high-voltage HEMT transistor is a single-unit integrated bidirectional transistor structure, including a shared source, a shared gate, and two independent drains (D1, D2), with the two drains (D1, D2) located on both sides of the shared source.
[0067] Both of the aforementioned high-voltage HEMT transistor designs achieve bidirectional conductivity, allowing the two drains to be connected to different potentials in the circuit, thus simultaneously meeting the application requirements of DC conduction and AC commutation. However, the latter, using a single-unit integrated design, significantly reduces parasitic parameters compared to the former's reverse cascaded design, resulting in higher switching speeds. Furthermore, by reducing the resistance of interconnecting wires, the overall on-resistance is lower and energy efficiency is higher for the same chip area.
[0068] Please see Figure 5 This embodiment also provides a light-controlled relay, including:
[0069] The light-emitting chip 100 has a light-emitting element for emitting light signals;
[0070] Photovoltaic element chip 200, having a photovoltaic element PDA, for receiving the optical signal and generating a photovoltaic voltage signal; and,
[0071] The output chip 300 provided in this embodiment.
[0072] The photovoltaic (PV) device PDA may include multiple photodiodes connected in series. These photodiodes can be arranged in an array to improve the output signal of the PV device PDA, thereby enhancing the driving capability of the output chip and enabling greater load capacity, thus meeting the development requirements of miniaturization and lightweight design. In one example, the photodiode in the PV device PDA is specifically composed of a substrate of a first doping type and a doped region of a second doping type formed within the substrate. Specifically, the photodiode in the PV device PDA can be a silicon-based photodiode, meaning it includes a silicon-based substrate and a doped region formed within the silicon-based substrate.
[0073] The light-emitting element can be a light-emitting diode, which can be formed using III-V compounds, such as a gallium arsenide-based light-emitting diode.
[0074] The optically controlled relay provided in this embodiment operates as follows:
[0075] (1) Photo-triggered stage: When illuminated by a light signal, the photovoltaic element PDA generates a photocurrent, which flows from the cathode to the anode. This current in the circuit causes the gate potential of the low-voltage depletion-type HEMT transistor to be pulled low, thereby reducing its gate-source voltage. decline.
[0076] (2) Clamp release and high-voltage HEMT turn-on stage: When the gate-source voltage of the low-voltage depletion-type HEMT transistor... When the voltage drops below its turn-off threshold voltage, the transistor enters the turn-off state. At this time, its clamping effect on the gate of the high-voltage HEMT transistor is released. The photovoltaic voltage generated by the anode of the photovoltaic element PDA is then applied to the gate of the high-voltage HEMT transistor. When this gate voltage exceeds the threshold voltage of the high-voltage HEMT transistor, the high-voltage HEMT transistor turns on, and the load current flows through its channel.
[0077] (3) Reset phase after the light signal disappears: When the light signal disappears, the photovoltaic element PDA stops generating photocurrent, the gate potential of the low-voltage depletion-type HEMT transistor recovers, and its gate-source voltage... The voltage rises back to above its threshold voltage, thus turning the transistor back on. The turn-on of the low-voltage depletion-mode HEMT transistor rapidly pulls the gate potential of the high-voltage HEMT transistor down to the turn-off level, ensuring reliable turn-off of the high-voltage HEMT transistor.
[0078]
Example 2
[0079] Unlike embodiment one, the output chip provided in this embodiment uses a depletion-type HEMT transistor as its high-voltage HEMT transistor, therefore... Figure 8 and combined Figure 9 As shown, the high-voltage HEMT transistor does not have a hole injection layer 50 formed below its gate, but is directly electrically connected to the barrier layer 30.
[0080] Since the high-voltage HEMT transistor in this embodiment is a depletion-type transistor, the output chip provided in this embodiment is suitable for normally open optical control relays.
[0081] Based on this, Figure 6 and Figure 7 As shown in the diagram, in this embodiment, the source of the low-voltage enhancement-mode HEMT transistor, the gate of the low-voltage depletion-mode HEMT transistor, and the first terminal of the passive device are connected to a third node; the source of the low-voltage depletion-mode HEMT transistor and the second terminal of the passive device are connected to a fourth node; the drain of the low-voltage enhancement-mode HEMT transistor and the drain of the low-voltage depletion-mode HEMT transistor are connected to a fifth node; the gate of the low-voltage enhancement-mode HEMT transistor is used to connect to the anode of the photovoltaic element PDA; the third node is used to connect to the cathode of the photovoltaic element PDA; the fourth node is connected to the source of the high-voltage HEMT transistor; and the fifth node is connected to the gate of the high-voltage HEMT transistor.
[0082] Similarly, in this embodiment, the high-voltage HEMT transistor can be used as follows: Figure 6 The parallel structure shown can also be adopted as follows: Figure 7 The monolithic integrated structure shown.
[0083] In addition, in Embodiment 1, the low-voltage depletion-type HEMT transistor in the clamping circuit adopts a parallel combined structure, including two gates, two sources, and two drains, with the two gates electrically connected to each other. This structure effectively increases the equivalent channel width, significantly reducing the on-resistance of the transistor, thereby providing an ultra-low impedance charge discharge path for the gate of the enhancement-type high-voltage HEMT transistor, shortening the turn-off time to the nanosecond level, and ensuring complete turn-off and high-speed switching performance of the device. In this embodiment, the low-voltage depletion-type HEMT mainly serves as a normally-on bias or load element, establishing the initial operating point of the circuit together with the resistor. Its on-resistance requirement is relatively low. Therefore, in this embodiment, preferably, the low-voltage depletion-type HEMT transistor can meet the requirements using a single standard device structure, which also helps optimize chip area.
[0084] The optically controlled relay provided in this embodiment operates as follows:
[0085] (1) No-light-signal state: When there is no light signal, the photovoltaic PDA has no output. At this time, the low-voltage enhancement-mode HEMT transistor is in the off state because its gate has no bias voltage. The low-voltage depletion-mode HEMT transistor is naturally turned on due to its inherent characteristics. The turn-on of the low-voltage depletion-mode HEMT transistor clamps the potential of the gate of the high-voltage HEMT transistor to a low level close to the source of the high-voltage HEMT transistor. For the depletion-mode high-voltage HEMT transistor, its gate-source voltage is... When the voltage exceeds the negative threshold voltage, the transistor turns on and the circuit is in a conducting state.
[0086] (2) Photo-signal triggering stage: When a photo-signal is generated, the photovoltaic element PDA generates a photocurrent, flowing from the cathode to the anode. At this time, the cathode potential of the photovoltaic element PDA is pulled low, generating a negative voltage. This negative voltage is directly applied to the gate of the low-voltage depletion-type HEMT transistor, causing its gate-source voltage to decrease. Below its turn-off threshold, the low-voltage depletion-type HEMT transistor turns off, releasing the clamping effect on the gate of the high-voltage HEMT transistor. Simultaneously, the anode of the photovoltaic element PDA generates a positive photovoltaic voltage, which is applied to the gate of the low-voltage enhancement-type HEMT transistor, causing it to... When the voltage exceeds its turn-on threshold, the low-voltage enhancement-mode HEMT transistor turns on. The turn-on of the low-voltage enhancement-mode HEMT transistor pulls the high-voltage HEMT gate potential down to the negative cathode potential of the photovoltaic device (PDA). This reduces the gate-source voltage of the depletion-mode high-voltage HEMT transistor. Driven to a negative voltage far below its threshold, the high-voltage HEMT transistor is reliably turned off, and the circuit is in an open state.
[0087] (3) Reset phase after the light signal disappears: When the light signal disappears, the photovoltaic PDA stops working, and both the positive photovoltaic voltage and the negative cathode voltage disappear. The low-voltage enhancement-mode HEMT transistor loses its gate voltage and turns off, the low-voltage depletion-mode HEMT transistor loses its gate voltage and turns off, the low-voltage depletion-mode HEMT transistor recovers its gate potential and naturally turns on, and the circuit resets to the initial steady state when there is no light signal, that is, the high-voltage HEMT transistor turns on and the circuit is turned on.
[0088] In summary, the output chip provided in this embodiment of the invention integrates a high-voltage HEMT transistor and a clamping circuit. The high-voltage HEMT transistor and the clamping circuit are electrically isolated. The gate of the high-voltage HEMT transistor is used to receive a photovoltaic voltage signal from a photovoltaic element. The clamping circuit is connected between the gate and source of the high-voltage HEMT transistor and is configured to accelerate the charging and discharging of the gate capacitance of the high-voltage HEMT transistor based on the photovoltaic voltage signal. Compared with the prior art, the output chip and the light-controlled relay containing the output chip provided in this embodiment of the invention have advantages such as high integration, nanosecond speed, low impedance, single-chip compatibility with AC / DC and normally open / normally closed, applicability to a wide voltage range above 40V, and significantly reduced package size.
[0089] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similar or identical parts between embodiments can be referred to mutually. In addition, different parts between embodiments can also be combined with each other, and this invention does not limit this.
[0090] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.
Claims
1. An output chip for a light-controlled relay, characterized in that, The output chip integrates a high-voltage HEMT transistor and a clamping circuit, and the high-voltage HEMT transistor and the clamping circuit are isolated by an electrical isolation structure. The gate of the high-voltage HEMT transistor is used to receive the photovoltaic voltage signal from the photovoltaic element; The clamping circuit is connected between the gate and source of the high-voltage HEMT transistor and is configured to accelerate the charging and discharging of the gate capacitance of the high-voltage HEMT transistor based on the photovoltaic voltage signal.
2. The output chip of the light-controlled relay as described in claim 1, characterized in that, The clamping circuit includes a low-voltage depletion-type HEMT transistor, a low-voltage enhancement-type HEMT transistor, and a passive device; the low-voltage depletion-type HEMT transistor, the low-voltage enhancement-type HEMT transistor, and the passive device are electrically isolated from each other.
3. The output chip of the light-controlled relay as described in claim 2, characterized in that, The high-voltage HEMT transistor is an enhancement-mode transistor; The gate of the low-voltage depletion-type HEMT transistor, the source of the low-voltage enhancement-type HEMT transistor, and the first terminal of the passive device are connected to a first node. The source of the low-voltage depletion-type HEMT transistor, the gate of the low-voltage enhancement-type HEMT transistor, the drain of the low-voltage enhancement-type HEMT transistor, and the second terminal of the passive device are connected to a second node. The drain of the low-voltage depletion-type HEMT transistor is connected to the gate of the high-voltage HEMT transistor; The first node is used to connect to the cathode of the photovoltaic element; The second node is connected to the source of the high-voltage HEMT transistor.
4. The output chip of the light-controlled relay as described in claim 2, characterized in that, The low-voltage depletion-type HEMT transistor includes two depletion-type HEMT cells connected in parallel, and the gates of the two depletion-type HEMT cells are electrically connected to each other.
5. The output chip of the light-controlled relay as described in claim 2, characterized in that, The high-voltage HEMT transistor is a depletion-type transistor; The source of the low-voltage enhancement-mode HEMT transistor, the gate of the low-voltage depletion-mode HEMT transistor, and the first terminal of the passive device are connected to a third node. The source of the low-voltage depletion-type HEMT transistor and the second terminal of the passive device are connected to the fourth node; The drain of the low-voltage enhancement-mode HEMT transistor and the drain of the low-voltage depletion HEMT transistor are connected to a fifth node; The gate of the low-voltage enhancement-mode HEMT transistor is used to connect to the anode of the photovoltaic element; The third node is used to connect to the cathode of the photovoltaic element; The fourth node is connected to the source of the high-voltage HEMT transistor; The fifth node is connected to the gate of the high-voltage HEMT transistor.
6. The output chip of the light-controlled relay as described in claim 2, characterized in that, The passive device is an integrated resistor based on two-dimensional electron gas.
7. The output chip of the light-controlled relay as described in claim 1 or 2, characterized in that, The output chip includes a substrate and an epitaxial layer formed on the substrate; The electrically isolated structure extends from the surface of the epitaxial layer to the substrate; The electrical isolation structure is a trench isolation structure or an injection isolation structure.
8. The output chip of the light-controlled relay as described in claim 1, characterized in that, The high-voltage HEMT transistor is composed of two high-voltage HEMT dies independently formed in the epitaxial layer, cascaded in reverse. The sources of the two high-voltage HEMT dies are electrically connected to each other, the gates are electrically connected to each other, and each has a drain to form a bidirectional switch.
9. The output chip of the light-controlled relay as described in claim 1, characterized in that, The high-voltage HEMT transistor is a single-unit integrated bidirectional transistor structure, including a shared source, a shared gate, and two independent drains, with the two drains located on opposite sides of the shared source.
10. A light-controlled relay, characterized in that, include: A light-emitting chip, which has light-emitting elements, is used to emit light signals; A photovoltaic element chip, having a photovoltaic element formed thereon, is used to receive the light signal and generate a photovoltaic voltage signal; as well as, The output chip as described in any one of claims 1 to 9.