Display panel and display device

Abstract

The embodiment of the invention provides a display panel and a display device, the display panel comprises a first substrate and a second substrate, and the first substrate and the second substrate are oppositely arranged; the display panel comprises a display area and a first non-display area located on at least one side of the display area, the first non-display area comprises a gate drive circuit, and the gate drive circuit is arranged in a first substrate; the first substrate comprises a first substrate and a shielding layer, and the shielding layer is located on the side, away from the first substrate, of the gate drive circuit; wherein at least part of the shielding layer is located between the gate drive circuit and the display area. The electric field between the gate drive circuit and the display area can be shielded by the shielding layer, the influence of the electric field of the gate drive circuit on the display area is reduced, and the display quality of the display panel is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display panel and a display device. BACKGROUND

[0002] In the display panel, the periphery of the display area is usually provided with a gate drive circuit for driving the switching transistor of the display area. In the prior art, the electric field generated by the gate drive circuit is easy to attract impurity ions, resulting in more ion aggregation at the edge of the display area. This is easy to cause the electric field at the edge of the display area to be abnormal, affecting the normal display of the display panel. SUMMARY

[0003] Therefore, the embodiments of the present application provide a display panel and a display device to solve the above problems.

[0004] In a first aspect, the embodiments of the present application provide a display panel, comprising a first substrate and a second substrate, the first substrate and the second substrate are oppositely arranged; the display panel comprises a display area and a first non-display area located at least one side of the display area, the first non-display area comprises a gate drive circuit, the gate drive circuit is arranged in the first substrate; the first substrate comprises a first substrate and a shielding layer, the shielding layer is located at the side of the gate drive circuit away from the first substrate; wherein at least part of the shielding layer is located between the gate drive circuit and the display area.

[0005] In an implementation form of the first aspect, the shielding layer is electrically connected with a fixed potential electrode.

[0006] In an implementation form of the first aspect, the gate drive circuit comprises a plurality of cascaded shift register units, the plurality of shift register units are arranged along a first direction, and the shielding layer extends along the first direction.

[0007] In an implementation form of the first aspect, the length of the shielding layer in the first direction is not less than the length of the gate drive circuit in the first direction.

[0008] In an implementation form of the first aspect, the shielding layer comprises a plurality of first segments, the plurality of first segments are arranged along the first direction; wherein any two adjacent first segments in the first direction are separated.

[0009] In an implementation form of the first aspect, the number of the first segments is not more than the number of the shift register units, and the first segment is electrically connected with the shift register unit.

[0010] In an implementation form of the first aspect, the first segment is electrically connected with the capacitor in the shift register unit.

[0011] In an implementation form of the first aspect, the shielding layer at least partially covers the gate drive circuit in a direction perpendicular to the plane where the first substrate is located.

[0012] In an implementation form of the first aspect, the first non-display area further comprises a plurality of signal lines, the signal lines are located on a side of the gate driving circuit away from the display area, the gate driving circuit comprises a plurality of shift register units arranged along a first direction; along a direction perpendicular to a plane where the first substrate is located, the shielding layer at least partially covers the shift register units and at least partially covers the signal lines.

[0013] In an implementation form of the first aspect, the shielding layer comprises a first shielding layer and a second shielding layer arranged in the same layer, along a direction perpendicular to a plane where the first substrate is located, the first shielding layer at least partially covers the shift register units, and the second shielding layer at least partially covers the signal lines; wherein the first shielding layer comprises a plurality of first segments that are spaced apart, the first segments are electrically connected to the shift register units, and the second shielding layer is electrically connected to the common potential electrode in the first substrate.

[0014] In an implementation form of the first aspect, the gate driving circuit comprises a first line switching part, the first line switching part is arranged in the same layer as the shielding layer; the shielding layer comprises a first hollow part, along a direction perpendicular to a plane where the first substrate is located, a projection of the first hollow part on the first substrate covers a projection of the first line switching part on the first substrate.

[0015] In an implementation form of the first aspect, the shielding layer extends along a first direction, the shielding layer comprises a plurality of second segments, the plurality of second segments are arranged along a second direction, the second direction intersects the first direction; wherein any two adjacent second segments in the second direction are spaced apart.

[0016] In an implementation form of the first aspect, along a direction perpendicular to a plane where the first substrate is located, the plurality of second segments at least partially overlap the gate driving circuit.

[0017] In a second aspect, based on the same inventive concept, an embodiment of the present application provides a display device, comprising the display panel provided in the first aspect.

[0018] In the embodiments of the present application, the shielding layer is arranged on a side of the gate driving circuit away from the first substrate, and at least part of the shielding layer is arranged between the gate driving circuit and the display area, so that the shielding layer can shield the electric field between the gate driving circuit and the display area, reduce the influence of the electric field of the gate driving circuit on the display area, thereby facilitating to ensure the electric field stability at different positions of the display area and improve the display quality of the display panel. BRIEF DESCRIPTION OF DRAWINGS

[0019] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly introduced as follows. Obviously, the drawings in the following description only constitute some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.

[0020] Figure 1 A simplified structural schematic diagram of a display panel provided by an embodiment of the present application; Figure 2A A planar schematic diagram of a display panel provided by an embodiment of the present application; Figure 2B A planar schematic diagram of a display panel provided by an embodiment of the present application; Figure 3 A structural schematic diagram of a first substrate provided by an embodiment of the present application; Figure 4 A planar schematic diagram of a display panel provided by an embodiment of the present application; Figure 5A A planar schematic diagram of a display panel provided by an embodiment of the present application; Figure 5B A planar schematic diagram of a display panel provided by an embodiment of the present application; Figure 6 A structural schematic diagram of a first substrate provided by an embodiment of the present application; Figure 7 A schematic diagram of external ion movement related to an embodiment of the present application; Figure 8 A partial circuit schematic diagram of a shift register unit 41 provided by an embodiment of the present application; Figure 9 A planar schematic diagram of a display panel provided by an embodiment of the present application; Figure 10 A planar schematic diagram of a display panel provided by an embodiment of the present application; Figure 11 A Figure 10 A sectional schematic diagram along the tangent AA'; Figure 12 A structural schematic diagram of a first substrate provided by an embodiment of the present application; Figure 13 A partial enlarged schematic diagram of a display panel provided by an embodiment of the present application; Figure 14 A Figure 13 A sectional schematic diagram along the tangent BB'; Figure 15 A planar schematic diagram of a display panel provided by an embodiment of the present application; Figure 16 A plan view of yet another display panel provided in an embodiment of this application; Figure 17 This is a schematic diagram of a display device provided in an embodiment of this application. Detailed Implementation

[0021] To better understand the technical solution of this application, the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0022] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0023] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0024] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Furthermore, the character " / " in this article generally indicates that the related objects before and after it have an "or" relationship.

[0025] Various modifications and variations can be made to this application without departing from its spirit or scope, which will be apparent to those skilled in the art. Therefore, this application is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the implementation methods provided in the embodiments of this application can be combined with each other without contradiction.

[0026] Figure 1 This is a simplified structural diagram of a display panel provided in an embodiment of this application. Figure 2A This is a plan view of a display panel provided in an embodiment of this application.

[0027] This application embodiment provides a display panel 01, such as Figure 1 As shown, the display panel 01 includes a first substrate 10 and a second substrate 20, which are disposed opposite to each other, and a liquid crystal layer 30 can be disposed between the first substrate 10 and the second substrate 20.

[0028] For example, display panel 01 is a liquid crystal display panel, and first substrate 10 is an array substrate in the liquid crystal display panel, used to set structures such as transistors, signal lines, pixel electrodes, and common potential electrodes. Second substrate 20 is a color filter substrate in the liquid crystal display panel, used to set structures such as color resist and black matrix.

[0029] Combination Figure 2A As shown, the display panel 01 includes a display area AA and a first non-display area NA1 located on at least one side of the display area AA. The first non-display area NA1 includes a gate driving circuit 40, which is disposed in the first substrate 10.

[0030] The first substrate 10 includes a first substrate 11 and a shielding layer 12, with the shielding layer 12 located on the side of the gate drive circuit 40 away from the first substrate 11.

[0031] For example, such as Figure 1 As shown, the gate drive circuit 40 includes a plurality of transistors T (only one transistor is shown in the figure). Each transistor T includes a source R and a drain S. The shielding layer 12 is located on the side of the source R and drain S of the transistor T away from the first substrate 11. Of course, the source R and drain S of the transistor T can be located on the same layer or on different layers, and this application does not make a specific limitation.

[0032] It should be noted that, in Figure 1 In the first substrate 10 of the display panel 01 shown, only the positional relationship between the gate driving circuit 40 and the shielding layer 12 related to this application is illustrated. The structure of the first substrate 10 located in the display area AA is not illustrated. The structure of the first substrate 10 located in the display area AA can be the same as the prior art, and will not be described in detail here.

[0033] At least a portion of the shielding layer 12 is located between the gate driving circuit 40 and the display area AA. That is, at least a portion of the shielding layer 12 exists between the area where the gate driving circuit 40 is located and the display area AA.

[0034] For example, such as Figure 2A As shown, the display area AA includes multiple gate lines GI, the gate driving circuit 40 includes multiple output terminals GOUT, the output terminals GOUT are electrically connected to the gate lines GI, and at least a portion of the shielding layer 12 is located between the output terminal GOUT of the gate driving circuit 40 and the display area AA.

[0035] Optionally, the shielding layer 12 may include an indium tin oxide (ITO) material.

[0036] The inventors of the present application have found that, in the related art, the gate drive circuit generates an electric field in the working process, and the electric field easily attracts ions to gather. For a liquid crystal display panel, some ions (such as impurity ions of negative polarity) in the liquid crystal layer are attracted by the electric field of the gate drive circuit, and easily gather at the edge of the liquid crystal layer, that is, the edge of the display area. The gathering of ions changes the electric field at the edge of the display area, causes abnormal flipping of liquid crystal molecules at the edge of the display area, and easily causes display abnormalities, such as black spots at the edge of the display area.

[0037] Therefore, in the embodiments of the present application, the shielding layer 12 is arranged on the side of the gate drive circuit 40 away from the first substrate 11, and at least part of the shielding layer 12 is arranged between the gate drive circuit 40 and the display area AA. Thus, the shielding layer 12 can shield the electric field between the gate drive circuit 40 and the display area AA, reduce the influence of the electric field of the gate drive circuit 40 on the display area AA, and thus help to ensure the stability of the electric field at different positions of the display area AA and improve the display quality of the display panel 01.

[0038] Specifically, for a liquid crystal display panel, as shown in Figure 1 The liquid crystal layer 30 is arranged in the display area AA of the display panel 01. Since the liquid crystal layer 30 is arranged between the first substrate 10 and the second substrate 20, and the gate drive circuit 40 is arranged in the part of the first substrate 10 located in the first non-display area NA1, the first shielding layer 12 in the first substrate 10 is arranged on the side of the gate drive circuit 40 away from the first substrate 11, and at least part of the shielding layer 12 is arranged between the gate drive circuit 40 and the display area AA. Thus, at least part of the shielding layer 12 can be arranged between the gate drive circuit 40 and the liquid crystal layer 30. Thus, the shielding layer 12 can shield the electric field between the gate drive circuit 40 and the liquid crystal layer 30, reduce the attraction ability of the electric field of the gate drive circuit 40 to ions in the liquid crystal layer 30, and thus help to improve the problem of ion gathering at the edge of the liquid crystal layer 30, and further help to ensure the stability of the electric field at different positions of the display area AA and improve the display quality of the display panel 01.

[0039] Optionally, as shown in Figure 2A In the direction perpendicular to the plane where the first substrate 11 is located, the shielding layer 12 does not overlap the gate drive circuit 40. That is, the shielding layer 12 can be entirely arranged between the gate drive circuit 40 and the display area AA.

[0040] Based on the arrangement, while shielding the electric field between the gate driving circuit 40 and the liquid crystal layer 30 by the shielding layer 12, in order to make the space between the gate driving circuit 40 and the display area AA where the shielding layer 12 is arranged, the horizontal distance between the gate driving circuit 40 and the liquid crystal layer 30 can be increased, which is beneficial to further reduce the attraction of the electric field of the gate driving circuit 40 to the ions in the liquid crystal layer 30, and improve the problem of ion aggregation at the edge of the liquid crystal layer 30.

[0041] Optionally, as shown in Figure 2B , Figure 2B For another planar schematic diagram of the display panel provided by the embodiment of the present application, the shielding layer 12 and the gate driving circuit 40 at least partially overlap in the direction perpendicular to the plane where the first substrate 11 is located.

[0042] Based on the arrangement, the area of the shielding layer 12 can be larger, which is beneficial to improve the ability of the shielding layer 12 to shield the electric field between the gate driving circuit 40 and the liquid crystal layer 30.

[0043] In an embodiment of the present application, the shielding layer 12 is electrically connected with the fixed potential electrode. That is, the shielding layer 12 can receive the fixed potential.

[0044] Optionally, as shown in Figure 3 , Figure 3 For a structural schematic diagram of a first substrate provided by the embodiment of the present application, the shielding layer 12 is electrically connected with the common potential electrode COM in the first substrate 10.

[0045] Optionally, as shown in Figure 3 , the common potential electrode COM is located on the side of the shielding layer 12 close to the first substrate 11.

[0046] It should be noted that in some other embodiments, the common potential electrode COM can also be in the same layer as the shielding layer 12. In addition, the shielding layer 12 can also be electrically connected with the power signal line in the display panel 01.

[0047] The present inventors have found through research that the electric field generated by the gate driving circuit 40 is also easy to attract ions in the external environment to the edge of the display area AA, especially in a high-temperature and high-humidity environment, the problem of ion aggregation at the edge of the display area AA is aggravated.

[0048] In the embodiment of the present application, the shielding layer 12 receives a fixed potential, which is beneficial to improve the ability of the shielding layer 12 to shield the electric field between the gate drive circuit 40 and the display area AA, and is also beneficial to make the shielding layer 12 attract external ions, so that the external ions are gathered on the shielding layer 12, thereby reducing the gathering of external ions to the edge of the display area AA, and further improving the stability of the electric field at different positions of the display area AA and the display quality of the display panel 01.

[0049] Please continue to refer to Figure 2A In an embodiment of the present application, the gate drive circuit 40 includes a plurality of cascaded shift register units 41, and the plurality of shift register units 41 are arranged along the first direction Y, that is, in a macroscopic aspect, the gate drive circuit 40 extends along the first direction Y.

[0050] The shielding layer 12 extends along the first direction Y.

[0051] In the embodiment of the present application, the shielding layer 12 is arranged to be consistent with the extension direction of the gate drive circuit 40, so that the area of the shielding layer 12 between the gate drive circuit 40 and the display area AA is larger, which is beneficial to comprehensively shield the electric field between the gate drive circuit 40 and the display area AA, and greatly reduce the influence of the electric field of the gate drive circuit 40 on the display area AA.

[0052] Optionally, the length D1 of the shielding layer 12 in the first direction Y is not less than the length D2 of the gate drive circuit 40 in the first direction Y.

[0053] For example, as shown in Figure 2A The extension length D1 of the shielding layer 12 in the first direction Y is equal to the extension length D2 of the gate drive circuit 40 in the first direction Y, that is, D1=D2.

[0054] For example, as shown in Figure 4 , Figure 4 The present application provides another planar schematic diagram of a display panel, in which the extension length D1 of the shielding layer 12 in the first direction Y is greater than the extension length D2 of the gate drive circuit 40 in the first direction Y, that is, D1>D2.

[0055] Based on this arrangement, the shielding layer 12 can comprehensively shield the electric field between the gate drive circuit 40 and the display area AA, and further reduce the influence of the electric field of the gate drive circuit 40 on the display area AA.

[0056] Figure 5A The present application provides another planar schematic diagram of a display panel.

[0057] In an embodiment of the present application, as shown inFigure 5A As shown, the shielding layer 12 includes a plurality of first segments 121, which are arranged along the first direction Y.

[0058] Specifically, any two adjacent first segments 121 in the first direction Y are separated. That is, there is a gap between any two adjacent first segments 121 in the first direction Y.

[0059] The inventors of this application have discovered through research that if the shielding layer 12 extends too far without interruption, static electricity is easily generated on the shielding layer 12 during the manufacturing process of the display panel 01, and the static electricity can easily damage the internal components of the display panel 01.

[0060] In view of this, the shielding layer 12 in the first direction Y includes a plurality of disjoint first segments 121. Therefore, the length of a single first segment 121 in the first direction Y can be set to be smaller, which is beneficial to reduce the length of the shielding layer 12 that extends uninterruptedly in the first direction Y, thereby helping to improve the static electricity problem on the shielding layer 12.

[0061] In one embodiment of this application, the number of first segments 121 is not greater than the number of shift register units 41, and the first segments 121 are electrically connected to the shift register units 41.

[0062] Optional, such as Figure 5A As shown, the number of first segments 121 is the same as the number of shift register units 41, and the first segments 121 and the shift register units 41 can be electrically connected in a one-to-one correspondence.

[0063] Optional, such as Figure 5B As shown, Figure 5B This is a plan view of another display panel provided in an embodiment of the present application. The number of first segments 121 is less than the number of shift register units 41, and the first segments 121 are electrically connected to some of the shift register units 41.

[0064] For example, such as Figure 5B As shown, the number of shift register units 41 is twice the number of first segments 121, and the first segments 121 are electrically connected to the shift register units 41 of the odd-numbered levels. Of course, the first segments 121 can also be electrically connected to the shift register units 41 of the even-numbered levels.

[0065] For example, such as Figure 6 As shown, Figure 6 This is a schematic diagram of another first substrate provided in an embodiment of this application. The shielding layer 12 can be on the same layer as the common potential electrode COM in the display area AA, and the shielding layer 12 is separate from the common potential electrode COM. The first segment 121 in the shielding layer 12 can be electrically connected to the shift register unit 41 through the via KL.

[0066] In the embodiment of the present application, the first section 121 is electrically connected with the shift register unit 41, so that the first section 121 can receive the potential transmitted by the shift register unit 41, which is beneficial to make the first section 121 generate an electric field and adsorb external ions, and reduce the aggregation of external ions to the edge of the display area AA.

[0067] For example, as shown in Figure 7 , Figure 7 Fig. 1 is a schematic diagram of the movement of external ions according to an embodiment of the present application. The shift register unit 41 can provide a positive potential to the first section 121, so that the first section 121 can adsorb negative ions in external water vapor. When the negative ions carried by the external water vapor move to the display area AA, the electric field generated by the first section 121 will attract these negative ions earlier, so that the negative ions are aggregated in the first section 121, thereby reducing the aggregation of negative ions to the edge of the display area AA and reducing the influence of the aggregation of negative ions on the electric field at the edge of the display area AA.

[0068] At the same time, the number of the first sections 121 is not greater than the number of the shift register units 41, so that the same shift register unit 41 is not electrically connected with multiple first sections 121, which is beneficial to avoid the problem that the load of the shift register unit 41 is too large and affects the working stability of the shift register unit 41.

[0069] Optionally, the first section 121 is electrically connected with the capacitor in the shift register unit 41. Since the area of the capacitor plate is usually large, the electrical connection between the first section 121 and the capacitor is beneficial to improve the reliability of the connection between the first section 121 and the capacitor plate through the via, and reduce the influence of the first section 121 on the potential of the capacitor in the shift register unit 41, thereby ensuring the working stability of the shift register unit 41.

[0070] For example, as shown in Figure 8 , Figure 8 Fig. 2 is a partial circuit schematic diagram of a shift register unit 41 according to an embodiment of the present application. The shift register unit 41 includes a first output transistor T1 and a first capacitor C1. The first electrode of the first output transistor T1 is electrically connected with the output end GOUT of the shift register unit 41, and the first capacitor C1 includes a first plate C11 and a second plate C12. The first plate C11 is electrically connected with the gate of the first output transistor T1, and the second plate C12 is electrically connected with the output end GOUT of the shift register unit 41. The first section 121 can be electrically connected with the second plate C12 of the first capacitor C1. In an embodiment of the present application, as shown in Figure 1 , Figure 5A and Figure 5BAs shown, the shielding layer 12 at least partially covers the gate driving circuit 40 in a direction perpendicular to the plane where the first substrate 11 is located.

[0071] Specifically, the shielding layer 12 at least partially covers the shift register unit 41 in the gate driving circuit 40 in a direction perpendicular to the plane where the first substrate 11 is located.

[0072] In the embodiment of the present application, the shielding layer 12 is arranged to at least partially cover the gate driving circuit 40, which can make the area of the shielding layer 12 larger, thereby improving the shielding ability of the shielding layer 12 to the electric field between the gate driving circuit 40 and the display area AA and the ability to adsorb external ions. On the other hand, it is also conducive to making the shielding layer 12 overlap with the shift register unit 41 to which the shielding layer 12 is electrically connected, thereby facilitating the punching electrical connection between the shielding layer 12 and the shift register unit 41.

[0073] Figure 9 Another planar schematic view of a display panel is provided in the embodiment of the present application.

[0074] In one embodiment of the present application, as shown in Figure 9 The first non-display area NA1 further includes a plurality of signal lines 50, the signal lines 50 are located on the side of the gate driving circuit 40 away from the display area AA, and the signal lines 50 are arranged in the first substrate 10. The signal lines 50 and the gate driving circuit 40 can be arranged along the second direction X, and the second direction X intersects the first direction Y.

[0075] The gate driving circuit 40 includes a plurality of shift register units 41 arranged along the first direction Y, and the signal lines 50 can be electrically connected to the shift register units 41 (not shown in the figure).

[0076] For example, the signal lines 50 extend along the first direction Y, and a plurality of signal lines 50 are arranged along the second direction X. The signal lines 50 can be used to provide clock signals, trigger signals, fixed level signals, etc. to the shift register units 41.

[0077] The shielding layer 12 at least partially covers the shift register units 41 and at least partially covers the signal lines 50 in a direction perpendicular to the plane where the first substrate 11 is located.

[0078] For example, as shown in Figure 9 The shielding layer 12 can completely cover the shift register units 41 in the gate driving circuit 40, completely cover the signal lines 50, and completely cover the area between the signal lines 50 and the gate driving circuit 40 in a direction perpendicular to the plane where the first substrate 11 is located.

[0079] In this embodiment, the shielding layer 12 covers the shift register unit 41 in the gate drive circuit 40 and the signal line 50 on the side of the gate drive circuit 40 away from the display area AA. This is beneficial to further increase the area of ​​the shielding layer 12, thereby further improving the shielding layer 12's ability to shield the electric field between the gate drive circuit 40 and the display area AA, as well as the shielding layer 12's ability to adsorb external ions.

[0080] Figure 10 This is a plan view of yet another display panel provided in an embodiment of this application. Figure 11 for Figure 10 A schematic diagram of a cross section along the tangent line AA'.

[0081] In one embodiment of this application, combined with Figure 10 and Figure 11 As shown, the shielding layer 12 includes a first shielding layer 12A and a second shielding layer 12B disposed on the same layer, with the first shielding layer 12A and the second shielding layer 12B being separate.

[0082] Along the direction Z perpendicular to the plane where the first substrate 11 is located, the first shielding layer 12A at least partially covers the shift register unit 41, and the second shielding layer 12B at least partially covers the signal line 50.

[0083] The first shielding layer 12A includes multiple separate first segments 121, which are electrically connected to the shift register unit 41. The second shielding layer 12B is electrically connected to the common potential electrode COM in the first substrate 10.

[0084] For example, such as Figure 10 As shown, in the first shielding layer 12A, multiple first segments 121 are arranged along the first direction Y. The number of first segments 121 is no greater than the number of first shift register units 41, and at least some of the first shift register units 41 are electrically connected to the corresponding first segments 121. It should be noted that... Figure 10 Only the case where the number of the first segment 121 is the same as the number of the first shift register 41 is shown.

[0085] The extension length of the second shielding layer 12B in the first direction Y is greater than the extension length of the signal line 50 in the first direction Y. This is so that the second shielding layer 12B can overlap with the common potential electrode COM extending to the first non-display area NA1, facilitating the electrical connection between the second shielding layer 12B and the common potential electrode COM via a hole.

[0086] In the embodiment of the present application, the first shielding layer 12A is electrically connected with the shift register unit 41, and the second shielding layer 12B is electrically connected with the common potential electrode COM, so that the first shielding layer 12A and the second shielding layer 12B can receive the electric potential at the same time, and the problem that the signal potential is overloaded and the function is affected due to the connection of the first shielding layer 12A and the second shielding layer 12B to the same signal potential can be avoided.

[0087] It should be noted that in some other embodiments, a dedicated voltage can also be provided for the second shielding layer 12 to reduce the disturbance of the second shielding layer 12B to the electric potential on the common potential electrode COM.

[0088] Figure 12 Another structure diagram of the first substrate provided in the embodiment of the present application.

[0089] In one embodiment of the present application, as shown in Figure 12 , the gate drive circuit 40 includes a first wire changing part 42, and the first wire changing part 42 is in the same layer as the shielding layer 12.

[0090] The first wire changing part 42 refers to a wire changing part used when two signal part segments in the gate drive circuit 40 are electrically connected in different layers.

[0091] The shielding layer 12 includes a first hollow part LK1, and the projection of the first hollow part LK1 on the first substrate 11 covers the projection of the first wire changing part 42 on the first substrate 11 in the direction perpendicular to the plane where the first substrate 11 is located.

[0092] In the embodiment of the present application, the shielding layer 12 includes the first hollow part LK1, and the projection of the first hollow part LK1 on the first substrate 11 covers the projection of the first wire changing part 42 on the first substrate 11, so that the shielding layer 12 can avoid the first wire changing part 42 in the same layer, and the problem that the signal transmission of the first wire changing part 42 is affected due to the electrical connection between the shielding layer 12 and the first wire changing part 42 can be avoided.

[0093] In addition, as shown in Figure 13 , Figure 13 A partial enlarged diagram of a display panel provided in the embodiment of the present application, the display panel 01 can also include a second wire changing part 51 electrically connected with the signal line 50, and the second wire changing part 51 is in the same layer as the shielding layer 12.

[0094] For example, as shown in Figure 13 and Figure 14 , Figure 14 for Figure 13A cross-sectional view along the BB' tangent is shown. The signal line 50 can be electrically connected to the shift register unit 41 through the connecting trace 60 extending along the second direction X. The signal line 50 is electrically connected to the second switching part 51 through the first via K1, and the connecting trace 60 is electrically connected to the second switching part 51 through the second via K2, thereby realizing the electrical connection between the signal line 50 extending along the first direction Y and the connecting trace 60 extending along the second direction X.

[0095] The shielding layer 12 may also include a second cutout portion LK2, the projection of the second cutout portion LK2 on the first substrate 11 covering the projection of the second line-changing portion 51 on the first substrate 11.

[0096] In this way, when the shielding layer 12 overlaps with the signal line 50, the second switching section 51 can be avoided, which helps to prevent the shielding layer 12 from being electrically connected to the second switching section 51 and thus affecting the signal transmission of the second switching section 51.

[0097] Figure 15 This is a plan view of another display panel provided in an embodiment of this application.

[0098] like Figure 15 As shown, in one embodiment of this application, the shielding layer 12 extends along the first direction Y, and the shielding layer 12 includes a plurality of second segments 122, which are arranged along the second direction X, and the second direction X intersects the first direction Y.

[0099] For example, the first direction Y is the column direction in the display panel 01, and the second direction X is the row direction in the display panel 01.

[0100] Specifically, any two adjacent second segments 122 in the second direction X are separated. That is, there is a gap between any two adjacent second segments 122 in the second direction X.

[0101] In this embodiment of the application, the shielding layer 12 is provided to include a plurality of second segments 122 in the second direction X. In the process of external ions moving towards the display area AA, the multiple second segments 122 can be used to adsorb the external ions in sequence, which is beneficial to improve the ability of the shielding layer 12 to adsorb external ions and reduce the accumulation of external ions at the edge of the display area AA.

[0102] Optional, such as Figure 15 As shown, along a direction perpendicular to the plane where the first substrate 11 is located, a plurality of second segments 122 at least partially overlap with the gate drive circuit 40.

[0103] Based on the arrangement, on one hand, the overall area of the shielding layer 12 is large, which improves the ability of the shielding layer 12 to adsorb external ions and the ability to shield the electric field between the gate drive circuit 40 and the display area AA. On the other hand, the second segments 122 are conveniently electrically connected to the shift register units 41 in the gate drive circuit 40.

[0104] Further, as shown in FIG. 1B, Figure 16 Figure 16 FIG. 1C is a plan view of another display panel according to an embodiment of the present application. The shielding layer 12 includes a plurality of first segments 121 arranged along a first direction Y. Each first segment 121 includes a plurality of second segments 122 arranged along a second direction X.

[0105] That is, the shielding layer 12 is not only distributed in a plurality of segments along the first direction Y, but also distributed in a plurality of segments along the second direction X. Of course, the plurality of second segments 122 of the same first segment 121 can be electrically connected to the same shift register unit 41.

[0106] Based on the arrangement, the length of the shielding layer 12 extending uninterruptedly along the first direction Y and the second direction X is reduced while improving the ability of the shielding layer 12 to adsorb external ions, which is conducive to further improving the problem of static electricity in the manufacturing process of the shielding layer 12.

[0107] Further, the plurality of second segments 122 of the same first segment 121 can be electrically connected to the shift register unit 41 through a plurality of vias, which is conducive to increasing the connection area of the first segment 121 and the shift register unit 41, enhancing the potential stability of the first segment 121, and improving the corrosion resistance.

[0108] Figure 17 FIG. 2 is a schematic view of a display device according to an embodiment of the present application.

[0109] As shown in FIG. 2, Figure 17 the present application provides a display device 02 including the display panel 01 provided in the above embodiments. Exemplarily, the display device 02 is an electronic device such as a mobile phone, a computer, a television, a vehicle-mounted display, a wearable display, etc., which is not limited in the present application.

[0110] In the display device 02, the shielding layer 12 is arranged on the side of the gate drive circuit 40 away from the first substrate 11, and at least part of the shielding layer 12 is arranged between the gate drive circuit 40 and the display area AA. Thus, the shielding layer 12 can be used to shield the electric field between the gate drive circuit 40 and the display area AA, reduce the influence of the electric field of the gate drive circuit 40 on the display area AA, and thus be conducive to ensuring the electric field stability at different positions of the display area AA and improving the display quality of the display panel 01.

[0111] ​The above only is the preferred embodiment of the present application, and is not used to limit the present application, any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims

1. A display panel, characterized in that, It includes a first substrate and a second substrate, wherein the first substrate and the second substrate are disposed opposite to each other; The display panel includes a display area and a first non-display area located on at least one side of the display area. The first non-display area includes a gate driving circuit, which is disposed in the first substrate. The first substrate includes a first substrate and a shielding layer, the shielding layer being located on the side of the gate driving circuit away from the first substrate; wherein at least a portion of the shielding layer is located between the gate driving circuit and the display area.

2. The display panel according to claim 1, characterized in that, The shielding layer is electrically connected to the fixed potential electrode.

3. The display panel according to claim 1, characterized in that, The gate drive circuit includes multiple cascaded shift register units, which are arranged along a first direction, and the shielding layer extends along the first direction.

4. The display panel according to claim 3, characterized in that, The length of the shielding layer in the first direction is not less than the length of the gate driving circuit in the first direction.

5. The display panel according to claim 3, characterized in that, The shielding layer includes a plurality of first segments, which are arranged along the first direction; Wherein, any two adjacent first segments in the first direction are separated.

6. The display panel according to claim 5, characterized in that, The number of the first segments is not greater than the number of the shift register units, and the first segments are electrically connected to the shift register units.

7. The display panel according to claim 6, characterized in that, The first segment is electrically connected to the capacitor in the shift register unit.

8. The display panel according to claim 1, characterized in that, Along a direction perpendicular to the plane of the first substrate, the shielding layer at least partially covers the gate drive circuit.

9. The display panel according to claim 8, characterized in that, The first non-display area also includes multiple signal lines, which are located on the side of the gate driving circuit away from the display area. The gate driving circuit includes multiple shift register units arranged along the first direction. Along a direction perpendicular to the plane of the first substrate, the shielding layer at least partially covers the shift register unit and at least partially covers the signal line.

10. The display panel according to claim 9, characterized in that, The shielding layer includes a first shielding layer and a second shielding layer disposed on the same layer. Along a direction perpendicular to the plane where the first substrate is located, the first shielding layer at least partially covers the shift register unit, and the second shielding layer at least partially covers the signal line. The first shielding layer includes multiple separate first segments, which are electrically connected to the shift register unit, and the second shielding layer is electrically connected to the common potential electrode in the first substrate.

11. The display panel according to claim 8, characterized in that, The gate driving circuit includes a first switching section, which is on the same layer as the shielding layer. The shielding layer includes a first cutout portion along a direction perpendicular to the plane of the first substrate, and the projection of the first cutout portion on the first substrate covers the projection of the first switching portion on the first substrate.

12. The display panel according to claim 1, characterized in that, The shielding layer extends along a first direction, and the shielding layer includes a plurality of second segments arranged along a second direction, the second direction intersecting the first direction; Wherein, any two adjacent second segments in the second direction are separated.

13. The display panel according to claim 12, characterized in that, Along a direction perpendicular to the plane where the first substrate is located, a plurality of second segments at least partially overlap with the gate drive circuit.

14. A display device, characterized in that, Includes the display panel as described in any one of claims 1-13.

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