Avalanche detector and preparation method thereof

Abstract

The invention belongs to the field of detectors, and particularly relates to an avalanche detector and a preparation method thereof. The problems that an existing low-gain avalanche detector is single in performance regulation and control dimension, narrow in manufacturing process window, low in tolerance rate and the like are solved. The avalanche detector comprises: a substrate, which is sequentially stacked from bottom to top; the first semiconductor layer is formed on the substrate or serves as a part of the substrate; a deep gain layer; a buffer layer; and a shallow gain layer. By introducing a double-gain-layer physical architecture, multi-dimensional design freedom degrees of depth, concentration, doping elements and the like are provided; through multi-dimensional flexible regulation and control, the performance potential of a double-gain-layer physical architecture is fully released, the comprehensive performance of the detector is improved, and meanwhile, the process window is remarkably widened.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of detectors, in particular to an avalanche detector and a preparation method thereof. BACKGROUND

[0002] Although traditional silicon-based detectors (such as silicon microstrips and silicon pixel detectors) have excellent spatial resolution, their time resolution is usually limited to the nanosecond level. In the extremely high particle flux environment of high luminosity colliders (represented by HL-LHC), this time sequence bottleneck will cause serious event pile-up, thereby restricting the accurate reconstruction of the interaction vertex by the detector.

[0003] To address this challenge, low-gain avalanche detectors achieve performance breakthrough by introducing a local gain layer in the traditional PIN diode. The gain layer produces controllable non-saturated avalanche multiplication, so that the time resolution of the detector is no longer determined by the transit time of the carriers, but by the faster avalanche establishment process, thereby pushing the theoretical limit to the picosecond level. Combined with single-carrier (hole) triggering, high multiplication electric field and high intrinsic gain, LGAD provides excellent signal-to-noise ratio and has become a key technology for frontier particle physics experiments.

[0004] However, the performance advantage of LGAD is highly dependent on the design of the gain layer, which also brings new challenges. The performance regulation of current LGAD is mainly limited to the optimization of the doping concentration and profile of the gain layer. This single-dimensional regulation method limits the control of the uniformity of the multiplication layer electric field, the manufacturing process tolerance and the performance optimization freedom, ultimately restricting the further improvement of device performance and the yield of large-scale production. SUMMARY In view of the above problems, the present application provides an avalanche detector and a preparation method thereof, which at least solves one of the problems of single-dimensional performance regulation, narrow manufacturing process window and low tolerance rate of the existing low-gain avalanche detector.

[0005] In one aspect, the present application provides an avalanche detector, comprising, from bottom to top, a substrate, a first semiconductor layer formed on the substrate or as part of the substrate, a deep gain layer, a buffer layer, and a shallow gain layer.

[0006] Preferably, the first semiconductor layer is an epitaxial layer formed on the substrate; or the substrate is a high-resistance substrate and simultaneously serves as the first semiconductor layer.

[0007] ​​​​​It should be noted that the deep gain layer and the shallow gain layer are both heavily doped regions, and the deep gain layer and the shallow gain layer are electrically isolated by the buffer layer.

[0008] It should be noted that the "shallow gain layer" and the "deep gain layer" in the present application are used to distinguish the relative positions of the two layers in the longitudinal structure of the device, and do not constitute a limitation on the absolute distance of the two layers from the surface of the device.

[0009] Specifically, the thickness of the buffer layer is greater than or equal to 0.1 μm. Controlling the interlayer spacing between the deep gain layer and the shallow gain layer to be greater than or equal to 0.1 μm ensures effective physical isolation and electrical decoupling between the deep gain layer and the shallow gain layer: on the one hand, it provides the necessary space for forming a uniform and wide platform electric field region, which is the key to achieving a smooth transition of the electric field from the shallow peak to the deep gradual rising region and optimizing the carrier transport characteristics; on the other hand, it prevents the two gain layers from interfering with each other in the electric field distribution, ensuring that they can function independently.

[0010] Preferably, the thickness of the buffer layer is not greater than half of the thickness of the first semiconductor layer.

[0011] Exemplarily, the thickness of the deep gain layer and the shallow gain layer is the same or different, and each thickness is greater than or equal to 0.1 μm. Designing the thickness of each gain layer to be greater than or equal to 0.1 μm ensures that the gain layer has sufficient volume to form a stable and controllable avalanche multiplication region, avoiding the electric field being too strong locally, breaking down too early, or the gain being unstable due to the layer being too thin.

[0012] Preferably, the thickness of the shallow gain layer is less than the thickness of the deep gain layer, which can enable the shallow gain layer to trigger and amplify quickly, while the thicker deep gain layer serves as the main amplification region, providing most of the intrinsic gain, thereby achieving the synergistic optimization of high time resolution and high gain of the detector.

[0013] Preferably, the thickness of the shallow gain layer is 0.1-2 μm, and the thickness of the deep gain layer is 1-5 μm.

[0014] By adjusting the different thickness combinations of the deep gain layer and the shallow gain layer, different trigger mechanisms can be adapted to precisely control the width of the platform gain region. The width of the platform region is mainly determined by the thickness of the intrinsic buffer layer and the longitudinal spacing between the two gain layers. By independently adjusting the thickness of the shallow and deep gain layers, the longitudinal spacing can be directly changed, thereby precisely controlling the effective physical width and electric field intensity distribution of the high electric field platform region, and adapting to different particle trigger mechanisms and gain requirements.

[0015] In one possible design, the thickness of the deep gain layer is 0.2 μm, and the thickness of the shallow gain layer is 2.5 μm.

[0016] In one possible design, the thickness of the deep gain layer is 0.2 μm, and the thickness of the shallow gain layer is 3 μm.

[0017] Furthermore, the deep gain layer and the shallow gain layer are both P-type doped or both N-type doped; When it is P-type doped, the dopant ions include one or more of B, In, and Ga; When it is N-type doped, the dopant ions include one or more of P, As, and Sb; Furthermore, the types of doped ions in the deep gain layer and the shallow gain layer may be the same or different.

[0018] It should be noted that the doped ions described above are merely illustrative examples. Those skilled in the art will know that any group III or group V element can be selected if it meets the requirements for valence electron matching, atomic size, solid solubility, and energy level necessary for forming a high-quality PN junction.

[0019] It should be noted that the deep gain layer contains carbon and / or oxygen; and / or, the shallow gain layer contains carbon and / or oxygen. Introducing carbon co-doping and / or oxygen co-doping into the gain layer can suppress the acceptor removal effect caused by radiation, thereby improving the device's radiation resistance. For example, the concentration of carbon in the shallow gain layer is determined by both the required radiation resistance level and the acceptable leakage current level for the practical application.

[0020] Preferably, the doping concentrations of the deep gain layer and the shallow gain layer are the same or different, and their respective doping concentrations are set at 1×10⁻⁶. 14 atoms / cm 3 ~1×10 21 atoms / cm 3 Within a certain range. By heavily doping the gain layer, a critical high electric field sufficient to induce avalanche multiplication can be established inside the device.

[0021] Preferably, the doping concentration of the shallow gain layer is lower than that of the deep gain layer, which enables the shallow gain layer to form a relatively narrow single-peak region with a high electric field peak, which is conducive to rapid triggering; while the deep gain layer forms a gradual rise region with a higher doping concentration and a gentler electric field distribution, which is conducive to achieving high and stable volume gain, and the two work together.

[0022] Furthermore, the doping concentration profiles of the deep gain layer and the shallow gain layer are the same or different, and the distribution is a uniform distribution, a linear gradient distribution, or a Gaussian distribution. Among them, a uniform distribution is beneficial for forming a stable and controllable electric field and has good process repeatability; a gradient distribution can achieve a smooth transition of the electric field, which helps to reduce noise and improve time response; a Gaussian distribution is a typical distribution after ion implantation and annealing, which can effectively control the junction depth and electric field peak position, and is a common means of optimizing the balance between gain and breakdown voltage.

[0023] In one possible design, the shallow gain layer has a thickness of 0.2 μm, and the dopant ions are boron and carbon, with a total doping concentration of 1.5 × 10⁻⁶. 17 atoms / cm 3 The deep gain layer has a thickness of 2.5 μm, is doped with boron ions, and has a total doping concentration of 5.1 × 10⁻⁶. 18 atoms / cm 3 This enables the thin-layer fast response of shallow gain layers and the thick-layer main amplification function of deep gain layers.

[0024] This invention enables high-fidelity, high-dynamic-range detection of complex signals and application scenarios that are difficult for existing single-gain-layer avalanche detectors to handle, such as transient gamma signals in the event accumulation background of high-brightness colliders and mixed fields of low-energy X-rays and high-energy minimum ionized particles. By subjecting the shallow gain layer and deep gain layer to host doping (doping ions are one or more of B, In, Ga, P, As, Sb) and / or engineering doping (introducing carbon or oxygen), respectively.

[0025] In one possible design, the shallow gain layer is selected from In or a combination of B and C for radiation resistance, while the deep gain layer uses a high concentration of B or P to enhance the gain: the shallow gain layer prioritizes radiation resistance and fast response through indium (In) doping or boron-carbon (B+C) co-doping, and is responsible for accurate timing and low-energy particle detection; the deep gain layer provides high overall gain through high concentration of boron (B) or phosphorus (P) doping, and is responsible for ensuring the detection efficiency of high-energy particles; the two are electrically connected in series through a buffer layer, and finally output a synthesized signal that is optimized in terms of time, energy and radiation resistance.

[0026] Furthermore, the avalanche detector also includes: The N+ contact region located above the shallow gain layer; The terminal extension region surrounding the composite active region formed by the shallow gain layer and the deep gain layer; The stop injection area is located outside the terminal extension area; A passivation layer covering the front side of the device; and A metal electrode that penetrates the passivation layer and is electrically connected to the N+ contact region and the substrate.

[0027] Addressing the two major technical bottlenecks of existing LGADs—large edge dead zones and significant performance degradation after irradiation—this invention provides a systematic solution by introducing a collaborative architecture of dual gain layers and a buffer layer. Specifically: In terms of lateral layout, by collaboratively optimizing the terminal extension region (such as N-JFE) surrounding the composite active region, new design freedom is provided to reduce edge ineffective regions while ensuring breakdown voltage; in terms of vertical structure and radiation resistance, the shallow gain layer and deep gain layer constitute functional redundancy. When the shallow gain layer degrades due to "acceptor removal" caused by irradiation damage, the deep gain layer and the plateau electric field region can serve as backup gain channels to maintain the overall gain of the device, significantly improving the reliability and lifespan of the device; furthermore, by introducing carbon / oxygen co-doping into the gain layer, the formation of irradiation defects can be suppressed at the atomic scale, further enhancing the intrinsic radiation resistance of the detector of this invention.

[0028] Preferably, the substrate material is silicon or silicon carbide.

[0029] For example, the buffer layer material is silicon, silicon carbide, or gallium nitride.

[0030] In one possible design, the substrate is a P-type semiconductor substrate; the epitaxial layer is a P-type lightly doped epitaxial layer (doping concentration lower than that of the P-type semiconductor substrate); both the deep gain layer and the shallow gain layer are heavily doped regions used to generate an avalanche multiplication effect.

[0031] On the other hand, the present invention also provides a method for preparing an avalanche detector, comprising: Provide substrate; A first semiconductor layer is formed on the substrate; A deep gain layer is formed in the first semiconductor layer; A buffer layer is formed on the deep gain layer by epitaxial growth; A shallow gain layer is formed in or on the buffer layer.

[0032] Specifically, both the steps of forming the deep gain layer and the steps of forming the shallow gain layer include an ion implantation process; the dopant ions used in the ion implantation are selected from one or more of B, In, Ga, P, As, and Sb.

[0033] Furthermore, during the process of implanting to form the deep gain layer and / or the shallow gain layer, carbon and / or oxygen co-implantation is performed simultaneously.

[0034] For example, the concentration of carbon implantation in the shallow gain layer is set according to the target radiation resistance level, while also taking into account the control of device leakage current.

[0035] Preferably, the step of forming the terminal extension region adopts an ion implantation process or a self-aligned trench terminal process.

[0036] For example, the buffer layer is implemented by an epitaxial process.

[0037] Compared with the prior art, the present invention has at least the following beneficial effects: 1. This invention, by introducing a collaborative physical architecture of dual gain layers and buffer layers, reconstructs the traditional single avalanche peak into a composite electric field distribution of shallow single peak-plateau electric field-zero field-deep gradual rise, thereby achieving optimized electric field distribution and improved overall performance, as detailed below: Improved temporal resolution: The shallow single-peak region provides primary gain, ensuring that charge carriers (especially electrons) are preferentially triggered and injected into the plateau electric field region below. The plateau electric field provides a uniform and efficient acceleration channel for charge carriers, effectively reducing the dispersion of charge carrier transit time before avalanche multiplication, thereby improving temporal resolution. A zero-field region is formed between the plateau region and the deep gradual rise region, which lengthens the transit time of charge carriers. To address this, the present invention can precisely control the thickness of the deep gain layer so that the generated gradual rise electric field can compress the influence range of the zero-field region to the maximum extent, ensuring that charge carriers can be collected quickly, and ultimately achieving high temporal resolution in the system. Enhanced gain and radiation resistance: The shallow main gain region and the platform-deep backup gain channel together constitute a redundant gain mechanism. When the shallow layer degrades due to radiation, the device can still maintain a high gain level through the backup channel, which significantly improves reliability. Detection spectrum broadening: The shallow single-peak region ensures efficient detection of low-energy particles (such as <0.1 MeV electrons), while the plateau electric field and the deep gradual rise region together broaden the effective detection volume, solving the problem of high-energy particles escaping due to insufficient depletion layer. Dark current suppression: The zero-field region naturally formed in the composite electric field effectively blocks the diffusion current, suppresses dark current, and improves the anti-crosstalk capability.

[0038] 2. The dual-gain-layer architecture of this invention creates multi-dimensional independent control parameters, greatly expanding the performance optimization space and process window. Specifically, this is manifested in: diverse combinations of gain layer positions, allowing precise control of the plateau region width by adjusting the thickness of each layer to adapt to different triggering and gain requirements; flexible heterogeneity of doped elements in the gain layer, allowing for independent selection of different dopant ions in the shallow and deep layers to achieve simultaneous improvement in key performance aspects such as radiation resistance and gain; flexible performance control of the gain layer, enabling further enhancement of specific performance through selective introduction of carbon and oxygen co-doping processes in different gain layers; and independent control of concentration and thickness, enabling refined designs such as fast response in thin layers and main amplification in thick layers, breaking through the performance control bottleneck of traditional single gain layers. Attached Figure Description

[0039] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the scope of this application. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings: Figures 1-13 This is a flowchart illustrating the method for fabricating a low-gain avalanche detector in an embodiment of the present invention. Figure 14 This is a schematic diagram of the internal electric field distribution of a low-gain avalanche detector in an embodiment of the present invention.

[0040] Figure label: 100 - Substrate; 200 - Epitaxial layer; 300 - Deep gain layer; 400 - Shallow gain layer; 500 - Buffer layer; 600 - N+ contact region; 700 - Metal electrode; 1-Stop injection region; 2-Terminal extension region; 3-Interlayer dielectric layer; 4-Screen oxide layer; 5-Field oxide layer; 6-Photoresist. Detailed Implementation

[0041] The embodiments of the technical solution of this application will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of this application and are therefore merely examples, and should not be used to limit the scope of protection of this application.

[0042] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims, and foregoing description of the drawings are intended to cover non-exclusive inclusion.

[0043] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined.

[0044] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0045] Performance improvements in existing avalanche detectors (such as the traditional LGAD) primarily revolve around doping and structural micro-optimization of a single gain layer. However, their core performance metrics (such as temporal resolution, gain, radiation tolerance, and detection energy spectrum) are mutually constrained, making it difficult for these devices to withstand extreme environments like high-brightness colliders. This invention fundamentally reconstructs the device's physical architecture, introducing a synergistic architecture of a dual-gain layer and an intrinsic buffer layer. By creating an internal electric field distribution (single peak-plateau-zero field-gradual rise), conflicting performance metrics are decoupled and allocated to different physical regions for independent optimization, thereby achieving synergistic performance improvements and expanding design freedom.

[0046] On one hand, according to a specific embodiment of the present invention, an avalanche detector is disclosed. Figure 13 A longitudinal cross-sectional view of an exemplary avalanche detector of the present invention is shown.

[0047] like Figure 13 As shown, the avalanche detector of the present invention includes a P-type substrate 100 stacked sequentially from bottom to top, on which a P-type epitaxial layer 200 is disposed; a deep gain layer 300 is formed in the epitaxial layer 200, and a buffer layer 500 is epitaxially grown on the deep gain layer 300; a shallow gain layer 400 is formed in the buffer layer 500, and an N+ contact region 600 is disposed above the shallow gain layer 400.

[0048] The effective area edge of the detector is protected by the terminal extension area 2, and a P-type stop injection area 1 is provided outside the terminal extension area 2 to suppress surface leakage; the isolation area of ​​the device is defined by the field oxygen layer 5.

[0049] The detector surface is covered with an interlayer dielectric layer 3, and the metal electrode 700 is electrically connected to the N+ contact area 600 through a contact hole.

[0050] Specifically, the thickness of the buffer layer is ≥0.1μm. The interlayer spacing between the deep gain layer and the shallow gain layer is controlled to be ≥0.1μm to ensure effective physical isolation and electrical decoupling between them. This provides necessary space for forming a uniform and broad plateau electric field region, which is crucial for a smooth transition of the electric field from the shallow peak to the deep gradual rise region and for optimizing carrier transport characteristics. Furthermore, it prevents mutual interference between the two gain layers in terms of electric field distribution, ensuring they can function independently.

[0051] For example, the deep gain layer and the shallow gain layer may have the same or different thicknesses, and each thickness is ≥0.1μm. The thickness of each gain layer is designed to be ≥0.1μm to ensure that the gain layer has sufficient volume to form a stable and controllable avalanche multiplication region, avoiding excessively strong local electric field, premature breakdown, or unstable gain due to excessively thin layer thickness.

[0052] Preferably, the shallow gain layer is thinner than the deep gain layer, which enables the shallow gain layer to be quickly triggered and perform primary amplification, while the thicker deep gain layer serves as the main amplification region, providing the majority of the intrinsic gain, thereby achieving synergistic optimization of high temporal resolution and high gain of the detector.

[0053] Both the deep gain layer and the shallow gain layer are P-type heavily doped regions, wherein the P-type dopant ions are independently selected from one or more of B, In, and Ga; or Both the deep gain layer and the shallow gain layer are N-type heavily doped regions, wherein the N-type dopant ions are independently selected from one or more of P, As, and Sb.

[0054] By adjusting different combinations of thicknesses of the deep and shallow gain layers to accommodate various triggering mechanisms, the width of the plateau gain region can be precisely controlled. The width of the plateau region is primarily determined by the thickness of the intrinsic buffer layer and the longitudinal spacing between the two gain layers. By independently adjusting the thicknesses of the shallow and deep gain layers, the longitudinal spacing can be directly altered, thereby finely controlling the effective physical width and electric field intensity distribution of the high-electric-field plateau region to adapt to different particle triggering mechanisms and gain requirements.

[0055] In one possible design, the thickness of the deep gain layer is 0.2 μm, and the thickness of the shallow gain layer is 2.5 μm.

[0056] In one possible design, the thickness of the deep gain layer is 0.2 μm, and the thickness of the shallow gain layer is 3 μm.

[0057] It should be noted that the deep gain layer contains carbon and / or oxygen; and / or, the shallow gain layer contains carbon and / or oxygen. Introducing carbon co-doping and / or oxygen co-doping into the gain layer can suppress the acceptor removal effect caused by irradiation, thereby improving the radiation resistance of the device.

[0058] Preferably, the doping concentrations of the deep gain layer and the shallow gain layer are the same or different, and their respective doping concentrations are set at 1×10⁻⁶. 14 atoms / cm 3 ~1×10 21 atoms / cm 3 Within a certain range. By heavily doping the gain layer, a critical high electric field sufficient to induce avalanche multiplication can be established inside the device.

[0059] Preferably, the doping concentration of the shallow gain layer is lower than that of the deep gain layer, which enables the shallow gain layer to form a relatively narrow single-peak region with a high electric field peak, which is conducive to rapid triggering; while the deep gain layer forms a gradual rise region with a higher doping concentration and a gentler electric field distribution, which is conducive to achieving high and stable volume gain, and the two work together.

[0060] Furthermore, the doping concentration profiles of the deep gain layer and the shallow gain layer are the same or different, and the distribution is uniform, gradient, or Gaussian. A uniform distribution is beneficial for forming a stable and controllable electric field, resulting in good process repeatability; a gradient distribution enables a smooth transition of the electric field, helping to reduce noise and improve time response; a Gaussian distribution is a typical distribution after ion implantation and annealing, effectively controlling junction depth and electric field peak position, and is a common method for optimizing the balance between gain and breakdown voltage.

[0061] In one possible design, the shallow gain layer has a thickness of 0.2 μm, and the dopant ions are boron and carbon, with a total doping concentration of 1.5 × 10⁻⁶. 17 atoms / cm 3 The deep gain layer has a thickness of 2.5 μm, is doped with boron ions, and has a total doping concentration of 5.1 × 10⁻⁶. 18 atoms / cm 3 This enables the thin-layer fast response of shallow gain layers and the thick-layer main amplification function of deep gain layers.

[0062] This invention enables high-fidelity, high-dynamic-range detection of complex signals and application scenarios that are difficult for existing single-gain-layer avalanche detectors to handle, such as transient gamma signals in the event accumulation background of high-brightness colliders and mixed fields of low-energy X-rays and high-energy minimum ionized particles. By subjecting the shallow gain layer and deep gain layer to host doping (doping ions are one or more of B, In, Ga, P, As, Sb) and / or engineering doping (introducing carbon or oxygen), respectively.

[0063] In one possible design, the shallow gain layer is selected from In or a combination of B and C for radiation resistance, while the deep gain layer uses a high concentration of B or P to enhance the gain: the shallow gain layer prioritizes radiation resistance and fast response through indium (In) doping or boron-carbon (B+C) co-doping, and is responsible for accurate timing and low-energy particle detection; the deep gain layer provides high overall gain through high concentration of boron (B) or phosphorus (P) doping, and is responsible for ensuring the detection efficiency of high-energy particles; the two are electrically connected in series through a buffer layer, and finally output a synthesized signal that is optimized in terms of time, energy and radiation resistance.

[0064] Preferably, the substrate material is silicon or silicon carbide.

[0065] For example, the buffer layer material is silicon, silicon carbide, or gallium nitride.

[0066] In one possible design, the substrate is a P-type semiconductor substrate; the epitaxial layer is a P-type lightly doped epitaxial layer (doping concentration lower than that of the P-type semiconductor substrate); both the deep gain layer and the shallow gain layer are heavily doped regions used to generate an avalanche multiplication effect.

[0067] On the other hand, according to a specific embodiment of the present invention, a method for preparing an avalanche detector is also disclosed, comprising the following steps: like Figure 1 As shown, a substrate 100 is provided, which can be a P-type substrate, and the substrate material can be Si, SiC, etc.

[0068] Then, a lightly doped P-type epitaxial layer 200 is grown on the upper surface of the substrate 100 by an epitaxial process. The P-type epitaxial layer will serve as the main depletion region and charge absorption layer of the device.

[0069] like Figure 2 As shown, a screen oxide layer 4 is thermally grown on the upper surface of the epitaxial layer 200 as a barrier layer for subsequent ion implantation.

[0070] like Figure 3 As shown, a deep gain layer 300 is formed in a predetermined area through photolithography and ion implantation processes; the implanted ions of the deep gain layer 300 can be P-type impurities such as B, P, In, and Ga, and carbon or oxygen co-doping can be selectively introduced to improve radiation resistance; its doping concentration and profile can be designed according to requirements.

[0071] like Figure 4 As shown, after removing the screen oxide layer 4, a buffer layer 500 is formed on the deep gain layer 300 through an epitaxial growth process. The thickness of the buffer layer 500 is not less than 0.1 μm, which is the key to realizing the platform electric field.

[0072] like Figure 5 As shown, an N-type junction termination extension region 2 (N-JTE) is formed through photolithography and ion implantation processes, which smooths the electric field at the edge of the device and improves the breakdown voltage.

[0073] like Figure 6 As shown, a P-stop implantation region 1 is formed on the outside of the terminal extension region 2 through photolithography and ion implantation processes to prevent parasitic channels from forming on the surface below the field oxygen.

[0074] like Figure 7 As shown, a hot annealing process is performed, which adopts a high-temperature long-time annealing process (450℃~1050℃, 30min~60min) to further diffuse the deep gain layer and N-JTE.

[0075] like Figure 8As shown, the epitaxial layer of the non-active region is removed by photolithography and etching processes, and a field oxide layer 5 is thermally grown, thereby clearly defining the active region of the device.

[0076] like Figure 9 As shown, a screen oxide layer is grown again on the new epitaxial surface, and a shallow gain layer 400 is formed by photolithography and ion implantation. The doping ions, concentration and profile of the shallow gain layer 400 can be the same as or different from those of the deep gain layer 300, and carbon / oxygen co-doping can be selected independently.

[0077] like Figure 10 As shown, an N+ contact region 600 is formed on the shallow gain layer 400 by photolithography and ion implantation.

[0078] like Figure 11 As shown, rapid thermal annealing (1050℃, 30s) is performed to activate impurities and simultaneously reduce diffusion in the shallow gain layer.

[0079] like Figure 12 As shown, a chemical vapor deposition interlayer 3 is deposited on the entire device surface as a passivation layer and an insulating layer.

[0080] like Figure 13 As shown, the interlayer dielectric layer 3 is photolithographically etched and etched to form contact holes, exposing the underlying N+ contact region 600; then a metal thin film is sputtered and patterned through photolithography and etching processes to form a metal electrode 700, which achieves ohmic contact with the N+ contact region 600 through the contact holes.

[0081] Figure 14 The electric field distribution inside the low-gain avalanche detector of the present invention after irradiation is shown, which is presented sequentially from the surface to the interior depth as follows: the initial avalanche peak generated by the shallow gain layer, the plateau electric field region dominated by the buffer layer, the zero field region caused by the deep gain layer, and the gradually rising electric field formed by the deep gain layer body.

[0082] It should be noted that the photolithography process includes steps such as resist coating, pre-baking, exposure, development, and post-baking; the parameters of the ion implantation process, including the type, energy, dose, and tilt angle of the implanted ions, can be selected and optimized according to the design requirements of the target junction depth, doping concentration, and distribution profile. All of the above processes are well known to those skilled in the art.

[0083] In summary, this invention, by introducing a collaborative physical architecture of dual gain layers and buffer layers, reconstructs the traditional single avalanche peak into a composite electric field distribution of shallow single peak-plateau electric field-zero field-deep gradual rise, thereby achieving optimization of electric field distribution and improvement of overall performance. The architecture of introducing dual gain layers creates multi-dimensional independent control parameters, which greatly expands the performance optimization space and process window.

[0084] The above description is merely a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. An avalanche detector, characterized in that, Including those arranged in layers from bottom to top: Substrate; A first semiconductor layer is formed on the substrate or is part of the substrate; Deep gain layer; Buffer layer; and Shallow gain layer.

2. The detector according to claim 1, characterized in that, The thickness of the buffer layer is ≥0.1μm.

3. The detector according to claim 1, characterized in that, The deep gain layer and the shallow gain layer may have the same or different thicknesses, and each of them has a thickness ≥0.1μm.

4. The detector according to claim 1, characterized in that, The deep gain layer and the shallow gain layer are both P-type doped or both N-type doped; When it is P-type doped, the dopant ions include one or more of B, In, and Ga; When it is N-type doped, the dopant ions include one or more of P, As, and Sb; Furthermore, the types of doped ions in the deep gain layer and the shallow gain layer may be the same or different.

5. The detector according to claim 4, characterized in that, The deep gain layer contains carbon and / or oxygen; and / or, the shallow gain layer contains carbon and / or oxygen.

6. The detector according to claim 4, characterized in that, The doping concentrations of the deep gain layer and the shallow gain layer may be the same or different.

7. The detector according to claim 6, characterized in that, The doping concentration profiles of the deep gain layer and the shallow gain layer are each independently uniformly distributed, linearly gradient distributed, or Gaussian distributed.

8. The detector according to claim 1, characterized in that, The avalanche detector also includes: The N+ contact region located above the shallow gain layer; The terminal extension region surrounding the composite active region formed by the shallow gain layer and the deep gain layer; The stop injection area is located outside the terminal extension area; A passivation layer covering the front side of the device; and A metal electrode that penetrates the passivation layer and is electrically connected to the N+ contact region and the substrate.

9. A method for manufacturing an avalanche detector, characterized in that, include: Provide substrate; A first semiconductor layer is formed on the substrate; A deep gain layer is formed in the first semiconductor layer; A buffer layer is formed on the deep gain layer by epitaxial growth; A shallow gain layer is formed in or on the buffer layer.

10. The preparation method according to claim 9, characterized in that, During the formation of the deep gain layer and / or the shallow gain layer, carbon and / or oxygen elements are co-implanted simultaneously.

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