Upper electrode for enhancing firmness of superfine grid line of III-V group concentrator solar cell, preparation method and application

Abstract

The invention discloses a preparation method and application of an upper electrode for enhancing the firmness of a superfine grid line of a group III-V concentrator solar cell, and provides a method for enhancing the firmness of the superfine grid line of the group III-V concentrator solar cell aiming at the problem of grid falling in the existing preparation process of the superfine grid line of the group III-V concentrator solar cell, which comprises the change of a device process method and an electrode structure. By adjusting a device process method, that is, the Cap layer is corroded firstly and then the upper electrode is manufactured in a sleeving and carving mode, preparation of a wrapping type electrode is achieved, the electrode of the structure has the advantage of being firmer, and grid falling abnormity cannot be generated.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor manufacturing, and in particular to an upper electrode for enhancing the robustness of ultrafine grid lines in III-V group concentrated solar cells, its preparation method, and its application. Background Technology

[0002] The outermost layer of a III-V group concentrated solar cell epitaxial wafer is typically a Cap layer, made of GaAs or AlGaAs material. This Cap layer forms an ohmic contact with the top electrode metal through high-doping epitaxy or device sintering processes. Traditional III-V group concentrated solar cells typically involve depositing a metal top electrode over the Cap layer, followed by solution etching to remove the Cap layer in the non-grid area, leaving only the Cap layer below the grid lines.

[0003] like Figure 1-5 As shown, taking the fabrication of a concentrated solar cell as an example, the existing conventional cell upper electrode fabrication method is as follows: The first step involves photolithography, photoresist coating, exposure, and development on top of the epitaxial Cap layer. This process preserves the photoresist in the non-gateline pattern areas, while removing the photoresist in the gateline areas through development. The second step is to place it in a vacuum chamber for upper electrode deposition; The third step is to soak the photoresist in a remover solution for 30 minutes to remove the photoresist. The fourth step involves using a citric acid / hydrogen peroxide solution to etch the Cap layer in the non-gate area, leaving only the Cap layer below the gate line to obtain the upper electrode.

[0004] In the figure, 101 is the substrate below the epitaxial Cap layer, 102 is the Cap layer, 103 is the photoresist, and 104 is the top electrode metal.

[0005] However, the Cap layer (Cap) of concentrated solar cells is typically designed to be thicker than that of conventional gallium arsenide (GaAs) solar cells. This increased thickness aims to suppress surface recombination and lateral current transport, and reduce series resistance. Consequently, the etching time for the Cap layer is usually longer due to its thickness. Simultaneously, the grid lines of concentrated solar cells are designed to be thinner than those of conventional GaAs solar cells, typically less than 10 μm. Thinner metal grid lines reduce the shading area, thereby enhancing incident light efficiency and improving electrical performance. To further improve photoelectric efficiency, even electrode grid lines smaller than 5 μm are designed. The fabrication of such ultra-fine grid lines often faces the challenge of grid drop. Because the metal grid lines are thin, the etching time for the Cap layer is long, and the Cap layer beneath the metal grid lines is prone to lateral etching, further reducing its area and creating a "top-heavy" electrode structure, ultimately leading to abnormal grid drop. Summary of the Invention

[0006] This invention provides an upper electrode for enhancing the robustness of ultrafine grid lines in III-V group concentrated solar cells, along with its fabrication method and application. By redesigning the device process, the abnormal grid drop during the fabrication of III-V group concentrated solar cells with ultrafine grid lines is solved, and III-V group concentrated solar cells with ultrafine and extremely robust grid lines are successfully fabricated.

[0007] This invention is achieved by providing a method for preparing an upper electrode that enhances the robustness of ultrafine grid lines in a III-V group concentrated solar cell, comprising the following steps: Step 1: Photolithography is performed on the surface of the Cap layer of the epitaxial wafer. The photoresist of the gate line pattern is retained by coating, exposure and development, while the photoresist of the non-gate line areas is removed by development. Step 2: Remove the Cap layer from the non-gateline areas; Step 3: Remove the photoresist; Step 4: Use negative photoresist to overlay the Cap layer pattern. The pattern of the Cap layer area is exposed through photoresist coating, exposure and development. In order to create a "wrap-in" electrode, the line width of the overlay pattern is designed to be larger than the line width of the Cap layer pattern. Step 5: Place it in a vacuum chamber and perform upper electrode deposition using a vapor deposition method; Step 6: Remove the photoresist to obtain the upper electrode.

[0008] Furthermore, in the second step, the Cap layer in the non-gateline areas is removed by acid or alkali solution etching or dry etching.

[0009] Furthermore, in the third step, the photoresist is removed by immersion in a photoresist remover, organic solvent, or dry method.

[0010] Furthermore, in the fourth step, the linewidth of the overprinted pattern has an extra 0.1 μm on each side compared to the linewidth of the Cap layer pattern.

[0011] Furthermore, in the fifth step, the electrode system deposited by vapor deposition is an Au-Ge-Ag, Au-Ge-Ag-Au, Ti-Pd-Ag, or Ti-Ni-Ag electrode system.

[0012] Furthermore, in the sixth step, the photoresist is removed by soaking in a remover solution, organic solvent, or dry method.

[0013] The above-described preparation method yields an upper electrode that enhances the adhesion of ultrafine grid lines in a group III-V concentrated solar cell.

[0014] A concentrating solar cell employs the aforementioned upper electrode with strong III-V group concentrating solar cell ultrafine grid line robustness.

[0015] The advantages and technical effects of this invention are as follows: 1. Traditional batteries first deposit the top electrode by vapor deposition and then etch the Cap layer. Because the grid lines are thin, the etching time for the Cap layer is long, which can cause side etching of the Cap layer and result in weak grid lines. This invention etches the Cap layer first and then deposits the top electrode by vapor deposition. After etching the Cap layer, it is possible to detect in time whether the area of ​​the Cap layer in contact with the top electrode is within a controllable range, thereby avoiding side etching that could lead to weak grid lines.

[0016] 2. The present invention prepares the upper electrode by overlay patterning, and the line width of the overlay pattern is left with a margin. After the upper electrode is deposited by vapor deposition, an "encapsulated" electrode can be prepared, that is, the upper electrode encapsulates the Cap layer. The electrode with this structure has extremely strong strength. Attached Figure Description

[0017] Figure 1 This is a state diagram of an epitaxial wafer to be processed using existing technology.

[0018] Figure 2 This is a state diagram of the device after photolithography of the electrode gate lines using existing technology.

[0019] Figure 3 This is a diagram showing the state of a device after electrode deposition using existing technology.

[0020] Figure 4 This is a diagram of the device after the adhesive has been removed using existing technology.

[0021] Figure 5 This is a state diagram of the device after etching the Cap layer using existing technology.

[0022] Figure 6 This is a diagram showing the state of the epitaxial wafer to be processed in the device fabrication process of this invention.

[0023] Figure 7 This is a state diagram of the device after photolithography of the upper electrode gate lines of the present invention.

[0024] Figure 8 This is a diagram showing the state of the device after etching the Cap layer according to the present invention.

[0025] Figure 9 This is a diagram of the device after the adhesive has been removed according to the present invention.

[0026] Figure 10 This is a diagram of the device after overlay etching according to the present invention.

[0027] Figure 11 This is a diagram showing the state of the device after the upper electrode of this invention has been deposited.

[0028] Figure 12 This is a diagram of the device after the adhesive has been removed.

[0029] Figure 13 This is a photograph of the upper electrode of a battery prepared using the method of the present invention.

[0030] Figure 14 This is a photograph of the battery top electrode prepared using existing techniques.

[0031] Figure 15 for Figure 14 Enlarged analysis of the image.

[0032] In the figure: 101, substrate below the epitaxial Cap layer; 102, Cap layer; 103, photoresist; 104, top electrode metal. Detailed Implementation

[0033] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0034] like Figure 6-12 As shown, the method for preparing the upper electrode of the present invention to enhance the adhesion of ultrafine grid lines in III-V group concentrated solar cells includes the following steps in sequence: Step 1: Photolithography is performed on the surface of the Cap layer of the epitaxial wafer. The photoresist of the gate line pattern is retained by coating, exposure and development, while the photoresist of the non-gate line areas is removed by development. Step 2: Remove the Cap layer from the non-gateline areas; Step 3: Remove the photoresist; Step 4: Use negative photoresist to overlay the Cap layer pattern. The pattern of the Cap layer area is exposed through photoresist coating, exposure and development. In order to create a "wrap-in" electrode, the line width of the overlay pattern is designed to be larger than the line width of the Cap layer pattern. Step 5: Place it in a vacuum chamber and perform upper electrode deposition using a vapor deposition method; Step 6: Remove the photoresist to obtain the upper electrode.

[0035] Furthermore, in the second step, the Cap layer in the non-gateline areas is removed by acid or alkali solution etching or dry etching.

[0036] Furthermore, in the third step, the photoresist is removed by immersion in a photoresist remover, organic solvent, or dry method.

[0037] Furthermore, in the fourth step, the linewidth of the overprinted pattern has an extra 0.1 μm on each side compared to the linewidth of the Cap layer pattern.

[0038] Furthermore, in the fifth step, the electrode system deposited by vapor deposition is an Au-Ge-Ag, Au-Ge-Ag-Au, Ti-Pd-Ag, or Ti-Ni-Ag electrode system.

[0039] Furthermore, in the sixth step, the photoresist is removed by soaking in a remover solution, organic solvent, or dry method.

[0040] The above-described preparation method yields an upper electrode that enhances the adhesion of ultrafine grid lines in a group III-V concentrated solar cell.

[0041] A concentrating solar cell employs the aforementioned upper electrode with strong III-V group concentrating solar cell ultrafine grid line robustness.

[0042] In the figure: 101, substrate below the epitaxial Cap layer; 102, Cap layer; 103, photoresist; 104, top electrode metal.

[0043] In existing technologies, due to the thicker Cap layer, the corrosion time is longer. Figure 5 The middle Cap layer 102 was corroded from the side by the solution, which reduced the contact area with the upper electrode metal 104 and caused the gate drop anomaly. Figure 5 Middle Cap layer 102 and the present invention Figure 12 Compared to the middle Cap layer 102, the contact area between the Cap layer 102 and the upper electrode metal 104 is smaller. Figure 5 It is a "top-heavy" structure, however, in Figure 12 In the electrode structure, the upper electrode metal 104 encapsulates the Cap layer 102. Figure 12 It is a "wrap-around" structure. Compared with these two structures, the present invention is clearly superior. Figure 12 The electrode structure is more robust.

[0044] The device process of this invention is the key point of this invention, and the main innovation lies in: 1. The process of etching the Cap layer first and then etching the electrode is adopted instead of the traditional method of evaporating the electrode first and then etching the Cap layer.

[0045] 2. The upper electrode is prepared by two photolithography processes. The linewidth of the pattern prepared by the second photolithography process is larger than the linewidth of the Cap layer etched by the first photolithography process, with an extra 0.1 μm on each side. This is to create an "encapsulated" electrode.

[0046] Example This embodiment uses the preparation of concentrated solar cells as an example to illustrate the practical application of the present invention.

[0047] Step 1: Photolithography, photoresist coating, exposure, and development are performed on the Cap layer of the epitaxial wafer to retain the photoresist in the gate pattern area. The fine gate width is designed to be 10μm, and the photoresist in the non-gate area is removed by development.

[0048] Step 2: Immerse the Cap layer in a citric acid / hydrogen peroxide solution at 40℃ for 90 seconds to etch away the Cap layer in the non-gate area, leaving only the Cap layer under the photoresist in the gate pattern area.

[0049] Step 3: Soak in photoresist solution for 30 minutes to remove photoresist.

[0050] Step 4: Use negative photoresist for overlay to develop and remove the pattern in the Cap layer area. Note that the line width of the developed pattern is 0.1μm wider on each side than the line width of the Cap layer.

[0051] Step 5: Place it in a vacuum chamber and perform Au-Ge-Ag-Au top electrode deposition using the vapor deposition method.

[0052] Step 6: Soak in the photoresist remover for 30 minutes to remove the photoresist and obtain the upper electrode.

[0053] The battery top electrode prepared using the method of this invention has a strong battery grid line, see Figure 13 No gate drop anomaly was observed.

[0054] Comparative Example: The first step involves photolithography, photoresist coating, exposure, and development on top of the epitaxial Cap layer. The photoresist in the non-gateline pattern area is retained, while the photoresist in the gateline area is removed by development. The fine gate width is designed to be 10μm. The second step is to place it in a vacuum chamber and perform Au-Ge-Ag upper electrode deposition using a vapor deposition method. The third step is to soak the photoresist in a remover solution for 30 minutes to remove the photoresist. The fourth step involves immersing the material in a citric acid / hydrogen peroxide solution at 40°C for 90 seconds to etch and remove the Cap layer in the non-gate area, thus obtaining the upper electrode.

[0055] The battery top electrode prepared using existing techniques exhibited an anomaly of significant grid line detachment, as shown in [reference needed]. Figure 14 Microscopic observation was performed on the cells with detached grid lines, such as... Figure 15 As shown, region c exhibits inconsistent morphology within the gate line detachment area, and measurements revealed that the width of detached region a is 12.83 μm, the width of morphologically abnormal region b is 6.51 μm, and the remainder is region c. Step profile measurements showed that region c is lower than region b, with a height difference ranging from 300 nm to 500 nm. Considering the epitaxial structure design, we know the Cap layer is designed to be 500 nm high, and the height difference between regions b and c corresponds to the Cap layer thickness. Simultaneously, the gate line width is designed to be 10 μm, and the width of region a corresponds to the gate line width. Therefore, we can conclude that region c should originally have been part of the Cap layer, but due to solution lateral etching of the Cap layer, the Cap layer in region c was etched away, leaving only region b as the contact area between the gate line and the Cap layer (region b and...). Figure 5 (corresponding to 102 in the text), the stability is greatly weakened, resulting in the gate falling off.

[0056] The foregoing has provided a detailed description of one embodiment of the present invention. However, this description is merely a preferred embodiment and can also be applied to rigid gallium arsenide solar cell devices. It should not be considered as limiting the scope of the present invention. All equivalent variations and modifications made within the scope of the present invention should still fall within the scope of the present invention.

Claims

1. A method for preparing an upper electrode to enhance the robustness of ultrafine grid lines in a III-V group concentrated solar cell, characterized in that, The steps are as follows: Step 1: Photolithography is performed on the surface of the Cap layer of the epitaxial wafer. The photoresist of the gate line pattern is retained by coating, exposure and development, while the photoresist of the non-gate line areas is removed by development. Step 2: Remove the Cap layer from the non-gateline areas; Step 3: Remove the photoresist; Step 4: Overlay the Cap layer pattern using negative adhesive. The pattern in the Cap layer area is exposed through coating, exposure and development. In order to create an "encapsulated" electrode, the line width of the overlay pattern is designed to be larger than the line width of the Cap layer pattern. Step 5: Place it in a vacuum chamber and perform upper electrode deposition using a vapor deposition method; Step 6: Remove the photoresist to obtain the upper electrode.

2. The method for preparing the upper electrode to enhance the robustness of ultrafine grid lines in a III-V group concentrated solar cell according to claim 1, characterized in that, In the second step, the Cap layer in the non-gate area is removed by acid or alkali solution etching or dry etching.

3. The method for preparing the upper electrode to enhance the robustness of ultrafine grid lines in a III-V group concentrated solar cell according to claim 1, characterized in that, In the third step, the photoresist is removed by immersion in a photoresist remover, organic solvent, or dry method.

4. The method for preparing the upper electrode to enhance the robustness of ultrafine grid lines in a III-V group concentrated solar cell according to claim 1, characterized in that, In the fourth step, the line width of the overprinted pattern is 0.1 μm larger on each side than the line width of the Cap layer pattern.

5. The method for preparing the upper electrode to enhance the robustness of ultrafine grid lines in a III-V group concentrated solar cell according to claim 1, characterized in that, In the fifth step, the electrode system for vapor deposition is Au-Ge-Ag, Au-Ge-Ag-Au, Ti-Pd-Ag, or Ti-Ni-Ag electrode system.

6. The method for preparing the upper electrode to enhance the robustness of ultrafine grid lines in a III-V group concentrated solar cell according to claim 1, characterized in that, In the sixth step, the photoresist is removed by soaking in a remover solution, organic solvent, or dry method.

7. The upper electrode for enhancing the adhesion of ultrafine grid lines in a III-V group concentrated solar cell, prepared by the method according to any one of claims 1-6.

8. A concentrating solar cell, characterized in that, The upper electrode employs the strong III-V group concentrated solar cell ultrafine grid line robustness as described in claim 7.

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