Radio frequency bonding grounding gasket and preparation method thereof

Abstract

The invention provides a radio frequency bonding grounding gasket and a preparation method thereof, and relates to the technical field of chip packaging. The radio frequency bonding grounding gasket comprises a substrate, a first seed layer, a second seed layer and a bonding pad layer, the first seed layer and the second seed layer are respectively arranged on the upper and lower surfaces of the substrate; the bonding pad layer is arranged on the surface of the first seed layer; the bonding pad layer is used for bonding an alloy wire between the bonding pad layer and a to-be-packaged chip tube shell to form a radio frequency grounding metal shielding structure; the second seed layer is used for grounding. The machining precision of the grounding gasket can be improved, and the ultimate minimum size of machining is reduced.

Description

Technical Field

[0001] This invention relates to the field of chip packaging technology, and in particular to an RF bonding grounding pad and its preparation method. Background Technology

[0002] Radio frequency (RF) microwave chip modules and device-level packaged products have gradually become the mainstream process implementation solutions for highly integrated microwave systems. With the trend of RF technology developing towards higher frequencies and higher integration, electromagnetic issues within the package are becoming increasingly prominent. Therefore, grounding pads and bonding wires are typically used in bare chip packaging to achieve electromagnetic shielding and isolation.

[0003] Currently, grounding pads are typically manufactured using die stamping or wire cutting. After fabrication, the grounding pads are bonded to the inside of the housing with conductive adhesive, and then bonded alloy wires are used for shielding and isolation of the radio frequency transmission port.

[0004] However, as radio frequency technology advances towards higher frequencies and higher integration, package sizes continue to shrink, leaving less and less space for grounding pads. Conventional grounding pads are mainly manufactured using stamping or wire cutting methods, which are extremely difficult to process in small sizes, and the quality cannot meet the requirements for small dimensions. Summary of the Invention

[0005] This invention provides a radio frequency bonding grounding pad and its preparation method to solve the problem that current radio frequency bonding grounding pads are too large to meet the size requirements of high frequency and high integration.

[0006] In a first aspect, embodiments of the present invention provide a radio frequency bonding grounding pad, the grounding pad comprising a substrate, a first seed layer, a second seed layer and a pad layer; The first seed layer and the second seed layer are respectively disposed on the upper and lower surfaces of the substrate; The pad layer is laid on the surface of the first seed layer and is used to bond alloy wires with the chip shell to be packaged to form an RF grounding metal shielding structure. The second seed layer is used for grounding.

[0007] In one possible implementation, the first seed layer and the pad layer are projected onto the substrate with the same size, and the second seed layer is projected onto the substrate with a larger size than the first seed layer.

[0008] In one possible implementation, the grounding pad has a size of less than 0.4 mm × 0.4 mm.

[0009] In one possible implementation, the pad layer is a gold-plated layer prepared by an electroplating process, and the first seed layer and the second seed layer are made of at least one metal selected from titanium, chromium, platinum, titanium-tungsten alloy or gold.

[0010] In one possible implementation, the resistivity of the substrate is less than 0.01 Ω•cm.

[0011] The RF bonding grounding pad provided by this invention includes a substrate, a first seed layer, a second seed layer, and a pad layer. By setting the first seed layer between the substrate and the pad layer, a transition stack structure of substrate-first seed layer-pad layer can be formed, thereby improving the bonding strength between the pad layer and the substrate through the transition effect of the first seed layer. In addition, the second seed layer can be directly grounded, thereby constructing the shortest direct ground path from the second seed layer to the ground terminal, achieving a better grounding effect, and thus improving the overall performance of the RF device.

[0012] Secondly, embodiments of the present invention provide a method for preparing a radio frequency bonding grounding pad, comprising: Seed layers are sputtered on the upper and lower surfaces of a wafer to form a first seed layer and a second seed layer, respectively. Electroplating a pad layer on the first seed layer to form a patterned wafer; The patterned wafer is diced to form multiple grounding pads; wherein, from top to bottom, each grounding pad comprises a pad layer, a first seed layer, a substrate, and a second seed layer.

[0013] In one possible implementation, the step of electroplating a pad layer on the first seed layer to form a patterned wafer includes: The pad layer is prepared on the first seed layer, and the projection size of the pad layer on the substrate is smaller than the projection size of the second seed layer on the substrate; The first seed layer is etched based on the projection size of the pad layer on the substrate to obtain the first seed layer and a wafer containing a plurality of ground pads; wherein the projection size of the first seed layer on the substrate is equal to the projection size of the pad layer on the substrate.

[0014] In one possible implementation, the first seed layer and the second seed layer are made of at least one metal selected from titanium, chromium, platinum, titanium-tungsten alloy, or gold.

[0015] In one possible implementation, the grounding pad has a size of less than 0.4 mm × 0.4 mm.

[0016] In one possible implementation, the resistivity of the substrate is less than 0.01 Ω•cm.

[0017] The method for fabricating radio frequency bonding grounding pads provided in this invention employs semiconductor fabrication processes. First, seed layers are sputtered onto the upper and lower surfaces of a wafer to form a first seed layer and a second seed layer, respectively. Then, a pad layer is electroplated onto the first seed layer to form a patterned wafer. Finally, the patterned wafer is diced to fabricate multiple grounding pads. By employing semiconductor processes, layered fabrication of the substrate, first seed layer, second seed layer, and pad layer is achieved, significantly improving the dimensional control precision of each layer structure, far exceeding the precision of traditional machining. Furthermore, since all structures utilize semiconductor processes, the precision bottleneck caused by the incompatibility of a single structure with precision machining can be eliminated, significantly improving the processing precision of the grounding pads and enabling stable fabrication of smaller structures, breaking through the processing limits of traditional grounding pads. In addition, by fabricating a first seed layer between the substrate and the pad layer, a transitional stacked structure of substrate-first seed layer-pad layer is formed, thereby enhancing the bonding strength between the pad layer and the substrate through the transition of the first seed layer. Furthermore, traditional grounding pads require an additional grounding transmission structure designed outside the main functional layer to achieve grounding. However, the second seed layer in this invention is itself a conductive layer and is an inherent structure of the grounding pad, allowing for direct grounding. By directly grounding the second seed layer, the shortest direct grounding path from the second seed layer to the grounding terminal can be constructed, achieving a superior grounding effect and thus improving the overall performance of the RF device. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the structure of a radio frequency bonding grounding pad provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of another radio frequency bonding grounding pad provided in an embodiment of the present invention; Figure 3 This is a diagram showing the test results between the Kovar grounding pad prepared by conventional die stamping according to an embodiment of the present invention and the grounding pad of this application; Figure 4 This is a schematic diagram of the method for preparing the radio frequency bonding grounding pad provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of a patterned wafer after chip dicing, provided in an embodiment of the present invention. Detailed Implementation

[0019] The present application will be described more clearly below with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the function of the present application, but do not limit the present application in any way. It should be noted that those skilled in the art can make several modifications and improvements without departing from the concept of the present application. These all fall within the protection scope of the present application.

[0020] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0021] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0022] In the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0023] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0024] Furthermore, the term "multiple" mentioned in the embodiments of this application should be interpreted as two or more.

[0025] First, the terms used in the embodiments of this application will be explained: A bare chip refers to the core of a semiconductor chip that has undergone wafer fabrication processes such as photolithography, etching, doping, metallization, and dicing without any packaging, such as plastic, ceramic, or metal encapsulation. It is the core functional unit of an electronic device. Essentially, it is a semiconductor substrate that directly exposes the chip's active areas, metal wiring, pads, and other key structures, without a casing or pins, to achieve specific electrical performance, such as computation, amplification, sensing, or power conversion. Bare chips require specific integration processes and cannot be directly connected to circuits as independent devices. Their core applications are concentrated in fields with strict requirements on integration density, size, performance, and cost.

[0026] Grounding pads are functional structures / components used to achieve electrical grounding, electromagnetic shielding, mechanical buffering, or potential equalization. They are typically made of conductive materials, such as metals or conductive composite materials, and are mounted on the grounding path of electronic equipment, devices, or structural components. Their core function is to establish a stable grounding connection and optimize the performance of the grounding system.

[0027] Seed layer: This is an ultrathin, highly conductive transition layer deposited on the substrate surface. Its core function is to provide an adhesion base and functional support for the subsequent deposition of thicker metal layers. It is an indispensable key intermediate layer in the metallization process. The seed layer refers to an ultrathin metal / alloy layer with a thickness of 0.1-1 μm formed on the substrate surface in the early stages of the metallization process using physical vapor deposition (PVD), such as sputtering, evaporation, or chemical vapor deposition. This layer possesses high conductivity, good lattice matching, and diffusion-blocking capabilities.

[0028] As described in the background section, traditional grounding pads are often manufactured by die stamping or wire cutting. After processing, the grounding pads are bonded to the housing with conductive adhesive and then shielded and isolated by bonding alloy wire for the radio frequency transmission port.

[0029] However, with the trend towards high frequency and high integration, package sizes are continuously shrinking, leaving very little usable space for grounding pads. This makes bonding extremely difficult for metal grounding pads manufactured by die stamping or wire cutting due to factors such as edge curling, especially when the size is less than 0.4mm × 0.4mm. The difficulty in manufacturing pads that meet bonding requirements is even greater during die stamping or wire cutting. Edge curling becomes even more severe during these processes, making it impossible to meet the requirements for small-sized grounding pads.

[0030] To address the aforementioned technical problems, this invention provides an RF bonding grounding pad and its preparation method.

[0031] Figure 1 This is a schematic diagram of the structure of a radio frequency bonding grounding pad provided in an embodiment of the present invention. (Refer to...) Figure 1 The RF bonding ground pad includes: a substrate 110, a first seed layer 120, a second seed layer 130, and a pad layer 140.

[0032] The first seed layer 120 and the second seed layer 130 are respectively disposed on the upper and lower surfaces of the substrate 110, and the pad layer 140 is disposed on the surface of the first seed layer 120.

[0033] The pad layer 140 is used to bond alloy wires to the chip housing to be packaged, forming an RF grounding metal shielding structure, and the second seed layer 130 is used for grounding.

[0034] In some embodiments, in order to achieve low resistivity in the longitudinal direction of the substrate, i.e. the thickness direction, and thus ensure low impedance characteristics of the grounding path, it is also necessary to control the resistivity of the substrate 110 to be less than 0.01 Ω•cm.

[0035] In this embodiment, for semiconductors with high resistivity or substrates with low conductivity, such as silicon substrates, silicon carbide substrates, gallium nitride substrates, and conductive polymers or ceramic matrix composites, these substrates have high resistivity and cannot meet the requirements of low impedance path for grounding. Therefore, it is necessary to dope the substrates with high resistivity to achieve substrates with low vertical resistivity.

[0036] For example, a silicon substrate, a silicon carbide substrate, or a gallium nitride substrate can be selected.

[0037] In some embodiments, as Figure 1 As shown, the first seed layer 120, the second seed layer 130, the pad layer 140, and the substrate 110 can have the same dimensions.

[0038] In this embodiment, the first seed layer 120 and the second seed layer 130 can be prepared by magnetron sputtering.

[0039] The front side of the RF bonding grounding pad is a pad layer 140. Since the pad layer 140 is used for bonding the gold wire, to ensure the stability of the bonding wire, in addition to the metal of the pad layer 140, a first seed layer 120 is also required on the front side. Through the bonding wire, the metal of the pad layer 140 on the front side can provide sufficient thickness and strength to ensure connection stability. Furthermore, the first seed layer 120 acts as a transition layer, solving the adhesion problem between the metal layer and the substrate and preventing the metal layer from detaching. Additionally, since the front side needs to be directly bonded to the gold wire and requires rapid current conduction, a thick metal layer is key to achieving low-resistance conduction. However, the resistance of the first seed layer 120 is too high to meet the conduction requirements. To reduce costs, the back side can only have a second seed layer 130. The second seed layer 130 can be grounded using conductive adhesive, resulting in better back-side grounding and superior RF performance.

[0040] To reduce manufacturing costs without compromising the performance of the RF grounding pad, the front and back sides must be strictly distinguished during use. To clearly differentiate the front and back sides and prevent soldering errors, their structures can be designed differently for easy identification.

[0041] For example, such as Figure 2 As shown, the first seed layer 120 and the pad layer 140 are projected onto the substrate 110 with the same size, and the second seed layer 130 is projected onto the substrate 110 with a larger size than the first seed layer 120.

[0042] In some embodiments, since the front side of the grounding pad requires bonding wires, the pad layer is a gold-plated layer prepared by an electroplating process to ensure the stability of the bonding.

[0043] In this embodiment, the metal layers prepared by electroplating, such as copper, silver, gold, and nickel layers, have core advantages over other preparation methods such as physical vapor deposition and chemical vapor deposition, including strong performance adaptability, superior process economy, and high structural controllability. The electroplated metal layers have a dense grain structure, low impurity content, and conductivity close to that of the metal bulk, far exceeding that of metal layers prepared by sputtering and other processes. The pad layer 140 of the grounding pad requires low resistance to conduct electrostatic / surge current, and the interconnect metal layers of semiconductor devices require low-loss transmission of electrical signals. The electroplated layer can further reduce resistance through thick-film deposition, meeting the core requirements of high current and low loss.

[0044] Furthermore, the electroplating process is an electrochemical deposition reaction, where metal ions are uniformly deposited on the surface of the seed layer under the action of an electric field, forming a metallurgical bond with the first seed layer 120, rather than physical adhesion, thereby improving adhesion performance. The electroplated layer can prevent the metal layer from peeling off, ensuring long-term stability.

[0045] In some embodiments, the first seed layer 120 and the second seed layer 130 are made of at least one metal selected from titanium, chromium, platinum, titanium-tungsten alloy or gold.

[0046] In this embodiment, both the first seed layer 120 and the second seed layer 130 can be prepared by magnetron sputtering.

[0047] Magnetron sputtering is a core branch of physical vapor deposition (PVD). It involves creating a plasma in a vacuum environment by ionizing an inert gas using a radio frequency (RF) or direct current (DC) electric field. High-energy ions are then confined by a magnetic field and bombarded with these plasmas to a target material (such as a seed layer). This allows the target atoms to gain sufficient kinetic energy to escape the crystal lattice and sputter onto the substrate surface, ultimately depositing an ultrathin, dense, and uniform seed layer. Magnetron sputtering produces dense, uniform seed layer films with low defect rates, ensuring reliable adhesion of subsequent metal layers. The process parameters of magnetron sputtering are precisely controllable, adaptable to different seed layer materials and thickness requirements. Furthermore, the low-temperature deposition characteristics of magnetron sputtering prevent thermal damage to the substrate or device.

[0048] For example, the parameters of the magnetron sputtering process include: sputtering power of 100-300W and vacuum level of 1×10⁻⁶. -3 --1×10 -5 Pa, argon flow rate can be 20-50 sccm, substrate temperature ≤150℃, seed layer thickness can be 0.1-1μm, porosity <1%, and thickness uniformity error can be within ±3%.

[0049] In some embodiments, the size of the grounding pad is less than 0.4mm × 0.4mm.

[0050] In this embodiment, due to the high precision of the pattern size and the uniformity of the plating in the semiconductor fabrication process, and the absence of defects such as curling during the dicing and cutting process, the high integration and high precision requirements of RF microwave multi-chip modules and device-level packaging are met.

[0051] The small-size, high-precision RF grounding pad provided by this invention is simple to process, has superior performance, low cost, and good reliability. It can effectively solve the problem of the difficulty in processing small-size pads in device-level packaging and can be widely used in RF microwave multi-chip modules and device-level packaged products.

[0052] The RF grounding performance of the RF grounding pad has a decisive impact on the overall shielding effectiveness. Therefore, to demonstrate the performance of the RF grounding pad provided by this invention, a performance comparison was conducted using both traditional pads and RF pads. The port echo was tested after single-port RF grounding. The performance comparison is as follows: Figure 3 As shown. From Figure 3 As can be seen from the comparison of echo curves, it can be determined that the performance of the newly proposed RF grounding pad is basically the same as that of the traditional pad.

[0053] The RF bonding grounding pad provided by this invention includes a substrate, a first seed layer, a second seed layer, and a pad layer. By setting the first seed layer between the substrate and the pad layer, a transition stack structure of substrate-first seed layer-pad layer can be formed, thereby improving the bonding strength between the pad layer and the substrate through the transition effect of the first seed layer. In addition, the second seed layer can be directly grounded, constructing the shortest direct ground path from the second seed layer to the ground terminal, achieving a better grounding effect, and thus improving the overall performance of the RF device.

[0054] Secondly, such as Figure 4 As shown, the present invention also provides a method for preparing a radio frequency bonding grounding pad, comprising: S110. Seed layers are sputtered on the upper and lower surfaces of a wafer to form a first seed layer and a second seed layer.

[0055] Figure 2 The fabrication process of a single RF bonding ground pad is shown only; the fabrication of multiple RF bonding ground pads on a wafer and the slicing process are not shown.

[0056] In some embodiments, in order to achieve low resistivity in the longitudinal direction (thickness direction) of the substrate 110 and thus ensure low impedance characteristics of the grounding path, it is also necessary to control the resistivity of the substrate 110 to be less than 0.01 Ω•cm.

[0057] In this embodiment, for semiconductors with high resistivity or substrates with low conductivity, such as silicon substrates, silicon carbide substrates, gallium nitride substrates, and conductive polymers or ceramic matrix composites, these substrates have high resistivity and cannot meet the requirements of low impedance path for grounding. Therefore, it is necessary to dope the substrates with high resistivity to achieve substrates with low vertical resistivity.

[0058] For example, substrate 110 may be selected as a silicon substrate, a silicon carbide substrate or a gallium nitride substrate.

[0059] In some embodiments, since the front side of the grounding pad requires bonding wires, the pad layer is a gold-plated layer prepared by an electroplating process to ensure the stability of the bonding.

[0060] In this embodiment, the metal layers prepared by electroplating, such as copper, silver, gold, and nickel layers, have core advantages over other preparation methods such as physical vapor deposition and chemical vapor deposition, including strong performance adaptability, superior process economy, and high structural controllability. The electroplated metal layers have a dense grain structure, low impurity content, and conductivity close to that of the metal bulk, far exceeding that of metal layers prepared by sputtering and other processes. The pad layer 140 of the grounding pad requires low resistance to conduct electrostatic / surge current, and the interconnect metal layers of semiconductor devices require low-loss transmission of electrical signals. The electroplated layer can further reduce resistance through thick-film deposition, meeting the core requirements of high current and low loss.

[0061] Furthermore, the electroplating process is an electrochemical deposition reaction, where metal ions are uniformly deposited on the surface of the seed layer under the action of an electric field, forming a metallurgical bond with the first seed layer 120, rather than physical adhesion, thereby improving adhesion performance. The electroplated layer can prevent the metal layer from peeling off, ensuring long-term stability.

[0062] In some embodiments, the first seed layer 120 and the second seed layer 130 are made of at least one metal selected from titanium, chromium, platinum, titanium-tungsten alloy or gold.

[0063] In this embodiment, both the first seed layer 120 and the second seed layer 130 can be prepared by magnetron sputtering.

[0064] It can be prepared by double-sided magnetron sputtering.

[0065] Magnetron sputtering is a core branch of physical vapor deposition (PVD). It involves creating a plasma in a vacuum environment by ionizing an inert gas using a radio frequency (RF) or direct current (DC) electric field. High-energy ions are then confined by a magnetic field and bombarded with these plasmas to a target material (such as a seed layer). This allows the target atoms to gain sufficient kinetic energy to escape the crystal lattice and sputter onto the substrate surface, ultimately depositing an ultrathin, dense, and uniform seed layer. Magnetron sputtering produces dense, uniform seed layer films with low defect rates, ensuring reliable adhesion of subsequent metal layers. The process parameters of magnetron sputtering are precisely controllable, adaptable to different seed layer materials and thickness requirements. Furthermore, the low-temperature deposition characteristics of magnetron sputtering prevent thermal damage to the substrate or device.

[0066] For example, the parameters of the magnetron sputtering process include: sputtering power of 100-300W and vacuum level of 1×10⁻⁶. -3 --1×10 -5 Pa, argon flow rate can be 20-50 sccm, substrate temperature ≤150℃, seed layer thickness can be 0.1-1μm, porosity <1%, and thickness uniformity error can be within ±3%.

[0067] It should be noted that before dicing, it is called a wafer, and after dicing, it is called a substrate.

[0068] S120, Electroplating pads on the first seed layer to form a patterned wafer.

[0069] In some embodiments, to reduce manufacturing costs without affecting the performance of the RF grounding pad, the front and back sides must be strictly distinguished during use. To clearly differentiate the front and back sides of the grounding pad and prevent soldering errors, the front and back sides can be designed with different structures for easy identification.

[0070] In this embodiment, a pad layer 140 can first be fabricated on the first seed layer 120, and the projected size of the pad layer 140 on the substrate 110 is smaller than the projected size of the second seed layer 130 on the substrate. Then, the first seed layer 120 is etched based on the projected size of the pad layer 140 on the substrate 110 to obtain the first seed layer 120. The projected size of the first seed layer 120 on the substrate 110 is equal to the projected size of the pad layer 140 on the substrate 110.

[0071] After the first and second seed layers are prepared, as follows: Figure 4As shown, photoresist 150 needs to be coated on both sides of the wafer. After coating both sides with photoresist 150, the front bonding pad area is photolithographically etched and developed using a photolithography plate or a direct-write lithography machine. After obtaining the front bonding pad area, a thick gold layer is electroplated on the front side to form the pad layer 140. This allows for gold wire bonding during subsequent assembly. The thickness of the electroplated gold layer must meet the requirements of gold wire bonding for the pad layer 140.

[0072] After electroplating to form the pad layer 140, the photoresist is removed, resulting in a pad layer 140 smaller than the second seed layer 130. To fabricate the first seed layer 120 to the same size as the pad layer 140, photoresist is first applied again to both sides of the wafer. Then, after applying the photoresist, a photolithography plate or direct-write lithography machine is used to lithographically etch and develop the areas except for the bonding pad area on the front side. Finally, the metallization layer in the non-electroplated areas on the front side is etched away, exposing the wafer material. After fabricating the first seed layer 120, the photoresist on both sides of the wafer can be removed.

[0073] In this embodiment, photoresist is the core photosensitive medium in the photolithography process. Its core function is to accurately transfer the micron / nanoscale patterns on the photomask to the substrate, and to act as a selective barrier in subsequent processes such as etching and ion implantation to protect the target area and ultimately form the fine structure required for the device.

[0074] When transferring patterns precisely to the substrate, the mask pattern is transformed into a photoresist pattern through coating, exposure, and development, and then transferred to the substrate through processes such as etching / implantation.

[0075] When used as a selective barrier, it protects the covered area during etching, while only the exposed area is removed.

[0076] S130. The patterned wafer is diced into chips to prepare multiple grounding pads.

[0077] After the first seed layer 120, the pad layer 140, and the second seed layer 130 are all prepared, as follows: Figure 5 As shown, the patterned wafer can be diced and cut to prepare multiple grounding pads.

[0078] In this embodiment, diamond blade cutting or laser cutting can be used.

[0079] Diamond cutting uses electroplated or resin-bonded diamond particles as cutting tools. The cutting tool mechanically grinds the dicing track through the high-speed rotation to cut through and separate the wafer.

[0080] Laser cutting utilizes a high-energy laser focused on a scribe line to achieve separation through ablation, thermal dicing, or a combination of ablation and etching. There is no mechanical contact and the stress is minimal.

[0081] This invention employs semiconductor fabrication processes. First, seed layers are sputtered onto the upper and lower surfaces of a wafer to form a first seed layer and a second seed layer, respectively. Then, a bonding pad layer is electroplated onto the first seed layer to form a patterned wafer. Finally, the patterned wafer is diced to fabricate multiple grounding pads. Semiconductor fabrication processes improve the processing precision of the grounding pads and reduce the minimum processing size. Furthermore, the finished grounding pads exhibit significant advantages over traditional metal pads in terms of edge flatness and edge gold layer quality. This overcomes the problems of high processing difficulty and inability to meet bonding requirements after processing in traditional small-sized RF grounding pads.

[0082] The method provided by this invention achieves a vertically low resistivity silicon pad by doping a silicon substrate using semiconductor processing technology. By employing semiconductor technology, the substrate, first seed layer, second seed layer, and pad layer are fabricated in layers, significantly improving the dimensional control precision of each layer, far exceeding the precision of traditional machining. Furthermore, the use of semiconductor technology for all structures eliminates the precision bottleneck caused by the incompatibility of single structures with precision machining, significantly improving the processing precision of the grounding pad and enabling stable fabrication of smaller structures, breaking through the processing limits of traditional grounding pads. In addition, by adding a first seed layer between the substrate and the pad layer, a transitional stacked structure of substrate-first seed layer-pad layer is formed, thereby enhancing the bonding strength between the pad layer and the substrate through the transition of the first seed layer. Moreover, traditional grounding pads require an additional grounding transmission structure designed outside the main functional layer to achieve grounding; however, the second seed layer in this invention is itself a conductive layer and is an inherent structure of the grounding pad, allowing for direct grounding. Meanwhile, the second seed layer is directly grounded, creating the shortest direct ground path from the second seed layer to the grounding terminal, achieving a better grounding effect and thus improving the overall performance of the RF device.

[0083] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0084] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A radio frequency bonding grounding pad, characterized in that, The grounding pad includes a substrate, a first seed layer, a second seed layer, and a pad layer; The first seed layer and the second seed layer are respectively disposed on the upper and lower surfaces of the substrate; The pad layer is laid on the surface of the first seed layer and is used to bond alloy wires with the chip shell to be packaged to form an RF grounding metal shielding structure. The second seed layer is used for grounding.

2. The RF bonding grounding pad as described in claim 1, characterized in that, The first seed layer and the pad layer are projected onto the substrate with the same size, and the second seed layer is projected onto the substrate with a larger size than the first seed layer.

3. The RF bonding grounding pad as described in claim 1, characterized in that, The size of the grounding pad is less than 0.4mm × 0.4mm.

4. The radio frequency bonding grounding pad as described in any one of claims 1-3, characterized in that, The pad layer is a gold-plated layer prepared by an electroplating process, and the first seed layer and the second seed layer are made of at least one metal selected from titanium, chromium, platinum, titanium-tungsten alloy or gold.

5. The radio frequency bonding grounding pad as described in any one of claims 1-3, characterized in that, The resistivity of the substrate is less than 0.01 Ω•cm.

6. A method for preparing a radio frequency bonding grounding pad, characterized in that, include: Seed layers are sputtered on the upper and lower surfaces of a wafer to form a first seed layer and a second seed layer, respectively. Electroplating a pad layer on the first seed layer to form a patterned wafer; The patterned wafer is diced to form multiple grounding pads; wherein, from top to bottom, each grounding pad comprises a pad layer, a first seed layer, a substrate, and a second seed layer.

7. The method for preparing the radio frequency bonding grounding pad as described in claim 6, characterized in that, The process of electroplating a pad layer on the first seed layer to form a patterned wafer includes: The pad layer is prepared on the first seed layer, and the projection size of the pad layer on the substrate is smaller than the projection size of the second seed layer on the substrate; The first seed layer is etched based on the projection size of the pad layer on the substrate to obtain the first seed layer; wherein the projection size of the first seed layer on the substrate is equal to the projection size of the pad layer on the substrate.

8. The method for preparing the radio frequency bonding grounding pad as described in claim 6, characterized in that, The first seed layer and the second seed layer are made of at least one metal selected from titanium, chromium, platinum, titanium-tungsten alloy or gold.

9. The method for preparing the radio frequency bonding grounding pad according to any one of claims 6-8, characterized in that, The size of the grounding pad is less than 0.4mm × 0.4mm.

10. The method for preparing the radio frequency bonding grounding pad according to any one of claims 6-8, characterized in that, The resistivity of the wafer is less than 0.01 Ω•cm.

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