Computer system and data processing method

Abstract

The invention relates to the technical field of computer architecture, and provides a computer system and a data processing method, and the system comprises the steps that an on-chip network distributes data traffic according to an address interleaving strategy; the data link module comprises a plurality of data link units, and each data link unit comprises a plurality of data links; the network transmission module comprises a plurality of network transmission layers, the plurality of network transmission layers are in communication connection with the network-on-chip, each network transmission layer is in communication connection with the plurality of data links in one data link unit, and the network transmission layers receive first data sent by the network-on-chip and send the first data to the network-on-chip; distributing the first data to at least one data link in the data link unit according to a preset scheduling strategy; and transmitting second data received from at least one data link in the data link unit to the network-on-chip. According to the invention, through a one-to-many hierarchical link architecture, when a certain link fails, the link can be switched to other links, so that the stability and reliability of the system are enhanced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computer architecture, and in particular to a computer system and a data processing method. BACKGROUND

[0002] In current high-performance computing scenarios such as processor interconnection, high-performance computing relies on multiple parallel data links. Currently, these data links work independently, so once any physical link fails, such as disconnection or congestion, the communication task of the entire upper-layer application will be interrupted, and manual intervention is required for hardware replacement or task restart. This results in poor system reliability, low availability, high operation and maintenance cost, and long recovery time. SUMMARY

[0003] The present application provides a computer system and a data processing method to solve the problem that in the prior art, data links work independently, so once any physical link fails, such as disconnection or congestion, the communication task of the entire upper-layer application will be interrupted.

[0004] The present application provides a computer system applied to a chip, comprising: a network-on-chip configured to distribute data traffic according to an address interleaving strategy; a data link module comprising a plurality of data link units, and each data link unit comprising a plurality of data links; a network transmission module comprising a plurality of network transmission layers, the plurality of network transmission layers being in communication connection with the network-on-chip, and each network transmission layer being in communication connection with the plurality of data links in one data link unit, the network transmission layer being configured to: receive first data sent by the network-on-chip and distribute the first data to at least one data link in the data link unit in communication connection with the network transmission layer according to a preset scheduling strategy; and send second data received from at least one data link in the data link unit in communication connection with the network transmission layer to the network-on-chip.

[0005] According to the computer system provided by the present application, each network transmission layer comprises a scheduling unit, and the scheduling unit is configured to: maintain a state table recording a mask flag and a state flag of each data link in the data link unit in communication connection with the network transmission layer, the mask flag being configured to represent whether the data link is logically enabled, and the state flag being configured to represent a physical running state and an available capacity state of the data link; According to the mask flag and the state flag, a corresponding active data link of the plurality of data links in the data link unit of the network transport layer communication connection is determined, so as to transmit data through the active data link.

[0006] According to the computer system provided by the application, the scheduling unit is further used for: When the mask flag and the state flag are both the first value, it is determined that the corresponding data link is an active data link; When the mask flag is the second value, but the state flag is the first value or the second value, it is determined that the corresponding data link is an inactive data link; When the mask flag is the first value, but the state flag is the second value, it is determined that the corresponding data link is an inactive data link.

[0007] According to the computer system provided by the application, the scheduling unit is further used for: When the data link is in the ready state and there is available capacity, the state flag is updated to the first value; When the data link is in the unready state or there is no available capacity, the state flag is updated to the second value.

[0008] According to the computer system provided by the application, the preset scheduling strategy is a round-robin interleaving strategy, and the scheduling unit is further used for: The first data is distributed to one or more active data links recorded in the state table in a round-robin order.

[0009] According to the computer system provided by the application, the network transport layer further comprises a retransmission buffer, wherein the scheduling unit is further used for: The third data which has been sent but for which no receiving confirmation message is received is cached in the retransmission buffer; and When it is detected that there is first target data with sending loss in the third data, the first target data and second target data sent after the first target data are read from the reading retransmission buffer, and the first target data and the second target data are re-sent through the active data link.

[0010] According to the computer system provided by the application, the network transport layer further comprises at least one queue pair group; each queue pair group comprises at least one queue pair; and each queue pair comprises a sending queue and a receiving queue; wherein The sending queue is used for transmitting a request message sent by a first processor bound to a second processor; The receiving queue is used to transmit response messages sent by the second processor to the first processor.

[0011] The present invention also provides a data processing method applied to a computer system as described in any of the preceding claims, the method comprising: Upon receiving first data transmitted by the on-chip network at the network transport layer, the first data is distributed to at least one data link in the data link unit of the network transport layer communication connection according to a preset scheduling strategy; and... The second data received from at least one data link in the data link unit of the network transport layer communication connection is sent to the on-chip network.

[0012] According to a data processing method provided by the present invention, the method further includes: The status table corresponding to the data link unit of the network transport layer communication connection is maintained; the status table records the mask flag and status flag of each data link in the data link unit corresponding to the network transport layer; the mask flag is used to indicate whether the data link is logically enabled, and the status flag is used to indicate the physical operating status and available capacity status of the data link. Based on the mask flag and the status flag, the active data links corresponding to the plurality of data links in the data link unit of the network transport layer communication connection are determined so as to transmit data through the active data links.

[0013] According to a data processing method provided by the present invention, the method further includes: The retransmission buffer caches third data that has been sent but for which no acknowledgment of receipt has been received; and, If the third data contains lost first target data, the first target data and the second target data sent after the first target data are read from the read-retransmit buffer, and the first target data and the second target data are retransmitted through the active data link.

[0014] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and running on the processor, wherein the processor executes the computer program to implement the data processing method as described above.

[0015] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the data processing method as described above.

[0016] The present invention provides a computer system and data processing method. The system includes an on-chip network (BTC) for distributing data traffic according to an address interleaving strategy; a data link module including multiple data link units, each data link unit including multiple data links; and a network transmission module including multiple network transmission layers, each network transmission layer being communicatively connected to the BTC and each network transmission layer being communicatively connected to multiple data links in a data link unit. The network transmission layers are used to: receive first data sent by the BTC and distribute the first data to at least one data link in the data link units communicatively connected to the network transmission layers according to a preset scheduling strategy; and send second data received from at least one data link in the data link units communicatively connected to the network transmission layers back to the BTC. The present invention introduces a network transmission layer as an intermediate layer, decoupling the higher-level BTC from the lower-level data links, providing an infrastructure for flexible data scheduling, load balancing, and fault tolerance. Through a one-to-many hierarchical link architecture, when one or more lower-level data links change, the network transmission layer can adaptively adjust, thereby avoiding the interruption of the entire computing task due to local data link failures, enhancing system stability and reliability, and improving system efficiency. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the structure of the computer system provided by the present invention; Figure 2 This is a flowchart illustrating the data processing method provided by the present invention; Figure 3 This is a schematic diagram of the structure of the electronic device provided by the present invention.

[0019] Figure label: 110: On-chip network; 120: Data link module; 130: Network transmission module; 1201: Data Link Unit; 1202: Data Link; 1301: Network Transport Layer; 310: Processor; 320: Communication interface; 330: Memory; 340: Communication bus. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0021] With the rapid development of integrated circuit technology, modern chips, especially graphics processing units (GPUs) and artificial intelligence (AI) chips, are widely used in high-performance computing scenarios across various industries. High-performance computing is a core technology architecture for complex scientific computing, large-scale data processing, and AI model training. Its core requirement is to overcome the performance bottleneck of a single processor through multi-processor parallel collaboration. Efficient data interaction between processors relies on multiple parallel data links. These data links are the physical channels for data transmission between processors and determine the overall efficiency of parallel computing.

[0022] In current high-performance computing systems, communication tasks for upper-layer applications are split across multiple data links for parallel transmission. However, each data link is only responsible for its assigned tasks and does not participate in load balancing or fault tolerance of other data links. For example, in high-performance computing scenarios such as GPU-distributed training and multi-GPU collaborative inference, GPUs are typically configured with multiple communication ports and corresponding data links to achieve high-speed data interaction between GPUs. Currently, these communication ports and data links operate independently without redundancy or automatic scheduling mechanisms. If any communication port or corresponding data link fails, data transmission between GPUs will be interrupted, causing the entire training or inference task to stop. This requires manual troubleshooting of the faulty communication port or server node before restarting the task, resulting in complex maintenance processes, long recovery times, and a significant waste of computing resources.

[0023] To address this, embodiments of the present invention provide a computer system. Figure 1 This is a schematic diagram of the structure of a computer system provided in an embodiment of the present invention. This system is applied to a chip. The chip here can be an integrated circuit that includes computing and storage functions, such as a GPU, a Central Processing Unit (CPU), a System on Chip (SoC), a Neural Network Processing Unit (NPU), or a Microcontroller Unit (MCU). Figure 1 As shown, the system includes: On-chip network 110; The data link module 120 includes a plurality of data link units 1201, and each of the data link units includes a plurality of data links 1202; Network transmission module 130 includes multiple network transmission layers 1301, which are communicatively connected to the on-chip network, and each network transmission layer is communicatively connected to the multiple data links in one of the data link units. The network transmission layers are used for: Receive first data transmitted by the on-chip network and distribute the first data to at least one data link in the data link unit; and, The second data received from at least one data link in the data link unit is sent to the on-chip network.

[0024] Specifically, on-chip networking is a communication architecture within a chip used to replace the traditional bus architecture, enabling high-speed data interaction between multiple modules within the chip, such as the processor, storage unit, and network transport layer, and providing flexible traffic distribution capabilities.

[0025] In this embodiment, the on-chip network distributes data to multiple network transport layers connected to it according to an address interleaving strategy. Specifically, the on-chip network pre-stores address interleaving rules, which can be set based on the target processor address, target memory address, or target network transport layer identifier of the data. For example, the address interleaving rule can be set to allocate network transport layers based on the 3rd to 5th bit values ​​of the data's target address. When the field value is 001, the data is distributed to the first network transport layer; when the field value is 010, it is distributed to the second network transport layer, and so on. When the on-chip network receives data streams from the on-chip processor or external modules, it parses the target address of each data stream, extracts the feature fields used for interleaving distribution from the target address, and distributes the data to the corresponding network transport layer according to the address interleaving rules. Through the address interleaving strategy, the on-chip network can distribute data streams with different target addresses to multiple network transport layers, avoiding a single network transport layer from bearing excessive data transmission tasks and improving the overall data throughput of the chip.

[0026] The data link module comprises multiple data link units, each of which can include one or more physical data links, flexibly configured according to transmission bandwidth requirements. These data links are physical channels for data transmission between chips or between modules located far apart within a chip. The types of data links can include high-speed serial links, parallel links, and virtualized logic links. For example, in a GPU chip, a data link unit can correspond to the hardware link corresponding to a physical port of the chip, with each data link representing an independent physical transmission channel. In some specific implementations, each data link can consist of a media access control layer and a physical layer serializer / deserializer (SerDes) for high-speed serial communication.

[0027] The network transport module is an intermediate transport layer connecting the on-chip network and the data link module. It is responsible for data reception, distribution, and forwarding, and is the module that implements data transmission scheduling and link adaptation. In this embodiment, the network transport module includes multiple network transport layers (NTLs), each communicating with one data link unit. The number of network transport layers is adapted to the number of routing nodes and data link units in the on-chip network. For example, when there are four data link units on the chip, four network transport layers can be deployed accordingly. Each network transport layer establishes a fixed communication connection with one data link unit, and all network transport layers establish communication connections with the on-chip network, ensuring bidirectional data transmission between the on-chip network and the data link module.

[0028] On one hand, after receiving the first data sent by the on-chip network, the network transport layer distributes the first data to at least one data link in the data link unit of its communication connection based on a preset scheduling strategy. In a specific implementation, the network transport layer pre-configures a preset scheduling strategy, which can be selected according to the actual application scenario. For example, in scenarios with high requirements for transmission delay consistency, a round-robin strategy is selected; in scenarios with high requirements for transmission bandwidth utilization, a load balancing strategy is selected. The network transport layer buffers and parses the received first data to obtain information such as the data transmission priority, data length, and target link identifier. According to the preset scheduling strategy and data-related information, the network transport layer distributes the first data to one or more data links in the corresponding data link unit. For example, when the data link unit contains four data links mac0, mac1, mac2, and mac3, and the preset scheduling strategy is a round-robin strategy, the network transport layer distributes the received first data sequentially to mac0, mac1, mac2, and mac3 to achieve balanced transmission of data on multiple data links. If the first data is high-priority urgent data, it can also be distributed to multiple data links simultaneously to achieve parallel transmission and improve transmission speed. Here, "first data" refers to data sent from the on-chip network to the network transport layer, including but not limited to inter-processor request messages, data processing instructions, and service data to be transmitted.

[0029] On the other hand, the network transport layer monitors the transmission status of each data link in its communication connection's data link unit in real time. When second data that needs to be transmitted back to the on-chip network is transmitted in the data link, the network transport layer receives the second data and performs verification, format conversion, and other processing to ensure data integrity and compatibility. The network transport layer then sends the processed second data to the on-chip network, which then distributes it to the corresponding processor, storage unit, or other target module according to the destination address of the second data, completing the reverse transmission of the data. Here, the second data refers to the data received from the data stream of the data link unit and that needs to be transmitted back to the on-chip network, including but not limited to response messages to the first data, processed result data, and link status feedback data.

[0030] The computer system provided in this invention introduces a network transport layer as an intermediate layer, decoupling the high-level on-chip network from the low-level data links, thus providing an infrastructure for flexible data scheduling, load balancing, and fault tolerance. Through a one-to-many hierarchical link architecture, the network transport layer can adaptively adjust when one or more low-level data links change, thereby avoiding the interruption of the entire computing task due to local data link failures, enhancing the stability and reliability of the system, and improving system efficiency.

[0031] Based on the above embodiments, each network transport layer includes a scheduling unit, which is used to maintain a state table; wherein... The status table records the mask flag and status flag of each data link in the data link unit of the network transport layer communication connection; the mask flag is used to indicate whether the data link is logically enabled, and the status flag is used to indicate the physical operating status and available capacity status of the data link. Based on the mask flag and the status flag, the active data links corresponding to the plurality of data links in the data link unit of the network transport layer communication connection are determined so as to transmit data through the active data links.

[0032] Here, the scheduling unit is a functional unit in the network transport layer responsible for data distribution scheduling and link state management. It can be implemented through hardware circuits, such as logic gate circuits, FPGA logic units, or a combination of hardware and software. Its role is to maintain the data link state by maintaining a state table, execute scheduling strategies, and complete the matching and distribution of data and links.

[0033] Specifically, a scheduling unit is deployed within each Network Transport Layer (NTL). This scheduling unit establishes communication connections with other functional modules of the NTL and their corresponding data link units. It receives status feedback signals from the data links and performs data distribution control. Simultaneously, a status table is constructed within the scheduling unit. The number of entries in the status table corresponds to the number of data links in the data link unit to which the NTL communicates. For example, referring to the table below, if a data link unit contains four data links (mac0-mac3), then the status table contains four entries. Each entry corresponds to one data link, and each entry contains two core fields: a mask flag and a status flag. ; The storage method of the status table can be selected according to the performance requirements of the chip. For example, in scenarios with extremely high requirements for query speed, a register array is used to store the status table to ensure that the scheduling unit can complete the status query within one clock cycle. In scenarios with high requirements for storage resources, static random access memory or other high-speed storage media is used to store the status table, and time-division multiplexing is used to realize the query and update of the status of multiple links.

[0034] The mask flag is a binary flag in the status table used to identify the logical enable status of a data link. It is typically one or more bits; in this embodiment, one bit is preferred. Its value is set by the chip's logic configuration or user instructions, and is independent of the physical state of the data link. It is only used to control whether the data link is allowed to be selected by the scheduling unit. The initial value of the mask flag is set by the chip's initialization configuration program or by the user through the configuration interface. For example, if the user wants to temporarily disable data link mac2, the mask flag corresponding to mac2 is set to 0; if the user wants to enable all data links, the mask flags corresponding to mac0-mac3 are all set to 1. The value of the mask flag can be dynamically modified according to actual needs. For example, during system maintenance, the mask flag of a target data link can be set to 0 via instructions to achieve logical shutdown of that target data link.

[0035] The status flag is a binary flag in the status table used to characterize the physical operating status and available capacity of the data link. It is typically one or more bits; in this embodiment, one bit is preferred. Its value is dynamically updated based on the real-time physical status of the data link, directly reflecting whether the data link has the conditions for data transmission. The initial value of the status flag is determined by the power-on self-test result of the data link. For example, if the data link is connected and has available capacity (i.e., credits) after power-on, the status flag is initialized to 1; if the self-test detects a disconnected link or no available capacity, it is initialized to 0.

[0036] The scheduling unit receives status feedback signals from each data link in the corresponding data link unit in real time. These feedback signals are generated by the physical layer modules of the data link, such as the MAC module, and contain information such as the link's connectivity and available capacity. Based on the received status feedback signals, the scheduling unit dynamically updates the status flag bits of the corresponding data link in the status table: when the feedback signal indicates that the data link is connected and has available capacity, the status flag bit for that link is set to the first value; when the feedback signal indicates that the link is disconnected or has no available capacity, the status flag bit is set to the second value. The update of the mask flag bit is triggered by the chip's control module or user commands. When a logic enable or disable command is received, the scheduling unit updates the mask flag bit of the corresponding data link in the status table; the update process does not depend on the physical state of the data link.

[0037] By introducing a scheduling unit and a status table with dual flags, this embodiment achieves refined and multi-dimensional monitoring of data link status. This makes scheduling decisions no longer solely dependent on a single physical connection status, avoiding sending data to a physically intact data link that has been temporarily disabled by the administrator, as well as avoiding sending data to a physically faulty data link. This makes link management and data scheduling more accurate and reliable.

[0038] Furthermore, in this embodiment, the combination of the mask flag and status flag is used to determine whether the corresponding data link is an active or inactive data link. Specifically, when the network transport layer receives the first data sent by the on-chip network, or needs to receive the second data from the data link, the scheduling unit first queries the status table and filters out active data links based on the mask flag and status flag of each data link. The filtering logic is that a data link is determined to be an active data link only if both the mask flag and status flag of a data link simultaneously meet the preset valid conditions; if either flag does not meet the valid conditions, it is determined to be an inactive data link. After determining the active data link, the scheduling unit distributes the first data to the active data link for transmission, or receives the second data through the active data link, ensuring that data is transmitted only on logically enabled and physically available data links, avoiding data transmission failures due to data link unavailability.

[0039] The computer system provided in this invention maintains a state table containing mask flags and status flags through a scheduling unit, thereby achieving dual control over the logical and physical states of data links. This enables precise selection of active data links that meet transmission conditions, overcoming the problem in traditional technologies where a single flag cannot accurately determine link availability. It avoids data transmission to logically disabled or physically faulty links, reduces data transmission errors, and provides accurate link status information for subsequent flexible scheduling strategies, further improving the reliability and controllability of system data transmission.

[0040] Based on the above embodiments, the scheduling unit is further configured to: When both the mask flag and the status flag are at the first value, the corresponding data link is determined to be an active data link. When the mask flag is the second value, but the status flag is the first or second value, the corresponding data link is determined to be an inactive data link. When the mask flag is at the first value but the status flag is at the second value, the corresponding data link is determined to be an inactive data link.

[0041] Here, the first and second values ​​are relative concepts, and can be represented by binary 1 and 0 respectively. For example, the first value can be defined as 1, and the second value as 0. Furthermore, other binary values, such as 10, 11, or other multi-bit values, can be selected according to the chip's design specifications, as long as the values ​​are consistent throughout the entire system.

[0042] In this embodiment, specific rules for determining active and inactive data links are clearly defined, providing a clear execution standard for the scheduling unit's link selection. These rules are embedded in the scheduling unit in the form of hardware logic circuits or firmware programs, ensuring rapid execution of the determination process. The specific preset determination rules are as follows: When both the mask flag and the status flag for a data link are at their first value, the scheduling unit determines that the data link is an active data link. This means that the data link is not only logically allowed to be used, but its physical state is also in a normal, ready state, and can receive and transmit data at any time.

[0043] When the mask flag corresponding to a data link is the second value, regardless of whether its status flag is the first or second value (i.e., whether the physical status is normal or abnormal), the scheduling unit determines that the data link is an inactive data link. Specifically, in this embodiment, the logical control is set to the highest priority, meaning that once a data link is blocked by the administrator or upper-layer policies, it should not be used for data transmission even if its physical status is normal.

[0044] When the mask flag for a data link is at the first value but its status flag is at the second value, the scheduling unit also determines that the data link is an inactive data link. This indicates that the data link is currently unable to transmit data due to physical failure, connection interruption, or congestion.

[0045] In this embodiment, after the scheduling unit completes the status determination of all data links, it can further generate an active data link list. This list records the identifiers of all data links determined to be active, such as the MAC0 number. When the network transport layer needs to distribute the first data, the scheduling unit selects an active data link from the active data link list for data distribution; when it needs to receive the second data, it only listens to the active data links in the active data link list, ignoring the signals of inactive data links, ensuring that data transmission only occurs on valid links.

[0046] The computer system provided in this embodiment of the invention ensures that the selected active data links can meet the data transmission requirements through the above-described method, further improving the accuracy and reliability of data transmission, while simplifying the decision-making logic of the scheduling unit and reducing the complexity of hardware implementation.

[0047] Based on the above embodiments, the scheduling unit is further configured to: When the data link is in a ready state and there is available capacity, the status flag is updated to the first value; When the data link is in a not-ready state or there is no available capacity, the status flag is updated to the second value.

[0048] Here, the ready state refers to the physical layer module of the data link working normally, the link being connected and able to receive and send data normally, including states such as no link faults, normal signal transmission, and interface matching.

[0049] Available capacity status refers to the state in which the data link has sufficient transmission resources to carry data transmission, including the link's transmission bandwidth not being fully utilized, the data buffer having free space (i.e., having credits), and no transmission conflicts.

[0050] The unready state refers to a state in which the physical layer module of the data link is malfunctioning, resulting in the link being unable to connect or transmit data normally. This includes states such as link disconnection, module failure, signal distortion, and interface mismatch.

[0051] Specifically, the scheduling unit monitors the readiness and available capacity status of the corresponding data link in real time. The scheduling unit establishes a status monitoring channel with the physical layer module of the data link, receiving link connectivity signals such as link up or link down signals sent by the physical layer module. For example, when the SERDES module of the data link detects successful signal synchronization at both ends of the link, it sends a link up signal to the scheduling unit, indicating that the link is in a ready state; when signal synchronization fails or the link is disconnected, it sends a link down signal, indicating that the link is not in a ready state. The scheduling unit determines whether there is available capacity by querying the buffer status or bandwidth occupancy of the data link. For example, the transmit or receive buffer of the data link is equipped with a capacity counter. When the counter value is less than the maximum buffer capacity, i.e., there is free space and credits, it is determined that there is available capacity; when the counter value is equal to or exceeds the maximum capacity, i.e., there is no free space and no credits, it is determined that there is no available capacity.

[0052] Based on the monitoring results, when both conditions of the data link being in a ready state and having available capacity are met simultaneously, the scheduling unit updates the status flag bit corresponding to the data link to the first value, such as 1, indicating that the physical state and capacity state of the data link both meet the transmission requirements; when either condition of the data link being in a not-ready state or the data link being in a ready state but having no available capacity is met, the scheduling unit updates the status flag bit corresponding to the data link to the second value, such as 0, indicating that the data link does not yet have the conditions for transmission.

[0053] Furthermore, to ensure that the status flags can reflect the dynamic changes of the data links in a timely manner, the status flag updates adopt a combination of event triggering and timed querying. Specifically, when the state of a data link changes abruptly, such as a sudden link disconnection, a sudden filling of the buffer, or a link reconnection after a fault recovery, the physical layer module or buffer controller immediately sends a status change event to the scheduling unit. Upon receiving the event, the scheduling unit immediately executes the status flag update to ensure the real-time performance of the status table. In the absence of a sudden state change event, the scheduling unit iterates through the status of all data links at preset time intervals, such as 10 clock cycles, to check whether the current value of the status flag is consistent with the actual link state. If there is a discrepancy, it is corrected in a timely manner to avoid distortion of the status table due to event loss.

[0054] After the status flag is updated, the scheduling unit immediately synchronizes the updated status to the corresponding entry in the status table, ensuring that subsequent active data link determinations are based on the latest link status. For example, if data link mac1 originally had a status flag of 0 due to a full buffer, but after some data transmission is completed, freeing up buffer space, and the data link is still in a ready state, the scheduling unit detects this change and immediately updates the status flag of mac1 to 1. This allows the data link to be determined as an active data link in subsequent active data link screening and participate in data transmission.

[0055] The computer system provided in this embodiment of the invention updates the status flag bit based on the readiness status and available capacity, so that the status flag bit can reflect not only the connectivity of the link, but also its congestion status. This enables the scheduling unit to perform traffic scheduling more intelligently, avoiding not only faulty links, but also temporarily congested links, thereby improving the throughput and performance stability of the entire system.

[0056] Based on the above embodiments, the preset scheduling strategy is a round-robin interleaving strategy, and the scheduling unit is further configured to: The first data is distributed to one or more active data links recorded in the status table in a polling order.

[0057] Here, the polling interleaving strategy is a fair data distribution strategy. The scheduling unit distributes data to each link in the list of active data links in a preset fixed order, ensuring that each active link gets an equal opportunity for transmission and achieving balanced distribution of traffic across multiple links.

[0058] The polling order refers to the order in which the scheduling unit traverses active data links when distributing data. It can be preset, such as according to the data link number order mac0, mac1, mac2, mac3, or it can be dynamically adjusted according to factors such as the physical location of the link and transmission priority, but the order remains fixed within a polling cycle.

[0059] Specifically, the scheduling unit pre-configures the polling order, and the criteria for setting the polling order can be selected according to system requirements, including but not limited to: Configure by data link number: For example, if the list of active data links is [mac0, mac1, mac3], then the polling order is configured as mac0, mac1, mac3, mac0, mac1, mac3...; Configure based on link transmission performance: For example, sort the data links according to their bandwidth, and prioritize polling links with larger bandwidth to ensure that high-performance links get more transmission opportunities; Configure by link physical location: For example, distribute links in adjacent physical locations in a round-robin order to avoid concentrated load on links in the same area.

[0060] Once the polling order is configured, it is stored in the configuration register of the scheduling unit and can be dynamically modified via instructions. When the network transport layer receives the first data sent by the on-chip network, the scheduling unit queries the status table and filters the current list of active data links according to the above-mentioned judgment rules. Starting from the current position in the polling order, the scheduling unit selects the next active data link as the target link; for example, if the target link for the last data distribution was mac0 and the current polling position points to mac1, then mac1 is selected as the target link this time. The scheduling unit sends the first data to the selected target link and updates the polling position to the next active data link. For example, if mac1 is selected this time, the polling position is updated to mac3. Finally, the above steps are repeated to distribute the subsequently received first data to each link in the list of active data links in the polling order, realizing polling interleaving distribution of data.

[0061] Furthermore, when the list of active data links changes, such as adding a new active data link or a data link becoming inactive, the scheduling unit automatically adjusts the polling order to ensure the continuity of the polling strategy: For example, if the original list of active data links is [mac0, mac1, mac3], and the polling order is mac0, mac1, mac3, when mac2 is added as an active data link, the polling order is adjusted to mac0, mac1, mac3, mac2. That is, the new data link is inserted at the end of the polling order or at a specified position, and subsequent polling follows the new order. Another example: if the original list of active data links is [mac0, mac1, mac3], and the polling order is mac0, mac1, mac3, when mac1 becomes an inactive data link, the polling order is adjusted to mac0, mac3, skipping the inactive data link to ensure uninterrupted data distribution.

[0062] The computer system provided in this invention employs a round-robin interleaving strategy for data distribution, ensuring that each active data link receives an equal opportunity for transmission. This avoids situations where a single data link is overloaded or its resources are idle, achieving balanced port traffic within a single data link. Even if a data link becomes congested or fails and becomes inactive, the round-robin strategy can automatically skip that data link and distribute data to other active data links. This not only improves the utilization rate of link resources but also enhances the stability of data transmission, preventing the overall transmission efficiency from being affected by problems with a single data link.

[0063] Based on the above embodiments, the network transport layer further includes a retransmission buffer, wherein the scheduling unit is further configured to: The retransmission buffer caches third data that has been sent but for which no acknowledgment of receipt has been received; and, If the third data contains lost first target data, the first target data and the second target data sent after the first target data are read from the read-retransmit buffer, and the first target data and the second target data are retransmitted through the active data link.

[0064] The retransmission buffer is a storage module in the network transport layer used to cache data that has been sent but for which no acknowledgment message has been received. It can be implemented using storage media such as register arrays or first-in-first-out arrays, and has the functions of fast data writing, reading and deletion. The buffer capacity can be configured according to the chip's transmission rate and retransmission requirements.

[0065] In this embodiment, a retransmission buffer is added to the network transport layer to implement a retransmission strategy whereby when a data loss is detected, the sending end retransmits the lost data and all subsequent data, ensuring the reliability of data transmission.

[0066] Specifically, a retransmission buffer is deployed within each network transport layer. This retransmission buffer establishes a communication connection with the scheduling unit to receive transmitted data from the data transmission module and retransmit the buffered data when needed. The configuration parameters of the retransmission buffer include buffer capacity and timeout period. The buffer capacity is set based on the chip's maximum data transmission volume and retransmission requirements; the timeout period refers to the maximum waiting time after data transmission without receiving a reception acknowledgment message, determined by factors such as data transmission link latency and receiver processing speed.

[0067] When the network transport layer sends third data through an active data link, a copy of the third data is written to the retransmission buffer simultaneously, recording information such as the transmission time, data identifier, and destination link, forming a cached data entry. The retransmission buffer manages the cached data in an ordered manner, storing data entries in the order of data transmission and supporting fast lookup by data identifier. Simultaneously, the retransmission buffer monitors reception acknowledgment messages in real time. When a reception acknowledgment message for a specific piece of third data is received, the corresponding cached entry is immediately deleted from the buffer, freeing up cache space.

[0068] The scheduling unit monitors the cached data in the retransmission buffer in real time. It sets a timeout timer for each cached data entry, starting when data is sent. When the timer reaches the preset timeout period and no corresponding data reception acknowledgment message is received, the data is determined to be the first target data, indicating transmission loss. Alternatively, if the receiving end detects data loss, it returns a data loss feedback message to the sending end, specifying the data identifier of the lost data. Upon receiving this feedback message, the scheduling unit searches for the corresponding data in the cached data entry based on the data identifier and determines it to be the first target data.

[0069] Upon detecting the first target data, the scheduling unit executes a retransmission operation according to a preset retransmission mechanism. Specifically, the scheduling unit reads the first target data from the retransmission buffer, as well as all second target data sent after the first target data, i.e., subsequent data for which no acknowledgment message has been received. For example, if the transmission order of the third data is D1, D2, D3, D4, D5, and D2 is detected as lost, then D2, D3, D4, and D5 are retransmitted. The scheduling unit queries the current list of active data links and selects a suitable active data link. The scheduling unit retransmits the first target data and the second target data to the receiving end sequentially through the selected active data link according to the original transmission order. After retransmission, the scheduling unit resets the timeout timer for the relevant data and continues to monitor for acknowledgment messages. If no acknowledgment is received after timeout again, multiple retransmissions or alarms can be triggered according to the configuration.

[0070] The computer system provided in this embodiment of the invention solves the problem of data loss that may occur during data transmission by setting up a retransmission buffer and adopting a retransmission mechanism. The retransmission buffer can effectively cache unacknowledged data, ensuring that lost data is traceable and retransmittable. The retransmission mechanism ensures the correctness of the data order at the receiving end by retransmitting lost data and subsequent data, avoiding processing errors caused by data out of order.

[0071] Based on the above embodiments, the network transport layer further includes at least one queue pair group; each queue pair group includes at least one queue pair; and each queue pair includes a transmit queue and a receive queue; wherein, The sending queue is used to transmit request messages sent by the bound first processor to the second processor; The receiving queue is used to transmit response messages sent by the second processor to the first processor.

[0072] A queue pair is a logical grouping unit in the network transport layer used to manage multiple queue pairs. Each queue pair is bound to one or more data links in the data link unit, realizing a precise mapping between data links and queue pairs, which facilitates the management of data transmission according to service type or priority.

[0073] A queue pair is the basic logical unit for realizing bidirectional data transmission. It consists of a sending queue and a receiving queue, corresponding to a set of request-response data transmission relationships, ensuring a one-to-one correspondence between request messages and response messages.

[0074] In this embodiment, at least one queue pair is deployed within each network transport layer. The number of queue pairs and the number of data links in the data link unit can be configured as follows: One-to-one configuration: One queue pair corresponds to one data link. For example, if a data link unit contains 4 data links mac0-mac3, then deploy 4 queue pairs QP group0-QP group3, which are bound to mac0-mac3 respectively. One-to-many configuration: One queue pair corresponds to multiple data links, for example, one queue pair is bound to two links, mac0 and mac1; Many-to-one configuration: Multiple queue pairs correspond to one data link. For example, two queue pairs are bound to mac0 and carry services with different priorities.

[0075] Each queue pair is bound to a processor, such as a first processor bound to a second processor. The binding relationship is set through the chip's configuration interface. For example, the send queue of the first queue pair is bound to the first processor and used to transmit request messages sent by the first processor to the second processor; the receive queue of the first queue pair is bound to the first processor and used to transmit response messages sent by the second processor to the first processor. The binding relationship is stored in the configuration register of the network transport layer and can be dynamically modified to adapt to changes in the interaction between processors.

[0076] When the first processor needs to send a request message to the second processor, the first processor writes the request message into the send queue of the queue pair it is bound to. The send queue buffers the request message in a first-in-first-out order. The scheduling unit reads the request message from the send queue and distributes it to the data link bound to the queue pair group of the first processor according to a preset scheduling strategy. The message is then transmitted to the network transport layer corresponding to the second processor through this link.

[0077] Similarly, after receiving the request message, the second processor processes it to generate a response message and sends it to the network transport layer corresponding to the first processor through its own network transport layer. The network transport layer corresponding to the first processor receives the response message (which is a type of second data) through the bound data link and writes it into the second processor's receive queue. The first processor reads the response message from the receive queue in a first-in-first-out order, completing one request-response interaction.

[0078] When multiple queues are transmitting data simultaneously, the scheduling unit manages concurrency in the following ways: Priority scheduling by queue pair: A priority is configured for each queue pair, and the scheduling unit prioritizes distributing data from the sending queues of higher-priority queue pairs to ensure the timeliness of critical business transmission; Data link bandwidth allocation: Based on the bandwidth of the bound data link, a transmission bandwidth quota is allocated to each queue pair to avoid a single queue pair occupying too much link bandwidth and affecting the transmission of other queue pairs; Queue status monitoring and adjustment: The scheduling unit monitors the buffer status of each sending queue and receiving queue in real time. When the buffer of a queue is full, the allocation of link resources to that queue is suspended. Transmission is resumed after the buffer is released to avoid data overflow.

[0079] The computer system provided in this embodiment of the invention achieves the directional and orderly transmission of request and response messages through the hierarchical structure design of queue groups and queue pairs, ensuring the accuracy of interaction between the first processor and the second processor.

[0080] The present invention also provides a data processing method. Figure 2This is a flowchart illustrating the data processing method provided by the present invention. This method is applied to a computer system as described in any of the preceding claims, such as... Figure 2 As shown, the method includes: Step 210: Upon receiving first data transmitted by the on-chip network at the network transport layer, the first data is distributed to at least one data link in the data link unit of the network transport layer communication connection according to a preset scheduling strategy; and, Step 220: The second data received from at least one data link in the data link unit of the network transport layer communication connection is sent to the on-chip network.

[0081] The main execution entity of this method is the Network Transport Layer (NTL) of the computer system. Each NTL executes this method independently to achieve data interaction with the corresponding data link unit and the on-chip network. The computer system has been initialized, and the on-chip network, data link module, and network transport module are all in normal working condition. The on-chip network is configured with an address interleaving strategy, which can correctly distribute data to the corresponding network transport layer. The network transport layer is configured with a preset scheduling strategy, such as a polling interleaving strategy, which can realize the distribution of data to the data link.

[0082] Specifically, the on-chip network (CNIC) distributes the first data to the current network transport layer based on the address interleaving strategy and the target address characteristics. For example, if the target address field of the first data is 011, corresponding to the network transport layer NTL2, the CNIC will send the data to NTL2. The receiving module of the network transport layer performs format verification and parsing on the first data, extracting information such as the data transmission priority and target service type. The scheduling unit of the network transport layer invokes a preset scheduling strategy and distributes the first data to at least one data link in the data link unit connected to the network transport layer according to the strategy rules. For example, when the preset scheduling strategy is a round-robin interleaving strategy, the scheduling unit distributes the first data to the currently active data link in round-robin order; when the preset scheduling strategy is a load balancing strategy, the scheduling unit selects the data link with the lowest current load to distribute the data. The data link in the data link unit receives the first data and transmits it to the receiving end.

[0083] The network transport layer monitors the transmission status of each data link in the corresponding data link unit in real time through its communication interface with the data link unit. When a data link receives second data from the receiving end, the receiving module of the network transport layer receives the second data. The receiving module of the network transport layer performs checksum verification and format conversion on the second data, converting the format of the second data into a transmission format supported by the on-chip network to ensure that the data can be transmitted normally in the on-chip network. The sending module of the network transport layer sends the processed second data to the on-chip network. The on-chip network distributes the second data to the corresponding target module according to the destination address of the second data, completing the return transmission of the second data.

[0084] The data processing method provided in this invention introduces a network transport layer as an intermediate layer, decoupling the high-level on-chip network from the low-level data links, thus providing an infrastructure for flexible data scheduling, load balancing, and fault tolerance. Through a one-to-many hierarchical link architecture, the network transport layer can adaptively adjust when one or more low-level data links change, thereby avoiding the interruption of the entire computing task due to local data link failures, enhancing system stability and reliability, and improving system efficiency.

[0085] Based on the above embodiments, the method further includes: The status table corresponding to the data link unit of the network transport layer communication connection is maintained; the status table records the mask flag and status flag of each data link in the data link unit corresponding to the network transport layer; the mask flag is used to indicate whether the data link is logically enabled, and the status flag is used to indicate the physical operating status and available capacity status of the data link. Based on the mask flag and the status flag, the active data links corresponding to the plurality of data links in the data link unit of the network transport layer communication connection are determined so as to transmit data through the active data links.

[0086] When the network transport layer starts up, the scheduling unit initializes the state table. The number of entries in the state table is consistent with the number of data links in the data link units that the network transport layer communicates with. Each entry initializes the initial values ​​of the configuration mask flag and the initial values ​​of the status flag.

[0087] The scheduling unit maintains the status table in real time and continuously monitors the mask configuration instructions and physical status feedback signals of each data link. When a mask configuration instruction is received, the scheduling unit updates the mask flag of the corresponding data link; when a physical status feedback signal of a data link is received, the scheduling unit updates the status flag of the corresponding data link.

[0088] The scheduling unit periodically performs consistency checks on the status table, verifying whether the values ​​of the flag bits stored in the status table are consistent with the actual status of the data link. If there is a discrepancy, the status table is automatically corrected to ensure its accuracy.

[0089] Before executing the first data distribution or the second data reception, the scheduling unit queries the status table to obtain the values ​​of the mask flag and status flag for each data link. According to preset judgment rules, the scheduling unit determines the status of each data link. When both the mask flag and status flag are at the first value, it is determined to be an active data link; when the mask flag is at the second value, or when the mask flag is at the first value but the status flag is at the second value, it is determined to be an inactive data link. The scheduling unit generates an active data link list, recording the identifiers of all data links determined to be active, for subsequent data transmission.

[0090] When distributing the first data, the scheduling unit selects data links only from the list of active data links and distributes the first data to the selected active data links according to a preset scheduling strategy, avoiding data transmission to inactive links. When receiving the second data, the scheduling unit only listens to links in the list of active data links, receives the second data from active links, and ignores invalid signals from inactive links, thus improving data reception efficiency.

[0091] When the status of a data link changes, such as the addition of an active link or an active link becoming inactive, the scheduling unit repeats the above steps to update the status table and the list of active data links. The updated list of active links is then applied to subsequent data transmission steps to ensure that data transmission is always based on the latest link status without interrupting the transmission process.

[0092] The data processing method provided in this embodiment of the invention ensures that data is transmitted only on active data links through the above-described manner, avoiding data transmission to logically disabled or physically unavailable links, reducing data transmission errors and resource waste. Real-time maintenance of the status table ensures the accuracy of the link status, and dynamic filtering of active data links ensures the effectiveness of data transmission, further improving the reliability of the data processing method and the utilization rate of link resources.

[0093] Based on the above embodiments, the method further includes: The retransmission buffer caches third data that has been sent but for which no acknowledgment of receipt has been received; and, If the third data contains lost first target data, the first target data and the second target data sent after the first target data are read from the read-retransmit buffer, and the first target data and the second target data are retransmitted through the active data link.

[0094] While distributing third-party data to the data link, the network transport layer's sending module writes a copy of the third-party data to the retransmission buffer and records key information about the third-party data, including data identifier, sending time, target link, and corresponding data receiver, forming a cached data entry. The retransmission buffer stores cached data entries in the order of data transmission, managing data using a first-in-first-out (FIFO) or data identifier sorting method to ensure fast data retrieval and reading. Simultaneously, the retransmission buffer monitors the reception acknowledgment messages returned by the data receiver. When a reception acknowledgment message for a particular piece of third-party data is received, the corresponding cached entry is immediately deleted, freeing up buffer space.

[0095] The scheduling unit monitors the cached data entries in the retransmission buffer in real time and determines whether data transmission is lost through two methods: timeout detection or receiver feedback detection. When the first target data that has been lost is detected, the scheduling unit initiates the retransmission process, reads the first target data from the retransmission buffer, and reads all the second target data that were sent after the first target data.

[0096] The scheduling unit queries the current list of active data links and selects a suitable active data link, such as selecting the next active link in round-robin order or selecting the active data link with the lowest load as the retransmission link. The scheduling unit retransmits the first target data and the second target data sequentially through the selected active data link to the receiving end in the original transmission order, and resets the timeout timers for these data. After transmission is complete, the scheduling unit continues to monitor for reception acknowledgment messages. If reception acknowledgment messages for all retransmitted data are received, the corresponding cache entry in the retransmission buffer is deleted. If no acknowledgment is received after a timeout, the retransmission step can be repeated according to the preset configuration, such as a maximum of 3 retransmissions. If the maximum number of retransmissions is reached and the transmission still fails, a system alarm is triggered.

[0097] The data processing method provided in this invention buffers unacknowledged data in a retransmission buffer and retransmits lost data based on a retransmission mechanism, effectively solving the data loss problem during data transmission. This method ensures that even in cases of link instability or interference, the sending end can accurately transmit lost data to the receiving end through the retransmission mechanism, guaranteeing the integrity and correct sequence of data transmission.

[0098] Figure 3 An example is a schematic diagram of the physical structure of an electronic device, such as... Figure 3As shown, the electronic device may include: a processor 310, a communications interface 320, a memory 330, and a communication bus 340, wherein the processor 310, the communications interface 320, and the memory 330 communicate with each other via the communication bus 340. The processor 310 can invoke logical instructions stored in the memory 330 to execute a data processing method. This method is applied to the computer system described in any of the preceding embodiments, and the method includes: Upon receiving first data transmitted by the on-chip network at the network transport layer, the first data is distributed to at least one data link in the data link unit of the network transport layer communication connection according to a preset scheduling strategy; and... The second data received from at least one data link in the data link unit of the network transport layer communication connection is sent to the on-chip network.

[0099] Furthermore, the logical instructions in the aforementioned memory 330 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, essentially, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0100] On the other hand, the present invention also provides a computer program product, the computer program product comprising a computer program stored on a non-transitory computer-readable storage medium, the computer program comprising program instructions, wherein when the program instructions are executed by a computer, the computer is capable of performing the data processing method provided by the methods described above, the method being applied to a computer system as described in any of the preceding claims, the method comprising: Upon receiving first data transmitted by the on-chip network at the network transport layer, the first data is distributed to at least one data link in the data link unit of the network transport layer communication connection according to a preset scheduling strategy; and... The second data received from at least one data link in the data link unit of the network transport layer communication connection is sent to the on-chip network.

[0101] In another aspect, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, is implemented to perform the data processing methods provided by the methods described above, the method being applied to a computer system as described in any of the preceding claims, the method comprising: Upon receiving first data transmitted by the on-chip network at the network transport layer, the first data is distributed to at least one data link in the data link unit of the network transport layer communication connection according to a preset scheduling strategy; and... The second data received from at least one data link in the data link unit of the network transport layer communication connection is sent to the on-chip network.

[0102] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0103] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0104] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A computer system, characterized in that, Applied to chips, including: On-chip networking is used to distribute data traffic according to address interleaving strategies. The data link module includes multiple data link units, and each data link unit includes multiple data links; The network transmission module includes multiple network transmission layers, which are communicatively connected to the on-chip network. Each network transmission layer is also communicatively connected to the multiple data links in one of the data link units. The network transmission layers are used for: Receive first data transmitted by the on-chip network, and distribute the first data to at least one data link in the data link unit of the network transport layer communication connection according to a preset scheduling strategy; and, The second data received from at least one data link in the data link unit of the network transport layer communication connection is sent to the on-chip network.

2. The computer system according to claim 1, characterized in that, Each of the network transport layers includes a scheduling unit, the scheduling unit being used for: A status table is maintained, which records the mask flag and status flag of each data link in the data link unit of the network transport layer communication connection; the mask flag is used to indicate whether the data link is logically enabled, and the status flag is used to indicate the physical operating status and available capacity status of the data link. Based on the mask flag and the status flag, the active data links corresponding to the plurality of data links in the data link unit of the network transport layer communication connection are determined so as to transmit data through the active data links.

3. The computer system according to claim 2, characterized in that, The scheduling unit is further configured to: When both the mask flag and the status flag are at the first value, the corresponding data link is determined to be an active data link. When the mask flag is the second value, but the status flag is the first or second value, the corresponding data link is determined to be an inactive data link. When the mask flag is at the first value but the status flag is at the second value, the corresponding data link is determined to be an inactive data link.

4. The computer system according to claim 3, characterized in that, The scheduling unit is further configured to: When the data link is in a ready state and there is available capacity, the status flag is updated to the first value; When the data link is in a not-ready state or there is no available capacity, the status flag is updated to the second value.

5. The computer system according to claim 2, characterized in that, The preset scheduling strategy is a round-robin interleaving strategy, and the scheduling unit is further used for: The first data is distributed to one or more active data links recorded in the status table in a polling order.

6. The computer system according to claim 2, characterized in that, The network transport layer further includes a retransmission buffer, wherein the scheduling unit is further configured to: The retransmission buffer caches third data that has been sent but for which no acknowledgment of receipt has been received; and, If the third data contains lost first target data, the first target data and the second target data sent after the first target data are read from the read-retransmit buffer, and the first target data and the second target data are retransmitted through the active data link.

7. The computer system according to claim 1, characterized in that, The network transport layer further includes at least one queue pair group; each queue pair group includes at least one queue pair; and each queue pair includes a transmit queue and a receive queue; wherein, The sending queue is used to transmit request messages sent by the bound first processor to the second processor; The receiving queue is used to transmit response messages sent by the second processor to the first processor.

8. A data processing method, characterized in that, Applied to a computer system as described in any one of claims 1 to 7, the method comprises: Upon receiving first data transmitted by the on-chip network at the network transport layer, the first data is distributed to at least one data link in the data link unit of the network transport layer communication connection according to a preset scheduling strategy; and... The second data received from at least one data link in the data link unit of the network transport layer communication connection is sent to the on-chip network.

9. The data processing method according to claim 8, characterized in that, The method further includes: The status table corresponding to the data link unit of the network transport layer communication connection is maintained; the status table records the mask flag and status flag of each data link in the data link unit corresponding to the network transport layer; the mask flag is used to indicate whether the data link is logically enabled, and the status flag is used to indicate the physical operating status and available capacity status of the data link. Based on the mask flag and the status flag, the active data links corresponding to the plurality of data links in the data link unit of the network transport layer communication connection are determined so as to transmit data through the active data links.

10. The data processing method according to claim 9, characterized in that, The method further includes: The retransmission buffer caches third data that has been sent but for which no acknowledgment of receipt has been received; and, If the third data contains lost first target data, the first target data and the second target data sent after the first target data are read from the read-retransmit buffer, and the first target data and the second target data are retransmitted through the active data link.

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