Isolation setting method for hole impedance matching in circuit design based on machine learning

Abstract

The invention relates to the technical field of circuit design, and discloses an isolation setting method for hole impedance matching in circuit design based on machine learning. The method comprises the steps that hole impedance parameters, isolation structure parameters and corresponding anti-interference performance indexes in historical circuit design data are collected; inputting the parameters into a pre-constructed correlation model, and generating a mapping relation between the hole impedance and the isolation performance; key hole impedance parameters are extracted based on the mapping relation, and a priority sequence is divided; obtaining topological structure features of a target circuit, and generating an initial isolation structure parameter set in combination with the priority sequence; calling a machine learning model to dynamically optimize the initial parameter set, and outputting optimized parameters; the actual impedance matching state of the target circuit is monitored in real time, and the optimized isolation structure parameters are adjusted according to the monitoring result. The method adapts to the characteristics of a target circuit, guarantees the anti-interference performance under impedance matching, and is suitable for circuit design scenes with different complexities.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit design, in particular to a method for setting isolation of hole impedance matching in circuit design based on machine learning. BACKGROUND

[0002] In the process of circuit design, hole structure is a common component in the signal transmission path, and widely exists in the design scenarios of printed circuit board, integrated circuit packaging, etc. The matching degree of hole impedance directly affects the integrity of signal transmission. If the hole impedance is mismatched, it is easy to cause signal reflection, attenuation and other problems, which will affect the realization of circuit function. The setting of isolation structure is related to the anti-interference ability of the circuit. Reasonable isolation structure can reduce the crosstalk between different signal channels and the interference of external environment on internal signals of the circuit. Therefore, the cooperative optimization of hole impedance matching and isolation structure setting is an important content in circuit design.

[0003] Currently, there are still many limitations in the method for setting isolation of hole impedance matching in circuit design. The traditional isolation setting method mainly relies on the experience accumulation of engineers, and the combination scheme of hole impedance parameters and isolation structure parameters needs to be manually screened in the design process. When facing complex circuit design scenarios such as multi-channel high-frequency circuit and high-density integrated circuit, the number of hole impedance parameters and isolation structure parameters increases significantly, and the coupling relationship between parameters is more complex. It is difficult for engineers to cover all possible parameter combinations, which may miss important parameters affecting the isolation performance, resulting in that the final designed isolation structure cannot meet the expected anti-interference requirements, and repeated trial and error adjustment is needed, which prolongs the design cycle.

[0004] Some existing methods try to calculate the isolation structure parameters by fixing mathematical models, but such models are mostly based on ideal working conditions and do not fully incorporate historical data of actual circuit design. In actual circuit design, the hole impedance characteristics and isolation performance in different topologies and different application scenarios show significant differences. Ideal models cannot accurately reflect these actual differences, resulting in deviations between the calculated isolation structure parameters and the actual requirements of the circuit, which still needs a lot of manual correction. At the same time, the existing optimization process is mostly static optimization, i.e. the isolation structure parameters are set and not adjusted during the operation of the circuit. However, when the circuit is actually working, factors such as changes in environmental temperature, fluctuations in load, and aging of components may cause the hole impedance to drift. At this time, the fixed isolation structure parameters cannot adapt to the impedance changes, which may cause impedance mismatch and degradation of isolation performance, affecting the long-term stable operation of the circuit.

[0005] The existing method lacks a systematic identification mechanism for key hole impedance parameters affecting isolation performance, and all parameters are usually treated equally in the optimization process without dividing parameter priorities. This not only increases the redundancy of optimization calculation and reduces optimization efficiency, but also may ignore the adjustment of core parameters due to excessive attention to secondary parameters, resulting in poor optimization effect and difficulty in achieving the coordinated improvement of isolation performance and impedance matching. These problems collectively result in the current hole impedance matching isolation setting method being unable to meet the increasingly complex circuit design requirements in efficiency, accuracy and adaptability. SUMMARY

[0006] The purpose of the present application is to provide a hole impedance matching isolation setting method based on machine learning in circuit design to solve the problems raised in the background art.

[0007] To achieve the above purpose, the present application provides a hole impedance matching isolation setting method based on machine learning in circuit design, which comprises:

[0008] Collecting hole impedance parameters, isolation structure parameters and corresponding anti-interference performance indicators in historical circuit design data;

[0009] Inputting the hole impedance parameters and isolation structure parameters into a pre-constructed correlation model to generate a mapping relationship between hole impedance and isolation performance;

[0010] According to the mapping relationship, extracting key hole impedance parameters affecting isolation performance and dividing a priority sequence of the key hole impedance parameters;

[0011] Obtaining the topological structure characteristics of the target circuit, generating an initial isolation structure parameter set based on the topological structure characteristics and the priority sequence;

[0012] Calling a machine learning model to dynamically optimize the initial isolation structure parameter set and output optimized isolation structure parameters;

[0013] Real-time monitoring of the actual impedance matching state of the target circuit, and adjusting the optimized isolation structure parameters according to the monitoring results.

[0014] Preferably, the collection of hole impedance parameters, isolation structure parameters and corresponding anti-interference performance indicators in historical circuit design data comprises:

[0015] Extracting hole diameter, hole spacing and hole layer dielectric thickness recorded in historical circuit design files as hole impedance parameters;

[0016] Obtaining isolation slot width, creepage distance and parallel wiring spacing corresponding to the hole impedance parameters as isolation structure parameters;

[0017] Read the coupling capacitance, ground loop impedance, and ripple rejection ratio from the circuit test report as anti-interference performance indicators.

[0018] Preferably, the hole impedance parameters and the isolation structure parameters are input into a pre-constructed correlation model to generate a mapping relationship between hole impedance and isolation performance, including:

[0019] The hole impedance parameters are normalized to obtain a standardized hole impedance feature vector;

[0020] The isolation structure parameters are feature-decomposed to obtain an isolation structure feature subset;

[0021] The non-linear relationship between the standardized hole impedance feature vector and the isolation structure feature subset is analyzed by a convolutional neural network to output a mapping relationship matrix containing weight coefficients.

[0022] Preferably, the key hole impedance parameters affecting the isolation performance are extracted according to the mapping relationship, and a priority sequence of the key hole impedance parameters is divided, including:

[0023] The correlation coefficients of each row vector in the mapping relationship matrix and the anti-interference performance indicators are calculated;

[0024] The hole impedance parameters corresponding to the row vectors with correlation coefficients exceeding a preset threshold are screened as key hole impedance parameters;

[0025] The key hole impedance parameters are arranged in descending order according to the correlation coefficients to generate a priority sequence.

[0026] Preferably, the topology structure features of the target circuit are obtained, and an initial isolation structure parameter set is generated based on the topology structure features and the priority sequence, including:

[0027] The spatial distribution features of high-frequency signal paths and power supply paths in the target circuit are identified;

[0028] The top N key hole impedance parameters are selected according to the priority sequence, and a preset isolation structure parameter constraint rule is matched;

[0029] The spatial distribution features and the isolation structure parameter constraint rule are combined to generate an initial isolation structure parameter set containing isolation slot depth and dielectric layer thickness.

[0030] Preferably, the machine learning model is called to dynamically optimize the initial isolation structure parameter set, and an optimized isolation structure parameter is output, including:

[0031] The initial isolation structure parameter set is input into a pre-trained reinforcement learning model, and the isolation performance gain is evaluated by a reward function;

[0032] Iteratively adjust the isolation groove width and wiring spacing according to the evaluation results until the impedance matching error tolerance is met.

[0033] Output the isolation layer thickness and creepage distance in the final iteration result as the optimized isolation structure parameters.

[0034] Preferably, the isolation performance gain is evaluated through a reward function, including:

[0035] Simulate the actual impedance matching state of the initial isolation structure parameter set in the target circuit;

[0036] Calculate the absolute value of the deviation of the simulation result from the expected impedance matching target;

[0037] Take the reciprocal of the absolute value of the deviation as a reward value to update the weight parameters of the reinforcement learning model.

[0038] Preferably, the actual impedance matching state of the target circuit is monitored in real time, and the optimized isolation structure parameters are adjusted according to the monitoring results, including:

[0039] Collect impedance spectrum data of key nodes under the working state of the target circuit;

[0040] Compare the deviation of the impedance spectrum data from the preset impedance reference curve;

[0041] If the deviation exceeds the dynamic adjustment threshold, regenerate the isolation groove position and dielectric material type parameters.

[0042] Preferably, the comparison of the deviation of the impedance spectrum data from the preset impedance reference curve includes:

[0043] Extract the resonance peak frequency and amplitude characteristics of the impedance spectrum data, calculate the root mean square error of the resonance peak frequency and amplitude characteristics relative to the impedance reference curve, and trigger a parameter adjustment instruction when the root mean square error is greater than the frequency tolerance or the amplitude tolerance.

[0044] Preferably, the adjustment of the optimized isolation structure parameters according to the monitoring results includes:

[0045] Update the input features of the associated model based on the latest collected impedance spectrum data;

[0046] Correct the weight coefficients of the mapping relationship matrix through an online learning mechanism;

[0047] Regenerate the isolation groove width and parallel wiring spacing parameters using the corrected mapping relationship matrix.

[0048] Compared with the prior art, the present application has the following advantages:

[0049] The aperture impedance parameters, isolation structure parameters and corresponding anti-interference performance indicators in the collected historical circuit design data are used as the basis for subsequent analysis, rather than relying on ideal assumptions or single experience. The historical data covers actual parameters and performance in different circuit topologies and different application scenarios, and can reflect the correlation between parameters and performance in the real design environment, providing reliable data support for subsequent mapping relationship establishment and key parameter identification, and avoiding design deviation caused by data deviation from reality.

[0050] By inputting the aperture impedance parameters and isolation structure parameters into the pre-constructed correlation model, the mapping relationship between aperture impedance and isolation performance is generated, which breaks the problem of unclear correlation between parameters and performance in traditional methods. The correlation model can mine the potential coupling relationship between parameters through data mining technology, present the influence of aperture impedance change on isolation performance in a visual and quantifiable form, enable designers to clearly understand the action law of different aperture impedance parameters on isolation performance, and no longer rely on subjective experience for judgment, providing a clear direction for subsequent parameter adjustment.

[0051] Based on the mapping relationship, key aperture impedance parameters are extracted and prioritized, which can focus on the parameters that play a core role in isolation performance and eliminate redundant parameters with less impact. This process reduces the calculation amount in the subsequent parameter generation and optimization process, avoids the occupation of calculation resources by invalid parameters, and improves design efficiency; at the same time, the division of priority sequence enables designers to clearly optimize the key points, prioritize the adaptability of core parameters in the parameter adjustment process, ensure that the optimization process accurately focuses on key links, and realizes efficient improvement of isolation performance.

[0052] The topological structure characteristics of the target circuit are obtained, and the initial isolation structure parameter set is generated in combination with the priority sequence, so that the initial parameter set is no longer a universal template, but a scheme that adapts to the specific structure of the target circuit. Different topological structures of the circuit have differences in aperture impedance distribution and signal transmission path, and the initial parameter set generated based on the topological characteristics can fully consider these differences, ensure the matching degree of parameters and circuit characteristics from the early stage of design, reduce the adjustment range in the subsequent optimization process, and reduce the design difficulty.

[0053] The machine learning model is called to dynamically optimize the initial isolation structure parameter set, which has stronger adaptability and accuracy compared with traditional manual optimization or fixed algorithm optimization. The machine learning model can autonomously learn the complex nonlinear relationship between parameters, quickly search for the optimal parameter combination in the solution space of multiple parameter combinations, adapt to the design requirements of different circuits without human intervention, avoid the subjectivity and limitations of manual optimization, and greatly shorten the optimization time and improve the design efficiency.

[0054] The actual impedance matching state of the target circuit is monitored in real time, and the optimized isolation structure parameters are adjusted according to the monitoring result, so that the whole cycle parameter control from design to operation is realized. During the operation of the circuit, the environmental factors and the state changes of the components may cause the impedance of the hole to drift, and the real-time monitoring can timely capture these changes, and by dynamically adjusting the isolation structure parameters, the isolation structure can always adapt to the current hole impedance state, maintain the stability of the impedance matching and anti-interference performance, avoid the performance degradation caused by the fixed parameters, and ensure the long-term reliable operation of the circuit. BRIEF DESCRIPTION OF DRAWINGS

[0055] Figure 1 A working principle diagram of the isolation setting method for hole impedance matching in the machine learning-based circuit design is described.

[0056] Figure 2 A flowchart for generating a hole impedance and isolation performance mapping relationship process is described.

[0057] Figure 3 A flowchart for generating an initial isolation structure parameter set is described. DETAILED DESCRIPTION

[0058] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.

[0059] Please refer to Figure 1The application provides a method for setting isolation of hole impedance matching in circuit design based on machine learning, which comprises: hole impedance parameters, isolation structure parameters and corresponding anti-interference performance indicators in historical circuit design data are systematically collected, the hole impedance parameters involve geometric and electrical properties such as hole diameter, hole spacing and hole interlayer dielectric thickness, the isolation structure parameters cover physical dimensions such as isolation slot width, creepage distance and parallel wiring spacing, and the anti-interference performance indicators include quantitative values such as coupling capacitance, ground loop impedance and ripple rejection ratio. These parameters are cleaned and formatted through a data preprocessing module to ensure data consistency and integrity. The pre-constructed correlation model receives the hole impedance parameters and the isolation structure parameters as inputs, the correlation model adopts a multi-layer neural network architecture, the model training stage uses the historical data set for supervised learning, generates a mapping relationship between the hole impedance and the isolation performance, the mapping relationship stores weight coefficients in the form of a matrix, and reflects the nonlinear interaction between the parameters. The mapping relationship analysis module calculates the influence degree of each hole impedance parameter on the anti-interference performance indicators, extracts key hole impedance parameters through statistical methods, and divides the key hole impedance parameters into a priority sequence according to the influence intensity, and the priority sequence is used to guide the subsequent parameter optimization order. The topological structure characteristics of the target circuit are obtained through a circuit analysis tool, the topological structure characteristics include high-frequency signal path direction, power network layout and component spatial distribution, based on the topological structure characteristics and the priority sequence, a parameter generation engine applies a constraint rule library to generate an initial isolation structure parameter set, and the initial isolation structure parameter set includes preliminary design values such as isolation slot depth and dielectric layer thickness. The machine learning model calling module integrates a reinforcement learning algorithm, the machine learning model iteratively optimizes the initial isolation structure parameter set, the optimization process takes impedance matching error as an evaluation index, dynamically adjusts the isolation structure parameters until convergence, and outputs the optimized isolation structure parameters such as isolation layer thickness and creepage distance. A real-time monitoring unit is embedded in the target circuit operating environment, the monitoring unit collects impedance spectrum data of key nodes, the impedance spectrum data is compared with a preset reference, a deviation detection logic triggers a parameter adjustment mechanism, and the adjustment mechanism updates the isolation structure parameters to adapt to the actual working state.

[0060] Embodiment 1: Historical circuit design data is sourced from a complete archive of multiple circuit design projects, which contain circuit design files, simulation reports and measured data documents. The data collection system accesses the distributed database through a dedicated interface, and the database storage uses a time series structure, with each design project corresponding to an independent data partition. Circuit design files mainly use Gerber format, ODB++ format and CADENCE design platform native file format, and the file parsing module uses open source libraries such as PyEDA for format parsing to extract layer information and geometric parameters. The hole impedance parameter is extracted from the drilling layer of the design file, which records the coordinates and size information of the through hole, blind hole and buried hole. The hole diameter parameter is obtained by reading the attribute table of the drilling symbol, and the attribute table contains a diameter value field, which is converted to microns for unified storage. The hole spacing parameter calculation needs to traverse the position coordinates of all holes, and the algorithm calculates the Euclidean distance between the center points of adjacent holes, and the distance value is recorded as the hole spacing parameter. For irregular array hole groups, the Delaunay triangulation method is used to establish the adjacency relationship. The inter-hole dielectric thickness parameter is obtained from the layer structure table, which records the thickness value of each dielectric layer. The inter-hole dielectric thickness specifically refers to the dielectric thickness between adjacent conductor layers crossed by the hole, which is directly related to the impedance characteristics.

[0061] The isolation structure parameter acquisition needs to cross-reference multiple design layers, and the isolation groove width parameter is measured from the solder mask layer or isolation layer graphic data. The isolation layer in the circuit design file uses vector graphics to represent the isolation groove boundary, and the boundary line segment coordinates are imported into the calculation module. The module calculates the minimum distance between parallel boundaries as the isolation groove width value. The creepage distance parameter is calculated based on the surface wiring path of the circuit board. The calculation algorithm first extracts the outer contour of adjacent conductive patterns, and then uses the A* path search algorithm to find the shortest surface path between the contours. The path length is the creepage distance parameter. The parallel wiring spacing parameter is extracted from the parallel signal line layout. The layout information is obtained by parsing the wiring layer data. The algorithm identifies parallel wiring segments and measures the average value of the center line spacing as the parallel wiring spacing parameter. During the collection of all geometric parameters, the coordinate system is converted to the global coordinate system of the circuit board, the unit is unified to microns, and the precision is controlled to two decimal places. The anti-interference performance index comes from the circuit test report, which is stored in PDF format and structured text format. The data extraction engine uses the method of combining OCR technology and regular expression matching to read the key performance indicators from the test report. The coupling capacitance value is obtained from the network analyzer test result. The test result usually contains the S parameter matrix, and the coupling capacitance value is derived from the S parameter through a conversion formula. The test frequency points cover the circuit operating frequency band. The ground loop impedance parameter is read from the impedance analyzer test data. The test uses four-terminal measurement method, and the impedance value is recorded at a specific frequency, usually the resonance frequency point. The ripple rejection ratio is derived from the power integrity test data. The test data contains the power noise spectrum, and the ripple rejection ratio is calculated as the ratio of input ripple to output ripple, converted to decibel value. Each performance indicator is associated with specific test conditions, including working voltage, environmental temperature, signal frequency, and other metadata. These metadata are collected and stored together.

[0062] The data alignment mechanism ensures the correspondence between parameters, and the timestamp matching algorithm associates the hole impedance parameters, isolation structure parameters, and anti-interference performance indicators according to the design version number. Each design version corresponds to a unique hash identifier, which is generated based on the design file content to ensure data consistency. The data verification process includes range checking, format verification, and logical checking. Range checking confirms that parameter values are within the physically possible interval, format verification ensures that data types conform to specifications, and logical checking verifies the reasonableness of the causal relationship between parameters. The outlier detection uses the Isolation Forest algorithm to identify and label data points that deviate from the normal distribution. The labeled data points enter the manual review process. The verified parameters are stored as a structured data set, which is stored in HDF5 format and contains parameter matrices and metadata dictionaries to facilitate subsequent model access and processing. The collection frequency of historical circuit design data is synchronized with the design project cycle, and a complete data collection process is triggered when each design project is completed. The incremental collection mechanism handles design changes, and when the design file is revised, only the relevant parameters of the changed part are collected. The data version control system records the history of parameter changes, and the version control system uses Git principles to manage data evolution, supporting parameter tracing and change analysis. The data collection module is deployed on distributed computing nodes, and the nodes synchronize data status through message queues to ensure fault tolerance and scalability of the collection task. The monitoring interface of the collection system displays real-time data quality indicators, including collection completion, data accuracy, and storage utilization, and operation personnel adjust the collection strategy according to the monitoring indicators.

[0063] The parameter preprocessing link standardizes the collected raw data. Numerical parameters are standardized by Z-score, and categorical parameters are one-hot encoded. Missing value processing uses multiple imputation methods, which predict missing values based on the random forest algorithm to generate multiple complete data sets. Parameter correlation analysis calculates the correlation coefficient matrix between parameters, which is used to verify the internal consistency of the parameter set. Parameter combinations with low correlation are marked for further review. Data augmentation techniques are applied in small sample scenarios to generate synthetic data through a generative adversarial network to balance the distribution of the data set. The final preprocessed data set is divided into training, validation, and test sets, with division ratios following machine learning standard practices to ensure the reliability and generalization ability of model training. The hardware architecture of the data collection system includes multiple dedicated servers. Data extraction servers are equipped with high-performance CPUs and large-capacity memories for processing large design file parsing. Storage servers use RAID array configurations to ensure data security and access speed. The network architecture uses Gigabit Ethernet to connect components to reduce data transmission delay. The software layer uses a microservice architecture, with each collection function encapsulated as an independent service that communicates through RESTful APIs. The system logs detailed operation traces, and log information is used for troubleshooting and performance optimization. Security mechanisms include data encryption and access control to protect the intellectual property rights of design data.

[0064] The parameter collection quality evaluation system includes multiple quantitative indicators. The data integrity indicator measures the coverage of parameter collection. The accuracy indicator is verified by artificial sampling. The consistency indicator checks the difference of the same parameter in different sources. The evaluation results are fed back to the collection process to drive the continuous optimization of the collection algorithm. The collection system supports multiple circuit design software versions. The version adaptation layer processes the file format differences of different software versions to ensure the compatibility of the collection. The parameter metadata management adopts a standardized mode. The metadata mode is defined based on the IEEE standard to support data interoperability and long-term maintainability. The long-term storage of historical circuit design data adopts a hot and cold layered architecture. Hotspot data is stored in a high-speed solid-state hard disk. Historical data is archived to a tape library. The data backup strategy includes full backup and incremental backup. The backup data is stored in different geographic locations after encryption. The data retrieval interface supports complex query conditions. Users can filter data by design type, time range, performance indicators, and other dimensions. The retrieval results are presented in the form of visual charts and reports.

[0065] Example 2: refer to Figure 2 The pre-built correlation model is established on a deep neural network framework. The historical data set required for model training is collected and preprocessed from the structured data of example 1. The hole impedance parameters in the data set include hole diameter, hole spacing, hole layer medium thickness, and other fields. The isolation structure parameters include isolation slot width, creepage distance, parallel wiring spacing, and other fields. The anti-interference performance indicators include coupling capacitance, ground loop impedance, ripple rejection ratio, and other fields. Normalization processing of hole impedance parameters is a key step in model input preparation. The normalization processing adopts the minimum-maximum standardization method. For numerical characteristics such as hole diameter parameters, hole spacing parameters, and hole layer medium thickness parameters, the minimum and maximum values of each characteristic column are calculated. The original values are linearly transformed to the [0, 1] interval. The standardized hole impedance feature vector is represented in the form of a floating-point array. The array length is equal to the number of hole impedance parameters. Normalization processing effectively eliminates the numerical differences caused by different parameter dimensions, making the model training process more stable.

[0066] The principal component analysis algorithm is used for feature decomposition of the isolation structure parameters. Feature decomposition aims to reduce the data dimension and retain the main variation information. The isolation structure parameters include variables such as isolation slot width, creepage distance, and parallel wiring spacing. The principal component analysis algorithm calculates the covariance matrix of these parameters, then performs eigenvalue decomposition on the covariance matrix, extracts the first k principal components with larger eigenvalues to form an isolation structure feature subset, and determines the value of k through the cumulative variance contribution rate. Usually, the cumulative contribution rate threshold is set to 95%. The isolation structure feature subset is used as the input feature after dimension reduction, which reduces the model complexity and computational overhead. The convolutional neural network model receives the standardized hole impedance feature vector and the isolation structure feature subset as input. The network structure includes multiple convolutional layers, pooling layers, and fully connected layers. The convolutional layer uses a one-dimensional convolution kernel to perform sliding convolution operation on the feature sequence to extract local feature patterns. The ReLU function is used as the activation function to introduce nonlinearity. The pooling layer performs maximum pooling downsampling to compress the feature map size. The fully connected layer maps the flattened feature vector to the output space. The output space dimension corresponds to the number of anti-interference performance indicators. The backpropagation algorithm and Adam optimizer are used for model training. The loss function is defined as the mean square error. The training is iterated until the loss function converges. After training, the internal weights of the convolutional neural network model are fixed, forming a mapping relationship matrix from the input parameters to the output performance. The mapping relationship matrix is a weight coefficient matrix. The rows of the matrix correspond to the hole impedance parameters, and the columns of the matrix correspond to the anti-interference performance indicators. Each matrix element value represents the influence weight of a specific hole impedance parameter on a specific anti-interference performance indicator. The Pearson correlation coefficient formula is used to calculate the correlation coefficient of each row vector in the mapping relationship matrix and the anti-interference performance indicators. The row vector is taken from the weight coefficient sequence corresponding to a single hole impedance parameter in the mapping relationship matrix, and the anti-interference performance indicator vector is taken from the real performance value sequence in the training data set. The Pearson correlation coefficient calculates the linear correlation between the two vectors. The coefficient value domain is [-1, 1]. The larger the absolute value, the stronger the correlation. The hole impedance parameters corresponding to the row vectors with correlation coefficients exceeding the preset threshold are selected as the key hole impedance parameters. The preset threshold is set to a fixed value according to historical experience, for example, 0.7. The screening process traverses each row of the mapping relationship matrix, calculates the absolute value of the correlation coefficient between the row vector and each anti-interference performance indicator vector, takes the maximum correlation coefficient on each anti-interference performance indicator as the overall correlation measure of the hole impedance parameter, and compares the overall correlation with the preset threshold. The hole impedance parameters with correlation greater than the threshold are determined as the key hole impedance parameters.

[0067] The key hole impedance parameters are sorted in descending order according to the correlation coefficients, and an efficient sorting algorithm such as quicksort is used to sort the key hole impedance parameters and their corresponding overall correlation measure values to generate a priority sequence. The priority sequence is an ordered list, and the elements in the list are the identifiers of the key hole impedance parameters. The list order reflects the importance of the key hole impedance parameters on the anti-interference performance, and the key hole impedance parameters in the front row are given priority consideration in subsequent circuit design optimization. After the priority sequence is generated, the sequence information is stored persistently in the database or file for subsequent circuit topology analysis and initial parameter set generation module calls. The entire implementation process realizes the data conversion from the original parameters to the quantified priority, providing a clear parameter adjustment guide for automated circuit design optimization based on machine learning. The specific implementation of the convolutional neural network model can choose TensorFlow or PyTorch deep learning framework, and the network hyperparameters such as convolution kernel size, number of layers, and learning rate need to be determined through cross-validation. The training data is divided into training set, validation set and test set, the training set is used for model weight update, the validation set is used for hyperparameter tuning and early stopping to prevent overfitting, and the test set is used to evaluate the generalization performance of the model. The visualization of the mapping relationship matrix can be presented through the heat map and other ways, which can intuitively show the complex relationship between the hole impedance parameters and the anti-interference performance indicators. The correlation coefficient calculation can also consider using the Spearman rank correlation coefficient as a supplement to capture the non-linear monotonic relationship. The dynamic updating mechanism of the priority sequence can periodically retrain the associated model and update the priority sequence according to the newly generated circuit design data, so that the system has the ability of continuous learning.

[0068] Embodiment 3: refer to Figure 3 The topology feature identification of the target circuit starts from the loading of the circuit design file, which is usually in the standard EDATA format or the native database format of a specific EDA tool. The network table information and physical layout information in the file are read by the file parsing module. The identification of high-frequency signal paths is based on the signal frequency attribute. The networks marked as high-frequency signals in the network table are extracted, and the spatial distribution characteristics of the high-frequency signal paths are obtained through the path tracking algorithm. The algorithm starts from the signal source end, passes through the via and the element along the interconnection line, and records the coordinate sequence of the path in each layer of the circuit board until the load end. The spatial distribution characteristic analysis of the power supply path focuses on the power distribution network. The power supply path starts from the power supply module, passes through the power supply plane, decoupling capacitor, and power supply via to reach each power-consuming unit. The topology structure features of the power supply path include path branch point, loop area, and relative position to the ground plane.

[0069] The priority sequence is imported from the pre-processing step, which is an ordered list of names of key via impedance parameters, arranged according to their impact on the anti-interference performance. The initial isolation structure parameter set generation algorithm reads the priority sequence, and selects the top N key via impedance parameters as the optimization focus of the current circuit design. N is a configurable integer parameter, whose value is dynamically adjusted according to the complexity of the circuit board and design constraints. The preset isolation structure parameter constraint rules are loaded from the design rule library, which stores constraint conditions based on process capability, reliability requirements and industry standards (such as IPC-2221). The constraint rules exist in the form of logical assertions, for example, the minimum isolation slot width rule is expressed in the form of an inequality.

[0070] The calculation of the initial isolation structure parameter set needs to consider the electromagnetic field distribution effect. The electromagnetic field distribution around the high-frequency signal path is related to the geometric shape of the path and the dielectric material properties. In order to quantify the potential coupling strength between paths, a coupling coefficient calculation model is introduced, which is used to evaluate the electromagnetic coupling degree between paths without isolation structures. The coupling coefficient calculation model is based on quasi-static field analysis, and approximates the high-frequency signal path and the power path as transmission line models, considering the parallel length, distance and dielectric properties between the paths.

[0071] The coupling coefficient is calculated as follows:

[0072]

[0073] Wherein: represents the coupling coefficient between the high-frequency signal path and the power path, with a value range of 0 to 1. The larger the value, the higher the potential electromagnetic coupling strength between the paths, represents the minimum spatial distance between the high-frequency signal path and the power path, represents the effective dielectric thickness of the region between the high-frequency signal path and the power path.

[0074] The coupling coefficient is used to guide the setting of the initial isolation structure parameter values. In areas with high coupling coefficient values, stronger isolation measures need to be set, which is reflected in the larger isolation slot depth values and larger dielectric layer thickness values in the corresponding positions of the initial isolation structure parameter set. The algorithm sets the initial isolation structure parameter values according to the calculated coupling coefficient The initial values of the isolation trench depth and the dielectric layer thickness are determined by querying a preset mapping table. The mapping table stores the correspondence from the coupling coefficient value to the initial values of the isolation structure parameters, which is established based on electromagnetic simulation empirical data.

[0075] The initial isolation structure parameter set generation algorithm also needs to handle special areas on the circuit board, such as connector mounting areas, areas under heat sinks, etc. The isolation structure parameters of these areas require additional constraint rules. The constraint rules of special areas usually require a larger creepage distance or a special dielectric material type. The algorithm will mark these areas when generating the initial parameters and apply the corresponding special rules. The generated initial isolation structure parameter set is output in a structured data format, which includes parameter name, parameter value, parameter unit, and the coordinate range of the circuit board area where the parameter is applied. The initial isolation structure parameter set serves as the starting point for subsequent machine learning model dynamic optimization, and its quality directly affects the convergence speed of the optimization process and the performance of the final design scheme. The entire implementation process combines the circuit topology information, key parameter priority, and physical design rules to achieve automatic conversion from circuit function description to preliminary physical implementation parameters.

[0076] ​Embodiment 4: The pre-trained reinforcement learning model serves as the core engine for optimization, with its architecture based on a deep Q-network. The model consists of a state perception module, an action decision module, and a value evaluation module. The initial set of isolation structure parameters is loaded from the generation results of Embodiment 3, which includes values such as isolation slot depth and dielectric layer thickness. These values form the initial point of the state space for the reinforcement learning model. The state space is a multi-dimensional continuous space, with each dimension corresponding to an isolation structure parameter. The parameter values are normalized to the [0, 1] interval for model processing. The action decision module defines possible adjustment actions for the isolation structure parameters. The action space is discrete, containing three basic operations: increasing parameter values, decreasing parameter values, and keeping parameters unchanged. Each parameter has a corresponding set of actions. The reward function evaluates the performance gain of the isolation, which is the driving mechanism for iterative optimization. The design of the reward function directly affects the correctness of the optimization direction. Simulating the actual impedance matching state of the initial isolation structure parameter set in the target circuit requires calling a circuit simulator. The simulator receives the current isolation structure parameter values and, combined with the layout information of the target circuit, performs electromagnetic field simulation calculations. The simulation results output the impedance curve of the target circuit at the specified frequency range, represented by the impedance values at discrete frequency points. The expected impedance matching target is obtained from the circuit design specifications, which define the ideal impedance range, usually represented as a nominal impedance curve and its tolerance band. The absolute value of the deviation between the simulation results and the expected impedance matching target is calculated using numerical integration methods. The area difference between the two curves is calculated in the frequency domain, and the area difference serves as a quantitative indicator of the deviation. The reward value is set as the inverse of the absolute value of the deviation. The larger the deviation, the smaller the reward value, and the smaller the deviation, the larger the reward value. The reward value is used to guide the reinforcement learning model to search in the direction of reducing the deviation.

[0077] The training process of the reinforcement learning model uses a time-difference learning algorithm. The algorithm updates the internal Q-value network by continuously trying actions, observing new states, and obtaining rewards. The Q-value network approximates the long-term expected return of state-action pairs, and the network weight parameters are updated using gradient descent methods. The process of iteratively adjusting the isolation slot width and wiring pitch is a strategy search process. The model selects actions based on the current state, performs state transitions after executing the actions, generates a new set of isolation structure parameters, and sends the new parameter set to the circuit simulator for evaluation again. The iterative loop continues. The impedance matching error tolerance is set to a pre-set threshold. When the simulated impedance error is lower than this threshold, the iterative loop terminates.

[0078] The isolation layer thickness and creepage distance in the final iteration result are output as the optimized isolation structure parameters, and the parameter values are converted from the normalized state back to the actual engineering units. The optimized isolation structure parameters need to meet the manufacturability constraints, and the manufacturing constraint checking module verifies whether the parameter values are within the range of the circuit board process capability. Parameter values that exceed the range are trimmed to the boundary value. The pre-training phase of the reinforcement learning model is performed in a simulation environment constructed using historical circuit design data. Pre-training allows the model to learn basic parameter adjustment strategies. In the online optimization phase, the model directly interacts with the target circuit simulation environment to achieve fine optimization for specific circuits. The balance between exploration and exploitation is controlled by the ε-greedy strategy, with a higher exploration rate at the beginning of training and a higher exploitation rate at the end of training, favoring the selection of actions with known high returns. The design of the reward function can consider multi-objective optimization, including impedance matching deviation, isolation degree, and crosstalk performance indicators. The weight coefficients of the multi-objective reward function need to be set reasonably, and the weight coefficients are determined according to the specific requirements of the circuit design. The convergence of the optimization process is judged by monitoring the reward value changes in consecutive iterations. A stable reward value at a high level indicates that the model has found a satisfactory solution.

[0079] The isolation structure parameter optimization process may need to handle the coupling effect between parameters. Changing one parameter may affect the optimal value of other parameters. The reinforcement learning model automatically learns these coupling relationships by observing the state of all parameters. The optimization process records the parameter values and performance values of each iteration to form an optimization history log, which is used to analyze the optimization trajectory and debug the model behavior. Referring to Table 1, the specific step values corresponding to each parameter adjustment action in the action space of the reinforcement learning model are defined.

[0080] Table 1: Isolation structure parameter adjustment action and step mapping table

[0081]

[0082] The initial adjustment coefficient is used to amplify the adjustment step at the beginning of optimization to speed up convergence. As the iteration progresses, the adjustment step can be dynamically attenuated according to the strategy. The action decision module selects an action based on the current state, and the parameter adjustment operation modifies the corresponding parameter value according to the step defined in the table. The new parameter value is sent to the circuit simulator for performance evaluation, and the reward value obtained is used to update the model strategy. The typical value of the impedance matching error tolerance is set to 5%, and when the absolute deviation of the impedance curve obtained by simulation from the target curve is less than 5%, it is considered that the optimization goal has been achieved. The maximum number of iterations of the optimization process is set to a large enough value to prevent infinite loops while ensuring enough opportunities to find the optimal solution. The final output of the optimized isolation structure parameter set will be directly input to the circuit manufacturing drawing to guide the generation of the physical layout.

[0083] In the working state of the target circuit, the impedance spectrum data of the key nodes is collected by a micro vector network analyzer module integrated on the circuit board. The module is connected with the preset test points through high-frequency probes, and the test points are arranged at the receiving end of the high-speed signal path and the midpoint of the transmission line. The impedance spectrum data collection covers five harmonic frequency bands from direct current to the highest working frequency of the circuit, and the sampling interval follows the Nyquist theorem. The real and imaginary parts of the impedance are recorded at each frequency point. The acquisition system continuously scans with millisecond-level time resolution, and the data stream is transmitted to the signal processing unit through a high-speed serial interface for caching and preprocessing, including noise reduction filtering and outlier rejection. The sliding window average method is used to smooth random fluctuations. The preset impedance reference curve is stored in the non-volatile memory, and the reference curve is a standard frequency response curve calculated based on the ideal model and the optimized isolation structure parameters in the circuit simulation environment. The deviation of the impedance spectrum data from the preset impedance reference curve is compared in the frequency domain. The algorithm aligns the impedance sequence collected in real time with the reference curve at the same frequency point. The peak detection algorithm is used to extract the resonance peak frequency and amplitude characteristics in the impedance spectrum data. The algorithm finds the local extreme points on the impedance amplitude curve, and the frequency position of the extreme point is recorded as the resonance peak frequency, and the corresponding impedance modulus is recorded as the resonance peak amplitude characteristic. The root mean square error of the resonance peak frequency and amplitude characteristics relative to the impedance reference curve involves two independent time series comparisons. For the resonance peak frequency sequence, the square root of the sum of the squares of the frequency difference between the real-time data and the reference data at each resonance point is calculated. For the resonance peak amplitude sequence, the square root of the sum of the squares of the amplitude difference at the corresponding resonance point is calculated. The frequency tolerance is set to two percent of the reference frequency, and the amplitude tolerance is set to five percent of the reference amplitude. When either the root mean square error of the frequency or the root mean square error of the amplitude exceeds the tolerance threshold, a parameter adjustment instruction is triggered to the logic control unit.

[0084] The deviation exceeding the dynamic adjustment threshold triggers the reconstruction process of the isolation structure parameters, and the dynamic adjustment threshold is configurable at different levels according to the circuit sensitivity classification. The regenerated isolation slot position and dielectric material type parameters need to be combined with the current impedance anomaly mode, which is divided into resonance frequency shift type, resonance peak broadening type and additional resonance appearance type. For the resonance frequency shift type anomaly, the adjustment strategy focuses on modifying the dielectric material type parameter to change the effective dielectric constant, and the material database provides dielectric material options with different dielectric constants. For the resonance peak broadening type anomaly, the isolation slot position parameter needs to be regenerated to enhance the shielding effect in a specific area, and the gradient descent method is used to find the arrangement scheme with the maximum insertion loss. Updating the input features of the correlation model based on the latest collected impedance spectrum data is the core step of the online learning mechanism, and the newly collected data points are appended to the end of the historical training set after standardization. The input feature vector dimension of the correlation model remains unchanged, and the new data and the old data are updated in a fixed time window length, and the old data is eliminated according to the time stamp. The weight coefficients of the mapping relationship matrix are corrected through the online learning mechanism, which uses the incremental learning algorithm to calculate the loss function gradient brought by the new data, and adjusts the weight parameters of the convolutional neural network model with a small learning rate. The weight coefficients of the mapping relationship matrix are updated according to the principle of stochastic gradient descent, and the weights with high correlation to the current anomaly mode in the matrix are adjusted to a greater extent.

[0085] The regenerated isolation slot width and parallel wiring spacing parameters are a forward calculation process using the corrected mapping relationship matrix, which maps the current circuit state parameters to the recommended values of the isolation structure parameters as a new conversion relationship. The regenerated isolation slot width parameter needs to consider the minimum line width limit of the manufacturing process, and the generated value is automatically rounded to the standard process grid. The parallel wiring spacing parameter adjustment needs to meet the requirements of electrical safety regulations, and the algorithm automatically checks whether the new spacing is greater than the minimum electrical clearance standard. The new parameter set is downloaded to the field programmable gate array through the configuration interface to realize dynamic reconfiguration, and the FPGA generates corresponding control signals to drive the micro-electromechanical actuator to adjust the thickness of the variable dielectric layer or move the position of the shielding structure. The whole monitoring and adjustment loop forms a closed-loop control system, which periodically collects, compares, learns and adjusts to maintain the circuit impedance characteristics in the optimal state. The performance drift caused by environmental temperature changes, component aging and mechanical stress can be compensated in real time. The system log records the impedance spectrum data before and after each parameter adjustment and the triggered adjustment instructions, and the log data is used to analyze the performance degradation trend of the circuit and the effectiveness of the optimization adjustment strategy. The user interface provides real-time impedance curve overlap display function, which intuitively shows the adjustment effect and the degree of agreement with the benchmark. The alarm mechanism is activated when the impedance matching error cannot be returned to the regression tolerance range after multiple iterative adjustments, prompting manual intervention or hardware maintenance.

[0086] It is to be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting; it is not intended to exclude myriad other embodiments of the present application that other inventors can develop based on the same general inventive concepts embodied by the described embodiments. That is, although the present application is described in terms of particular embodiments and illustrative figures, it should be apparent that the scope of the present application is not limited to these specific embodiments.

[0087] While the embodiments of the application have been shown and described herein, it is to be understood that the scope of the application, jointly pointed out in the appended claims, is not to be limited to the above-described embodiments but can be otherwise variously changed, modified, replaced, and altered within the principles and spirit of the present application.

Claims

1. A method for isolating via impedance matching in circuit design based on machine learning, characterized in that, The method comprises the following steps: Collecting hole impedance parameters, isolation structure parameters and corresponding anti-interference performance indicators in historical circuit design data; Inputting the hole impedance parameters and the isolation structure parameters into a pre-constructed correlation model to generate a mapping relationship between hole impedance and isolation performance; Extracting key hole impedance parameters affecting isolation performance according to the mapping relationship and dividing a priority sequence of the key hole impedance parameters; Obtaining a topological structure feature of a target circuit and generating an initial isolation structure parameter set based on the topological structure feature and the priority sequence; Calling a machine learning model to dynamically optimize the initial isolation structure parameter set and output optimized isolation structure parameters; Real-time monitoring of the actual impedance matching state of the target circuit and adjusting the optimized isolation structure parameters according to the monitoring results.

2. The method of claim 1, wherein the method is performed by a computer system. The method comprises the following steps: Extracting hole diameter, hole spacing and hole layer medium thickness recorded in historical circuit design files as hole impedance parameters; Obtaining isolation slot width, creepage distance and parallel wiring spacing corresponding to the hole impedance parameters as isolation structure parameters; Reading coupling capacitance, ground loop impedance and ripple rejection ratio from a circuit test report as anti-interference performance indicators.

3. The method of claim 1, wherein the method is performed by a computer system. The method comprises the following steps: Normalizing the hole impedance parameters to obtain a standardized hole impedance feature vector; Performing feature decomposition on the isolation structure parameters to obtain an isolation structure feature subset; Analyzing the non-linear relationship between the standardized hole impedance feature vector and the isolation structure feature subset through a convolutional neural network to output a mapping relationship matrix containing weight coefficients.

4. The method of claim 1, wherein, The method comprises the following steps: Calculating the correlation coefficients of each row vector in the mapping relationship matrix and the anti-interference performance indicators; Screening hole impedance parameters corresponding to row vectors with correlation coefficients exceeding a preset threshold as key hole impedance parameters; Arranging the key hole impedance parameters in descending order according to the correlation coefficients to generate a priority sequence.

5. The method of claim 1, wherein, The method comprises the following steps: Identifying the spatial distribution characteristics of high-frequency signal paths and power supply paths in the target circuit; Selecting the top N key hole impedance parameters according to the priority sequence and matching preset isolation structure parameter constraint rules; Combining the spatial distribution characteristics and the isolation structure parameter constraint rules to generate an initial isolation structure parameter set containing isolation slot depth and medium layer thickness.

6. The method of claim 1, wherein: The method comprises the following steps: Inputting the initial isolation structure parameter set into a pre-trained reinforcement learning model and evaluating the isolation performance gain through a reward function; Iteratively adjusting the isolation slot width and wiring spacing according to the evaluation results until the impedance matching error tolerance is met; The isolation layer thickness and the creepage distance in the final iteration result are output as the optimized isolation structure parameters.

7. The method of claim 6, wherein the machine learning based isolation setting method for hole impedance matching in circuit design is characterized by, The isolation performance gain is evaluated by a reward function, including: The actual impedance matching state of the initial isolation structure parameter set in the target circuit is simulated; The deviation absolute value of the simulation result from the expected impedance matching target is calculated; The reciprocal of the deviation absolute value is taken as a reward value to update the weight parameters of the reinforcement learning model.

8. The method of claim 1, wherein: The actual impedance matching state of the target circuit is monitored in real time, and the optimized isolation structure parameters are adjusted according to the monitoring result, including: Impedance spectrum data of key nodes are collected under the working state of the target circuit; The deviation degree of the impedance spectrum data from the preset impedance reference curve is compared; If the deviation degree exceeds the dynamic adjustment threshold, the isolation slot position and dielectric material type parameters are regenerated.

9. The method of claim 8, wherein, The deviation degree of the impedance spectrum data from the preset impedance reference curve is compared, including: The resonance peak frequency and amplitude characteristics in the impedance spectrum data are extracted, and the root mean square error of the resonance peak frequency and amplitude characteristics relative to the impedance reference curve is calculated. When the root mean square error is greater than the frequency tolerance or the amplitude tolerance, a parameter adjustment instruction is triggered.

10. The method of claim 1, wherein: The optimized isolation structure parameters are adjusted according to the monitoring result, including: The input features of the associated model are updated based on the latest collected impedance spectrum data; The weight coefficients of the mapping relationship matrix are corrected through an online learning mechanism; The isolation slot width and parallel wiring spacing parameters are regenerated using the corrected mapping relationship matrix.

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