Enhanced low-voltage GaN radio frequency device with laminated gate dielectric and preparation method of enhanced low-voltage GaN radio frequency device

By designing a multilayer gate dielectric structure, the threshold voltage drift and performance degradation problems of enhanced low-voltage GaN RF devices in the prior art have been solved, achieving high efficiency under low-cost and low-voltage conditions.

CN121843162APending Publication Date: 2026-04-10SOUTH CHINA UNIV OF TECH
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SOUTH CHINA UNIV OF TECH
Filing Date
2025-12-08
Publication Date
2026-04-10

AI Technical Summary

Technical Problem

Existing technologies struggle to produce simple, low-cost enhanced low-voltage GaN RF devices, and suffer from threshold voltage drift and performance degradation.

Method used

A stacked gate dielectric structure is adopted, including a stacked structure of a passivation layer and a gate dielectric layer. The stacked gate dielectric layer is grown by an atomic layer deposition device to form an interfacial electric field, which increases the gate electric field strength of the channel, reduces electron mobility, and enhances the positive drift of the threshold voltage.

Benefits of technology

This invention enables low-voltage GaN RF devices with simple manufacturing processes and low costs, reduces on-resistance, ensures no decrease in power and efficiency, and is suitable for operation under low-voltage conditions.

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Abstract

The invention discloses an enhanced low-voltage GaN radio frequency device with a laminated gate dielectric and a preparation method thereof. The device comprises an AlGaN / GaN heterojunction epitaxial layer with a planar structure, a passivation layer grows on the upper surface of the AlGaN / GaN heterojunction epitaxial layer, and a gate dielectric layer grows on the upper surface of the passivation layer; a gate electrode is arranged on the upper surface of the gate dielectric layer. The enhanced low-voltage GaN radio frequency device with the laminated gate dielectric is suitable for a Sub 6G low-voltage scene, gate electric leakage of the enhanced device is greatly reduced, threshold voltage positive drift is realized, the process is reliable, and the enhanced low-voltage GaN radio frequency device is suitable for batch and large-scale production.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, in particular to an enhanced low-voltage GaN radio frequency device with a stacked gate dielectric and a preparation method thereof. BACKGROUND

[0002] GaN is widely used in high-frequency microwave power devices due to its large band gap, high critical field strength, high thermal conductivity, high carrier saturation velocity and other characteristics. AlGaN / GaN heterostructure can produce high two-dimensional electron gas density and electron mobility, so the enhanced AlGaN / GaN high electron mobility transistor (HEMT) device has also attracted much attention. The preparation of the enhanced AlGaN / GaN HEMT has high application value and can greatly reduce power consumption.

[0003] The following techniques are mainly used in the research of enhanced AlGaN / GaN HEMT at home and abroad: 1. Thin barrier epitaxy technology (Sen Huang, et al. High Uniformity Normally-OFF GaN MIS-HEMTs Fabricated on Ultra-Thin-Barrier AlGaN / GaN Heterostructure[J]. IEEE Electron Device Letters, 2016, 37(12): 1617-1620.). Grow a thinner barrier layer to regulate the channel and weaken the polarization effect to achieve positive drift of threshold voltage. However, the two-dimensional electron gas concentration of the entire channel decreases, which increases the channel resistance, reduces the on-resistance, and reduces the output power; 2. Plasma etching slot gate technology (Yuwei Zhou, et al. High Efficiency Over 70% at 3.6-GHz InAlN / GaN HEMT Fabricated by Gate Recess and Oxidation Process for Low-Voltage RF Applications[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 70, NO. 1, 2023.). This technology is relatively easy to implement in process, but the etching process is difficult to control, which can cause the gate leakage to increase; 3. Passivation layer technology (Y W Zhou, et al. AlN / GaN / AlGaN-on-Si HEMT Achieving 1.3 W / mm at 5V for 5G FR2 Handsets[J]. IEEE Electron Device Letters, 2024, 45(12), 2315-2318.). Thin ALD-Al2O3 passivation layer can not only effectively reduce the parasitic capacitance, but also avoid the damage caused by plasma in the PECVD process, thereby providing more effective protection for the contact area of the device, but it will limit the output current, resulting in a decrease in power and efficiency.

[0004] The devices prepared by the above methods have the problem of performance degradation, and it is difficult to realize an enhanced low-voltage radio frequency device. Therefore, finding a process simple, low-cost technology that can realize low-voltage application and positive threshold voltage drift is a problem that needs to be solved for low-voltage radio frequency devices. SUMMARY

[0005] In order to at least solve one of the problems existing in the prior art, the present application provides an enhanced low-voltage GaN radio frequency device with a laminated gate dielectric and a preparation method thereof, an interface electric field exists in the laminated structure of the gate dielectric layer and the passivation layer, the interface electric field of the laminated structure can reduce electron mobility, and the threshold voltage is positively shifted by increasing the gate electric field intensity of the channel opening; the laminated gate dielectric grown by the atomic layer deposition equipment has good insulation performance, and can reduce current collapse and gate leakage.

[0006] The present application provides a preparation method of an enhanced low-voltage GaN radio frequency device with a laminated gate dielectric from the perspective of process, which can meet the demand of mass production.

[0007] The object of the present application is achieved by the following technical solutions.

[0008] The enhanced low-voltage GaN radio frequency device with a laminated gate dielectric comprises an AlGaN / GaN heterojunction epitaxial layer. The AlGaN / GaN heterojunction epitaxial layer is in a planar structure. A passivation layer is arranged on the AlGaN / GaN heterojunction epitaxial layer. Source and drain electrodes are arranged on both sides of the upper surface of the passivation layer. A gate dielectric layer is arranged on the upper surface of the passivation layer, and the gate dielectric layer is located between the source electrode and the drain electrode, and an interface electric field exists in the laminated structure formed by the passivation layer and the gate dielectric layer. A gate electrode is arranged on the upper surface of the gate dielectric layer.

[0009] In further improvement of the present application, the passivation layer is located at the center of the upper surface of the AlGaN / GaN heterojunction epitaxial layer.

[0010] In further improvement of the present application, the gate electrode is located at the center of the upper surface of the gate dielectric layer.

[0011] In further improvement of the present application, the gate electrode comprises a Ni layer and an Au layer stacked from bottom to top.

[0012] In further improvement of the present application, the gate electrode is vertically arranged on the upper surface of the gate dielectric layer.

[0013] In further improvement of the present application, the thickness of the gate electrode is defined as the distance between the upper surface of the passivation layer and the upper surface of the gate electrode; the thicknesses of the Ni layer and the Au layer in the gate electrode are 10-30 nm and 100-300 nm, respectively; the length of the gate electrode is defined as the distance between the leftmost and rightmost of the upper surface of the gate dielectric layer, and preferably, the length of the gate electrode is 200-400 nm.

[0014] Further, the AlGaN / GaN heterojunction epitaxial layer has a thickness of 700-1000 µm.

[0015] Further, the passivation layer is SiN x , and the passivation layer has a thickness of 2-6 nm.

[0016] Further, the source electrode and the drain electrode comprise, from bottom to top, a Ti layer, an Al layer, a Ni layer and an Au layer. The Ti layer, the Al layer, the Ni layer and the Au layer have thicknesses of 10-30 nm, 60-100 nm, 10-30 nm and 60-100 nm, respectively.

[0017] Further, the source electrode and the drain electrode have a spacing of 2-5 µm.

[0018] Further, the passivation layer is SiN x , and the passivation layer has a length of 3 nm.

[0019] Further, the gate dielectric layer is Al2O3, HfO or HfZrO. The preparation method of the enhanced low-voltage GaN radio frequency device with a stacked gate dielectric comprises the following steps: S1, the AlGaN / GaN heterojunction epitaxial layer is prepared and cleaned: the AlGaN / GaN heterojunction epitaxial layer is prepared by metal organic vapor deposition (MOCVD), then the AlGaN / GaN heterojunction epitaxial layer is soaked in an acidic solution to remove the surface oxide layer, and then an organic solvent is used to remove the organic matter on the AlGaN / GaN heterojunction epitaxial layer; The passivation layer on the upper surface of the AlGaN / GaN heterojunction epitaxial layer is SiN x grown by plasma-enhanced chemical vapor deposition equipment after cleaning the AlGaN / GaN heterojunction epitaxial layer. S2, source and drain electrodes are prepared: the positions and patterns of the source and drain electrodes are defined by a negative photoresist lithography process, and the metal stack of the source and drain electrodes is deposited by electron beam deposition; S3, the gate dielectric layer is prepared: on the basis of step S2, the source and drain electrode metals are stripped, annealed in a N2 atmosphere, and Al2O3, HfO or HfZrO is grown by atomic layer deposition equipment. S4, preparing the gate electrode by a stripping process: using a photoetching machine, exposing the gate electrode pattern between the source electrode and the drain electrode, then depositing the material layer of the gate electrode on the upper surface of the gate dielectric layer between the source electrode and the drain electrode by the method of electron beam evaporation, and preparing the Ni / Au gate electrode by stripping.

[0020] In further improvement of the present application, in step S1, the SiN x The thickness is 2-5 nm.

[0021] In step S3, the Al2O3, HfO or HfZrO is grown by the atomic layer deposition equipment, and the thickness is 1-3 nm.

[0022] Annealing under the nitrogen atmosphere at the temperature of 800-900 ℃ for 30-60 seconds, so that the source electrode and the drain electrode form the ohmic contact with the AlGaN / GaN heterojunction epitaxial layer.

[0023] Compared with the prior art, the present application has at least the following beneficial effects and advantages: (1) The enhanced low-voltage GaN radio frequency device with the stacked gate dielectric prepared by the present application has simple process and low cost, and can realize the positive threshold voltage drift and the working under the low-voltage condition.

[0024] (2) The stacked gate electrode structure of the present application is the stacked structure formed by the passivation layer and the gate dielectric layer, the passivation layer can assist the ohmic contact, the obtained radio frequency device has greatly reduced on-resistance, the current can reach saturation in advance, the power is ensured not to decrease, the lower drain voltage ensures that the efficiency does not decrease. BRIEF DESCRIPTION OF DRAWINGS

[0025] In order to more clearly illustrate the technical solutions of the present application or the prior art, the following will introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description are only one embodiment of the present application, and other similar type of drawings can be obtained by the drawings without paying the creative labor.

[0026] Figure 1 is the flow chart of the preparation method of the enhanced low-voltage GaN radio frequency device with the stacked gate dielectric in the embodiment of the present application.

[0027] Figure 2 is the schematic diagram of the AlGaN / GaN epitaxial layer and the passivation layer in the embodiment of the present application.

[0028] Figure 3 is the schematic diagram after growing the source electrode and the drain electrode on the AlGaN / GaN epitaxial layer and the passivation layer in the embodiment of the present application.

[0029] Figure 4 is a schematic diagram of growing a gate dielectric layer on the basis of Figure 3 the structure of the embodiment of the present application.

[0030] Figure 5 is a schematic diagram of growing a gate electrode on the basis of Figure 4 the structure of the embodiment of the present application.

[0031] Figure 6 is a schematic diagram of the direct current output curve and the current collapse curve of the embodiment of the present application.

[0032] Figure 7 is a schematic diagram of the gate leakage curve and the transfer curve of the embodiment of the present application. DETAILED DESCRIPTION

[0033] The specific implementation of the present application is further described below in combination with the drawings and examples, but the implementation and protection of the present application are not limited thereto. It should be noted that the following processes or process parameters that are particularly described are all implemented by referring to the prior art by those skilled in the art.

[0034] In the following description, many specific details are set forth in order to provide a thorough understanding of the present application. However, the present application can be practiced in other ways that are not consistent with the description herein, and those skilled in the art can make similar extensions without departing from the spirit of the present application, and therefore the present application is not limited to the specific embodiments disclosed below.

[0035] It should be understood that if the terms first, second, third, etc. are used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, the first element, component, region, layer or part discussed below can be represented as the second element, component, region, layer or part without departing from the teachings of the present application.

[0036] Spatially relative terms, such as "beneath", "below", "lower", "under", "above", "upper" and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if a device in the figures is inverted, then a dependent element or feature that is described as "below" or "beneath" another element or feature is now "above" or "upper" relative to the other element or feature. Thus, the spatially relative terms are intended to encompass the various and ordinary orientations of the device in use. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising", when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0037] The embodiments of the present application provide an enhanced low-voltage GaN radio frequency device with a stacked gate dielectric, as shown in the accompanying drawings, comprising: Figure 5 An AlGaN / GaN heterojunction epitaxial layer 1 in a planar structure; A passivation layer 2 grown on the upper surface of the AlGaN / GaN heterojunction epitaxial layer 1, with a source electrode 3 and a drain electrode 4 respectively arranged on the two sides of the upper surface of the passivation layer 2, and in one of the embodiments of the present application, the passivation layer 2 is located at the center of the upper surface of the AlGaN / GaN heterojunction epitaxial layer 1; A gate dielectric layer 5 grown on the upper surface of the passivation layer 2, and located between the source electrode 3 and the drain electrode 4; A gate electrode 6 arranged on the upper surface of the gate dielectric layer 5. The gate electrode 6 comprises a Ni layer and an Au layer stacked from bottom to top, and is arranged on the upper surface of the gate dielectric layer 5. The thickness of the gate electrode 6 is defined as the distance between the upper surface of the passivation layer 5 and the upper surface of the gate electrode 6, and in one of the embodiments of the present application, the thickness of the Ni layer and the Au layer in the gate electrode 6 is 20 nm and 300 nm respectively. The length of the gate electrode 6 is defined as the distance between the leftmost end and the rightmost end of the upper surface of the gate electrode 6, and in one of the embodiments of the present application, the length of the gate electrode 6 is 350 nm.

[0038] The gate electrode 6 comprises a Ni layer and an Au layer stacked from bottom to top, and is arranged on the upper surface of the gate dielectric layer 5. The thickness of the gate electrode 6 is defined as the distance between the upper surface of the passivation layer 5 and the upper surface of the gate electrode 6, and in one of the embodiments of the present application, the thickness of the Ni layer and the Au layer in the gate electrode 6 is 20 nm and 300 nm respectively. The length of the gate electrode 6 is defined as the distance between the leftmost end and the rightmost end of the upper surface of the gate electrode 6, and in one of the embodiments of the present application, the length of the gate electrode 6 is 350 nm.

[0039] In one of the embodiments of the present application, the thickness of the AlGaN / GaN heterojunction epitaxial layer 1 is 800 µm, the passivation layer 2 is SiN x , and the thickness of the passivation layer 2 is 2-6 nm.

[0040] In one of the embodiments of the present application, the source electrode 3 and the drain electrode 4 include Ti layer, Al layer, Ni layer and Au layer stacked from bottom to top; the thickness of the Ti layer, the Al layer, the Ni layer and the Au layer is 20 nm, 80 nm, 10 nm and 100 nm respectively.

[0041] In one of the embodiments of the present application, the distance between the source electrode 3 and the drain electrode 4 is 3 µm.

[0042] In one of the embodiments of the present application, the passivation layer 2 is SiN x , and the length of the passivation layer 2 is 2 nm.

[0043] In one of the embodiments of the present application, the gate dielectric layer 5 is Al2O3, and the thickness of the Al2O3 grown by atomic layer deposition equipment is 2 nm.

[0044] In one of the embodiments of the present application, a preparation method of an enhanced low-voltage GaN radio frequency device with a stacked gate dielectric is provided, as shown in Figure 1 , comprising the following steps: S1, as shown in Figure 2 , the preparation and cleaning of the AlGaN / GaN heterojunction epitaxial layer 1: the AlGaN / GaN heterojunction epitaxial layer 1 is prepared by metal organic vapor deposition (MOCVD), then the AlGaN / GaN heterojunction epitaxial layer 1 is soaked in a H2SO4:H2O2=4:1 (mass ratio) solution for 20 minutes (H2SO4 and H2O2 are commercially available), to remove the surface oxide layer, and then acetone and isopropyl alcohol are used to remove the organic matter on the AlGaN / GaN heterojunction epitaxial layer 1.

[0045] The passivation layer 2 is grown on the upper surface of the AlGaN / GaN heterojunction epitaxial layer 1, and in one of the embodiments of the present application, the passivation layer 2 on the upper surface of the AlGaN / GaN heterojunction epitaxial layer 1 is SiN x grown by plasma enhanced chemical vapor deposition equipment.

[0046] S2, as shown in Figure 3As shown, the source electrode 3 and the drain electrode 4 are prepared: the metal position and pattern of the source electrode 3 and the drain electrode 4 are defined on the passivation layer 2 through a negative photoresist lithography process, and Ti / Al / Ni / Au is sequentially deposited on the passivation layer 2 from bottom to top through electron beam evaporation.

[0047] S3, as shown in Figure 4 As shown, the gate dielectric layer 5 is prepared: on the basis of step S2, the metal of the source electrode 3 and the drain electrode 4 is stripped, annealing is performed at a temperature of 870℃ in a nitrogen atmosphere for a time ranging from 30 seconds, so that the source electrode 3 and the drain electrode 4 form an ohmic contact with the AlGaN / GaN heterojunction epitaxial layer 1, Ti reacts with nitrogen and SiN x The passivation layer reacts to form a low work function structure, and the gate dielectric layer 5 is grown by an atomic layer deposition device, and the gate dielectric layer 5 is Al2O3.

[0048] S4, as shown in Figure 5 As shown, the gate electrode 6 is prepared through a stripping process: the gate electrode 6 pattern is exposed between the source electrode 3 and the drain electrode 4 by using a photoetching machine, and then a Ni / Au thin film is deposited on the upper surface of the gate dielectric layer 5 between the source electrode 3 and the drain electrode 4 by electron beam evaporation, wherein the growth rate of Ni is 0.2A / s, and the growth rate of Au is 2A / s, and the Ni / Au gate electrode 6 is prepared by stripping.

[0049] In one embodiment of the present application, an enhanced low-voltage GaN radio frequency device is prepared, as shown in Figure 6 The direct current characteristic and current collapse of the device are shown in FIG. 6, and the knee voltage is 2.2 V, and the device can work under the condition of Vd=5 V; FIG. 7 shows the gate leakage and transfer curve, and the opening voltage is 1.2 V, and the device can realize positive threshold voltage drift and low-voltage working condition.

[0050] In the embodiment of the present application, the passivation layer is SiNx, the gate dielectric layer is Al2O3, HfO or HfZrO, and the SiNx / Al2O3, SiNx / HfO or SiNx / HfZrO laminated structure formed by the passivation layer and the gate dielectric layer has an interface electric field, which can affect the field effect electron mobility of 2DEG, greatly improve the channel opening gate electric field strength, and thus improve the threshold voltage; the gate dielectric layer is grown by an atomic layer deposition device, has good insulation performance, and can greatly reduce the pulsed condition current collapse and continuous wave condition gate leakage.

[0051] The foregoing description of the disclosed embodiments enables a person skilled in the art to make or use the application. Modifications of these embodiments will occur to persons of skill in the art, and, while certain embodiments within the scope of the application are shown and described as described above, it is to be understood that the same are not limiting within the scope of the application, as defined in the appended claims, and their equivalents.

Claims

1. An enhancement-mode low-voltage GaN radio frequency device with a multilayer gate dielectric, characterized in that, include: The AlGaN / GaN heterojunction epitaxial layer (1) is a planar structure; A passivation layer (2) is grown on the upper surface of the AlGaN / GaN heterojunction epitaxial layer (1). The source electrode (3) and the drain electrode (4) are respectively disposed on both sides of the upper surface of the passivation layer (2); The gate dielectric layer (5) is grown on the upper surface of the passivation layer (2), and the gate dielectric layer (5) is located between the source electrode (3) and the drain electrode (4). The stacked structure formed by the passivation layer (2) and the gate dielectric layer (5) has an interfacial electric field. The gate electrode (6) is disposed on the upper surface of the gate dielectric layer (5).

2. The enhanced low-voltage GaN RF device with a multilayer gate dielectric according to claim 1, characterized in that, The gate electrode (6) consists of Ni and Au layers stacked from bottom to top.

3. The enhanced low-voltage GaN RF device with a multilayer gate dielectric according to claim 2, characterized in that, In the gate electrode (6), the thicknesses of the Ni layer and the Au layer are 10-30 nm and 100-300 nm, respectively; the length of the gate electrode (6) is 200-400 nm.

4. The enhancement-mode low-voltage GaN RF device with a multilayer gate dielectric according to claim 1, characterized in that, The thickness of the AlGaN / GaN heterojunction epitaxial layer (1) is 700-1000 µm.

5. The enhanced low-voltage GaN RF device with a multilayer gate dielectric according to claim 1, characterized in that, The passivation layer (2) is SiN x The thickness of the passivation layer (2) is 2-6 nm.

6. The enhancement-mode low-voltage GaN RF device with a multilayer gate dielectric according to claim 1, characterized in that, Both the source electrode (3) and the drain electrode (4) consist of Ti, Al, Ni and Au layers stacked sequentially from bottom to top.

7. The enhanced low-voltage GaN RF device with a multilayer gate dielectric according to claim 6, characterized in that, The thicknesses of the Ti, Al, Ni, and Au layers are 10-30 nm, 60-100 nm, 10-30 nm, and 60-100 nm, respectively.

8. The enhancement-mode low-voltage GaN RF device with a multilayer gate dielectric according to claim 1, characterized in that, The distance between the source electrode (3) and the drain electrode (4) is 2-5 μm.

9. The enhancement-mode low-voltage GaN RF device with a multilayer gate dielectric according to any one of claims 1-8, characterized in that, The gate dielectric layer (5) is Al2O3, HfO or HfZrO.

10. A method for fabricating an enhancement-mode low-voltage GaN RF device with a multilayer gate dielectric as described in any one of claims 1-9, characterized in that, Includes the following steps: S1. An AlGaN / GaN heterojunction epitaxial layer (1) is prepared by metal-organic vapor deposition (MOCVD). After removing the oxide layer and organic matter on the surface of the AlGaN / GaN heterojunction epitaxial layer (1), a passivation layer (2) is grown on the surface of the AlGaN / GaN heterojunction epitaxial layer (1). S2. Define the metal positions and patterns of the source electrode (3) and drain electrode (4) using negative photolithography, and deposit the metal stack of the source electrode (3) and drain electrode (4) using electron beam deposition. S3. Strip the metal from the source electrode (3) and drain electrode (4), and anneal them at a preset temperature in a nitrogen atmosphere to form an ohmic contact between the source electrode (3) and drain electrode (4) and the AlGaN / GaN heterojunction epitaxial layer (1). Ti reacts with nitrogen and passivation layer (2) to generate a low work function structure, and a gate dielectric layer (5) is grown by atomic layer deposition. S4. Using a photolithography machine, expose the pattern of the gate electrode (6) between the source electrode (3) and the drain electrode (4), and then deposit the material layer of the gate electrode (6) on the upper surface of the gate dielectric layer (5) between the source electrode (3) and the drain electrode (4) by electron beam evaporation. The gate electrode (6) is then prepared by peeling.