Semiconductor device and method of manufacturing the same

By employing a stacked structure in semiconductor devices, comprising a first adhesive layer, a stress control layer, and a barrier metal layer formed on an insulating film, the problem of wiring stripping on interlayer insulating films is solved, achieving higher adhesion and cost-effectiveness.

CN121843519APending Publication Date: 2026-04-10RENESAS ELECTRONICS CORP
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-09-24
Publication Date
2026-04-10

AI Technical Summary

Technical Problem

In the prior art, wiring on the interlayer insulating film in semiconductor devices is prone to peeling, especially when the metal film is thick. The high compressive stress of the adhesive layer makes the interface peeling problem difficult to solve.

Method used

An adhesive intermediate film formed on an insulating film is used, comprising a stacked structure of a first adhesive layer, a stress control layer, a second adhesive layer, and a barrier metal layer. A halide metal film is formed by chemical vapor deposition (CVD) and transformed into a stacked conversion film, thereby controlling stress and improving adhesion.

Benefits of technology

It effectively inhibits the peeling of wiring, improves the adhesion between the insulating film and the adhesive interlayer, reduces manufacturing costs, and reduces the risk of metal film peeling.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to a semiconductor device and a manufacturing method thereof. A semiconductor device includes an insulating film, a metal film, and an adhesive intermediate film disposed between the insulating film and the metal film, the adhesive intermediate film including a first adhesive layer, a stress control layer, a second adhesive layer, and a barrier metal layer that are sequentially disposed in a direction from the insulating film to the metal film and are different from each other. The insulating film may include silicon oxide.
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Description

Cross-reference to related applications

[0001] The disclosure of Japanese Patent Application No. 2024-174941, filed on October 4, 2024 (including the specification, drawings and abstract) is incorporated herein by reference in its entirety. Background Technology

[0002] This disclosure relates to a semiconductor device and a method for manufacturing the same.

[0003] The publicly available technologies are listed below.

[0004] [Patent Document 1] Japanese Unexamined Patent Application Publication No. 2024-003808

[0005] [Patent Document 2] Japanese Unexamined Patent Application Publication No. 2019-029434

[0006] Patent Document 1 and Patent Document 2 describe forming wiring on an interlayer insulating film in a semiconductor device. Summary of the Invention

[0007] The aim is to suppress the stripping of wiring formed on the interlayer insulating film.

[0008] Other issues and novel features will become clear from the description in this specification and the accompanying drawings.

[0009] According to one embodiment, a semiconductor device includes an insulating film, a metal film, and an adhesive intermediate film disposed between the insulating film and the metal film. The adhesive intermediate film includes a first adhesive layer, a stress control layer, a second adhesive layer, and a barrier metal layer, which are sequentially disposed and distinct from each other in a direction from the insulating film to the metal film.

[0010] According to one embodiment, a method for manufacturing a semiconductor device includes the steps of forming an insulating film, forming an adhesive interlayer on the insulating film, and forming a metal film on the adhesive interlayer. The step of forming the adhesive interlayer is used to form an adhesive interlayer comprising a first adhesive layer, a stress control layer, a second adhesive layer, and a barrier metal layer that are sequentially arranged and different from each other in a direction from the insulating film to the metal film.

[0011] According to one embodiment, stripping of wiring formed on the interlayer insulating film can be suppressed. Attached Figure Description

[0012] Figure 1 This is a cross-sectional view of a semiconductor device according to a comparative example;

[0013] Figure 2 This is a flowchart illustrating a method for manufacturing a semiconductor device according to a comparative example;

[0014] Figure 3 This is a flowchart illustrating another manufacturing method of a semiconductor device according to a comparative example;

[0015] Figure 4 This is a cross-sectional view of a semiconductor device according to the first embodiment;

[0016] Figure 5 This is a cross-sectional view showing another semiconductor device according to the first embodiment;

[0017] Figure 6 This is a flowchart illustrating a method for manufacturing a semiconductor device according to the first embodiment;

[0018] Figure 7 This is a flowchart illustrating the step of manufacturing an adhesive interlayer film in a method for manufacturing a semiconductor device according to the first embodiment;

[0019] Figure 8 This is a diagram illustrating the step of manufacturing an adhesive interlayer film in a method for manufacturing a semiconductor device according to the first embodiment;

[0020] Figure 9 This is a flowchart illustrating a method for manufacturing a semiconductor device according to another example of the first embodiment;

[0021] Figure 10 This is a flowchart illustrating the step of manufacturing an adhesive interlayer film in a method for manufacturing a semiconductor device according to a first modified example of the first embodiment;

[0022] Figure 11 This is a diagram illustrating the steps of manufacturing an adhesive interlayer film in a method for manufacturing a semiconductor device according to a first modified example of the first embodiment;

[0023] Figure 12 This is a diagram illustrating the steps of manufacturing an adhesive interlayer in a semiconductor device manufacturing method according to a second modified example of the first embodiment;

[0024] Figure 13 This is a diagram illustrating the step of manufacturing an adhesive interlayer in a semiconductor device manufacturing method according to the second embodiment; and

[0025] Figure 14 This is a cross-sectional view of a semiconductor device according to a third embodiment. Detailed Implementation

[0026] To ensure clarity, the following descriptions and figures may be appropriately omitted or simplified. Note that in each figure, the same components are indicated by the same reference numerals, and repeated descriptions may be omitted if necessary. Some reference numerals may be omitted to simply illustrate the figures.

[0027] First, a method for manufacturing a semiconductor device according to a comparative example will be described in the "Comparative Examples" section. Then, problems discovered by the inventors in the method for manufacturing the semiconductor device according to the comparative examples will be described in the "Problems Discovered by the Inventors" section. Next, a comparison with the comparative examples will be made in the "First Embodiment" to "Third Embodiment" sections, describing the semiconductor device and its manufacturing method according to the first to third embodiments. Therefore, the semiconductor device and its manufacturing method according to this embodiment will become clearer. Note that the comparative examples and problems discovered by the inventors are also within the scope of the technical concept of the embodiments.

[0028] <Comparison Example>

[0029] Figure 1 This is a cross-sectional view showing a semiconductor device 101 according to a comparative example. Figure 1 An enlarged view of a portion of the semiconductor device 101 is also shown. (As shown) Figure 1 As shown, the semiconductor device 101 includes an insulating film 110, an adhesive intermediate film 120, a metal film 130, and a semiconductor substrate 140.

[0030] Semiconductor substrate 140, for example, has a plate shape. The plate shape of semiconductor substrate 140 includes a first main surface 141 and a second main surface 142 opposite to the first main surface 141. For ease of description of semiconductor device 101, an XYZ orthogonal coordinate system is introduced here. It is assumed that the direction orthogonal to the first main surface 141 is the Z-axis direction. It is assumed that the direction extending from the second main surface 142 to the first main surface 141 is the +Z-axis direction. The +Z-axis direction is referred to as the upper side, and the -Z-axis direction is referred to as the lower side. Note that the upper side and lower side are used for ease of description of semiconductor device 101 and do not represent the actual arrangement direction of semiconductor device 101.

[0031] The semiconductor substrate 140 is made of materials including, for example, silicon (Si). Note that the semiconductor substrate 140 does not exclude germanium (Ge), carbon (C), silicon carbide (SiC), gallium nitride (GaN), and other materials besides silicon.

[0032] A semiconductor element, including a semiconductor layer, may be formed in a semiconductor substrate 140. The semiconductor substrate 140 may include contact holes 143 leading to the semiconductor layer of the semiconductor element. The semiconductor element includes, for example, an insulated gate bipolar transistor (IGBT). Note that the semiconductor element may be a metal-oxide-semiconductor field-effect transistor (MOSFET) or a diode.

[0033] An insulating film 110 is formed on a first main surface 141 of a semiconductor substrate 140. The material of the insulating film 110 includes, for example, silicon oxide (SiO2). Therefore, the chemical elements of the insulating film 110 include silicon and oxygen (O). Note that the insulating film 110 may include phosphosilicate glass (PSG) films, undoped silicate glass (NSG) films, spin-coated glass (SOG) films, borosilicate glass (BPSG) films, or composite films thereof, but does not include silicon oxide. The insulating film 110 can be formed by thermal oxidation of the semiconductor substrate 140. The insulating film 110 can be formed on the semiconductor substrate 140 by performing a chemical vapor deposition (CVD) method using at least one of the materials contained in the insulating film 110 or materials containing the chemical elements contained in the insulating film 110. The insulating film 110 may include contact holes 113 communicating with contact holes 143. An adhesive intermediate film 120 is formed on the insulating film 110.

[0034] An adhesive interlayer 120 is formed on the insulating film 110. The adhesive interlayer 120 is disposed between the insulating film 110 and the metal film 130. The adhesive interlayer 120 includes an adhesive layer 121 and a barrier metal layer 124. The adhesive interlayer 120 includes an adhesive layer 121 and a barrier metal layer 124 that are sequentially arranged and different from each other in the direction from the insulating film 110 to the metal film 130.

[0035] An adhesive layer 121 is formed on the insulating film 110. The material of the adhesive layer 121 includes, for example, titanium (Ti). Therefore, the chemical elements of the adhesive layer 121 include titanium. As the adhesive layer 121, it can be formed on the insulating film 110 by performing a physical vapor deposition (PVD) method using at least one of the materials contained in the adhesive layer 121 or materials containing the chemical elements contained in the adhesive layer 121. The adhesive layer 121 can be formed on the inner walls of contact holes 113 and 143.

[0036] A barrier metal layer 124 is formed on the adhesive layer 121. The material of the barrier metal layer 124 includes, for example, titanium nitride (TiN). Therefore, the chemical elements of the barrier metal layer 124 include titanium and nitrogen (N). The barrier metal layer 124 can be formed by performing a CVD process to form on the adhesive layer 121 at least one of the materials contained in the barrier metal layer 124 or materials containing the chemical elements contained in the barrier metal layer 124. The barrier metal layer 124 can be formed on the inner walls of the contact holes 113 and 143.

[0037] As described above, an adhesive intermediate film 120, including an adhesive layer 121 and a barrier metal layer 124, is formed on the insulating film 110. The adhesive intermediate film 120 may be formed on the inner walls of the contact holes 113 and 143. The adhesive intermediate film 120 may be embedded in the contact holes 113 and 143.

[0038] A metal film 130 is formed on the adhesive intermediate film 120. The metal film 130 may include a first metal layer 131, a second metal layer 132, and a third metal layer 133. The metal film 130 includes the first metal layer 131, the second metal layer 132, and the third metal layer 133 sequentially in a direction from the bottom to the top. As described above, the metal film 130 comprises a stacked film made of mutually different stacked layers.

[0039] A first metal layer 131 is formed on a barrier metal layer 124 in the adhesive interlayer 120. The material of the first metal layer 131 includes, for example, tungsten (W). Therefore, the chemical element of the first metal layer 131 includes tungsten. As the first metal layer 131, at least one of the materials contained in the first metal layer 131 or materials containing the chemical element contained in the first metal layer 131 can be formed on the barrier metal layer 124 by performing a CVD process. The first metal layer 131 can be formed on the inner walls of contact holes 113 and 143.

[0040] A second metal layer 132 is formed on the first metal layer 131. The material of the second metal layer 132 may include, for example, titanium tungsten (TiW). Therefore, the chemical elements of the second metal layer 132 include titanium and tungsten. As the second metal layer 132, it can be formed by performing a PVD process to form at least one of the materials contained in the second metal layer 132 or materials containing the chemical elements of the second metal layer 132 on the first metal layer 131. The second metal layer 132 may be formed on the inner walls of the contact holes 113 and 143.

[0041] A third metal layer 133 is formed on the second metal layer 132. The material of the third metal layer 133 includes, for example, aluminum-copper (AlCu). Therefore, the chemical elements of the third metal layer 133 include aluminum (Al) and copper (Cu). As the third metal layer 133, at least one of the materials or chemical elements contained in the third metal layer 133 can be formed on the second metal layer 132 by, for example, sputtering. The third metal layer 133 can be formed on the inner walls of contact holes 113 and 143.

[0042] As described above, a metal film 130, comprising a first metal layer 131, a second metal layer 132, and a third metal layer 133, is formed on the adhesive intermediate film 120. The metal film 130 may be formed on the inner walls of contact holes 113 and 143. The metal film 130 may be embedded in the contact holes 113 and 143. The metal film 130 may be connected to the semiconductor layer of a semiconductor element formed on the semiconductor substrate 140 via the adhesive intermediate film 120.

[0043] Next, a method for manufacturing the semiconductor device 101 according to the comparative example will be described. Figure 2 This is a flowchart illustrating a method for manufacturing a semiconductor device 101 according to a comparative example. (See flowchart for example.) Figure 2 As shown, the manufacturing method of the semiconductor device 101 according to the comparative example includes step S110 of forming an insulating film 110, step S120 of forming an adhesive intermediate film 120, and step S130 of forming a metal film 130.

[0044] First, in step S110, an insulating film 110 is formed. For example, an insulating film 110 comprising silicon oxide is formed on the first main surface 141 of the semiconductor substrate 140.

[0045] Then, in step S120, an adhesive interlayer 120 is formed on the insulating film 110. The adhesive interlayer 120 includes, for example, an adhesive layer 121 comprising titanium and a barrier metal layer 124 comprising titanium nitride. Specifically, the adhesive layer 121 is formed on the insulating film 110 by PVD. Then, the barrier metal layer 124 is formed on the adhesive layer 121 by CVD.

[0046] Then, in step S130, a metal film 130 is formed on the adhesive interlayer 120. The metal film 130 includes, for example, a first metal layer 131 containing tungsten disposed on the adhesive interlayer 120, a second metal layer 132 containing titanium-tungsten disposed on the first metal layer 131, and a third metal layer 133 containing aluminum-copper disposed on the second metal layer 132. Specifically, the first metal layer 131 is formed on the barrier metal layer 124 by CVD. The second metal layer 132 is formed on the first metal layer 131 by PVD. Then, the third metal layer 133 is formed on the second metal layer 132 by sputtering.

[0047] Figure 3 This is a flowchart illustrating another manufacturing method of the semiconductor device 101 according to a comparative example. (See flowchart for example.) Figure 3 As shown, another manufacturing method of the semiconductor device 101 includes steps S110 of forming an insulating film 110, S113 of forming a contact hole 113, S121 of forming an adhesive layer 121, and S124 of forming a barrier metal layer 124. Another manufacturing method of the semiconductor device 101 further includes steps S131 of forming a first metal layer 131, S131a of planarizing the first metal layer 131, S132 of forming a second metal layer 132, and S133 of forming a third metal layer 133.

[0048] Step S110 is the same as described above. Then, in step S113, a contact hole 113 is formed in the insulating film 110. Then, in step S121, an adhesive layer 121 for bonding the intermediate film 120 is formed on the insulating film 110 and on the inner wall of the contact hole 113, and the contact hole 113 is formed in the insulating film 110. Specifically, a titanium-containing adhesive layer 121 is formed on the insulating film 110 and on the inner wall of the contact hole 113 by PVD, and the contact hole 113 is formed in the insulating film 110. Then, as shown in step S124, a barrier metal layer 124 containing titanium nitride is formed on the adhesive layer 121 and on the inner wall of the contact hole 113 by CVD.

[0049] Then, in step S131, a tungsten-containing first metal layer 131 is formed on the barrier metal layer 124 and on the inner wall of the contact hole 113 by CVD. Then, as shown in step S131a, the upper surface of the first metal layer 131 is planarized. For example, the upper surface of the first metal layer 131 is planarized by chemical mechanical polishing (CMP). Then, as shown in step S132, a titanium-tungsten-containing second metal layer 132 is formed on the first metal layer 131 by PVD. Then, as shown in step S133, an aluminum-copper-containing third metal layer 133 is formed on the second metal layer 132 by sputtering.

[0050] <Problems discovered by the inventor>

[0051] In a comparative example, when an adhesive interlayer 120 comprising an adhesive layer 121 and a barrier metal layer 124 is formed on an insulating film 110 and on the inner wall of a contact hole 113 in a semiconductor device 101, a titanium-containing adhesive layer 121 is formed, for example, by a PVD method. The adhesive layer 121 formed by the PVD method can have high compressive stress. Therefore, if the metal film 130 is thick, the stress or thermal stress of the metal film 130 may cause the adhesive layer 121 to peel off from the interface between the adhesive layer 121 and the insulating film 110. Consequently, it is difficult to suppress the peeling of the metal film 130 formed on the insulating film 110.

[0052] An exemplary reason for the peeling of adhesive layer 121 from the interface between adhesive layer 121 and insulating film 110 is the physical bonding between adhesive layer 121 and insulating film 110 formed by PVD.

[0053] <First Embodiment>

[0054] Next, the semiconductor device according to the first embodiment will be described. Figure 4 This is a cross-sectional view showing the semiconductor device 1 according to the first embodiment. Figure 4 An enlarged view of a portion of semiconductor device 1 is also shown. (As shown) Figure 4As shown, the semiconductor device 1 includes an insulating film 10, an adhesive intermediate film 20, a metal film 30, and a semiconductor substrate 40.

[0055] The semiconductor substrate 40 may have, for example, a plate shape. The plate shape of the semiconductor substrate 40 includes a first main surface 41 and a second main surface 42 opposite to the first main surface 41. Similar to the comparative example, the material of the semiconductor substrate 40 may include, for example, silicon. However, other materials are not excluded from the material of the semiconductor substrate 40.

[0056] The semiconductor element, including a semiconductor layer, is formed on the semiconductor substrate 40 as in the comparative example. The semiconductor substrate 40 may include contact holes 43 leading to the semiconductor layer of the semiconductor element. The semiconductor element may include the semiconductor layer, such as an IGBT, a MOSFET, or a diode.

[0057] The insulating film 10 is structurally and functionally identical to the insulating film 110 according to the comparative example. The material of the insulating film 10 may include silicon oxide. Therefore, the chemical elements of the insulating film 10 may include silicon and oxygen. The insulating film 10 may include contact holes 13 communicating with contact holes 43. An adhesive intermediate film 20 is formed on the insulating film 10.

[0058] An adhesive interlayer 20 is formed on the insulating film 10. The adhesive interlayer 20 is disposed between the insulating film 10 and the metal film 30. The adhesive interlayer 20 includes a first adhesive layer 21, a stress control layer 22, a second adhesive layer 23, and a barrier metal layer 24. The adhesive interlayer 20 includes the first adhesive layer 21, the stress control layer 22, the second adhesive layer 23, and the barrier metal layer 24, which are arranged sequentially and are different from each other in the direction from the insulating film 10 to the metal layer 30.

[0059] A first adhesive layer 21 is formed on the insulating film 10. The material of the first adhesive layer 21 includes, for example, TiSiO. Therefore, the chemical elements of the first adhesive layer 21 include titanium. The first adhesive layer 21 contains titanium silicide. Note that the first adhesive layer 21 may contain other metals that can form silicides, instead of titanium. For example, the first adhesive layer 21 may contain at least any one of cobalt (Co), nickel (Ni), molybdenum (Mo), hafnium (Hf), tantalum (Ta), tungsten, magnesium (Mg), chromium (Cr), manganese (Mn), iron (Fe), zirconium (Zr), niobium (Nb), rubidium (Rb), rhodium (Rh), palladium (Pd), rhenium (Re), iridium (Ir), and platinum (Pt). At least any one of cobalt, nickel, molybdenum, hafnium, tantalum, tungsten, magnesium, chromium, manganese, iron, zirconium, niobium, rubidium, rhodium, palladium, rhenium, iridium, and platinum will be referred to hereinafter as silicide metals. Therefore, the first adhesive layer 21 may contain silicides of silicide metals. The chemical elements of the first adhesive layer 21 also include silicon and oxygen.

[0060] The first adhesive layer 21 is formed on the insulating film 10 by forming a metal halide film and then converting the metal halide film into a stacked conversion film, as described later.

[0061] A stress control layer 22 is formed on the first adhesive layer 21. The material of the stress control layer 22 includes, for example, TiSiOClN. Therefore, the chemical elements of the stress control layer 22 include titanium. Note that the stress control layer 22 may contain other metals besides titanium. For example, the stress control layer 22 may contain a silicide metal. The stress control layer 22 may contain the same metal as that contained in the first adhesive layer 21.

[0062] The stress control layer 22 also contains chlorine. Note that the stress control layer 22 may contain other halogens besides chlorine. That is, the stress control layer 22 may contain at least any one of the halogens. Halogens include fluorine, chlorine, bromine, and iodine. The chemical elements of the stress control layer 22 also include silicon, oxygen, and nitrogen. The stress control layer 22 is formed on the first adhesive layer 21 by forming a metal halide film and then converting the metal halide film into a stacked conversion film, as described later.

[0063] A second adhesive layer 23 is formed on the stress control layer 22. The material of the second adhesive layer 23 includes, for example, TiON. Therefore, the chemical elements of the second adhesive layer 23 include titanium. Note that the second adhesive layer 23 may contain other metals besides titanium. For example, the second adhesive layer 23 may contain a silicide metal. The second adhesive layer 23 may contain the same metal as that contained in the first adhesive layer 21 and the stress control layer 22.

[0064] The second adhesive layer 23 also includes oxygen and nitrogen in its chemical composition. The second adhesive layer 23 is formed on the stress control layer 22 by forming a metal halide film and then converting the metal halide film into a stacked conversion film, as described later.

[0065] A barrier metal layer 24 is formed on the second adhesive layer 23. The material of the barrier metal layer 24 includes titanium nitride. Therefore, the chemical element of the barrier metal layer 24 includes titanium. Note that the barrier metal layer 24 may contain other metals besides titanium. For example, the barrier metal layer 24 may contain a silicide metal. The barrier metal layer 24 may contain the same metal as at least any one of the metals contained in the first adhesive layer 21, the stress control layer 22, and the second adhesive layer 23.

[0066] The chemical element of the barrier metal layer 24 also includes nitrogen. The barrier metal layer 24 can be formed by performing a CVD process on the second adhesive layer 23 using at least one of the materials contained in the barrier metal layer 24 or materials containing the chemical elements contained in the barrier metal layer 24. The barrier metal layer 24 can be formed on the inner walls of the contact holes 13 and 43.

[0067] As described above, an adhesive intermediate film 20, comprising a first adhesive layer 21, a stress control layer 22, a second adhesive layer 23, and a barrier metal layer 24, is formed on the insulating film 10. The first adhesive layer 21, the stress control layer 22, and the second adhesive layer 23 may contain the same metal as each other. For example, the same metal may be a silicide metal. Furthermore, the barrier metal layer may also contain the same metal. The adhesive intermediate film 20 may be formed on the inner walls of the contact holes 13 and 43. The adhesive intermediate film 20 may be embedded in the contact holes 13 and 43.

[0068] The stress control layer 22 can be thinner than the first adhesive layer 21. The stress control layer 22 can be thinner than the second adhesive layer 23. The first adhesive layer 21, the stress control layer 22, and the second adhesive layer 23 can be thinner than the barrier metal layer 24. With this structure, the stress on the adhesive interlayer 20 can be reduced, and the adhesion can be improved.

[0069] A metal film 30 is formed on the adhesive intermediate film 20. The metal film 30 may include a first metal layer 31, a second metal layer 32, and a third metal layer 33. The metal layers 30 sequentially include the first metal layer 31, the second metal layer 32, and the third metal layer 33 in a direction from the bottom to the top. As described above, the metal film 30 includes a stacked film in which multiple different layers are stacked. The first metal layer 31, the second metal layer 32, and the third metal layer 33 in the metal film 30 are structurally and functionally identical to the first metal layer 131, the second metal layer 132, and the third metal layer 133 in the metal film 130 according to the comparative example.

[0070] Figure 5 This is a cross-sectional view showing another semiconductor device 1a according to the first embodiment. (See diagram below.) Figure 5 As shown, since the semiconductor device 1a includes an adhesive interlayer 20, adhesion can be improved. Therefore, the first metal layer 31 can be eliminated. That is, the metal film 30 includes a second metal layer 32 and a third metal layer 33. The second metal layer 32 can be formed on the adhesive interlayer 20 without passing through the first metal layer 31. Therefore, the metal film 30 includes a second metal layer 32 disposed on the adhesive interlayer 20 and a third metal layer 33 disposed on the second metal layer 32. In the semiconductor device 1a, the first metal layer 31 can be eliminated, and the step of manufacturing the first metal layer 31 can be omitted. Therefore, manufacturing costs can be reduced.

[0071] Next, the manufacturing method of semiconductor device 1 will be described. Figure 6 This is a flowchart illustrating a method for manufacturing a semiconductor device 1 according to a first embodiment. Figure 6As shown, the manufacturing method of the semiconductor device 1 according to the first embodiment includes step S10 of forming an insulating film 10, step S20 of forming an adhesive intermediate film 20, and step S30 of forming a metal film 30.

[0072] First, in step S10, an insulating film 10 is formed. For example, the insulating film 10 is formed on the first main surface 41 of the semiconductor substrate 40. The insulating film 10 can be formed on the semiconductor substrate 40 by, for example, thermal oxidation, CVD, etc. The insulating film 10 may contain silicon oxide. Then, in step S20, an adhesive intermediate film 20 is formed on the insulating film 10.

[0073] Figure 7 This is a flowchart illustrating the step of manufacturing the adhesive interlayer 20 in the manufacturing method of the semiconductor device 1 according to the first embodiment. Figure 8 This is a diagram illustrating the steps of manufacturing the adhesive interlayer 20 in the manufacturing method of the semiconductor device 1 according to the first embodiment.

[0074] like Figure 7 and Figure 8 As shown, step S20 of forming the adhesive intermediate film 20 includes step S20a of forming a metal halide film 20a, step S20d of converting the metal halide film 20a into a stacked conversion film 20d, and step S24 of forming a barrier metal layer 24.

[0075] In step S20a, a metal halide film 20a is formed on the insulating film 10. The metal halide film 20a is formed by halogenating a metal. The material of the metal halide film 20a includes, for example, titanium chloride (TiCl). Therefore, the chemical elements of the metal halide film 20a include titanium and chlorine. Note that the metal halide film 20a may contain other metals besides titanium. For example, the metal halide film 20a may contain a silicide metal. The metal halide film 20a may contain at least any halogen, except chlorine.

[0076] In this embodiment, a metal halide film 20a containing titanium chloride is immediately formed on the insulating film 10 using a CVD method with titanium tetrachloride (TiCl4). The metal halide film 20a can be chemically bonded to the insulating film 10 by forming it under CVD. Therefore, the adhesion of the metal halide film 20a can be further improved compared to the physically bonded PVD method. Note that in this embodiment, forming the metal halide film 20a on the insulating film 10 under PVD is not excluded.

[0077] In step S20a, if the metal halide film 20a is too thick, the compressive stress decreases, and the stress relaxation effect decreases. Conversely, if the metal halide film 20a is too thin, the content of halogens such as chlorine decreases, and therefore the stress relaxation effect decreases.

[0078] Then, in step S20d, the metal halide film 20a is transformed into a stacked conversion film 20d. The stacked conversion film 20d described herein includes a first adhesive layer 21, a stress control layer 22, and a second adhesive layer 23 arranged sequentially and distinctly from each other in a direction starting from the insulating film 10. Therefore, the adhesive intermediate film 20 includes the stacked conversion film 20d and the barrier metal layer 24.

[0079] In step S20d, the metal halide film 20a can be heat-treated in an ammonia-containing atmosphere to convert it into a stacked conversion film 20d. For example, the metal halide film 20a can be heat-treated and nitrided by heat treatment in an atmosphere containing argon (Ar) and ammonia (NH3) with plasma treatment. The metal halide film 20a can also be heat-treated and nitrided by a CVD method that generates plasma.

[0080] Through heat treatment, silicon and oxygen diffuse from the region of the metal halide film 20a near the insulating film 10 into the interior of the metal halide film 20a. As a result, silicon diffuses to, for example, the center of the metal halide film 20a, and oxygen diffuses to, for example, the upper surface of the metal halide film 20a.

[0081] The metal contained in the metal halide film 20a reacts with the silicon and oxygen contained in the insulating film 10 to form a silicide. This forms a first adhesive layer 21 containing a silicide such as TiSiO on the upper side of the insulating film 10. As described above, the first adhesive layer 21 may contain a silicide. The first adhesive layer 21 may also contain silicon and oxygen.

[0082] Conversely, through a nitriding process, the metal halide film 20a is nitrided in a region starting from the upper surface of the metal halide film 20a. Therefore, nitrogen diffuses to the center of the metal halide film 20a. This forms a TiSiOClN-containing stress control layer 22 on the first adhesive layer 21. As described above, the stress control layer 22 may also contain at least any one of halogens. The stress control layer 22 may also contain silicon, oxygen, and nitrogen.

[0083] Halogens such as chlorine are removed from the metal halide film 20a by heat treatment. Halogens such as chlorine are also removed from the top of the metal halide film 20a. As a result, a second adhesive layer 23 containing TiON or the like is formed on the stress control layer 22. As described above, the second adhesive layer 23 may contain oxygen and nitrogen. Therefore, a stacked conversion film 20d is formed on the insulating film 10.

[0084] Then, as shown in step S24, a barrier metal layer 24 is formed on the stacked conversion film 20d. For example, the barrier metal layer 24 is formed on the stacked conversion film 20d using a CVD method with titanium tetrachloride and ammonia. The barrier metal layer 24 may contain a silicide metal. As described above, as shown in step S20, an adhesive intermediate film 20 is formed on the insulating film 10.

[0085] In step S20, the first adhesive layer 21, stress control layer 22, and second adhesive layer 23 may contain the same metal as each other. The same metal described herein may include a silicide metal. The barrier metal layer 24 may also contain the same metal. In step S20, the stress control layer 22 may be thinner than the first adhesive layer 21 and may be thinner than the second adhesive layer 23. The first adhesive layer 21, stress control layer 22, and second adhesive layer 23 may be thinner than the barrier metal layer 24. In step S20, an adhesive intermediate film 20 may be formed on the inner wall of the contact hole 13 and on the insulating film 10, the contact hole 13 being formed in the insulating film 10.

[0086] Then, as shown in step S30, a metal film 30 is formed on the adhesive intermediate film 20. The metal film 30 comprises a stacked film in which multiple distinct layers are stacked. For example, similar to the metal film 130 according to the comparative example, which includes a first metal layer 131, a second metal layer 132, and a third metal layer 133, the metal film 30 comprises a first metal layer 31, a second metal layer 32, and a third metal layer 33. In step S30, note that the metal film 30 may include a second metal layer 32 disposed on the adhesive intermediate film 20 and a third metal layer 33 disposed on the second metal layer 32, while the first metal layer 31 is excluded.

[0087] Figure 9 This is a flowchart illustrating a method for manufacturing a semiconductor device 1 according to another example of the first embodiment. (See flowchart for details.) Figure 9 As shown, a method for manufacturing a semiconductor device 1 according to another example includes a step S10 of forming an insulating film 10, a step S13 of forming a contact hole 13, and a step S20a of forming a metal halide film 20a. The method for manufacturing the semiconductor device 1 further includes a step S20d of converting the metal halide film 20a into a stacked conversion film 20d, a step S24 of forming a barrier metal layer 24, a step S31 of forming a first metal layer 31, a step S31a of planarizing the first metal layer 31, a step S32 of forming a second metal layer 32, and a step S33 of forming a third metal layer 33.

[0088] Steps S10 and S13 are the same as steps S110 and S113 in the comparative example, respectively. Steps S31, S31a, S32, and S33 are the same as steps S131, S131a, S132, and S133 in the comparative example, respectively. Steps S20a, S20d, and S24 are as described above.

[0089] Next, the effects of this embodiment will be described. In the semiconductor device 1 according to this embodiment, the adhesive intermediate film 20 includes a first adhesive layer 21, a stress control layer 22, a second adhesive layer 23, and a barrier metal layer 24. This improves the adhesion between the insulating film 10 and the adhesive intermediate film 20 and prevents the adhesive intermediate film 20 from peeling off from the interface between the insulating film 10 and the adhesive intermediate film 20. Therefore, peeling of the metal film 30, such as wiring, formed on the insulating film 10 can be prevented.

[0090] Specifically, on the insulating film 10, the semiconductor device 1 according to this embodiment includes a stacked conversion film 20d, which includes a first adhesive layer 21, a stress control layer 22, and a second adhesive layer 23, all controlled in terms of composition. The stacked conversion film 20d is formed by converting a metal halide film 20a into the first adhesive layer 21, the stress control layer 22, and the second adhesive layer 23 through halogen segregation. First, the metal halide film 20a is formed directly bonded to the insulating film 10 by a CVD method. In a comparative example, an adhesive layer 121 is formed directly bonded to the insulating film 110 by a PVD method. Therefore, in this embodiment, the method for forming the metal halide film 20a directly bonded to the insulating film 10 is changed from the PVD method in the comparative example to a CVD method, which is a high-temperature film formation method. Therefore, the adhesion of the first adhesive layer 21 based on the metal halide film 20a to the insulating film 10 can be improved. The reason why the adhesion of the first adhesive layer 21 can be improved by using a high-temperature CVD method is that, for example, the adhesive layer 121 formed by the PVD method is physically bonded to the insulating film 110, while the first adhesive layer 21 based on the metal halide film 20a formed by the CVD method is chemically bonded to the insulating film 10.

[0091] In this embodiment, heat treatment conditions, including optimized ammonia plasma nitriding conditions, are applied to a titanium layer containing chlorine impurities caused by titanium tetrachloride as the source gas. This controls the chlorine content of the halide metal film 20a, and adjusts the compressive stress accordingly. Specifically, in this embodiment, based on the film formation temperature and ammonia plasma treatment conditions, a first adhesive layer 21, a stress control layer 22, and a second adhesive layer 23 are selectively formed using a chlorine elimination reaction. The chlorine elimination reaction can be represented by the following reaction formula (1). (1)

[0092] Therefore, by controlling the chlorine content of the metal halide film 20a, the compressive stress can be adjusted according to this content.

[0093] For example, the thin stress control layer 22 can reduce compressive stress. Therefore, since the stress difference between the insulating film 10 and the adhesive intermediate film 20 is small, the metal film 30 can withstand tensile stress during formation. As a result, peeling of the metal film 30 can be suppressed, and adhesion can be improved.

[0094] <First Modification Example>

[0095] Figure 10 This is a flowchart illustrating the step of manufacturing an adhesive interlayer 20 in a method for manufacturing a semiconductor device 1b according to a first modified example of the first embodiment. Figure 11 This is a diagram illustrating the steps of manufacturing the adhesive interlayer film 20 in a method for manufacturing a semiconductor device 1b according to a first modified example of the first embodiment. (See diagram for details.) Figure 10 and Figure 11 As shown, the manufacturing method according to this modified example includes step S20b of converting the metal halide film 20a into a pre-soak film 20b after the step of forming the metal halide film 20a. Then, step S20c of converting the pre-soak film 20b into a stacked conversion film 20d is performed. That is, step S20d of converting the metal halide film 20a into the stacked conversion film 20d includes step S20b of converting the metal halide film 20a into the pre-soak film 20b and step S20c of converting the pre-soak film 20b into the stacked conversion film 20d.

[0096] In step S20b, the metal halide film 20a is converted into a prepreg film 20b. For example, the metal halide film 20a is converted into a prepreg film 20b by heat treatment in an ammonia-containing atmosphere. In step S20b, other treatments besides nitrogen diffusion in step S20d are performed. That is, through the heat treatment in step S20b, silicon and oxygen diffuse from the region of the metal halide film 20a near the insulating film 10 into the interior of the metal halide film 20a. As a result, silicon diffuses to, for example, the center of the metal halide film 20a. Oxygen diffuses to, for example, the upper surface of the metal halide film 20a.

[0097] The metal contained in the metal halide film 20a reacts with the silicon and oxygen contained in the insulating film 10 to form a silicide. This forms a first adhesive layer 21 containing a silicide made of TiSiO or the like on the insulating film 10. As described above, the first adhesive layer 21 may contain a silicide. The first adhesive layer 21 may also contain silicon and oxygen.

[0098] A TiSiOCl-containing prestress control layer 22b is formed on the first adhesive layer 21 by heat treatment. As described above, the prestress control layer 22b may also contain at least any halogen. The stress control layer 22 may also contain silicon and oxygen.

[0099] Halogens such as chlorine are removed from the metal halide film 20a by heat treatment. Halogens such as chlorine are also removed from the upper side of the metal halide film 20a. As a result, a TiO-containing pre-second adhesive layer 23b is formed on the prestress control layer 22b. As described above, the pre-second adhesive layer 23b may contain oxygen and nitrogen. As described above, a first adhesive layer 21, a prestress control layer 22b, and a pre-second adhesive layer 23b, which are distinct from each other, are sequentially formed on the insulating film 10 in a direction starting from the insulating film 10.

[0100] In step S20c, the prepreg film 20b is transformed into a stacked conversion film 20d. For example, the prepreg film 20b is nitrided starting from its upper surface using a nitriding process. Therefore, nitrogen diffuses to the center of the prepreg film 20b. This forms a TiSiOClN-containing stress control layer 22 on the first adhesive layer 21. A TiON-containing second adhesive layer 23 is then formed on the stress control layer 22. Thus, the stacked conversion film 20d is formed on the insulating film 10.

[0101] The manufacturing method according to this modified example includes a step S20b of converting a metal halide film 20a into a prepreg film 20b and a step S20c of converting the prepreg film 20b into a stacked conversion film 20d. In step S20b of converting the metal halide film 20a into the prepreg film 20b, the progress of the nitriding process can be prevented, while the elimination of halogens such as chlorine is achieved. Therefore, the formation of the halogen-containing prestress control layer 22b can be controlled. Thus, the formation of the stress control layer 22 can be controlled.

[0102] <Second Modification Example>

[0103] Next, a method for manufacturing the semiconductor device 1c according to the second modified example will be described. Figure 12 This is a diagram illustrating the step of manufacturing the adhesive interlayer film 20 in a manufacturing method of a semiconductor device 1c according to a second modified example of the first embodiment. (See diagram for reference.) Figure 12As shown, in the manufacturing method of the semiconductor device 1c according to this modified example, the processing time in step S20b, which converts the metal halide film 20a into a prepreg film 20b, is changed. This allows control over the thickness of the prestress control layer 22b. Consequently, the thickness of the stress control layer 22 in the bonding intermediate film 20 can be controlled. Specifically, in step S20b, a longer processing time helps to eliminate halogens such as chlorine in the conversion of the metal halide film 20a into the prepreg film 20b. This reduces the thickness of the prestress control layer 22b. Therefore, in the subsequent step S20c, where the prepreg film 20b is converted into the stacked conversion film 20d, the thickness of the stress control layer 22 can be reduced. Thus, the thickness of the stress control layer 22 can be controlled. The stress control layer 22 has a higher compressive stress than the first adhesive layer 21 and the second adhesive layer 23, and therefore, when it is thinner than the second adhesive layer 23, it can reduce stress. Descriptions of other structures and effects are included in the descriptions of the first embodiment and the first modified example.

[0104] <Second Embodiment>

[0105] Next, the semiconductor device 2 according to the second embodiment will be described. In the semiconductor device 2 according to this embodiment, the gas used in the nitriding process is changed. Figure 13 This is a diagram illustrating the step of manufacturing the adhesive interlayer film 20 in a method for manufacturing the semiconductor device 2 according to the second embodiment. Figure 13 As shown, in the manufacturing method of the semiconductor device 2 according to this embodiment, in step S20d, which converts the metal halide film 20a into a stacked conversion film 20d, argon, nitrogen, and hydrogen are used instead of argon and ammonia for heat treatment and nitriding. The gas used in the process of this embodiment is changed from ammonia to nitrogen and hydrogen, thereby individually controlling nitriding and halogen elimination. Specifically, the proportion of nitrogen in the gas used in these processes is increased, thereby promoting nitriding. Conversely, the proportion of hydrogen in the gas used in these processes is increased, thereby promoting the elimination of halogens such as chlorine.

[0106] For example, increasing the proportion of nitrogen increases the thickness of the second adhesive layer 23 and the stress control layer 22. Conversely, increasing the proportion of hydrogen decreases the thickness of the stress control layer 22. As described above, controlling the proportion of nitrogen and hydrogen in the gases used in these processes controls the thickness of each layer of the stacked conversion films 20d, thus controlling the compressive stress on the adhesive intermediate film 20 and improving the adhesion of the metal film 30. Descriptions of other structures and effects are included in the description of the first embodiment and each modified example.

[0107] <Third Embodiment>

[0108] Next, a semiconductor device according to a third embodiment will be described. This embodiment is an exemplary application to a semiconductor device including specific semiconductor elements such as IGBTs. Figure 14This is a cross-sectional view showing the semiconductor device 3 according to the third embodiment. Figure 14 As shown, the semiconductor device 3 according to this embodiment includes a semiconductor substrate 40, an insulating film 10, an adhesive intermediate film 20, a metal film 30 used for emitter wiring, and a collector wiring 235. Multiple semiconductor elements can be formed in the semiconductor device 3. The semiconductor elements include, for example, IGBTs. Note that the semiconductor elements may include at least one of MOSFETs and diodes. In the semiconductor substrate 40, the IGBT components include an N-type drift layer 210, an N-type barrier layer 214, a P-type body layer 215, an N+ type emitter layer 216, a P+ type latch-up prevention layer 217, and a P+ type body contact layer 218. The semiconductor substrate 40 also includes a trench gate electrode 241, a trench emitter electrode 242, a P-type floating layer 243, a P+ type collector layer 244, an N-type field stop layer 245, a trench insulating film 246, and a trench insulating film 247. The metal film 30 used as emitter wiring is connected to the N+ type emitter layer 216, the P type body layer 215, the P+ type body contact layer 218 and the trench emitter electrode 242 via contact holes 13 and 43. The collector wiring 235 is connected to the P+ type collector layer 244.

[0109] The N-type barrier layer 214 is arranged closer to the +Z axis direction side than the N-type drift layer 210. The N-type barrier layer 214 extends in, for example, the Y-axis direction in a plan view. The N-type barrier layer 214 is sandwiched on both sides between the trench gate electrode 241 and the trench emitter electrode 242 in the X-axis direction. That is, the N-type barrier layer 214 is arranged in the region sandwiched between the trench gate electrode 241 and the trench emitter electrode 242.

[0110] The P-type body layer 215 is arranged closer to the +Z axis direction side than the N-type barrier layer 214. The P-type body layer 215 is sandwiched on both sides in the X-axis direction between the trench gate electrode 241 and the trench emitter electrode 242. The P-type body layer 215 is connected via an adhesive interlayer 20 to the metal film 30 filled in the contact holes 13 and 43 penetrating the insulating film 10, and the N+ type emitter layer 216.

[0111] The N+ type emitter layer 216 is arranged closer to the +Z axis direction side than the P type body layer 215. The N+ type emitter layer 216 is arranged in the region sandwiched between the trench gate electrode 241 and the trench emitter electrode 242. The N+ type emitter layer 216 is connected to the metal film 30 filled in the contact holes 13 and 43 that penetrate the insulating film 10.

[0112] The trench gate electrode 241 and trench emitter electrode 242 are arranged to sandwich an N-type barrier layer 214, a P-type body layer 215, and an N+ type emitter layer 216 on both sides in the X-axis direction. The trench gate electrode 241 and trench emitter electrode 242 have portions extending in, for example, the Y-axis direction in a plan view. For example, the trench gate electrode 241 is arranged on the +X-axis side of the trench emitter electrode 242. The trench emitter electrode 242 is arranged on the -X-axis side of the trench gate electrode 241.

[0113] The trench gate electrode 241 is connected to, for example, gate wiring. The trench emitter electrode 242 is connected via an adhesive interlayer 20 to a metal film 30 filled in contact holes 13 and 43 that penetrate the insulating film 10. Thus, the N+ type emitter layer 216, the P type body layer 215, and the trench gate electrode 241 are connected to the metal film 30 used as emitter wiring. The structure between the trench gate electrode 241 and the trench emitter electrode 242 is called the inter-trench structure. For example, the inter-trench structure of an IGBT includes an N-type barrier layer 214, a P-type body layer 215, and an N+ type emitter layer 216. The inter-trench structure of an IGBT may also include a P+ type latch-up prevention layer 217 and a P+ type body contact layer 218.

[0114] The P-type floating layer 243 is disposed between adjacent IGBTs in a plurality of IGBTs. For example, in adjacent IGBTs, the P-type floating layer 243 is disposed between the trench gate electrode 241 of the IGBT on the -X-axis side and the trench emitter electrode 242 of the IGBT on the +X-axis side. The P-type floating layer 243 is positioned across the trench gate electrode 241 or the trench emitter electrode 242 and opposite to the N-type barrier layer 214, the P-type body layer 215 and the N+ type emitter layer 216.

[0115] The P-type floating layer 243 is arranged closer to the +Z axis direction side than the N-type drift layer 210. Therefore, the P-type floating layer 243, the trench emitter electrode 242 (covered with a trench insulating film 247), the inter-trench structure, the trench gate electrode 241 (covered with a channel insulating film 246), and the P-type floating layer 243 are arranged sequentially from the -X axis direction side to the +Z axis direction side of the N-type drift layer 210 in the X-axis direction. This structure is repeated in the X-axis direction.

[0116] A trench insulating film 246 is disposed between the trench emitter electrode 242 and the semiconductor substrate 40. Specifically, the trench insulating film 246 is disposed between the trench emitter electrode 242 and the N-type drift layer 210, the N-type barrier layer 214, the P-type body layer 215, the N+ type emitter layer 216, and the P-type floating layer 243. A trench insulating film 247 is disposed between the trench gate electrode 241 and the semiconductor substrate 40. Specifically, the trench insulating film 247 is disposed between the trench gate electrode 241 and the N-type drift layer 210, the N-type barrier layer 214, the P-type body layer 215, the N+ type emitter layer 216, and the P-type floating layer 243.

[0117] The N-type field stop layer 245 is positioned closer to the -Z axis direction than the N-type drift layer 210. The P+ type collector layer 244 is positioned closer to the -Z axis direction than the N-type field stop layer 245. The P+ type collector layer 244 is connected to the collector wiring 235.

[0118] In the semiconductor device 3 according to this embodiment, an insulating film 10 may be formed on a semiconductor substrate 40, and an adhesive intermediate film 20 may be formed on the insulating film 10 and on the inner walls of contact holes 13 and 43 formed in the insulating film 10. A metal film 30 is formed on the adhesive intermediate film 20. Specifically, for example, an IGBT may be formed in the semiconductor substrate 40, the IGBT including a semiconductor layer including a drift layer, a channel layer, an emitter layer, and a collector layer. The insulating film 10 may be formed on the semiconductor substrate 40 having this structure. The adhesive intermediate film 20 may be formed on the insulating film 10 and on the inner walls of contact holes 13 and 43 that penetrate from the upper surface of the insulating film 10 into the semiconductor layer in the semiconductor substrate 40. The metal film 30 is connected to the semiconductor layer via the adhesive intermediate film 20.

[0119] The method for manufacturing the semiconductor device 3 according to this embodiment may further include the step of forming an IGBT in a semiconductor substrate 40, the IGBT including a semiconductor layer comprising a drift layer, a channel layer, an emitter layer, and a collector layer. In this case, in step S10, an insulating film 10 is formed on the semiconductor substrate 40 having this structure. In step S20, an adhesive intermediate film 20 is formed on the insulating film 10 and on the inner walls of contact holes 13 and 43, the contact holes 13 and 43 penetrating from the upper surface of the insulating film 10 into the semiconductor layer in the semiconductor substrate 40. In step S30, a metal film 30 is connected to the semiconductor layer via the adhesive intermediate film 20.

[0120] The present disclosure has been specifically described above based on embodiments. However, it goes without saying that the present disclosure is not limited to the comparative examples, embodiments, and modified examples, and can be carried out within the scope of the present invention. For example, suitable combinations of the structures of the comparative examples, the first to third embodiments, and the first and second modified examples are also within the scope of the technical concept of the embodiments. Furthermore, the following structures are also within the scope of the technical concept of the embodiments.

[0121] (Appendix A1)

[0122] A semiconductor device includes: an insulating film; a metal film; and an adhesive intermediate film disposed between the insulating film and the metal film. The adhesive intermediate film includes a first adhesive layer, which is sequentially disposed and distinct from each other in a direction from the insulating film to the metal film; a stress control layer; a second adhesive layer; and a barrier metal layer.

[0123] (Appendix A2)

[0124] In the semiconductor device described in Appendix A1, the first adhesive layer, the stress control layer, and the second adhesive layer comprise the same metal as each other. The same metal includes at least any one of cobalt, nickel, molybdenum, hafnium, tantalum, tungsten, magnesium, chromium, manganese, iron, zirconium, niobium, rubidium, rhodium, palladium, rhenium, iridium, and platinum.

[0125] (Appendix A3)

[0126] In the semiconductor device described in Appendix A2, the barrier metal layer comprises the same metal.

[0127] (Appendix A4)

[0128] In the semiconductor device described in Appendix A1, the barrier metal layer comprises at least any one of cobalt, nickel, molybdenum, hafnium, tantalum, tungsten, magnesium, chromium, manganese, iron, zirconium, niobium, rubidium, rhodium, palladium, rhenium, iridium, and platinum.

[0129] (Appendix A5)

[0130] In the semiconductor device described in Appendix A1, the thickness of each of the first adhesive layer, the stress control layer, and the second adhesive layer is less than the thickness of the barrier metal layer.

[0131] (Appendix A6)

[0132] The semiconductor device described in Appendix A1 further includes a semiconductor substrate. The insulating film is formed on the semiconductor substrate, the adhesive intermediate film is formed on the insulating film and on the inner wall of the contact hole, the contact hole is formed in the insulating film, and the metal film is formed on the adhesive intermediate film.

[0133] (Appendix B1)

[0134] A method for manufacturing a semiconductor device includes: forming an insulating film; forming an adhesive intermediate film on the insulating film; and forming a metal film on the adhesive intermediate film. In the step of forming the adhesive intermediate film, the adhesive intermediate film is formed comprising a first adhesive layer, a stress control layer, a second adhesive layer, and a barrier metal layer, which are sequentially arranged and distinct from each other in a direction from the insulating film to the metal film.

[0135] (Appendix B2)

[0136] In the method for manufacturing a semiconductor device described in Appendix B1, the insulating film comprises silicon oxide in the step of forming the insulating film.

[0137] (Appendix B3)

[0138] In the method of manufacturing a semiconductor device described in Appendix B1, in the step of forming the metal film, the metal film includes a stacked film in which a plurality of mutually different layers are stacked.

[0139] (Appendix B4)

[0140] In the method for manufacturing a semiconductor device described in Appendix B1, in the step of forming the metal film, the metal film includes: a first metal layer containing tungsten disposed on the adhesive intermediate film; a second metal layer containing titanium disposed on the first metal layer; and a third metal layer containing aluminum disposed on the second metal layer.

[0141] (Appendix B5)

[0142] In the method for manufacturing a semiconductor device described in Appendix B1, in the step of forming the metal film, the metal film includes: a second metal layer containing titanium disposed on the adhesive intermediate film; and a third metal layer containing aluminum disposed on the second metal layer.

[0143] (Appendix B6)

[0144] In the method of manufacturing a semiconductor device described in Appendix B1, during the step of forming the adhesive interlayer, the first adhesive layer, the stress control layer, and the second adhesive layer comprise the same metal as each other. The same metal includes at least any one of cobalt, nickel, molybdenum, hafnium, tantalum, tungsten, magnesium, chromium, manganese, iron, zirconium, niobium, rubidium, rhodium, palladium, rhenium, iridium, and platinum.

[0145] (Appendix B7)

[0146] In the method of manufacturing a semiconductor device described in Appendix B6, in the step of forming the adhesive intermediate film, the first adhesive layer comprises a silicide.

[0147] (Appendix B8)

[0148] In the method of manufacturing a semiconductor device described in Appendix B6, in the step of forming the adhesive intermediate film, the first adhesive layer further comprises silicon and oxygen.

[0149] (Appendix B9)

[0150] In the method of manufacturing a semiconductor device described in Appendix B6, during the step of forming the adhesive intermediate film, the stress control layer further comprises at least any one of halogens.

[0151] (Appendix B10)

[0152] In the method of manufacturing a semiconductor device described in Appendix B6, the stress control layer further comprises silicon, oxygen, and nitrogen in the step of forming the adhesive intermediate film.

[0153] (Appendix B11)

[0154] In the method of manufacturing a semiconductor device described in Appendix B6, the second adhesive layer further comprises oxygen and nitrogen in the step of forming the adhesive intermediate film.

[0155] (Appendix B12)

[0156] In the method of manufacturing a semiconductor device described in Appendix B6, in the step of forming the adhesive intermediate film, the barrier metal layer comprises the same metal.

[0157] (Appendix B13)

[0158] In the method of manufacturing a semiconductor device described in Appendix B1, in the step of forming the adhesive intermediate film, the barrier metal layer comprises at least any one of cobalt, nickel, molybdenum, hafnium, tantalum, tungsten, magnesium, chromium, manganese, iron, zirconium, niobium, rubidium, rhodium, palladium, rhenium, iridium and platinum.

[0159] (Appendix B14)

[0160] In the method for manufacturing a semiconductor device described in Appendix B1, in the step of forming the adhesive intermediate film, the thickness of the stress control layer is less than the thickness of the first adhesive layer.

[0161] (Appendix B15)

[0162] In the method for manufacturing a semiconductor device described in Appendix B1, in the step of forming the adhesive intermediate film, the thickness of the stress control layer is less than the thickness of the second adhesive layer.

[0163] (Appendix B16)

[0164] In the method of manufacturing a semiconductor device described in Appendix B1, in the step of forming the adhesive intermediate film, the thickness of each of the first adhesive layer, the stress control layer and the second adhesive layer is less than the thickness of the barrier metal layer.

[0165] (Appendix B17)

[0166] In the method for manufacturing a semiconductor device described in Appendix B1, in the step of forming the insulating film, the insulating film is formed on a semiconductor substrate; in the step of forming the adhesive intermediate film, the adhesive intermediate film is formed on the insulating film and on the inner wall of a contact hole, the contact hole being formed in the insulating film; and in the step of forming the metal film, the metal film is formed on the adhesive intermediate film.

[0167] (Appendix B18)

[0168] In the method for manufacturing a semiconductor device described in Appendix B1, the step of forming the adhesive intermediate film includes: forming a metal halide film on the insulating film, the metal halide film being formed by halogenating a metal; converting the metal halide film into a stacked conversion film including a first adhesive layer, a stress control layer, and a second adhesive layer, the first adhesive layer, the stress control layer, and the second adhesive layer being different from each other and arranged sequentially in a direction starting from the insulating film; and forming the barrier metal layer on the stacked conversion film.

[0169] (Appendix B19)

[0170] In the method for manufacturing a semiconductor device described in Appendix B18, in the step of converting the metal halide film into the stacked conversion film, the metal halide film is converted into the stacked conversion film by a CVD method that generates plasma.

[0171] (Appendix B20)

[0172] In the method for manufacturing a semiconductor device described in Appendix B18, in the step of forming the metal halide film, the metal halide film is formed on the insulating film by a CVD method.

Claims

1. A semiconductor device, comprising: Insulating film; metal film; as well as An adhesive interlayer is disposed between the insulating film and the metal film. The adhesive interlayer film includes: First adhesive layer; Stress control layer; Second adhesive layer; and Blocking metal layer, and The first adhesive layer, the stress control layer, the second adhesive layer, and the barrier metal layer are different from each other and are arranged sequentially in the direction from the insulating film to the metal film.

2. The semiconductor device according to claim 1, The insulating film therein comprises silicon oxide.

3. The semiconductor device according to claim 1, The metal film includes a stacked film in which multiple distinct layers are stacked.

4. The semiconductor device according to claim 1, The metal film comprises: The first metal layer comprises tungsten disposed on the adhesive intermediate film; The second metal layer comprises titanium disposed on the first metal layer; as well as The third metal layer comprises aluminum disposed on the second metal layer.

5. The semiconductor device according to claim 1, The metal film comprises: The second metal layer comprises titanium disposed on the adhesive intermediate film; as well as The third metal layer comprises aluminum disposed on the second metal layer.

6. The semiconductor device according to claim 1, The first adhesive layer, the stress control layer, and the second adhesive layer contain the same metal as each other, and The same metal mentioned therein includes at least one of cobalt, nickel, molybdenum, hafnium, tantalum, tungsten, magnesium, chromium, manganese, iron, zirconium, niobium, rubidium, rhodium, palladium, rhenium, iridium, and platinum.

7. The semiconductor device according to claim 6, The first adhesive layer contains a silicon compound.

8. The semiconductor device according to claim 6, The first adhesive layer further comprises silicon and oxygen.

9. The semiconductor device according to claim 6, The stress control layer further comprises at least one of the halogens.

10. The semiconductor device according to claim 6, The stress control layer also contains silicon, oxygen, and nitrogen.

11. The semiconductor device according to claim 6, The second adhesive layer also contains oxygen and nitrogen.

12. The semiconductor device according to claim 1, The thickness of the stress control layer is less than the thickness of the first adhesive layer.

13. The semiconductor device according to claim 1, The thickness of the stress control layer is less than the thickness of the second adhesive layer.

14. The semiconductor device of claim 1, further comprising: The semiconductor substrate in which IGBTs are formed includes a semiconductor layer comprising a drift layer, a channel layer, an emitter layer, and a collector layer. The insulating film is formed on the semiconductor substrate. The adhesive intermediate film is formed on the insulating film and on the inner wall of the contact hole, the contact hole penetrating from the upper surface of the insulating film to the semiconductor layer in the semiconductor substrate, and The metal film is connected to the semiconductor layer via the adhesive intermediate film.

15. A method for manufacturing a semiconductor device, the method comprising: Form an insulating film; An adhesive intermediate film is formed on the insulating film; as well as A metal film is formed on the adhesive intermediate film. In forming the adhesive interlayer, the adhesive interlayer includes a first adhesive layer, a stress control layer, a second adhesive layer, and a barrier metal layer, and The first adhesive layer, the stress control layer, the second adhesive layer, and the barrier metal layer are different from each other and are arranged sequentially in the direction from the insulating film to the metal film.

16. The method according to claim 15, The formation of the adhesive intermediate film includes: A metal halide film is formed on the insulating film by halogenating a metal. The metal halide film is converted into a stacked conversion film comprising a first adhesive layer, a stress control layer, and a second adhesive layer, wherein the first adhesive layer, the stress control layer, and the second adhesive layer are different from each other and are arranged sequentially in a direction starting from the insulating film; and The barrier metal layer is formed on the stacked conversion film.

17. The method according to claim 16, The process of converting the metal halide film into the stacked conversion film includes: The metal halide film is converted into a prepreg film comprising a first adhesive layer, a prestress control layer, and a pre-second adhesive layer, wherein the first adhesive layer, the prestress control layer, and the pre-second adhesive layer are different from each other and are arranged sequentially in a direction starting from the insulating film; and The prepreg film is converted into a stacked conversion film comprising a first adhesive layer, a stress control layer, and a second adhesive layer, wherein the first adhesive layer, the stress control layer, and the second adhesive layer are different from each other and are arranged sequentially in a direction starting from the insulating film.

18. The method according to claim 16, In the process of converting the metal halide film into the stacked conversion film, the metal halide film is converted into the stacked conversion film by heat treatment in an ammonia-containing atmosphere.

19. The method according to claim 16, In the process of converting the metal halide film into the stacked conversion film, the metal halide film is converted into the stacked conversion film by heat treatment in an atmosphere containing nitrogen and hydrogen.

20. The method of claim 15, comprising: An IGBT is formed in a semiconductor substrate. The IGBT includes a semiconductor layer, which comprises a drift layer, a channel layer, an emitter layer, and a collector layer. During the formation of the insulating film, the insulating film is formed on the semiconductor substrate. During the formation of the adhesive intermediate film, the adhesive intermediate film is formed on the insulating film and on the inner wall of the contact hole, the contact hole penetrating from the upper surface of the insulating film to the semiconductor layer in the semiconductor substrate, and During the formation of the metal film, the metal film is connected to the semiconductor layer via the adhesive intermediate film.

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