Wide bandgap power semiconductor device and preparation method thereof

By employing multiple ion implantations to form doped regions in wide-bandgap semiconductor devices, the performance and reliability issues of devices with high integration density are solved, achieving efficient switching and long-term stability of the devices.

CN121865667APending Publication Date: 2026-04-14SUZHOU WEIQING SEMICONDUCTOR CO LTD
0 Cites 1 Cited by

Patent Information

Application Number
CN202512044698.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-12-31
Publication Date
2026-04-14

AI Technical Summary

Technical Problem

Existing wide-bandgap semiconductor devices struggle to balance device performance and reliability under high integration, especially with channel dimensions smaller than 0.5μm, which lead to problems such as large leakage current, weakened gate-to-channel control, hot carrier impact on device lifetime, and increased static power consumption.

Method used

A doped region is formed in the substrate layer by multiple ion implantation methods. The first doped region with varying doping concentration is constructed to create a lateral electric field constraint, optimize the electric field strength and the electric field concentration effect under the gate oxide, and suppress the potential difference and hot carrier influence in the channel region.

Benefits of technology

It reduces the static power consumption of the device, improves switching efficiency, suppresses leakage current and short-channel effect, and improves the performance and reliability of the device.

✦ Generated by Eureka AI based on patent content.
Patent Text Reader

Abstract

The invention relates to the technical field of semiconductor devices, and discloses a wide bandgap power semiconductor device and a preparation method thereof. The method comprises: providing a substrate layer of a first conductivity type; forming a first doped region which is deep into the substrate layer and comprises a plurality of doped layers which are sequentially nested from outside to inside, wherein the doping concentrations of the plurality of doped layers are sequentially increased from outside to inside; forming a second doped region in the doped layer on the innermost side of the first doped region; forming an isolation layer on the first surface; forming a control electrode on the isolation layer; forming a first electrode on the first surface; a second electrode is formed on the second surface of the substrate layer. According to the invention, the first doped region which is located between the substrate layer and the second doped region and has the doping concentration gradually increased from outside to inside is formed through a mode of multiple times of ion implantation, so that transverse electric field constraint is constructed, transverse depletion of a channel region and a short channel effect under the condition of large voltage are inhibited, the channel width is reduced, and the performance of the device is improved. And the device performance and reliability are improved.
Need to check novelty before this filing date? Find Prior Art