Circuit board fault diagnosis method, platform and related device

Abstract

The invention provides a circuit board fault diagnosis method, platform and related device, and the method comprises the steps: obtaining a first multi-mode feature of a first to-be-detected circuit board; fault detection is carried out based on the first multi-modal feature, and a first fault feature vector is determined; performing data preprocessing on the first fault feature vector to obtain a first preprocessed feature vector; inputting the first preprocessing feature vector into a diagnosis model obtained by pre-training for fault diagnosis, and outputting a first target diagnosis result; acquiring a first multi-mode characteristic of the first circuit board to be tested; and according to the first target diagnosis result, performing data updating on the knowledge graph database, and according to the knowledge graph database after data updating, adjusting the diagnosis model to obtain an updated diagnosis model. According to the method, the accuracy of circuit board fault identification is improved.

Description

Technical Field

[0001] This application relates to the field of testing technology, and in particular to a circuit board fault diagnosis method, platform and related device. Background Technology

[0002] With the rapid development of integrated circuit technology, 3D integrated circuits (3D ICs) have become an important direction for chip development due to their advantages such as high integration, high performance, and low power consumption. However, the vertical interconnect structures on which 3D ICs rely (such as through-silicon vias (TSVs), microbumps, and hybrid bonding interfaces) are prone to hidden defects during manufacturing and stacking, seriously affecting device reliability and yield. Currently, detection methods for these hidden defects generally suffer from limited accuracy, high testing costs, and some methods may even damage the circuit board structure.

[0003] Therefore, how to perform highly accurate and non-destructive fault diagnosis of hidden defects in the circuit boards of three-dimensional integrated circuits has become an urgent problem to be solved. Summary of the Invention

[0004] In view of this, the purpose of this application is to provide a circuit board fault diagnosis method, platform and related device to solve or partially solve the above problems.

[0005] To achieve the above objectives, this application provides a circuit board fault diagnosis method, comprising: Obtain the first multimodal features of the first circuit board under test; Fault detection is performed based on the first multimodal features, and a first fault feature vector is determined. The first fault feature vector is preprocessed to obtain a first preprocessed feature vector. The first preprocessed feature vector is input into the pre-trained diagnostic model for fault diagnosis, and the first target diagnostic result is output. The first target diagnosis result is input into the knowledge graph library of the diagnosis model, and the similarity is calculated with the historical fault information in the knowledge graph library to obtain the similarity. Based on the similarity, the structural type of the first target diagnosis result and historical fault information is determined, and the determination result is obtained; Based on the judgment result, the knowledge graph database is updated, and the diagnostic model is adjusted according to the updated knowledge graph database to obtain the updated diagnostic model. The second preprocessed feature vector of the second circuit board under test is determined, and the second preprocessed feature vector is input into the updated diagnostic model for fault diagnosis, and the second target diagnostic result is output.

[0006] Optionally, the step of inputting the second preprocessed feature vector into the updated diagnostic model for fault diagnosis and outputting the second target diagnostic result includes: The new historical fault information in the updated knowledge graph database is matched with the second preprocessed feature vector. When a match is successful, the new historical fault information that matches the second preprocessed feature vector is used to determine the fault label and diagnosis path corresponding to the new historical fault information that matches the second preprocessed feature vector in the knowledge graph library after the data is updated, and the second target diagnosis result is determined based on the fault label and the diagnosis path.

[0007] Optionally, updating the knowledge graph database based on the determination result includes: When the similarity is determined to be higher than a preset threshold, it is determined to be a similar structure, the first target diagnosis result is associated with historical fault information, and the information is updated to the knowledge graph database; In response to the determination that the similarity is lower than a preset threshold, and the structure is identified as heterogeneous, a new fault node is created in the knowledge graph database, the first target diagnosis result is input into the new fault node, and the knowledge graph database is updated.

[0008] Optionally, before acquiring the first multimodal feature of the first circuit under test, the method further includes: Perform a self-test on the first circuit board to be tested and obtain the self-test result; In response to determining that the self-test result is abnormal, an alarm is issued and the test is terminated; In response to determining that the self-test result is normal, the parameters of the first circuit board under test are configured according to the preset fault diagnosis task requirements.

[0009] Optionally, the step of inputting the first preprocessed feature vector into a pre-trained diagnostic model for fault diagnosis and outputting a first target diagnostic result includes: The diagnostic model includes multiple diagnostic sub-models; Attribute information is extracted from the first preprocessed feature vector, and the corresponding diagnostic sub-model is matched based on the attribute information; In response to determining the corresponding diagnostic sub-model, the first preprocessed feature vector is input into the corresponding diagnostic sub-model for fault diagnosis, and the first target diagnostic result is output.

[0010] Optionally, the step of detecting faults and determining the first fault feature vector based on the first multimodal features includes: Acquire the first multimodal feature sequence of the first circuit board under test collected within a predetermined time period; Based on the temporal changes of the first multimodal feature sequence, anomaly feature judgment is performed; In response to the determination of the existence of abnormal features, the abnormal features are extracted as a first fault feature vector.

[0011] Optionally, the step of preprocessing the first fault feature vector to obtain a first preprocessed feature vector includes: The noise of the fault feature vector is initially filtered to obtain the initial filtering result; In response to the detection that the noise component amplitude of the initial filtering result exceeds a preset threshold, an adaptive filtering algorithm is used to dynamically denoise the initial filtering result and output a preprocessed denoising feature vector. The first preprocessed feature vector is determined based on the preprocessed noise reduction feature vector.

[0012] Optionally, the preprocessed denoising feature vector is a multimodal preprocessed denoising feature vector; determining the first preprocessed feature vector based on the preprocessed denoising feature vector further includes: Identify the preprocessed noise reduction feature vectors of at least two modes that differ from each other in the preprocessed noise reduction feature vectors; For the preprocessed noise reduction feature vectors of at least two different modalities, mean-variance standardization is performed to obtain unified feature vectors of at least two modalities. The feature vectors of at least two unified modalities are used as the first preprocessed feature vectors.

[0013] Based on the same inventive concept, this application also provides a circuit board fault diagnosis platform, including: The multimodal feature acquisition module is configured to acquire the first multimodal features of the first circuit board under test. The fault detection and feature extraction module is configured to: perform fault detection based on the first multimodal features and determine the first fault feature vector; The data preprocessing module is configured to: perform data preprocessing on the first fault feature vector to obtain a first preprocessed feature vector; The diagnostic model module is configured to receive the first preprocessed feature vector and input it into a pre-trained diagnostic model to perform fault diagnosis, and output the first target diagnostic result. The model optimization module is configured to: input the first target diagnosis result into the knowledge graph library of the diagnosis model, and calculate the similarity with the historical fault information in the knowledge graph library to obtain a similarity; determine the structural type of the first target diagnosis result and the historical fault information based on the similarity, and obtain a determination result; update the knowledge graph library based on the determination result, and adjust the diagnosis model according to the updated knowledge graph library to obtain an updated diagnosis model; The data preprocessing module is also configured to: determine the second preprocessed feature vector of the second circuit board under test; The diagnostic model module is also configured to input the second preprocessed feature vector into the updated diagnostic model for fault diagnosis and output the second target diagnostic result.

[0014] Optionally, the multimodal feature acquisition module is further configured to: perform a self-test on the first circuit board to be tested and obtain a self-test result; in response to determining that the self-test result is abnormal, issue an alarm and terminate the test; in response to determining that the self-test result is normal, configure parameters of the first circuit board to be tested according to preset fault diagnosis task requirements; or, The fault detection and feature extraction module is further configured to: acquire a first multimodal feature sequence of the first circuit board under test collected within a predetermined time period; determine abnormal features based on the temporal changes of the first multimodal feature sequence; and, in response to determining the existence of abnormal features, extract the abnormal features as a first fault feature vector; or, The data preprocessing module is further configured to: perform initial filtering on the noise of the fault feature vector to obtain an initial filtering result; in response to detecting that the noise component amplitude of the initial filtering result exceeds a preset threshold, perform dynamic noise reduction processing on the initial filtering result using an adaptive filtering algorithm and output a preprocessed noise reduction feature vector; determine the first preprocessed feature vector based on the preprocessed noise reduction feature vector; or, The data preprocessing module is further configured to: identify at least two modal preprocessed denoising feature vectors that differ from each modality's preprocessed denoising feature vectors; perform mean-variance standardization on the at least two modal preprocessed denoising feature vectors that differ to obtain unified feature vectors for at least two modalities; and use the unified feature vectors for at least two modalities as the first preprocessed feature vector; or, The diagnostic model module is further configured to: extract attribute information from the first preprocessed feature vector and match a corresponding diagnostic sub-model based on the attribute information; in response to determining the corresponding diagnostic sub-model, input the first preprocessed feature vector into the corresponding diagnostic sub-model for fault diagnosis and output a first target diagnostic result; or, The diagnostic model module is further configured to: perform feature matching between the new historical fault information in the updated knowledge graph library and the second preprocessed feature vector; when a match is successful, determine the fault label and diagnostic path corresponding to the new historical fault information in the updated knowledge graph library that matches the second preprocessed feature vector, and determine the second target diagnostic result based on the fault label and the diagnostic path; or, The model optimization module is further configured to: in response to determining that the similarity is higher than a preset threshold, identify the structure as similar, associate the first target diagnosis result with historical fault information, and update the knowledge graph library; in response to determining that the similarity is lower than a preset threshold, identify the structure as heterogeneous, establish a new fault node in the knowledge graph library, input the first target diagnosis result into the new fault node, and update the knowledge graph library.

[0015] Based on the same inventive concept, this application also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable by the processor, wherein the processor implements the method described above when executing the computer program.

[0016] Based on the same inventive concept, this application also provides a non-transitory computer-readable storage medium that stores computer instructions for causing a computer to perform the method described above.

[0017] Based on the same inventive concept, this application also provides a computer program product, including computer program instructions, which, when run on a computer, cause the computer to perform the method described above.

[0018] As can be seen from the above, the circuit board fault diagnosis method, platform, and related apparatus provided in this application, wherein the circuit board fault diagnosis method acquires the multimodal features of the circuit board under test, performs fault detection and extracts fault feature vectors, and achieves non-contact fault identification by combining data preprocessing and a pre-trained diagnostic model; at the same time, a knowledge graph library is introduced, and the diagnostic model is dynamically updated based on the similarity calculation between the detection results and historical fault information in the knowledge graph library, so that the diagnostic model has self-learning and continuous optimization capabilities, thereby improving the accuracy of circuit board fault identification without damaging the circuit board structure. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in this application or related technologies, the drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a schematic flowchart of a circuit board fault diagnosis method according to an embodiment of this application. Figure 1 ; Figure 2 This is a schematic flowchart of a circuit board fault diagnosis method according to an embodiment of this application. Figure 2 ; Figure 3 This is a schematic flowchart of a circuit board fault diagnosis method according to an embodiment of this application. Figure 3 ; Figure 4 This is a schematic flowchart of a circuit board fault diagnosis method according to an embodiment of this application. Figure 4 ; Figure 5 This is a schematic flowchart of a circuit board fault diagnosis method according to an embodiment of this application. Figure 5 ; Figure 6 This is a schematic flowchart of a circuit board fault diagnosis method according to an embodiment of this application. Figure 6 ; Figure 7 This is a schematic diagram of a circuit board fault diagnosis platform according to an embodiment of this application; Figure 8 This is a schematic diagram of an electronic device according to an embodiment of this application. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with specific embodiments and the accompanying drawings.

[0022] It should be noted that, unless otherwise defined, the technical or scientific terms used in the embodiments of this application should have the ordinary meaning understood by one of ordinary skill in the art to which this application pertains. The terms "first," "second," and similar terms used in the embodiments of this application do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are only used to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0023] As described in the background section, with the rapid development of integrated circuit (IC) technology, 3D integrated circuits (3D ICs), with their high integration, high performance, and low power consumption, have become an important technological route for promoting chip miniaturization and system integration. 3D ICs achieve multi-chip stacking through vertical interconnect structures such as through-silicon vias (TSVs), microbumps, and hybrid bonding interfaces, significantly improving computing power and bandwidth within a limited area. However, the manufacturing process of 3D integration is extremely complex, involving multiple critical steps such as deep silicon etching, metal filling, dielectric layer deposition, and chemical mechanical polishing (CMP). Any minute process fluctuations can lead to hidden defects such as TSV voids, pinholes, metal migration, dielectric layer cracks, or microbump cracks. These defects are usually buried inside the corresponding package of the 3D IC and are difficult to detect through traditional visual inspection methods, but can lead to abnormal interconnect impedance, signal delay, or functional failure, seriously affecting product yield and reliability.

[0024] To address the aforementioned hidden defects, current detection techniques mainly include X-ray fluoroscopy, ultrasonic scanning, and electrical parameter testing. Among these, X-ray fluoroscopy can provide structural hierarchical information, but its resolution is limited in multi-layered structures; ultrasonic scanning is easily affected by interface morphology and differences in material acoustic impedance; and while probe-based electrical testing can detect conductivity before bonding, it suffers from high cost and potential probe damage.

[0025] In addition, the industry has introduced Design for Testability (DFT) architectures based on IEEE 1149.1 (JTAG) and IEEE 1687 (IJTAG). This approach tests the interconnect status within stacked chips by reserving test access ports on the circuit board and combining them with a reconfigurable scan network. Essentially, this method constructs a controllable "test path" within the chip, sending test signals through external ports and collecting response results to determine if the internal connections are normal. However, while this type of static testing method based on a pre-defined scan chain achieves non-destructive testing of the circuit board, it has significant limitations. Specifically, the test results are usually not further processed, failing to drive adaptive optimization and evolution of the diagnostic model, resulting in insufficient accuracy in fault diagnosis. For historical or similar faults, the matching process is cumbersome and difficult to quickly identify. Furthermore, when new or heterogeneous faults occur, existing models lack flexible constraint adjustments and incremental learning capabilities, making it difficult to effectively update diagnostic strategies, thus limiting detection speed and overall accuracy.

[0026] To address the aforementioned problems, the inventors of this application propose a circuit board fault diagnosis method. By improving the circuit board fault diagnosis method, the accuracy of circuit board fault identification is enhanced without damaging the circuit board structure, thereby solving or partially solving the above problems.

[0027] The following combination Figures 1-8 The embodiments of this application will be described in detail below.

[0028] In some embodiments, such as Figure 1 As shown, a circuit board fault diagnosis method is provided, including: S101. Obtain the first multimodal feature of the first circuit board under test.

[0029] In this step, the fault diagnosis platform (or platform) synchronously captures the multimodal feature signals of the first circuit board under test through the multimodal feature acquisition and sensing module. The first multimodal features include, but are not limited to, electrical parameters (or S-parameters), time-domain reflectometry signals, and thermal imaging features. The first circuit board under test refers to the circuit board currently undergoing the diagnostic process, i.e., the target circuit board being inspected. For example, a circuit board that has just been assembled on the production line and whose solder joints and signal integrity need to be inspected.

[0030] For example, the fault diagnosis platform uses a vector network analyzer to measure the electrical parameters of the circuit board, obtain the return loss, insertion loss and corresponding phase information, and uses a high-precision oscilloscope to acquire time-domain reflection signals, record impedance abrupt change points and reflected wave peak sequences, and monitors the surface temperature distribution and local thermal gradient of the circuit board through an infrared thermal imager or near-infrared sensor, thereby completing the acquisition of the first multimodal features.

[0031] Furthermore, to ensure the comparability and fusion effect of the modal features in the first multimodal feature set, a precision clock synchronizer can be used to calibrate the timing of each acquisition path, ensuring that signals from different modalities are acquired under a unified time reference. Optionally, after acquisition, the system formats the original multimodal signals, adds timestamps and acquisition condition information, forming a unified data structure to provide basic input for subsequent feature preprocessing and fault detection.

[0032] S102. Based on the first multimodal features, perform fault detection and determine the first fault feature vector. In this step, the fault diagnosis platform can perform preliminary screening and anomaly detection on the first multimodal features, extract key feature parameters such as time-domain peak value, frequency-domain return loss, and spatial temperature distribution, and integrate them to form the first fault feature vector, which is used to describe the potential fault modes and location characteristics of the circuit board.

[0033] Specifically, the fault diagnosis platform extracts key time-domain features such as peak value, rise time, and waveform amplitude corresponding to impedance abrupt changes in the time-domain reflected signal. Simultaneously, it performs frequency-domain analysis on electrical parameter measurement data, calculating return loss, insertion loss, phase shift, and frequency response characteristics to identify potential interconnect impedance anomalies or signal reflection anomalies. Furthermore, it performs spatial processing on thermal imaging data, extracting features such as local temperature gradients, hotspot distribution, and the area of ​​temperature anomaly regions to reflect the thermal behavior of the circuit board surface and internal interconnects. Subsequently, the system fuses and encodes these multi-source feature parameters to form a comprehensive first fault feature vector, providing high-dimensional and rich input data for subsequent diagnostic models.

[0034] S103. Perform data preprocessing on the first fault feature vector to obtain the first preprocessed feature vector.

[0035] In this step, data preprocessing refers to the process of denoising, standardizing, completing, and reducing the dimensionality of the original data before inputting the fault feature vector into the diagnostic model. Specifically, denoising, normalization, and feature encoding are performed on the first fault feature vector to compress its dimension to a low-dimensional dense vector suitable for input to the diagnostic model (i.e., the first preprocessed feature vector), while maintaining the integrity of the fault information to provide accurate input for subsequent diagnostic model inference.

[0036] Specifically, after the first fault feature vector is generated, it is first denoised using adaptive threshold filtering or sparse representation methods to eliminate the influence of measurement noise and environmental interference on the features. Then, the first fault feature vectors of different modalities are normalized to ensure uniform feature vectors for different modalities. In addition, dimensionality reduction is performed using principal component analysis or an autoencoder to compress the high-dimensional feature vectors into low-dimensional dense vectors, facilitating subsequent input into the diagnostic model. After the above preprocessing, the first preprocessed feature vector is obtained, providing reliable input for the diagnostic model.

[0037] S104. Input the first preprocessed feature vector into the pre-trained diagnostic model to perform fault diagnosis, and output the first target diagnostic result.

[0038] In this step, the diagnostic model can adaptively select the optimal judgment model, such as a three-dimensional convolutional neural network, a graph convolutional neural network, or an attention mechanism long short-term memory network, based on the attribute information of the first preprocessed feature vector, including statistical characteristics (such as mean, variance, kurtosis) and prior knowledge of the fault. It can also integrate the first preprocessed feature vector subsets of each modality for inference, predict the fault type, number of faults, location and possible impact range, and integrate the information to generate the first target diagnostic result.

[0039] S105. Input the first target diagnosis result into the knowledge graph library of the diagnosis model, and calculate the similarity with the historical fault information in the knowledge graph library to obtain the similarity.

[0040] In this step, the fault diagnosis platform inputs the initial diagnostic result into the knowledge graph database of the diagnostic model and calculates its similarity with historical fault information. By calculating the similarity between feature vectors, the degree of association between the current fault and existing cases can be determined, facilitating the assessment of the prevalence or novelty of the fault mode.

[0041] For example, the fault diagnosis platform first preprocesses the feature vectors of historical fault samples to make the feature vectors of different modalities comparable. Then, it selects an appropriate similarity measurement method based on the type of feature vector; for example, Euclidean distance or cosine similarity is used for numerical features, Hamming distance or Jaccard coefficient is used for categorical features, and a weighted fusion similarity index can be used for mixed features. The fault diagnosis platform matches the current feature vector with the feature vectors of historical samples one by one to obtain a set of similarity values, and determines whether the current fault highly matches the historical fault mode based on a similarity threshold. For instance, if the time-domain reflectance peak sequence, S-parameter curve, and thermal imaging temperature distribution of the current circuit board all have a similarity to the feature vectors of historical TSV void defect samples exceeding a preset threshold, then the current fault is determined to be highly correlated with that historical TSV void defect, thus providing a basis for subsequent fault structure type determination and diagnostic model updates.

[0042] S106. Based on the similarity, determine the structural type of the first target diagnosis result and the historical fault information, and obtain the determination result.

[0043] In this step, based on a set of similarity values ​​obtained in step S105, it is determined whether the current fault highly matches the historical fault mode according to the similarity threshold. For example, if the time-domain reflectance peak sequence, S-parameter curve, and thermal imaging temperature distribution of the current circuit board all have a similarity to the feature vector of the historical TSV void defect sample exceeding a preset threshold, then it is determined that the current fault is highly correlated with the historical TSV void defect, thereby providing a basis for subsequent fault structure type determination and diagnostic model update.

[0044] It should also be noted that, based on the calculated similarity, the structural type of the diagnostic result for the first target and the historical fault information corresponding to the current circuit board fault can be determined, such as homogeneous structure and heterogeneous structure, and a determination result can be generated.

[0045] S107. Based on the judgment result, update the knowledge graph database, and adjust the diagnostic model according to the updated knowledge graph database to obtain the updated diagnostic model.

[0046] In this step, the fault diagnosis platform updates the knowledge graph database based on the judgment results, including adding or modifying fault nodes and their associated features. Simultaneously, the updated knowledge base is used to incrementally learn or fine-tune the diagnostic model, enabling it to adapt to new fault modes and improve diagnostic accuracy and processing efficiency.

[0047] Specifically, if the similarity between the first target diagnosis result and historical fault information is below a set threshold, a new fault node is added to the knowledge graph, and the feature vector, fault type, location coordinates, acquisition time, and related process parameters corresponding to the first target diagnosis result are recorded. In this way, the model can relax the constraints on new fault modes, avoid learning rigidity caused by over-reliance on existing data, and thus improve its adaptability and diagnostic accuracy for unknown or novel faults. If the similarity is high, the weight, feature mean, or frequency of occurrence of the corresponding node in the historical fault information is updated, and the first target diagnosis result with high similarity is categorized and associated with the historical fault information to strengthen memory and prevent catastrophic forgetting.

[0048] Subsequently, the diagnostic model is trained using the updated knowledge graph through incremental learning or fine-tuning strategies. For example, for deep neural network models, the system fixes some historical weights and only adjusts the network layer weights related to new nodes or added features; for graph convolution-based models, new nodes and edges can be added to the original graph structure, while updating the feature aggregation weights of neighboring nodes. Through these operations, the model can absorb the latest fault information, achieve adaptive identification of new or unseen fault modes, improve overall diagnostic accuracy, and maintain training efficiency by only fine-tuning the newly added or changed parts, ensuring that the system can quickly respond to new circuit board testing tasks.

[0049] S108. Determine the second preprocessed feature vector of the second circuit board under test, input the second preprocessed feature vector into the updated diagnostic model for fault diagnosis, and output the second target diagnostic result.

[0050] In this step, after the model update is completed, the fault diagnosis platform repeats steps S101 to S103 to obtain the second preprocessed feature vector of the second circuit board under test, inputs it into the updated diagnostic model for inference, outputs the second target diagnostic result, and realizes the fault diagnosis of the new circuit board.

[0051] In this way, the model used for fault diagnosis of the second circuit board under test is already an updated diagnostic model. This model has been adaptively optimized and adjusted based on the experience of the previous test task. Using the updated diagnostic model for fault diagnosis results in more accurate results, and at the same time, it can gradually improve the ability to identify and process faults in high-density, multi-type interconnect structures.

[0052] The circuit board fault diagnosis method provided in this embodiment acquires the multimodal features of the circuit board under test, performs fault detection and extracts fault feature vectors, and achieves non-contact fault identification by combining data preprocessing and a pre-trained diagnostic model. At the same time, a knowledge graph library is introduced, and the diagnostic model is dynamically updated based on the similarity calculation between the detection results and historical fault information in the knowledge graph library. This enables the diagnostic model to have self-learning and continuous optimization capabilities, thereby improving the accuracy of circuit board fault identification without damaging the circuit board structure.

[0053] In some embodiments, step S108, inputting the second preprocessed feature vector into the updated diagnostic model for fault diagnosis and outputting the second target diagnostic result, includes: The new historical fault information in the updated knowledge graph database is matched with the second preprocessed feature vector. When a match is successful, the new historical fault information that matches the second preprocessed feature vector is used to determine the fault label and diagnosis path corresponding to the new historical fault information that matches the second preprocessed feature vector in the knowledge graph library after the data is updated, and the second target diagnosis result is determined based on the fault label and the diagnosis path.

[0054] Specifically, the fault diagnosis platform first obtains the latest historical fault information from the updated knowledge graph database, including newly added or finely adjusted fault nodes and their corresponding feature vectors, fault types, fault locations, and acquisition times. Then, the system performs feature matching between the second preprocessed feature vector of the second circuit board under test and the historical fault feature vectors in the knowledge graph database. Feature matching can employ various methods, such as evaluating the angular similarity between vectors by calculating cosine similarity, or measuring the spatial distance between vectors using Euclidean distance. For high-dimensional feature vectors, dimensionality-reduced principal component analysis (PCA) or Locality Sensitive Hashing (LSH) can be used to accelerate the matching calculation. The matching process considers the weight distribution of features; for example, the peak value of the time-domain signal has a higher weight than low-amplitude background noise, and the abnormal area of ​​spatial thermal imaging has a higher weight than the average temperature distribution, thus ensuring more accurate matching results.

[0055] After feature matching is completed, when a match is successful, the system will acquire historical fault information that matches the second preprocessed feature vector, including the corresponding fault label and diagnostic path. The fault label describes the specific fault type (such as TSV voids, micro-bump cracks, hybrid bond interface peeling, etc.), while the diagnostic path records the feature combination, detection conditions, and processing methods for the fault. The fault diagnosis platform generates a second target diagnostic result based on the matched fault label and diagnostic path, including information such as fault type, location coordinates, severity, and possible process deviation causes. If multiple similar historical faults exist in the matching results, the system will select the optimal match as the final diagnostic result through weighted scoring or confidence ranking.

[0056] This embodiment achieves rapid fault identification of a new circuit board (the first circuit board under test) by accurately matching the second preprocessed feature vector with historical fault information in the updated knowledge graph database. This method fully utilizes historical fault information and newly added fault nodes to achieve closed-loop optimization of the diagnostic model, improving the accuracy and efficiency of fault diagnosis.

[0057] In some embodiments, such as Figure 6 As shown, step S107 involves updating the knowledge graph database based on the determination result, including: S1071. In response to determining that the similarity is higher than a preset threshold, the structure is judged to be similar, the first target diagnosis result is associated with historical fault information, and the information is updated to the knowledge graph database.

[0058] In this step, it is determined that the current fault (the first target diagnostic result) is highly similar to the fault structure in existing historical fault information. At this point, the platform associates the first target diagnostic result with the matched historical fault information, including updating the feature vector of the fault node, fault type, location coordinates, and relevant acquisition time, while simultaneously recording the latest test conditions and process parameters. In this way, the knowledge graph base can accumulate the latest feature information of similar faults, enhancing the model's ability to identify common fault modes.

[0059] For example, suppose the first target diagnosis result shows that there is a slight void in the TSV interconnect of a certain circuit board. After calculating the similarity, it is found that the similarity of the TSV void feature vector with a historical fault information node in the knowledge graph is 0.92, which is higher than the threshold of 0.7. Then the system determines that it is a similar structure. At this time, the platform associates the first target diagnosis result with the matched historical fault information node, such as updating the average size, distribution location and corresponding test conditions of the TSV voids in the node (e.g., excitation current amplitude of 5 mA, sampling rate of 10 GSa / s). This can accumulate the latest data of this type of fault and improve the accuracy of the model in identifying TSV voids.

[0060] S1072. In response to determining that the similarity is lower than a preset threshold, and thus identifying it as a heterogeneous structure, a new fault node is established in the knowledge graph database, the first target diagnosis result is input into the new fault node, and the knowledge graph database is updated.

[0061] In this step, the system determines that the current fault belongs to a heterogeneous structure, i.e., a novel or unseen fault mode. At this point, the platform creates a new fault node in the knowledge graph database and inputs the feature vector, fault type, location coordinates, and relevant acquisition time of the first target diagnostic result into this node, while also associating it with the current detection conditions and process parameters. This operation enables the knowledge graph database to dynamically expand to cover new fault types, providing new learning samples for the diagnostic model and avoiding the learning stagnation problem caused by over-protection of the model.

[0062] For example, suppose the initial diagnostic result shows a microcrack in the edge region of the micro-bump solder joint, but the similarity of its feature vectors with all historical nodes in the knowledge graph is below the threshold of 0.7, then the system determines it to be a heterogeneous structure. In this case, the platform creates a new fault node in the knowledge graph, inputting the microcrack feature vector, crack location (e.g., solder joint in row 3, column 7), acquisition time, and process parameters (e.g., reflow soldering temperature 260℃, heating time 90s) into the new node, and establishing associations with other abnormal process parameters. This operation enables the model to learn new micro-bump crack fault modes, providing a reference for subsequent diagnosis.

[0063] This embodiment enhances the model's ability to identify common faults by associating information with similar faults; and by establishing new nodes for heterogeneous faults, it supports the diagnostic model to adaptively learn new modes, thereby improving the diagnostic model's prediction accuracy and processing speed for novel faults.

[0064] In some embodiments, before obtaining the first multimodal feature of the first circuit under test in step S101, the method further includes: The first circuit board to be tested is self-tested, and the self-test results are obtained.

[0065] In response to determining that the self-test result is abnormal, an alarm is issued and the test is terminated.

[0066] In response to determining that the self-test result is normal, the parameters of the first circuit board under test are configured according to the preset fault diagnosis task requirements.

[0067] In this step, before formally acquiring multimodal characteristics, the fault diagnosis platform needs to perform a circuit board self-test to verify the working status of the test object and the system.

[0068] For example, after the system starts up, it first performs continuity testing, power supply voltage stability testing, and signal port integrity testing on the connected first circuit board under test through the built-in hardware interface module. For example, it checks whether the power input voltage is within the rated range (e.g., 5.0±0.1V), whether the contact resistance of each probe port is less than 0.05Ω, and whether there are open circuits or short circuits in the signal path.

[0069] When the system detects an anomaly (such as the resistance value of a test channel being greater than the upper limit of 0.2Ω), it will immediately issue an audible and visual alarm, and at the same time display the message "Self-test abnormal, test terminated" on the display interface, and interrupt the subsequent data acquisition process to prevent misdiagnosis caused by loose probes, aging test fixtures or abnormal circuits under test.

[0070] If the self-test result is deemed normal, meaning all test indicators are within the preset threshold range, the system will configure the parameters of the circuit board under test according to the preset fault diagnosis task requirements. Parameter configuration includes, but is not limited to: excitation signal type (such as sine wave, pulse signal, or sweep frequency signal), sampling frequency (such as 10 GSa / s), test duration (such as 10 ms), and multi-modal synchronous acquisition strategy (such as the synchronization timing of infrared thermal imaging signal and voltage waveform).

[0071] For example, when the target task is "short circuit diagnosis of high-density multilayer interconnect circuit", the system will automatically select the high-frequency sweep frequency excitation mode and enable high-sensitivity thermal imaging synchronous acquisition to enhance the ability to identify local hot spots; while when the task is "solder joint cold solder joint detection", the system adopts low-frequency pulse excitation and high-resolution strain monitoring configuration to highlight the structural response characteristics of the solder joint.

[0072] After the parameter configuration is completed, the system will officially enter step S101 and begin to collect the multimodal features of the first circuit board under test.

[0073] This embodiment effectively improves the accuracy of fault diagnosis and system stability by introducing self-testing and parameter configuration steps. The self-testing mechanism can eliminate problems such as poor interface contact, probe failure, or power fluctuation before testing, preventing misdiagnosis and equipment damage, and ensuring that the acquired signals are true and effective.

[0074] In some embodiments, such as Figure 5 As shown, step S104, inputting the first preprocessed feature vector into the pre-trained diagnostic model for fault diagnosis and outputting the first target diagnostic result, includes: The diagnostic model includes multiple diagnostic sub-models; S1041. Extract attribute information from the first preprocessed feature vector and match the corresponding diagnostic sub-model based on the attribute information.

[0075] S1042. In response to determining the corresponding diagnostic sub-model, the first preprocessed feature vector is input into the corresponding diagnostic sub-model for fault diagnosis, and the first target diagnostic result is output.

[0076] Specifically, the diagnostic model is a hierarchical structure model, including multiple diagnostic sub-models built for different circuit characteristics or fault modes. Each diagnostic sub-model corresponds to a specific fault type or signal mode of the circuit board, such as short-circuit fault models, solder joint cold solder joint fault models, overheating fault models, circuit breakage fault models, noise interference fault models, etc. Before performing the diagnosis, the system automatically identifies the most relevant diagnostic sub-model for the object under test through attribute extraction and feature matching mechanisms, thereby achieving targeted fault analysis.

[0077] For example, in step S1041, the platform extracts attribute information from the first preprocessed feature vector. The attribute information includes, but is not limited to: signal type (voltage, current, impedance, temperature, stress, etc.), sampling frequency, spatial distribution (e.g., power layer, signal layer, ground layer), and fault characteristic morphology (abrupt, periodic, slowly changing). Based on this attribute information, a corresponding diagnostic sub-model is matched from the diagnostic model.

[0078] For example, when there are high-frequency fluctuations and resistance abrupt changes in the feature vector, the system matches the "signal channel open circuit sub-model"; when local temperature rise anomalies and power fluctuations change synchronously, it matches the "solder joint virtual weld sub-model"; if periodic noise interference signals appear in the features, it matches the "electromagnetic coupling interference sub-model".

[0079] In step S1042, in response to determining the corresponding diagnostic sub-model, the first preprocessed feature vector is input into the diagnostic sub-model for fault diagnosis. Optionally, each diagnostic sub-model employs a structure combining a multi-layer neural network and a statistical feature fusion algorithm, enabling it to identify the most relevant pattern to the type of fault in the feature space. For example, when the input features match the high confidence interval of the cold solder joint feature model, the model outputs the first target diagnostic result of "cold solder joint (confidence 95%)"; if the features match the signal channel anomaly model, it outputs specific conclusions such as "channel short circuit" or "line open circuit," and marks the corresponding fault location or device number.

[0080] It is also important to note that in practical applications, diagnostic models can simultaneously integrate multimodal information such as electrical signals, thermal signals, and image signals. For example, when an abnormal voltage waveform is detected simultaneously by infrared thermography, the system will automatically select a "multimodal fusion sub-model" and perform feature overlay analysis on the abnormal area through a deep fusion network, thereby arriving at a more accurate diagnostic conclusion. Ultimately, the system's first-target diagnostic result includes not only the fault type but also the location coordinates, associated feature parameters, and confidence score, ensuring the results are interpretable and traceable.

[0081] This embodiment breaks down the overall diagnostic model into multiple diagnostic sub-models, which can call the most suitable analysis network for different feature patterns, avoiding recognition errors caused by feature mixing in a single model, thereby improving the recognition accuracy of complex circuit faults; at the same time, by selecting the optimal sub-model based on the attribute information in the first preset feature vector, dynamic model scheduling is achieved, which effectively reduces computational redundancy and diagnostic delay.

[0082] In some embodiments, such as Figure 2 As shown, step S102, which involves fault detection based on the first multimodal features and determination of the first fault feature vector, includes: S1021. Acquire the first multimodal feature sequence of the first circuit board under test collected within a predetermined time period.

[0083] In this step, after completing the self-test and parameter configuration of the first circuit board under test, the platform begins to collect multimodal features of the circuit board in real time within a set sampling period. The multimodal features may include, but are not limited to, voltage, current, impedance, spectrum, temperature, image signals, etc. In order to more accurately capture the dynamic response during the circuit operation, the system continuously collects multimodal data within a predetermined time period to form a complete first multimodal feature sequence.

[0084] S1022. Based on the temporal changes of the first multimodal feature sequence, perform anomaly feature judgment.

[0085] For example, the platform judges abnormal features based on the temporal variation patterns of the first multimodal feature sequence. By introducing an anomaly detection algorithm based on time-series analysis, it comprehensively analyzes indicators such as trend changes, transient fluctuations, and periodic stability in the first multimodal feature sequence to identify abnormal deviation points. For example, when the voltage fluctuation frequency increases abnormally, the current waveform distortion rate rises, or the impedance curve shows abnormal jumps, the system will determine that there are potential abnormal features.

[0086] S1023. In response to determining that there are abnormal features, the abnormal features are extracted as a first fault feature vector.

[0087] For example, after detecting an anomaly, the platform further extracts a representative set of parameters from the anomaly features as a "first fault feature vector". This vector not only contains the specific numerical features of the anomaly parameters, but also information such as timestamps, modal sources, and rates of change, in order to fully reflect the dynamic response characteristics of the circuit board under fault conditions.

[0088] For example, in circuit board current monitoring, if the current of a certain channel is detected to jump from a steady state of 1.5A to 3A within 50 ms and is accompanied by a sudden change in impedance phase angle, then parameters such as "current amplitude change rate", "impedance phase offset" and "duration of change" are extracted to form the corresponding first fault feature vector, which is used in the subsequent model diagnosis stage.

[0089] This embodiment collects multimodal feature sequences within a predetermined time period and then synchronously records the dynamic responses of different sensing channels, realizing the comprehensive fusion of multidimensional information such as electrical signals, thermal signals, and image signals, avoiding the omission of potential hidden dangers by single-modal detection; at the same time, it also uses time series analysis methods to judge the trend of feature sequence changes, enabling the system to distinguish the difference between "transient disturbances" and "real faults".

[0090] In some embodiments, such as Figure 3 As shown, step S103 involves preprocessing the first fault feature vector to obtain a first preprocessed feature vector, including: S1031. Perform initial filtering on the noise of the fault feature vector to obtain the initial filtering result.

[0091] In this step, after extracting the first fault feature vector, the platform performs initial filtering on the noise components it contains. This initial filtering is mainly used to remove random environmental noise, instrument background noise, and high-frequency disturbances caused by external electromagnetic interference during signal acquisition. For example, the system can use band-limited filtering or wavelet denoising methods to confine the feature signal within the expected frequency band, thereby obtaining the initial filtering result.

[0092] S1032. In response to detecting that the noise component amplitude of the initial filtering result exceeds a preset threshold, an adaptive filtering algorithm is used to perform dynamic noise reduction processing on the initial filtering result, and a preprocessed noise reduction feature vector is output.

[0093] Specifically, the platform performs residual noise detection on the initially filtered signal (i.e., the initial filtering result). If noise components with amplitudes exceeding a preset threshold are detected in the initial filtering result, the system automatically triggers the adaptive filtering module to perform dynamic noise reduction processing on the signal. Furthermore, the adaptive filtering algorithm can dynamically adjust filtering parameters, such as step size factor and weight update rate, based on real-time noise distribution characteristics, enabling the system to maintain a stable signal-to-noise ratio under different test scenarios. For example, when the intensity of external electromagnetic interference fluctuates significantly, the algorithm can automatically converge to the optimal filtering state, maximizing the preservation of effective information about the true fault characteristics.

[0094] S1033. Determine the first preprocessed feature vector based on the preprocessed noise reduction feature vector.

[0095] Specifically, after denoising, the output signal is reconstructed into a preprocessed denoising feature vector, and the final first preprocessed feature vector is further determined based on this preprocessed denoising feature vector. Optionally, this determination process may also include normalization operations in the signal amplitude and frequency domains, as well as scale matching and feature alignment for different modal data, so that multimodal features can be co-expressed in a unified data space. For example, Z-score normalization is used for voltage modes, and pixel grayscale equalization is used for image modes to ensure consistent feature amplitudes and comparable statistical characteristics between different data sources.

[0096] For example, when detecting short-circuit faults on a circuit board, the original signal in the current path may contain periodic high-frequency noise. The system first removes invalid frequency band signals through bandpass filtering. If the residual noise amplitude exceeds 2mV (above the threshold), an adaptive filter is activated to perform dynamic noise reduction. After algorithm optimization, the signal waveform becomes stable, and the distortion is significantly reduced. Then, through normalization and feature fusion, a first preprocessed feature vector that can be directly input into the diagnostic model is finally formed.

[0097] This embodiment achieves efficient conversion from noise signals to standardized feature vectors through the above-mentioned multi-stage noise reduction preprocessing mechanism, providing an accurate and reliable data foundation for the diagnostic model.

[0098] In some embodiments, such as Figure 4 As shown, the preprocessed noise reduction feature vector is a multimodal preprocessed noise reduction feature vector; step S1033, determining the first preprocessed feature vector based on the preprocessed noise reduction feature vector, further includes: S10331. Determine the preprocessing noise reduction feature vectors of at least two modes that differ from each other in the preprocessing noise reduction feature vectors of each mode.

[0099] S10332. For the preprocessed noise reduction feature vectors of at least two different modes, perform mean and variance standardization to obtain a unified feature vector of at least two modes.

[0100] S10333, Use the feature vectors of at least two unified modalities as the first preprocessed feature vectors.

[0101] Specifically, in this embodiment, for step S1033 "determining the first preprocessed feature vector based on the preprocessed noise reduction feature vector", the system further normalizes and fuses the preprocessing results between different modalities to ensure the global consistency and cross-modal comparability of the input data.

[0102] Specifically, after preliminary noise filtering and adaptive denoising, multimodal preprocessed denoising feature vectors are obtained, including electrical parameter modes, temporal modes, and thermal imaging modes. Since the data sources, dimensions, and distributions of different modes vary significantly, directly inputting them into the diagnostic model may cause weight shifts in some modal features during feature fusion, thus affecting the overall accuracy of fault identification.

[0103] Therefore, it is necessary to identify mode groups with differences in the preprocessed noise reduction feature vectors of each mode (i.e., modes with significant differences in mean, variance, or numerical distribution range between at least two modes). For example, the value range of the electrical parameter mode is in the millivolt range, while the value range of the thermal imaging mode is in the hundreds of gray levels. After identifying such differential modes, the platform performs mean-variance standardization on them.

[0104] For example, the system performs a formulaic normalization operation on the feature vectors of each modality:

[0105] Where X is the original modal feature value, μ is the sample mean of the modality, and σ is the standard deviation.

[0106] After this processing, the features of each modality are remapped in the same statistical space, and their numerical distribution centers are unified within the unit variance range, thereby achieving cross-modal scale alignment. Optionally, during this standardization process, normalization strategies can be set separately according to different data types (such as waveform data, image data, and spectral data) to maximize the preservation of intra-modal feature differences and avoid information loss.

[0107] Finally, the unified feature vectors of at least two modalities are fused to form a first preprocessed feature vector that can be directly used by the diagnostic model.

[0108] This embodiment introduces a mean-variance standardization method for differential modes, which achieves scale unification and efficient fusion of multimodal features. This not only improves the diagnostic model's comprehensive perception of multi-source features, but also provides a more robust feature foundation for subsequent fault identification and feature matching.

[0109] It should be noted that the method in this embodiment can be executed by a single device, such as a computer or server. The method can also be applied in a distributed scenario, where multiple devices cooperate to complete the task. In such a distributed scenario, one of these devices may execute only one or more steps of the method in this embodiment, and the multiple devices will interact with each other to complete the method described.

[0110] It should be noted that the above description describes some embodiments of this application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in a different order than that shown in the above embodiments and still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require a specific or sequential order to achieve the desired result. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0111] Based on the same inventive concept, such as Figure 7 As shown, corresponding to the methods of any of the above embodiments, this application also provides a circuit board fault diagnosis platform, including: The multimodal feature acquisition module is configured to acquire the first multimodal features of the first circuit board under test. The fault detection and feature extraction module is configured to: perform fault detection based on the first multimodal features and determine the first fault feature vector; The data preprocessing module is configured to: perform data preprocessing on the first fault feature vector to obtain a first preprocessed feature vector; The diagnostic model module is configured to receive the first preprocessed feature vector and input it into a pre-trained diagnostic model to perform fault diagnosis, and output the first target diagnostic result. The model optimization module is configured to: input the first target diagnosis result into the knowledge graph library of the diagnosis model, and calculate the similarity with the historical fault information in the knowledge graph library to obtain a similarity; determine the structural type of the first target diagnosis result and the historical fault information based on the similarity, and obtain a determination result; update the knowledge graph library based on the determination result, and adjust the diagnosis model according to the updated knowledge graph library to obtain an updated diagnosis model; The data preprocessing module is also configured to: determine the second preprocessed feature vector of the second circuit board under test; The diagnostic model module is also configured to input the second preprocessed feature vector into the updated diagnostic model for fault diagnosis and output the second target diagnostic result.

[0112] For example, the circuit board fault diagnosis platform can be executed by an embedded processor, including a multimodal feature acquisition module, a fault detection and feature extraction module, a data preprocessing module, a diagnostic model module, and a model optimization module. The multimodal feature acquisition module is used to simultaneously acquire multimodal data such as electrical signals, thermal imaging features, optical signals, and acoustic features of each circuit board under test, and to achieve synchronization of the data through time base calibration. The fault detection and feature extraction module performs time-series analysis and anomaly detection based on the acquired multimodal features. When an abnormal feature is detected, it is encoded into a fault feature vector to describe the potential fault modes and location characteristics of the circuit board.

[0113] The data preprocessing module performs preliminary filtering and adaptive noise reduction on the fault feature vectors, and standardizes the mean and variance of feature vectors from different modalities to achieve a unified representation of multimodal features. The final output is a first preprocessed feature vector that can be directly used in the diagnostic model. The diagnostic model module includes multiple diagnostic sub-models. It matches the corresponding sub-model based on the attribute information of the input feature vectors, performs inference operations, and outputs the target diagnostic result, including the fault type, location, and severity (range of impact). The model optimization module receives the diagnostic results and compares them with historical fault information in the knowledge graph. When the similarity is higher than a preset threshold, it updates the association information of existing nodes; when the similarity is lower than the threshold, it creates a new fault node in the knowledge graph and records the feature vector and related parameters, realizing the platform's dynamic self-learning and knowledge base expansion.

[0114] This embodiment achieves efficient acquisition, anomaly detection, and feature fusion of multimodal features of circuit boards through the above structural design. Combined with a hierarchical diagnostic model and a dynamic knowledge graph update mechanism, the platform can adapt to the fault modes of different types of circuit boards and continuously optimize diagnostic accuracy and processing speed. This supports intelligent fault diagnosis and rapid location of high-density, multi-type interconnection structures, improving the overall reliability and adaptability of the detection.

[0115] In some embodiments, such as Figure 7 As shown, the multimodal feature acquisition module 100 is further configured to: perform a self-test on the first circuit board to be tested and obtain a self-test result; in response to determining that the self-test result is abnormal, issue an alarm and terminate the test; in response to determining that the self-test result is normal, configure parameters of the first circuit board to be tested according to preset fault diagnosis task requirements; or, The fault detection and feature extraction module 200 is further configured to: acquire a first multimodal feature sequence of the first circuit board under test collected within a predetermined time period; determine abnormal features based on the temporal changes of the first multimodal feature sequence; and, in response to determining the existence of abnormal features, extract the abnormal features as a first fault feature vector; or, The data preprocessing module 300 is further configured to: perform initial filtering on the noise of the fault feature vector to obtain an initial filtering result; in response to detecting that the noise component amplitude of the initial filtering result exceeds a preset threshold, perform dynamic noise reduction processing on the initial filtering result using an adaptive filtering algorithm and output a preprocessed noise reduction feature vector; determine the first preprocessed feature vector based on the preprocessed noise reduction feature vector; or, The data preprocessing module 300 is further configured to: determine at least two modal preprocessing denoising feature vectors that differ from each modality's preprocessing denoising feature vectors; perform mean-variance standardization on the at least two modal preprocessing denoising feature vectors that differ to obtain unified feature vectors for at least two modalities; and use the unified feature vectors for at least two modalities as the first preprocessing feature vector; or, The diagnostic model module 400 is further configured to: extract attribute information from the first preprocessed feature vector and match a corresponding diagnostic sub-model based on the attribute information; in response to determining the corresponding diagnostic sub-model, input the first preprocessed feature vector into the corresponding diagnostic sub-model for fault diagnosis and output a first target diagnostic result; or, The diagnostic model module 400 is further configured to: perform feature matching between the new historical fault information in the updated knowledge graph library and the second preprocessed feature vector; when a match is successful, determine the fault label and diagnostic path corresponding to the new historical fault information in the updated knowledge graph library that matches the second preprocessed feature vector, and determine the second target diagnostic result based on the fault label and the diagnostic path; or, The model optimization module 500 is further configured to: in response to determining that the similarity is higher than a preset threshold, identify the structure as similar, associate the first target diagnosis result with historical fault information, and update the knowledge graph library; in response to determining that the similarity is lower than a preset threshold, identify the structure as heterogeneous, establish a new fault node in the knowledge graph library, input the first target diagnosis result into the new fault node, and update the knowledge graph library.

[0116] For ease of description, the above platform is described in terms of its functions, divided into various modules. Of course, in implementing this application, the functions of each module can be implemented in one or more software and / or hardware.

[0117] The platform described above is used to implement the corresponding circuit board fault diagnosis method in any of the foregoing embodiments, and has the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0118] Based on the same inventive concept, corresponding to the methods of any of the above embodiments, this application also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the circuit board fault diagnosis method described in any of the above embodiments.

[0119] Figure 8 This embodiment illustrates a more specific hardware structure of an electronic device. The device may include a processor 1010, a memory 1020, an input / output interface 1030, a communication interface 1040, and a bus 1050. The processor 1010, memory 1020, input / output interface 1030, and communication interface 1040 are interconnected internally via the bus 1050.

[0120] The processor 1010 can be implemented using a general-purpose CPU (Central Processing Unit), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this specification.

[0121] The memory 1020 can be implemented in the form of ROM (Read Only Memory), RAM (Random Access Memory), static storage device, dynamic storage device, etc. The memory 1020 can store the operating system and other applications. When the technical solutions provided in the embodiments of this specification are implemented by software or firmware, the relevant program code is stored in the memory 1020 and is called and executed by the processor 1010.

[0122] The input / output interface 1030 is used to connect input / output modules to realize information input and output. Input / output modules can be configured as components within the device (not shown in the figure) or externally connected to the device to provide corresponding functions. Input devices may include keyboards, mice, touchscreens, microphones, various sensors, etc., while output devices may include displays, speakers, vibrators, indicator lights, etc.

[0123] The communication interface 1040 is used to connect a communication module (not shown in the figure) to enable communication between this device and other devices. The communication module can communicate via wired means (such as USB, Ethernet cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.).

[0124] Bus 1050 includes a pathway for transmitting information between various components of the device, such as processor 1010, memory 1020, input / output interface 1030, and communication interface 1040.

[0125] It should be noted that although the above-described device only shows the processor 1010, memory 1020, input / output interface 1030, communication interface 1040, and bus 1050, in specific implementations, the device may also include other components necessary for normal operation. Furthermore, those skilled in the art will understand that the above-described device may only include the components necessary for implementing the embodiments of this specification, and not necessarily all the components shown in the figures.

[0126] The electronic devices described above are used to implement the corresponding circuit board fault diagnosis methods in any of the foregoing embodiments, and have the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0127] Based on the same inventive concept, corresponding to the methods of any of the above embodiments, this application also provides a non-transitory computer-readable storage medium storing computer instructions for causing the computer to execute the circuit board fault diagnosis method as described in any of the above embodiments.

[0128] The computer-readable medium of this embodiment includes permanent and non-permanent, removable and non-removable media, and information storage can be implemented by any method or technology. Information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transfer medium that can be used to store information accessible by a computing device.

[0129] The computer instructions stored in the storage medium of the above embodiments are used to cause the computer to execute the circuit board fault diagnosis method as described in any of the above embodiments, and have the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0130] Based on the same concept, corresponding to any of the above embodiments, this application also provides a computer program product, including computer program instructions, which, when run on a computer, cause the computer to perform the method described in any of the above embodiments, and have the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0131] It is understood that before using the technical solutions of the various embodiments in this application, users will be informed of the type, scope of use, and usage scenarios of the personal information involved in an appropriate manner, and user authorization will be obtained.

[0132] For example, upon receiving a user's active request, a prompt message is sent to the user to explicitly inform them that the requested operation will require the acquisition and use of the user's personal information. This allows the user to independently choose, based on the prompt message, whether to provide personal information to the software or hardware such as electronic devices, applications, servers, or storage media performing the operations described in this application.

[0133] As an optional but not limited implementation, in response to a user's active request, sending a prompt message to the user can be done via a pop-up window, where the prompt message can be presented in text format. Furthermore, the pop-up window can also include a selection control allowing the user to choose "agree" or "disagree" to provide personal information to the electronic device.

[0134] It is understood that the above notification and user authorization process are merely illustrative and do not constitute a limitation on the implementation of this application. Other methods that comply with relevant laws and regulations may also be applied to the implementation of this application.

[0135] Those skilled in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of this application (including the claims) is limited to these examples; within the framework of this application, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of different aspects of the embodiments of this application as described above, which are not provided in the details for the sake of brevity.

[0136] Additionally, to simplify the description and discussion, and to avoid obscuring the embodiments of this application, the well-known power / ground connections to integrated circuit (IC) chips and other components may or may not be shown in the provided drawings. Furthermore, the apparatus may be shown in block diagram form to avoid obscuring the embodiments of this application, and this also takes into account the fact that the details of the implementation of these block diagram apparatuses are highly dependent on the platform on which the embodiments of this application will be implemented (i.e., these details should be fully understood by those skilled in the art). While specific details (e.g., circuits) have been set forth to describe exemplary embodiments of this application, it will be apparent to those skilled in the art that the embodiments of this application can be implemented without these specific details or with variations thereof. Therefore, these descriptions should be considered illustrative rather than restrictive.

[0137] Although this application has been described in conjunction with specific embodiments thereof, many substitutions, modifications, and variations of these embodiments will be apparent to those skilled in the art from the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may be used with the embodiments discussed.

[0138] The embodiments of this application are intended to cover all such substitutions, modifications, and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the embodiments of this application should be included within the protection scope of this application.

Claims

1. A circuit board fault diagnosis method, characterized in that, include: Obtain the first multimodal features of the first circuit board under test; Fault detection is performed based on the first multimodal features, and a first fault feature vector is determined. The first fault feature vector is preprocessed to obtain a first preprocessed feature vector. The first preprocessed feature vector is input into the pre-trained diagnostic model for fault diagnosis, and the first target diagnostic result is output. The first target diagnosis result is input into the knowledge graph library of the diagnosis model, and the similarity is calculated with the historical fault information in the knowledge graph library to obtain the similarity. Based on the similarity, the structural type of the first target diagnosis result and historical fault information is determined, and the determination result is obtained; Based on the judgment result, the knowledge graph database is updated, and the diagnostic model is adjusted according to the updated knowledge graph database to obtain the updated diagnostic model. The second preprocessed feature vector of the second circuit board under test is determined, and the second preprocessed feature vector is input into the updated diagnostic model for fault diagnosis, and the second target diagnostic result is output.

2. The circuit board fault diagnosis method according to claim 1, characterized in that, The step of inputting the second preprocessed feature vector into the updated diagnostic model for fault diagnosis and outputting the second target diagnostic result includes: The new historical fault information in the updated knowledge graph database is matched with the second preprocessed feature vector. When a match is successful, the new historical fault information that matches the second preprocessed feature vector is used to determine the fault label and diagnosis path corresponding to the new historical fault information that matches the second preprocessed feature vector in the knowledge graph library after the data is updated, and the second target diagnosis result is determined based on the fault label and the diagnosis path.

3. The circuit board fault diagnosis method according to claim 1, characterized in that, The step of updating the knowledge graph database based on the determination result includes: When the similarity is determined to be higher than a preset threshold, it is determined to be a similar structure, the first target diagnosis result is associated with historical fault information, and the information is updated to the knowledge graph database; In response to the determination that the similarity is lower than a preset threshold, and the structure is identified as heterogeneous, a new fault node is created in the knowledge graph database, the first target diagnosis result is input into the new fault node, and the knowledge graph database is updated.

4. The circuit board fault diagnosis method according to claim 1, characterized in that, Before acquiring the first multimodal feature of the first circuit under test, the method further includes: Perform a self-test on the first circuit board to be tested and obtain the self-test result; In response to determining that the self-test result is abnormal, an alarm is issued and the test is terminated; In response to determining that the self-test result is normal, the parameters of the first circuit board under test are configured according to the preset fault diagnosis task requirements.

5. The circuit board fault diagnosis method according to claim 1, characterized in that, The step of inputting the first preprocessed feature vector into a pre-trained diagnostic model for fault diagnosis and outputting the first target diagnostic result includes: The diagnostic model includes multiple diagnostic sub-models; Attribute information is extracted from the first preprocessed feature vector, and the corresponding diagnostic sub-model is matched based on the attribute information; In response to determining the corresponding diagnostic sub-model, the first preprocessed feature vector is input into the corresponding diagnostic sub-model for fault diagnosis, and the first target diagnostic result is output.

6. The circuit board fault diagnosis method according to claim 1, characterized in that, The step of detecting faults and determining the first fault feature vector based on the first multimodal features includes: Acquire the first multimodal feature sequence of the first circuit board under test collected within a predetermined time period; Based on the temporal changes of the first multimodal feature sequence, anomaly feature judgment is performed; In response to the determination of the existence of abnormal features, the abnormal features are extracted as a first fault feature vector.

7. The circuit board fault diagnosis method according to claim 1, characterized in that, The step of preprocessing the first fault feature vector to obtain a first preprocessed feature vector includes: The noise of the fault feature vector is initially filtered to obtain the initial filtering result; In response to the detection that the noise component amplitude of the initial filtering result exceeds a preset threshold, an adaptive filtering algorithm is used to dynamically denoise the initial filtering result and output a preprocessed denoising feature vector. The first preprocessed feature vector is determined based on the preprocessed noise reduction feature vector.

8. The circuit board fault diagnosis method according to claim 7, characterized in that, The preprocessed noise reduction feature vector is a multimodal preprocessed noise reduction feature vector; the step of determining the first preprocessed feature vector based on the preprocessed noise reduction feature vector further includes: Identify the preprocessed noise reduction feature vectors of at least two modes that differ from each other in the preprocessed noise reduction feature vectors; For the preprocessed noise reduction feature vectors of at least two different modalities, mean-variance standardization is performed to obtain unified feature vectors of at least two modalities. The feature vectors of at least two unified modalities are used as the first preprocessed feature vectors.

9. A circuit board fault diagnosis platform, characterized in that, include: The multimodal feature acquisition module is configured to acquire the first multimodal features of the first circuit board under test. The fault detection and feature extraction module is configured to: perform fault detection based on the first multimodal features and determine the first fault feature vector; The data preprocessing module is configured to: perform data preprocessing on the first fault feature vector to obtain a first preprocessed feature vector; The diagnostic model module is configured to receive the first preprocessed feature vector and input it into a pre-trained diagnostic model to perform fault diagnosis, and output the first target diagnostic result. The model optimization module is configured to: input the first target diagnosis result into the knowledge graph library of the diagnosis model, and perform similarity calculation with the historical fault information in the knowledge graph library to obtain a similarity; determine the structural type of the first target diagnosis result and the historical fault information based on the similarity, and obtain a determination result; Based on the judgment result, the knowledge graph database is updated, and the diagnostic model is adjusted according to the updated knowledge graph database to obtain the updated diagnostic model. The data preprocessing module is also configured to: determine the second preprocessed feature vector of the second circuit board under test; The diagnostic model module is also configured to input the second preprocessed feature vector into the updated diagnostic model for fault diagnosis and output the second target diagnostic result.

10. The circuit board fault diagnosis platform according to claim 9, characterized in that, The multimodal feature acquisition module is further configured to: perform a self-test on the first circuit board under test and obtain a self-test result; in response to determining that the self-test result is abnormal, issue an alarm and terminate the test; in response to determining that the self-test result is normal, configure parameters of the first circuit board under test according to preset fault diagnosis task requirements; or, The fault detection and feature extraction module is further configured to: acquire a first multimodal feature sequence of the first circuit board under test collected within a predetermined time period; and determine abnormal features based on the temporal changes of the first multimodal feature sequence. In response to the determination of the existence of abnormal features, the abnormal features are extracted as a first fault feature vector; or, The data preprocessing module is further configured to: perform initial filtering on the noise of the fault feature vector to obtain an initial filtering result; in response to detecting that the noise component amplitude of the initial filtering result exceeds a preset threshold, use an adaptive filtering algorithm to perform dynamic noise reduction processing on the initial filtering result and output a preprocessed noise reduction feature vector; and determine the first preprocessed feature vector based on the preprocessed noise reduction feature vector. or, The data preprocessing module is further configured to: determine the preprocessing denoising feature vectors of at least two modalities that differ from each other in the preprocessing denoising feature vectors of each modality; perform mean-variance standardization on the preprocessing denoising feature vectors of the at least two modalities that differ from each other to obtain a unified feature vector of at least two modalities; and use the unified feature vector of at least two modalities as the first preprocessing feature vector. or, The diagnostic model module is further configured to: extract attribute information from the first preprocessed feature vector and match a corresponding diagnostic sub-model based on the attribute information; in response to determining the corresponding diagnostic sub-model, input the first preprocessed feature vector into the corresponding diagnostic sub-model for fault diagnosis and output a first target diagnostic result; or, The diagnostic model module is further configured to: perform feature matching between the new historical fault information in the updated knowledge graph library and the second preprocessed feature vector; when a match is successful, determine the fault label and diagnostic path corresponding to the new historical fault information in the updated knowledge graph library that matches the second preprocessed feature vector, and determine the second target diagnostic result based on the fault label and the diagnostic path; or, The model optimization module is also configured to: in response to determining that the similarity is higher than a preset threshold, identify the structure as similar, associate the first target diagnosis result with historical fault information, and update the knowledge graph database; In response to the determination that the similarity is lower than a preset threshold, and the structure is identified as heterogeneous, a new fault node is created in the knowledge graph database, the first target diagnosis result is input into the new fault node, and the knowledge graph database is updated.

11. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the method as described in any one of claims 1 to 9.

12. A non-transitory computer-readable storage medium storing computer instructions, characterized in that, The computer instructions are used to cause the computer to perform the method according to any one of claims 1 to 9.

13. A computer program product comprising computer program instructions, characterized in that, When the computer program instructions are executed on a computer, the computer causes the computer to perform the method as described in any one of claims 1-9.

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