3D modeling method for simulating influence of back drilling hole offset on via hole performance

Abstract

The invention relates to a 3D modeling method for simulating the influence of back drilling hole offset on via hole performance, which comprises the following steps: constructing a via hole 3D model containing via hole stumps and a back drilling tool 3D model, enabling the central axes of the two models to be collinear and aligned to form an initial position, simulating a hole position error through a horizontal direction offset variable, generating a back drilling via hole model with offset through Boolean subtraction operation, and calculating the influence of the back drilling hole offset on the via hole performance. And scanning, simulating and monitoring the electrical performance indexes under different offsets. According to the invention, the actual scene of back drilling processing is precisely restored, so that the offset error simulation is more suitable for the actual production; the technical problem that the influence of the back drilling hole offset on the via hole performance is difficult to quantify in the prior art is solved, an objective basis is provided for judging a reasonable offset range, and the reliability of the device is improved. Therefore, a board factory is helped to avoid via hole signal quality degradation caused by excessive offset, and the production yield and the signal transmission stability of the high-speed PCB are improved.

Description

Technical Field

[0001] This invention relates to the field of circuit board technology, and more specifically, to a 3D modeling method for simulating the effect of back-drill hole offset on via performance. Background Technology

[0002] Printed circuit boards (PCBs) serve as the core physical support and signal transmission carrier of electronic products. Their performance directly determines the operational stability of electronic devices, especially in high-speed signal transmission scenarios. Vias, as key connections between signals from different layers in the vertical direction, are crucial for signal integrity. To avoid interference from via residual spikes on high-speed signals, back-drilling has become a common optimization method in the industry. By using a drill bit larger than the via diameter to remove excess spikes, signal reflection and attenuation are reduced, ensuring signal transmission quality. As electronic devices develop towards higher frequencies and higher integration, the precision requirements for PCB via back-drilling are becoming increasingly stringent. The accuracy of the back-drilling process is directly related to the overall signal transmission efficiency and reliability of the product.

[0003] In actual production, back-drilling inevitably produces hole position offset errors. The magnitude of the offset directly affects the removal effect of residual piles through the hole. When the offset exceeds the reasonable range, it is easy for a single residual pile to be unable to be completely back-drilled, which in turn leads to a sudden change in through-hole impedance, a sharp increase in high-frequency loss, and a serious deterioration of high-speed signal quality.

[0004] However, the industry lacks an effective method to accurately simulate the offset state of back-drilled holes, making it difficult to quantify the impact of different offset degrees on signal transmission. This results in PCB manufacturers lacking scientific offset constraint standards during production, relying solely on experience to adjust process parameters, which affects production efficiency and easily leads to poor consistency of PCB via performance and low yield, failing to meet the stringent signal quality requirements of high-speed electronic devices.

[0005] The above problems are worth solving. Summary of the Invention

[0006] In order to overcome the lack of an effective method for accurately simulating the back-drill hole offset state in the existing technology, the present invention provides a 3D modeling method for simulating the impact of back-drill hole offset on the through-hole performance.

[0007] The technical solution of this invention is as follows: A 3D modeling method for simulating the effect of back-drilling offset on via performance includes the following steps: Step 1: Construct a 3D model of the borehole containing the remaining pile; Step 2: Construct a 3D model of the back drill bit; Step 3: Model alignment and combination; Align the back drill bit 3D model with the through hole 3D model so that the signal through hole center axis of the through hole 3D model is collinear with the center axis of the back drill bit 3D model, forming the initial position before offset. Step 4: Set the horizontal offset variable for the back drill bit; Select the 3D model of the back drill bit in its initial position and simulate its horizontal movement to simulate the hole position offset error of the back drill bit relative to the centerline of the signal through hole. Step 5: Generate a 3D model of the back-drilled through hole; Perform a Boolean subtraction operation on the via 3D model and the back drill bit 3D model after setting the offset, subtract the back drill bit 3D model from the via 3D model, and obtain a back drill via 3D model with adjustable back drill hole offset. Step 6: Scanning simulation analysis; The electrical performance indicators under different offsets are monitored by scanning simulation. Specifically, the moving variable is scanned and simulated to monitor the electrical performance indicators of the back-drilled through-hole 3D model under different moving variable values.

[0008] In a preferred embodiment of the present invention, the via 3D model is a differential via 3D model, including two signal vias that are not back-drilled; correspondingly, there are two back-drilling 3D models, and the two back-drilling 3D models correspond one-to-one with the two signal vias.

[0009] In a preferred embodiment of the present invention, step 2, constructing the 3D model of the back drill bit, specifically includes the following steps: Step 201: Construct a columnar body, wherein the aperture of the columnar body is larger than the aperture of the signal via in the via 3D model; Step 202: Perform chamfering on the back-drilling working end of the columnar body to form a structure that simulates the drill bit tip, and obtain a 3D model of the back-drilling drill bit.

[0010] Furthermore, the chamfering process adopts a symmetrical chamfering method, with the left and right distances of the chamfer being equal, and the distance parameters are set according to the actual size of the back drill bit.

[0011] In a preferred embodiment of the present invention, step 3 specifically includes the following steps: Step 301: Establish a three-dimensional coordinate system, set the central axis of the 3D model of the through hole as the reference axis, make the reference axis collinear with the preset coordinate axis of the three-dimensional coordinate system, and take the center point of the signal through hole to be drilled as the origin of the coordinate system to complete the reference positioning. Step 302: Adjust the orientation of the back drill bit 3D model so that its back drill working end is aligned with the through hole residual pile side of the through hole 3D model, and make the back drill bit 3D model and the area to be drilled of the through hole 3D model partially overlap, with the overlap length being consistent with the preset length to be drilled of the through hole. Step 303: Align the central axis of the back drill bit 3D model with the reference axis, and define the horizontal direction perpendicular to the reference axis as the offset movement direction of the back drill bit 3D model.

[0012] Furthermore, when performing step 4, the 3D model of the back drill bit in the initial position is set as a movable object. Based on the established three-dimensional coordinate system, the horizontal direction defined in step 303 is the preset offset coordinate axis. The offset of the 3D model of the back drill bit in the preset offset coordinate axis direction is set to D, D≥0, and the offset in the other two coordinate axis directions is fixed to 0.

[0013] In a preferred embodiment of the present invention, in step 6, the unit of the moving variable is set to mil, and the scanning range and scanning step size of the variable are set.

[0014] In a preferred embodiment of the present invention, when the via 3D model is a differential via 3D model, the two back drill bit 3D models are synchronously set with the same movement variable and move along the same horizontal direction.

[0015] In a preferred embodiment of the present invention, the electrical performance indicators include via impedance, insertion loss, and return loss.

[0016] In a preferred embodiment of the present invention, step 7 is further included: based on the electrical performance index results, find the offset corresponding to the sudden change in the electrical performance index, and determine the offset as the maximum allowable offset of the back drilling hole.

[0017] According to the above-described solution, the beneficial effects of this invention are as follows: This invention accurately recreates the actual scenario of back drilling by using a collinear alignment method of the central axis, 3D modeling that fits the actual drill bit structure, and setting an offset variable in a single horizontal direction. This makes the offset error simulation more in line with actual production and avoids the simulation from being out of touch with the actual working conditions. This invention, through scanning simulation of moving variables, monitors electrical performance indicators in real time and establishes a clear correlation between back-drill offset and via signal transmission performance, thus solving the technical problem in the prior art that the impact of back-drill offset on via performance is difficult to quantify. Based on the dynamic changes of electrical performance indicators and the observation of model structure during the simulation process, this invention can accurately locate the critical offset state corresponding to the incomplete back drilling of the residual pile through the hole, and provide an objective basis for judging the reasonable offset range. Therefore, the correlation between the offset and electrical performance output by this invention can directly provide a constraint standard for the back-drilling offset of circuit boards, helping board manufacturers avoid the degradation of via signal quality caused by excessive offset, and improve the production yield and signal transmission stability of high-speed PCB boards. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the method flow of the present invention; Figure 2 This is a schematic diagram of the 3D model of the via. Figure 3 This is a schematic diagram showing the combination of the 3D model of the through hole and the 3D model of the back drill bit. Figure 4 This is a schematic diagram of the structure with different offsets of the back drill hole in a specific embodiment; Figure 5 This is an impedance curve of the back-drill hole offset within the allowable range in a specific embodiment. Figure 6 This is a loss curve diagram of the back drill hole offset within the allowable range in a specific embodiment; Figure 7 This is an impedance curve diagram showing the case where the back-drill hole offset exceeds the allowable value in a specific embodiment. Figure 8 This is a loss curve diagram for a specific embodiment where the back-drill hole offset exceeds the allowable value.

[0019] In the diagram, 1. Signal via; 11. Residual via pile; 2. Ground via; 3. 3D model of back drill bit; 31. Chamfer. Detailed Implementation

[0020] To better understand the purpose, technical solution, and technical effects of this invention, the invention will be further explained and described below in conjunction with the accompanying drawings and embodiments. It should be noted that similar reference numerals and letters in the following drawings indicate similar items; therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. It is also stated that the embodiments described below are only for explaining this invention and are not intended to limit this invention.

[0021] It should be noted that the indicated orientation or positional relationship is based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship that the product is usually placed in during use, or the orientation or positional relationship that is commonly understood by those skilled in the art, or the orientation or positional relationship that the product is usually placed in during use. It is only for the purpose of facilitating the description of this application and simplifying the description, and is not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this application.

[0022] like Figures 1 to 3 As shown, a 3D modeling method for simulating the impact of back-drilling offset on via performance includes the following steps: Step 1: Construct a 3D model of the borehole containing the residual pile 11; This model recreates the actual structure of vias to be back-drilled on a printed circuit board. The core includes signal via 1 and ground via 2. Signal via 1 retains the via stump 11 that has not been drilled out. If it is a differential via 3D model, a pair of signal vias are used, and each pair of signal vias 1 is accompanied by a corresponding via stump 11. A ground via 2 is set on each side to ensure that the model structure is consistent with the actual PCB board via layout and the un-back-drilled state. Step 2: Construct a 3D model of the back drill bit; Step 3: Model alignment and combination; Align the back drill bit 3D model 3 with the through hole 3D model so that the central axis of the signal through hole 1 of the through hole 3D model is collinearly aligned with the central axis of the back drill bit 3D model 3, and is in an ideal back drill state without offset, forming the initial position before offset. Step 4: Set the horizontal offset variable for the back drill bit; Select the 3D model 3 of the back drill bit in the initial position, and simulate its horizontal movement. Set the movement variable to simulate the hole position offset error of the back drill bit relative to the central axis of the signal through hole 1. This step realizes the use of the movement variable to represent the back drill bit offset that may occur in actual production, and achieves controllable simulation of different offset degrees. Step 5: Generate a 3D model of the back-drilled through hole; Perform a Boolean subtraction operation on the 3D model of the through hole and the 3D model of the back drill bit after setting the offset. Subtract the 3D model of the back drill bit from the 3D model of the through hole to obtain a 3D model of the back drill through hole with adjustable back drill hole offset. This step realizes the "drilling away" of the part covered by the drill bit from the 3D model of the through hole, and obtains a back drill through hole with offset error. If the offset is too large, the final model will show the realistic effect of a single-sided residual pile that has not been drilled cleanly, which is consistent with the defective state that occurs in production.

[0023] In this invention, step 2, constructing the 3D model 3 of the back drill bit, specifically includes the following steps: Step 201: Construct a columnar body. The diameter of the columnar body is larger than the diameter of the signal via 1 in the via 3D model to ensure that the drill bit covers the signal via 1 during back drilling. For example, if the diameter of the signal via is 7.9 mil, then the diameter of the columnar body of the back drilling tool is 11.8 mil; if the diameter of the signal via is 11.8 mil, then the diameter of the columnar body of the back drilling tool is 13.8 mil.

[0024] Step 202: Perform chamfering on the working end of the columnar main body to form a simulated drill bit tip structure, obtaining a 3D model of the back drill bit. The chamfering uses a symmetrical chamfering method, with the left and right distances of chamfer 31 being equal, and the distance parameters set according to the actual dimensions of the back drill bit. The symmetry reference for the symmetrical chamfering method is the central axis of the columnar main body; that is, the left and right distances of chamfer 31 are completely equal relative to the central axis, ensuring that the formed tip structure is centrally symmetrical, such as a symmetrical cone. The specific parameters of the left and right distances need to be based on the actual drill bit tip size in industrial production, for example, a single-sided distance of 5 mil. This step, through symmetrical chamfering modeling, ensures that the contact method and cutting trajectory between the drill bit and the through-hole residual pile 11 in the simulation perfectly match the actual machining logic.

[0025] In this invention, step 3 specifically includes the following steps: Step 301: Establish a three-dimensional coordinate system. Set the central axis of the 3D model of the through hole as the reference axis, make the reference axis collinear with the preset coordinate axis (such as the Z axis) of the three-dimensional coordinate system, and take the center point of the back drill end of the signal through hole 1 as the origin of the coordinate system to complete the reference positioning. Step 302: Adjust the orientation of the back drill bit 3D model 3 so that its back drill working end (i.e., the chamfered tip) is aligned with the through hole residual pile 11 side of the through hole 3D model, and make the back drill bit 3D model 3 partially overlap with the area to be drilled in the through hole 3D model. The overlap length is consistent with the preset length to be drilled in the through hole. The overlap length is to simulate the actual back drill drilling depth and is determined according to the preset residual pile removal size in actual production. Step 303: Align the central axis of the back drill bit 3D model 3 with the reference axis to simulate the alignment of the drill bit with the center of the through hole before offset, and construct the initial position of the ideal working condition without offset; at the same time, define the horizontal direction (such as the X axis) perpendicular to the reference axis (such as the Z axis) as the offset movement direction of the back drill bit 3D model 3.

[0026] Based on the above reference coordinate system and direction definition, when executing step 4, the back drill bit 3D model 3 in the initial position is set as a movable object, and the horizontal direction defined in step 303 is the preset offset coordinate axis (such as the X-axis); the offset of the back drill bit 3D model 3 in the preset offset coordinate axis direction is set to D, D≥0, which is used to quantify the degree of hole position offset. The offsets in the other two coordinate axes (such as the Y-axis and Z-axis) are all fixed to 0; this step only retains the offset degree of freedom in the horizontal direction, and the other directions are completely fixed to ensure that the offset and the hole position offset error form a unique correspondence.

[0027] In this invention, when the via 3D model is a differential via 3D model, the two back drill bit 3D models 3 are synchronously set with the same movement variable and move along the same horizontal direction. The offset parameters corresponding to the two back drill bit 3D models 3 must be strictly kept the same. For example, when the offset of one drill bit is set to D=2mil, the offset of the other drill bit is also synchronously set to 2mil to ensure that the offset of the two drill bits relative to their respective matched signal vias 1 is completely consistent.

[0028] Step 6: Scanning simulation analysis; The unit of the shift variable is set to mil, and the scan range and scan step size are defined. A scan simulation is performed on the shift variable to monitor the electrical performance indicators of the back-drilled via 3D model under different shift variable values. The electrical performance indicators include via impedance, insertion loss, and return loss.

[0029] Step 7: Based on the electrical performance index results, find the offset corresponding to the sudden change in the electrical performance index, and determine the offset as the maximum allowable offset of the back drilling.

[0030] like Figures 4 to 8 As shown, in one specific embodiment, the scanning range is set to (0mil, 5mil), and the scanning step size is 1mil. That is, the movement variable D takes values ​​of 0mil, 2mil, 4mil, and 5mil in sequence to obtain 3D models of back-drilled vias with different back-drill offset conditions. (Refer to...) Figure 4 The electrical performance results show that from 0 mil to 4 mil, since the back-drilling offset has not yet reached the point where one side of the residual pile cannot be back-drilled, the difference in through-hole impedance is no more than 2 ohms, and the loss difference at high frequencies is no more than 20%. (Refer to...) Figure 5 (Simulation results show via impedance from 0 mil to 4 mil) and Figure 6 (Simulation results show loss rates from 0 mil to 4 mil). Once the offset reaches 5 mil, causing unsuccessful back-drilling on one side of the through-hole residual pile 11, the impedance results are very poor, referencing... Figure 7 The loss also deteriorated sharply, differing by tens of times compared to the loss results when D=4mil. (Refer to...) Figure 8 (It should be noted that the results for D=5mil differ significantly from those for D=0 to 4mil, causing the four curves for D=0 to 4mil in the figure to cluster together.) With this structure, the maximum allowable offset of the back-drilled hole in this embodiment is 4mil, which intuitively constrains the board manufacturer to ensure that the back-drilled hole offset does not exceed 4mil.

[0031] As can be seen, this invention accurately recreates the actual back-drilling process by using a collinear alignment method along the central axis, 3D modeling that closely matches the actual drill bit structure, and setting a single horizontal offset variable. This makes the offset error simulation more closely resemble actual production, avoiding a disconnect between simulation and actual working conditions. By scanning the moving variable and simulating it, the invention monitors electrical performance indicators in real time, establishing a clear correlation between back-drilling hole offset and via signal transmission performance. This solves the technical problem of difficulty in quantifying the impact of back-drilling hole offset on via performance in existing technologies. Moreover, relying on the dynamic changes in electrical performance indicators and observation of the model structure during simulation, this invention can accurately locate the critical offset state corresponding to the incomplete removal of the via residual pile 11, providing an objective basis for judging the reasonable offset range. Therefore, the offset and electrical performance correlation law output by this invention can directly provide a constraint standard for back-drilling hole offset in PCB production, helping PCB manufacturers avoid via signal quality degradation caused by excessive offset, and improving the production yield and signal transmission stability of high-speed PCBs.

[0032] In this embodiment, the via 3D model specifically adopts a differential via 3D model. This model strictly reproduces the actual layout requirements of differential signal transmission in high-speed PCB boards, including two un-back-drilled signal vias 1 with identical structural parameters and spacing conforming to differential signal transmission standards. Each signal via 1 retains a complete, un-drilled via stump 11. Correspondingly, two back-drilling tool 3D models 3 are configured. The structural parameters of the two back-drilling tool 3D models 3 are completely identical, and they form a one-to-one correspondence with the two signal vias 1 of the differential vias. That is, the first back-drilling tool 3D model 3 matches the first signal via 1, and the second back-drilling tool 3D model 3 matches the second signal via 1, ensuring that the back-drilling process of each signal via can be independently and accurately simulated by the corresponding tool model. The two back-drilling tools achieve synchronous offset. By separately monitoring and jointly analyzing the back-drilling offset of the two signal vias, the impact of the offset on the symmetry of the differential signal can be accurately quantified.

[0033] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0034] The above embodiments merely illustrate several implementation methods of the present invention, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A 3D modeling method for simulating the effect of back-drilling offset on via performance, characterized in that, Includes the following steps: Step 1: Construct a 3D model of the borehole containing the remaining pile; Step 2: Construct a 3D model of the back drill bit; Step 3: Model alignment and combination; Align the back drill bit 3D model with the through hole 3D model so that the signal through hole center axis of the through hole 3D model is collinear with the center axis of the back drill bit 3D model, forming the initial position before offset. Step 4: Set the horizontal offset variable for the back drill bit; Select the 3D model of the back drill bit in the initial position and simulate its horizontal movement to simulate the hole position offset error of the back drill bit relative to the signal through hole axis. Step 5: Generate a 3D model of the back-drilled through hole; Perform a Boolean subtraction operation to subtract the back drill bit 3D model from the through hole 3D model, and obtain a back drill through hole 3D model with adjustable back drill hole offset. Step 6: Scanning simulation analysis; The electrical performance indicators are monitored by scanning simulation at different offsets.

2. The 3D modeling method for simulating the effect of back-drilling offset on via performance according to claim 1, characterized in that, The via 3D model is a differential via 3D model, including two signal vias that are not back-drilled; correspondingly, there are two back-drilling 3D models, and the two back-drilling 3D models correspond one-to-one with the two signal vias.

3. The 3D modeling method for simulating the effect of back-drilling offset on via performance according to claim 1, characterized in that, Step 2, constructing the 3D model of the back drill bit, specifically includes the following steps: Step 201: Construct a columnar body, wherein the aperture of the columnar body is larger than the aperture of the signal via in the via 3D model; Step 202: Perform chamfering on the back-drilling working end of the columnar body to form a structure that simulates the drill bit tip, and obtain a 3D model of the back-drilling drill bit.

4. The 3D modeling method for simulating the effect of back-drilling offset on via performance according to claim 3, characterized in that, The chamfering process adopts a symmetrical chamfering method, with the left and right distances of the chamfer being equal, and the distance parameters are set according to the actual size of the back drill bit.

5. The 3D modeling method for simulating the effect of back-drilling offset on via performance according to claim 1, characterized in that, Step 3 specifically includes the following steps: Step 301: Establish a three-dimensional coordinate system, set the central axis of the 3D model of the through hole as the reference axis, make the reference axis collinear with the preset coordinate axis of the three-dimensional coordinate system, and take the center point of the signal through hole to be drilled as the origin of the coordinate system to complete the reference positioning. Step 302: Adjust the orientation of the back drill bit 3D model so that its back drill working end is aligned with the through hole residual pile side of the through hole 3D model, and make the back drill bit 3D model and the area to be drilled of the through hole 3D model partially overlap, with the overlap length being consistent with the preset length to be drilled of the through hole. Step 303: Align the central axis of the back drill bit 3D model with the reference axis, and define the horizontal direction perpendicular to the reference axis as the offset movement direction of the back drill bit 3D model.

6. The 3D modeling method for simulating the effect of back-drilling offset on via performance according to claim 5, characterized in that, When performing step 4, the back drill bit 3D model in the initial position is set as a movable object. Based on the established three-dimensional coordinate system, the horizontal direction defined in step 303 is the preset offset coordinate axis. The offset of the back drill bit 3D model in the preset offset coordinate axis direction is set to D, D≥0, and the offset in the other two coordinate axis directions is fixed to 0.

7. The 3D modeling method for simulating the effect of back-drilling offset on via performance according to claim 1, characterized in that, In step 6, the unit of the movement variable is set to mil, and the scan range and scan step size of the variable are set.

8. The 3D modeling method for simulating the effect of back-drilling offset on via performance according to claim 1, characterized in that, When the via 3D model is a differential via 3D model, the two back drill bit 3D models are set with the same movement variable and move in the same horizontal direction.

9. The 3D modeling method for simulating the effect of back-drilling offset on via performance according to claim 1, characterized in that, The electrical performance parameters include via impedance, insertion loss, and return loss.

10. The 3D modeling method for simulating the effect of back-drilling offset on via performance according to claim 1, characterized in that, It also includes step 7: based on the electrical performance index results, find the offset corresponding to the sudden change in the electrical performance index, and determine the offset as the maximum allowable offset of the back drilling hole.

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