Isolation self-locking type bus under-voltage and over-voltage protection circuit for satellite

Abstract

The invention discloses an isolation self-locking type bus under-voltage and over-voltage protection circuit for a satellite, and relates to the technical field of spaceflight population. The device comprises an instruction control circuit, an instruction power circuit, a state control circuit, a relay loop control circuit and a bus power-on and power-off control circuit. The instruction control circuit is composed of an isolation diode, a current-limiting resistor, a switch tube and a filter capacitor. The instruction power circuit is composed of a current-limiting resistor, a bleeder diode and a relay. The state control circuit is composed of an isolation diode, a current-limiting resistor, a switch tube and a filter capacitor. The relay loop control circuit is composed of an isolation diode, a current-limiting resistor, a switch tube and a filter capacitor. The bus power-on and power-off control circuit is composed of a current-limiting resistor, a bleeder diode and a relay. According to the invention, quick response can be realized when the bus is under-voltage and over-voltage, the primary bus is cut off, the reliability is high, and the problems of low safety and reliability of the current product can be solved.

Description

Technical Field

[0001] This invention relates to the field of aerospace technology, and in particular to a satellite-type isolated self-locking bus undervoltage and overvoltage protection circuit for use in aerospace electronic products. Background Technology

[0002] With the continuous development of aerospace technology, increasingly stringent requirements are being placed on the safety and reliability of satellite power supply systems. To prevent a single equipment failure from affecting the overall satellite performance and the safe and reliable operation of the system, it is urgently necessary to design a bus undervoltage and overvoltage protection circuit with isolation and self-locking functions. Specific requirements are as follows:

[0003] (1) Safety requirements: For high-power single-unit equipment, when the primary bus loses power, the power supply to the bus should be cut off quickly to avoid the simultaneous start-up of each single unit when the bus is re-established, which would generate a large surge current and affect the stability of the entire satellite power supply; when the primary bus voltage rises abnormally, the power supply should also be cut off immediately to protect each single unit from overvoltage damage, and the protection circuit should have isolation control capability.

[0004] (2) Reliability requirements: When the protection circuit itself malfunctions or fails, it shall not affect the normal and reliable power supply of the bus, so as to ensure the continuous and stable operation of the entire satellite power system.

[0005] (3) Availability requirements: The components selected in the undervoltage and overvoltage protection circuit should be general-purpose conventional components with short procurement cycles, stable supply channels, and easy engineering implementation and batch application.

[0006] Therefore, there is an urgent need to develop an isolated self-locking bus undervoltage and overvoltage protection circuit for satellites to meet the stringent reliability and safety requirements of satellite power supply systems. Summary of the Invention

[0007] The purpose of this invention is to propose a battery-based RTC clock measurement and control method and circuit to solve the problems mentioned in the background art.

[0008] To achieve the above objectives, the present invention adopts the following technical solution: A satellite-use isolated self-locking bus undervoltage and overvoltage protection circuit includes: a command control circuit, a command power circuit, a status control circuit, a relay return control circuit, and a bus power-off control circuit; The command control circuit is used to receive isolated overvoltage and undervoltage signals, and control the on / off state of the command power circuit according to the overvoltage and undervoltage signals. The command power circuit is connected to the command control circuit and the status control circuit respectively, and is used to indirectly control the power supply and power cut-off of the bus under the control of the command control circuit and the status control circuit. The state control circuit is used to receive enable or disable signals sent by the host computer or the slave computer, and control the working state of the command power circuit according to the enable or disable signals. The relay return line control circuit is connected to the command power circuit and is used to control the connection or isolation between the return line and ground by closing or opening the contacts in the command power circuit. The busbar power-off control circuit is connected to the command power circuit and is used to indirectly control the power supply and power-off of the busbar by closing or opening the contacts in the command power circuit.

[0009] Preferably, the command power circuit includes a first relay and a second relay; The ON1 contact of the first relay is connected to the first power supply; the SW1 contact of the first relay is connected to the ON1 contact of the second relay. The ON2 contact of the first relay is connected to one end of the fifth resistor, and the other end of the fifth resistor is connected to the second power supply; the SW2 contact of the first relay is connected to the ON2 contact of the second relay. The second power supply is connected to one end of the sixth resistor and one end of the seventh resistor, and the other end of the sixth resistor is connected to the other end of the seventh resistor, the cathode of the first diode, and the positive terminal of the open coil of the first relay. The anode of the first diode is connected to the cathode of the second diode, and the anode of the second diode is connected to the open circuit return line of the first relay and the collector of the first switching transistor; The positive terminal of the first relay's shut-off coil is connected to the cathode of the third diode, the positive terminal of the second relay's open coil, the positive terminal of the second relay's shut-off coil, the cathode of the fifth diode, one end of the fourteenth resistor, and one end of the fifteenth resistor; The anode of the third diode is connected to the cathode of the fourth diode; the anode of the fourth diode is connected to the return line of the first relay off circuit, the return line of the second relay open circuit, and the collector of the third switching transistor. The anode of the fifth diode is connected to the cathode of the sixth diode; the anode of the sixth diode is connected to the collector of the fifth switching transistor. The other end of the fourteenth resistor is connected to the other end of the fifteenth resistor and to the first power supply.

[0010] Preferably, the instruction control circuit includes an eleventh diode, a twelfth diode, and a corresponding driving circuit; The anode of the eleventh diode is connected to the overvoltage protection signal input terminal, the anode of the twelfth diode is connected to the undervoltage protection signal input terminal, and the cathode of the eleventh diode is connected to the cathode of the twelfth diode, one end of the first resistor, and one end of the second resistor. The other end of the first resistor is connected to the anode of the thirteenth diode, and the cathode of the thirteenth diode is connected to the base of the first switching transistor and one end of the third resistor; The emitter of the first switch is connected to the other end of the third resistor and the collector of the second switch. The other end of the second resistor is connected to the base of the second switch, one end of the fourth resistor, and one end of the first capacitor. The emitter of the second switch is connected to the other end of the fourth resistor, the other end of the first capacitor, and the 12V2_GND network.

[0011] Preferably, the state control circuit includes an enable control sub-circuit and an disable control sub-circuit; The enable control sub-circuit includes a fourteenth diode. The anode of the fourteenth diode is connected to the enable signal input terminal to receive the enable signal sent by the host computer or the slave computer. The cathode of the fourteenth diode is connected to one end of the eighth resistor and one end of the ninth resistor. The other end of the eighth resistor is connected to the anode of the fifteenth diode. The cathode of the fifteenth diode is connected to the base of the third switch and one end of the tenth resistor. The emitter of the third switch is connected to the other end of the tenth resistor and the collector of the fourth switch. The other end of the ninth resistor is connected to the base of the fourth switch, one end of the eleventh resistor, and one end of the second capacitor. The emitter of the fourth switch is connected to the other end of the eleventh resistor, the other end of the second capacitor, and the GND network. The prohibition control sub-circuit includes a seventeenth diode. The anode of the seventeenth diode is connected to the prohibition signal input terminal to receive the prohibition signal sent by the host computer or the slave computer. The cathode of the seventeenth diode is connected to one end of the sixteenth resistor and one end of the seventeenth resistor. The other end of the sixteenth resistor is connected to the anode of the sixteenth diode. The cathode of the sixteenth diode is connected to the base of the fifth switching transistor and one end of the twelfth resistor. The emitter of the fifth switching transistor is connected to the other end of the twelfth resistor and the collector of the sixth switching transistor. The other end of the seventeenth resistor is connected to the base of the sixth switching transistor, one end of the thirteenth resistor, and one end of the third capacitor. The emitter of the sixth switching transistor is connected to the other end of the thirteenth resistor, the other end of the third capacitor, and the GND network.

[0012] Preferably, the relay return control circuit includes a twentieth resistor and a twenty-first resistor. One end of the twentieth and twenty-first resistors is connected to the SW2 contact of the second relay, and the other end of the twentieth resistor is connected to the anode of the eighteenth diode. The cathode of the eighteenth diode is connected to the base of the seventh switching transistor and one end of the twenty-second resistor. The emitter of the seventh switching transistor is connected to the other end of the twenty-second resistor and the collector of the eighth switching transistor. The other end of the twenty-first resistor is connected to the base of the eighth switching transistor, one end of the twenty-third resistor, and one end of the fourth capacitor. The emitter of the eighth switching transistor is connected to the other end of the twenty-third resistor, the other end of the fourth capacitor, and the GND network.

[0013] Preferably, the bus power-off control circuit includes a third relay, wherein the SW1 contact of the third relay is connected to the SW2 contact and the first bus power supply switch; the OFF1 contact of the third relay is connected to the OFF2 contact and the second bus power supply switch; the positive terminal of the open command coil of the third relay is connected to the cathode of the ninth diode, one end of the twenty-fourth resistor, and one end of the twenty-fifth resistor; the anode of the ninth diode is connected to the cathode of the tenth diode; and the other end of the twenty-fourth resistor is connected to the other end of the twenty-fifth resistor and an external open command signal.

[0014] Preferably, the third relay further includes an eighteenth resistor and a nineteenth resistor. The SW1 contact of the second relay is connected to one end of the eighteenth resistor and one end of the nineteenth resistor. The other end of the eighteenth resistor is connected to the other end of the nineteenth resistor, the cathode of the seventh diode, and the positive terminal of the third relay's shut-off coil. The anode of the seventh diode is connected to the cathode of the eighth diode. The anode of the eighth diode is connected to the return line of the third relay's shut-off coil, the return line of the third relay's open coil, the anode of the tenth diode, and the collector of the seventh switching transistor.

[0015] Preferably, the first to the eighth switching transistors are all NPN transistors or MOSFETs.

[0016] Compared with the prior art, the present invention provides a battery-based RTC clock measurement and control method and circuit, which has the following beneficial effects: (1) Enhanced safety: This invention is designed with undervoltage and overvoltage protection for the busbar. When the satellite busbar is below the undervoltage threshold, the power supply to the primary busbar is immediately cut off to prevent the surge current of the primary busbar from being too large and affecting the power supply and distribution of the satellite when the satellite busbar recovers. When the satellite busbar is above the overvoltage threshold, the power supply to the primary busbar is immediately cut off to protect the electrical products from damage. In addition, a two-stage magnetic latching relay is used to isolate and control the power supply and disconnection of the primary busbar. When the busbar voltage is abnormal, the power supply to the busbar is cut off while the product performs self-locking protection. When the fault is cleared, the product can only be re-energized through external control, which greatly increases the safety of satellite power supply and distribution and product power consumption.

[0017] (2) Higher reliability: The failure of any device in the protection circuit proposed in this invention will not affect the primary bus and the function performance of the single unit. When the protection circuit fails, it can be enabled or disabled by the host computer or the slave computer, thereby enhancing the reliability of satellite power supply and distribution and product power consumption.

[0018] (3) Greater availability: The components selected in this invention are all conventional components, with short procurement cycles and stable supply. Attached Figure Description

[0019] Figure 1This is a circuit diagram of a satellite-use isolated self-locking bus undervoltage and overvoltage protection circuit proposed in this invention. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0021] Example 1: Please see Figure 1 This embodiment provides a satellite-grade isolated self-locking bus undervoltage and overvoltage protection circuit, comprising: a command control circuit, a command power circuit, a status control circuit, a relay return control circuit, and a bus power-on / off control circuit. Wherein: The command control circuit is used to receive isolated overvoltage and undervoltage signals and control the on / off state of the command power circuit based on the overvoltage and undervoltage signals.

[0022] The command power circuit is connected to the command control circuit and the status control circuit respectively, and is used to indirectly control the power supply and de-energization of the bus under the control of the command control circuit and the status control circuit.

[0023] The status control circuit is used to receive enable or disable signals sent by the host computer or slave computer, and control the working state of the command power circuit according to the enable or disable signals.

[0024] The relay return line control circuit is connected to the command power circuit and is used to control the connection or isolation between the return line and ground by closing or opening the contacts in the command power circuit.

[0025] The busbar power-off control circuit is connected to the command power circuit and is used to indirectly control the power supply and de-energization of the busbar by closing or opening the contacts in the command power circuit.

[0026] Specifically, such as Figure 1 As shown in this embodiment: The command power circuit includes a first relay K1 and a second relay K2. The ON1 contact of the first relay K1 is connected to the first power supply +12V1; the SW1 contact of the first relay K1 is connected to the ON1 contact of the second relay K2. The ON2 contact of the first relay K1 is connected to one end of the fifth resistor R5, and the other end of the fifth resistor R5 is connected to the second power supply +12V2; the SW2 contact of the first relay K1 is connected to the ON2 contact of the second relay K2. The second power supply +12V2 is also connected to one end of the sixth resistor R6 and one end of the seventh resistor R7. The other end of the sixth resistor R6 is connected to the other end of the seventh resistor R7, the cathode of the first diode D1, and the positive terminal of the open coil of the first relay K1. The anode of the first diode D1 is connected to the cathode of the second diode D2, and the anode of the second diode D2 is connected to the return line of the open coil of the first relay K1 and the collector of the first switching transistor V1. The positive terminal of the shut-off coil of the first relay K1 is connected to the cathode of the third diode D3, the positive terminal of the open coil of the second relay K2, the positive terminal of the shut-off coil of the second relay K2, the cathode of the fifth diode D5, one end of the fourteenth resistor R14, and one end of the fifteenth resistor R15. The anode of the third diode D3 is connected to the cathode of the fourth diode D4; the anode of the fourth diode D4 is connected to the return line of the shut-off coil of the first relay K1, the return line of the open coil of the second relay K2, and the collector of the third switching transistor V3. The anode of the fifth diode D5 is connected to the cathode of the sixth diode D6; the anode of the sixth diode D6 is connected to the collector of the fifth switching transistor V5. The other end of the fourteenth resistor R14 is connected to the other end of the fifteenth resistor R15 and then connected to the first power supply +12V1.

[0027] The instruction control circuit includes an eleventh diode D11, a twelfth diode D12, and corresponding drive circuits. The anode of the eleventh diode D11 is connected to the overvoltage protection signal input (OVP), and the anode of the twelfth diode D12 is connected to the undervoltage protection signal input (UVP). The cathode of the eleventh diode D11 is connected to the cathode of the twelfth diode D12, one end of the first resistor R1, and one end of the second resistor R2. The other end of the first resistor R1 is connected to the anode of the thirteenth diode D13, and the cathode of the thirteenth diode D13 is connected to the base of the first switching transistor V1 and one end of the third resistor R3. The emitter of the first switching transistor V1 is connected to the other end of the third resistor R3 and the collector of the second switching transistor V2. The other end of the second resistor R2 is connected to the base of the second switching transistor V2, one end of the fourth resistor R4, and one end of the first capacitor C1. The emitter of the second switching transistor V2 is connected to the other end of the fourth resistor R4, the other end of the first capacitor C1, and connected to the power ground 12V2_GND.

[0028] The state control circuit includes an enable control sub-circuit and an disable control sub-circuit.

[0029] The enable control sub-circuit includes a fourteenth diode D14. The anode of the fourteenth diode D14 is connected to the enable signal input terminal (EN) to receive the enable signal sent by the host computer or the slave computer. The cathode of the fourteenth diode D14 is connected to one end of the eighth resistor R8 and one end of the ninth resistor R9. The other end of the eighth resistor R8 is connected to the anode of the fifteenth diode D15. The cathode of the fifteenth diode D15 is connected to the base of the third switch V3 and one end of the tenth resistor R10. The emitter of the third switch V3 is connected to the other end of the tenth resistor R10 and the collector of the fourth switch V4. The other end of the ninth resistor R9 is connected to the base of the fourth switch V4, one end of the eleventh resistor R11, and one end of the second capacitor C2. The emitter of the fourth switch V4 is connected to the other end of the eleventh resistor R11 and the other end of the second capacitor C2 and connected to system ground GND.

[0030] The disable control sub-circuit includes a seventeenth diode D17. The anode of the seventeenth diode D17 is connected to the disable signal input terminal (INH) to receive the disable signal sent by the host computer or the slave computer. The cathode of the seventeenth diode D17 is connected to one end of the sixteenth resistor R16 and one end of the seventeenth resistor R17. The other end of the sixteenth resistor R16 is connected to the anode of the sixteenth diode D16. The cathode of the sixteenth diode D16 is connected to the base of the fifth switch V5 and one end of the twelfth resistor R12. The emitter of the fifth switch V5 is connected to the other end of the twelfth resistor R12 and the collector of the sixth switch V6. The other end of the seventeenth resistor R17 is connected to the base of the sixth switch V6, one end of the thirteenth resistor R13, and one end of the third capacitor C3. The emitter of the sixth switch V6 is connected to the other end of the thirteenth resistor R13 and the other end of the third capacitor C3 and connected to system ground GND.

[0031] The relay return control circuit includes a twentieth resistor R20 and a twenty-first resistor R21. One end of the twentieth resistor R20 and the twenty-first resistor R21 are connected to the SW2 contact of the second relay K2. The other end of the twentieth resistor R20 is connected to the anode of the eighteenth diode D18; the cathode of the eighteenth diode D18 is connected to the base of the seventh switching transistor V7 and one end of the twenty-second resistor R22; the emitter of the seventh switching transistor V7 is connected to the other end of the twenty-second resistor R22 and the collector of the eighth switching transistor V8; the other end of the twenty-first resistor R21 is connected to the base of the eighth switching transistor V8, one end of the twenty-third resistor R23, and one end of the fourth capacitor C4; the emitter of the eighth switching transistor V8 is connected to the other end of the twenty-third resistor R23 and the other end of the fourth capacitor C4, and is connected to system ground GND.

[0032] The busbar power-off control circuit includes a third relay K3. The SW1 contact of the third relay K3 is connected to the SW2 contact and then to the first busbar power supply switch; the OFF1 contact of the third relay K3 is connected to the OFF2 contact and then to the second busbar power supply switch; the positive terminal of the open command coil of the third relay K3 is connected to the cathode of the ninth diode D9, one end of the twenty-fourth resistor R24, and one end of the twenty-fifth resistor R25; the anode of the ninth diode D9 is connected to the cathode of the tenth diode D10; the other end of the twenty-fourth resistor R24 ​​is connected to the other end of the twenty-fifth resistor R25 and then to an external open command signal (ON_CMD). The third relay K3 also includes a coil driving section, specifically: The SW1 contact of the second relay K2 is connected to one end of the eighteenth resistor R18 and one end of the nineteenth resistor R19; the other end of the eighteenth resistor R18 is connected to the other end of the nineteenth resistor R19, the cathode of the seventh diode D7, and the positive terminal of the closing coil of the third relay K3; the anode of the seventh diode D7 is connected to the cathode of the eighth diode D8; the anode of the eighth diode D8 is connected to the return line of the closing coil of the third relay K3, the return line of the opening coil of the third relay K3, the anode of the tenth diode D10, and the collector of the seventh switching transistor V7.

[0033] In this embodiment, as a preferred implementation, the first switch V1 to the eighth switch V8 can all be NPN transistors or MOSFETs.

[0034] Example 2: Based on Example 1, but with a difference in that, in conjunction with the following Figure 1 The working principle of this circuit will be explained in detail. For ease of understanding, the initial default state of the circuit will be described first: After the host computer or slave computer sends an enable signal (EN active) to activate the protection circuit, the circuit is in its initial default state, that is: The first relay K1 is in the reset state, with its SW1 contact connected to the OFF1 contact and its SW2 contact connected to the OFF2 contact. The second relay K2 is in the set state, with its SW1 contact connected to the ON1 contact and its SW2 contact connected to the ON2 contact. Furthermore, the +12V1 power supply is secondary control power and is normally powered by default; the +12V2 power supply is obtained from the primary bus conversion, and when the primary bus is disconnected, the +12V2 power supply will drop to 0. The first relay K1, the second relay K2, and the third relay K3 in the diagram are all magnetically latched relays, and the third relay K3 is only shown for illustration; the number of relays is not limited to one and can be expanded according to the actual bus power supply requirements.

[0035] (1) When the primary bus voltage is normal With no valid input (low level) for both the overvoltage protection signal (OVP) and the undervoltage protection signal (UVP), the first switch V1 and the second switch V2 in the command control circuit are both in the off state. Since the first switch V1 and the second switch V2 are off, a circuit cannot be provided to the open coil of the first relay K1, so the first relay K1 remains in its initial reset state. The command power circuit does not activate, the entire protection circuit is in standby mode, and the primary bus power supply is normal.

[0036] (2) When the primary bus voltage is lower than the threshold (undervoltage fault) The undervoltage protection signal (UVP) is validly high. This signal is applied to the base of the second switch V2 through the twelfth diode D12 and the second resistor R2, turning it on. Once the second switch V2 is on, it provides a path to ground for the emitter of the first switch V1. Simultaneously, the UVP signal is also applied to the base of the first switch V1 through the twelfth diode D12, the first resistor R1, and the thirteenth diode D13, turning it on as well. The first switch V1 and the second switch V2 form a series drive stage, providing strong anti-interference capability.

[0037] After the first switching transistor V1 is turned on, the open coil of the first relay K1 is grounded. Since the positive terminal of the open coil of the first relay K1 is connected to +12V2 through the sixth resistor R6 and the seventh resistor R7 (at this time the bus is not de-energized and +12V2 exists), the open coil of the first relay K1 is energized, driving the first relay K1 to operate and causing its contacts to switch to the set state: SW1 is connected to ON1, and SW2 is connected to ON2.

[0038] After the first relay K1 is activated: Drive bus relay to disconnect: +12V power supply is applied to the positive terminal of the third relay K3 turn-off coil through the SW1-ON1 contact of the first relay K1, the ON1-SW1 contact of the second relay K2 (the second relay K2 is initially in the set state), the eighteenth resistor R18, and the nineteenth resistor R19, providing positive voltage for the third relay K3 to turn off.

[0039] Closed return line control circuit: The +12V power supply drives the relay return line control circuit through the SW2-ON2 contact of the first relay K1 and the ON2-SW2 contact of the second relay K2 (the second relay K2 is initially in the set state), and then through the voltage divider of the twentieth resistor R20 and the twenty-first resistor R21. This drive signal turns on the seventh switch V7 and the eighth switch V8, connecting the return line of the third relay K3 to system ground GND.

[0040] At this time, the positive terminal of the third relay K3's shut-off coil receives +12V1 voltage, and the negative terminal is grounded through the conducting seventh switch V7 and eighth switch V8. The shut-off coil of the third relay K3 is energized, driving the third relay K3 to operate, switching its contacts to the off state. That is, SW1 and SW2 simultaneously connect to the OFF1 and OFF2 contacts, thereby cutting off the primary bus power supply. After the fault is cleared, the bus voltage returns to normal, but the third relay K3 remains in the self-locked off state. An external ON command signal (ON_CMD) must be sent to the shut-off coil of the third relay K3 to reset it, reconnect the bus, and achieve the self-locking protection after the fault.

[0041] (3) When the primary bus voltage exceeds the threshold (overvoltage fault) The overvoltage protection signal (OVP) input is valid at a high level. Its operation is exactly the same as during an undervoltage fault. The OVP signal drives the first switch V1 and the second switch V2 to conduct through the eleventh diode D11, which in turn activates the first relay K1. Finally, it drives the third relay K3 to turn off through the same path, cutting off the power supply to the primary bus. Similarly, an external command is required to restore power after the fault is cleared.

[0042] (4) When the protection circuit itself malfunctions or requires human intervention. When the protection circuit itself malfunctions, or in certain special test or debugging modes, a prohibition signal (INH active) can be sent via the host computer or slave computer. The INH signal drives the fifth switch V5 and the sixth switch V6 to conduct through the prohibition control sub-circuit. After the fifth switch V5 conducts, the shut-off coil of the second relay K2 is grounded. Since the positive terminal of the shut-off coil of the second relay K2 is connected to +12V1 through the fourteenth resistor R14 and the fifteenth resistor R15, the shut-off coil of the second relay K2 is energized, driving the second relay K2 to operate, causing its contacts to switch to the off state (SW1 and OFF1 are connected, SW2 and OFF2 are connected). After the second relay K2 operates, it cuts off the path from the first relay K1 to the shut-off coil of the third relay K3 and the relay return control circuit, thereby "shielding" the possible erroneous protection commands issued by the command control circuit, isolating the fault point, and ensuring system safety.

[0043] In summary, the satellite-use isolated self-locking bus undervoltage and overvoltage protection circuit provided by this invention achieves accurate detection and reliable protection of bus faults through the cooperation of command control circuit, state control circuit, and command power circuit; the design of the relay return control circuit ensures the integrity of the protection action; and in particular, the self-locking characteristic of the bus power-off control circuit and the independent state control circuit achieve state locking and fault isolation after a fault, greatly improving the safety and reliability of the satellite power system.

[0044] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A satellite-grade isolated self-locking bus undervoltage and overvoltage protection circuit, characterized in that, include: Command control circuit, command power circuit, status control circuit, relay return line control circuit, and bus power-on / off control circuit; The command control circuit is used to receive isolated overvoltage and undervoltage signals, and control the on / off state of the command power circuit according to the overvoltage and undervoltage signals. The command power circuit is connected to the command control circuit and the status control circuit respectively, and is used to indirectly control the power supply and power cut-off of the bus under the control of the command control circuit and the status control circuit. The state control circuit is used to receive enable or disable signals sent by the host computer or the slave computer, and control the working state of the command power circuit according to the enable or disable signals. The relay return line control circuit is connected to the command power circuit and is used to control the connection or isolation between the return line and ground by closing or opening the contacts in the command power circuit. The busbar power-off control circuit is connected to the command power circuit and is used to indirectly control the power supply and power-off of the busbar by closing or opening the contacts in the command power circuit.

2. The satellite-use isolated self-locking bus undervoltage and overvoltage protection circuit according to claim 1, characterized in that, The command power circuit includes a first relay (K1) and a second relay (K2). The ON1 contact of the first relay (K1) is connected to the first power supply (+12V1); the SW1 contact of the first relay (K1) is connected to the ON1 contact of the second relay (K2); The ON2 contact of the first relay (K1) is connected to one end of the fifth resistor (R5), and the other end of the fifth resistor (R5) is connected to the second power supply (+12V2); the SW2 contact of the first relay (K1) is connected to the ON2 contact of the second relay (K2); The second power supply (+12V2) is connected to one end of the sixth resistor (R6) and one end of the seventh resistor (R7). The other end of the sixth resistor (R6) is connected to the other end of the seventh resistor (R7), the cathode of the first diode (D1), and the positive terminal of the open coil of the first relay (K1). The anode of the first diode (D1) is connected to the cathode of the second diode (D2), and the anode of the second diode (D2) is connected to the open circuit return line of the first relay (K1) and the collector of the first switching transistor (V1). The positive terminal of the closing coil of the first relay (K1) is connected to the cathode of the third diode (D3), the positive terminal of the opening coil of the second relay (K2), the positive terminal of the closing coil of the second relay (K2), the cathode of the fifth diode (D5), one end of the fourteenth resistor (R14), and one end of the fifteenth resistor (R15). The anode of the third diode (D3) is connected to the cathode of the fourth diode (D4); the anode of the fourth diode (D4) is connected to the return line of the first relay (K1) when it is off, the return line of the second relay (K2) when it is on, and the collector of the third switching transistor (V3). The anode of the fifth diode (D5) is connected to the cathode of the sixth diode (D6); the anode of the sixth diode (D6) is connected to the collector of the fifth switching transistor (V5); The other end of the fourteenth resistor (R14) is connected to the other end of the fifteenth resistor (R15) and to the first power supply (+12V1).

3. The satellite-use isolated self-locking bus undervoltage and overvoltage protection circuit according to claim 2, characterized in that, The command control circuit includes an eleventh diode (D11), a twelfth diode (D12), and a corresponding driving circuit; The anode of the eleventh diode (D11) is connected to the overvoltage protection signal input terminal, the anode of the twelfth diode (D12) is connected to the undervoltage protection signal input terminal, and the cathodes of the eleventh diode (D11) and the twelfth diode (D12), one end of the first resistor (R1), and one end of the second resistor (R2) are connected together. The other end of the first resistor (R1) is connected to the anode of the thirteenth diode (D13), and the cathode of the thirteenth diode (D13) is connected to the base of the first switching transistor (V1) and one end of the third resistor (R3). The emitter of the first switch (V1) is connected to the other end of the third resistor (R3) and the collector of the second switch (V2); The other end of the second resistor (R2) is connected to the base of the second switch (V2), one end of the fourth resistor (R4) and one end of the first capacitor (C1). The emitter of the second switch (V2) is connected to the other end of the fourth resistor (R4), the other end of the first capacitor (C1) and the 12V2_GND network.

4. The satellite-use isolated self-locking bus undervoltage and overvoltage protection circuit according to claim 3, characterized in that, The state control circuit includes an enable control sub-circuit and an disable control sub-circuit; The enable control sub-circuit includes a fourteenth diode (D14), the anode of which is connected to the enable signal input terminal to receive the enable signal sent by the host computer or the slave computer; the cathode of which is connected to one end of the eighth resistor (R8) and one end of the ninth resistor (R9); the other end of the eighth resistor (R8) is connected to the anode of the fifteenth diode (D15); the cathode of which is connected to the base of the third switch (V3) and one end of the tenth resistor (R10); the emitter of the third switch (V3) is connected to the other end of the tenth resistor (R10) and the collector of the fourth switch (V4); the other end of the ninth resistor (R9) is connected to the base of the fourth switch (V4), one end of the eleventh resistor (R11), and one end of the second capacitor (C2); the emitter of the fourth switch (V4) is connected to the other end of the eleventh resistor (R11), the other end of the second capacitor (C2), and the GND network. The disable control sub-circuit includes a seventeenth diode (D17). The anode of the seventeenth diode (D17) is connected to the disable signal input terminal to receive the disable signal sent by the host computer or the slave computer. The cathode of the seventeenth diode (D17) is connected to one end of the sixteenth resistor (R16) and one end of the seventeenth resistor (R17). The other end of the sixteenth resistor (R16) is connected to the anode of the sixteenth diode (D16). The cathode of the sixteenth diode (D16) is connected to the fifth switching transistor (V5). The base of the fifth switch (V5) is connected to one end of the twelfth resistor (R12); the emitter of the fifth switch (V5) is connected to the other end of the twelfth resistor (R12) and the collector of the sixth switch (V6); the other end of the seventeenth resistor (R17) is connected to the base of the sixth switch (V6), one end of the thirteenth resistor (R13), and one end of the third capacitor (C3); the emitter of the sixth switch (V6) is connected to the other end of the thirteenth resistor (R13), the other end of the third capacitor (C3), and the GND network.

5. The satellite-use isolated self-locking bus undervoltage and overvoltage protection circuit according to claim 4, characterized in that, The relay return control circuit includes a twentieth resistor (R20) and a twenty-first resistor (R21). One end of the twentieth resistor (R20) and the twenty-first resistor (R21) is connected to the SW2 contact of the second relay (K2), and the other end of the twentieth resistor (R20) is connected to the anode of the eighteenth diode (D18). The cathode of the eighteenth diode (D18) is connected to the base of the seventh switch (V7) and one end of the twenty-second resistor (R22). The emitter of the seventh switch (V7) is connected to the other end of the twenty-second resistor (R22) and the collector of the eighth switch (V8). The other end of the twenty-first resistor (R21) is connected to the base of the eighth switch (V8), one end of the twenty-third resistor (R23), and one end of the fourth capacitor (C4). The emitter of the eighth switch (V8) is connected to the other end of the twenty-third resistor (R23), the other end of the fourth capacitor (C4), and the GND network.

6. The satellite-use isolated self-locking bus undervoltage and overvoltage protection circuit according to claim 5, characterized in that, The bus power-off control circuit includes a third relay (K3). The SW1 contact of the third relay (K3) is connected to the SW2 contact and the first bus power supply switch. The OFF1 contact of the third relay (K3) is connected to the OFF2 contact and the second bus power supply switch. The positive terminal of the open command coil of the third relay (K3) is connected to the cathode of the ninth diode (D9), one end of the twenty-fourth resistor (R24), and one end of the twenty-fifth resistor (R25). The anode of the ninth diode (D9) is connected to the cathode of the tenth diode (D10). The other end of the twenty-fourth resistor (R24) is connected to the other end of the twenty-fifth resistor (R25) and the external open command signal.

7. The satellite-use isolated self-locking bus undervoltage and overvoltage protection circuit according to claim 6, characterized in that, The third relay (K3) also includes an eighteenth resistor (R18) and a nineteenth resistor (R19). The SW1 contact of the second relay (K2) is connected to one end of the eighteenth resistor (R18) and one end of the nineteenth resistor (R19). The other end of the eighteenth resistor (R18) is connected to the other end of the nineteenth resistor (R19), the cathode of the seventh diode (D7), and the positive terminal of the third relay (K3) shut-off coil. The anode of the seventh diode (D7) is connected to the cathode of the eighth diode (D8). The anode of the eighth diode (D8) is connected to the return line of the third relay (K3) shut-off coil, the return line of the third relay (K3) open coil, the anode of the tenth diode (D10), and the collector of the seventh switching transistor (V7).

8. The satellite-use isolated self-locking bus undervoltage and overvoltage protection circuit according to any one of claims 2-7, characterized in that, The first switch (V1) to the eighth switch (V8) are all NPN transistors or MOSFETs.

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