Dynamic control system and method for high-voltage current limiting

Abstract

The invention relates to the technical field of power current control, and discloses a high-voltage current-limiting dynamic control system and method, and the method comprises the steps: collecting target line current data through a current sensor according to a period, carrying out the frequency domain conversion after carrying out the zero filling and Hanning window superposition of a sampling sequence, extracting harmonic data, and calculating the total distortion rate; therefore, the switching control capacitor current limiting module suppresses harmonic current. Moving average filtering and differential operation are carried out on current data to obtain a current increasing speed, a current amplitude two-parameter threshold value, layered switching control reactance and a resistance current limiting module are combined to improve line impedance, and the resistance module is switched out of the state of the associated reactance module. According to the method, a traditional total power passive current limiting mode is abandoned, different current limiting modules are adapted according to fault features and scenes, dynamic and accurate current limiting of high-voltage current is achieved, power supply of a non-fault area is prevented from being affected, current limiting precision and system power supply reliability are improved, and safe and stable operation of an electric power high-voltage system is guaranteed.

Description

Technical Field

[0001] This application relates to the technical field of power current control, and in particular to a dynamic control system and method for high-voltage current limiting. Background Technology

[0002] In the operation of high-voltage power systems, accurate detection of current parameters is a core prerequisite for ensuring the safe and stable operation of the system. High-voltage systems have high voltage levels and complex operating conditions; fluctuations in current can trigger chain reactions. Accurate detection of current amplitude, frequency, and trends provides a reliable basis for system control, fault early warning, and protection strategy formulation. Timely detection of abnormal current signals can prevent the risk of fault escalation and ensure the normal operation of critical power equipment.

[0003] In high-voltage power systems, faults such as short circuits and equipment insulation damage can easily lead to a sharp increase in current, causing serious hazards. Excessive current can subject equipment windings and conductors to excessive electrodynamic forces, causing mechanical and thermal damage such as deformation and burnout. Simultaneously, it can cause a sudden drop in system voltage, affecting the normal operation of surrounding loads. If the fault current continues to spread, it can also disrupt system stability, triggering oscillations in the power supply network and large-scale power outages. Therefore, effective current limiting of high-voltage current is a crucial aspect of power system protection.

[0004] Currently, high-voltage current limiting methods are relatively simple, mostly employing a passive current limiting mode that restricts total power, making it difficult to adapt to complex and ever-changing system conditions. Restricting total power can also affect the normal power supply to non-faulty areas, reducing the reliability of the system power supply. At the same time, the methods for restricting total power have poor adaptability; the total power limiting parameters are mostly fixed settings and cannot be dynamically adjusted according to the system operating load and fault type, resulting in insufficient current limiting accuracy and making it difficult to achieve the ideal current limiting effect. Summary of the Invention

[0005] In order to reduce the adverse effects of limiting current by limiting total power in high-voltage power systems, this application provides a dynamic control system and method for high-voltage current limiting.

[0006] Firstly, this application provides a dynamic control method for high-voltage current limiting, employing the following technical solution: A dynamic control method for high-voltage current limiting includes the following steps: The current data of the target line is acquired based on a preset current sensor according to a preset acquisition period. The sampling sequence is obtained based on the current data. The sampling sequence is padded with zeros to adjust the number of sampling points to an integer power of 2. The Hanning window algorithm is superimposed to suppress spectral leakage. The sampling sequence is converted into frequency domain data through a preset frequency domain conversion algorithm. Harmonic data is extracted from the frequency domain data. The total harmonic distortion rate is calculated based on the harmonic data. If the total harmonic distortion rate is greater than the preset harmonic reference data, then the preset capacitor current limiting module is connected. The capacitor current limiting module is used to limit the harmonic current in the target line; otherwise, the capacitor current limiting module is disconnected. The current sequence is obtained by performing a moving average to filter out noise based on multiple consecutive sets of current data, and then the current increase rate is obtained by performing a difference operation on the current sequence. If the rate of increase of current exceeds the preset first reference data and the current data exceeds the preset first limit data, then the preset reactance current limiting module is connected. The reactance current limiting module is used to increase the inductive impedance in the target line; otherwise, the reactance current limiting module is disconnected. After connecting the reactance current limiting module, if the current increase rate is greater than the preset second reference data and the current data is greater than the preset second limit data, then the preset resistance current limiting module is connected. The resistance current limiting module is used to increase the line impedance in the target line; wherein, the second limit data is greater than the first limit data and the second reference data is less than the first reference data. If the current data is less than the second limit data, the cut-out resistor current limiting module is activated based on the cut-out state of the reactance current limiting module.

[0007] By adopting the above technical solution, and adapting three types of current limiting modules (capacitors, reactants, and resistors) to different scenarios, dynamic current limiting adjustment is achieved by combining harmonic distortion characteristics and current mutation characteristics. This avoids the cascading effects of traditional total power limiting modes on power supply to non-faulty areas. Furthermore, it achieves precise matching and dynamic optimization of the current limiting strategy through harmonic total distortion rate determination and dual-parameter threshold judgment of current increase rate and amplitude. The frequency domain analysis method of zero-padding adjustment and Hanning window to suppress spectral leakage improves the accuracy of harmonic detection. The combination of moving average filtering and differential operation ensures the reliability of current change trend judgment. The selective access and cut-out logic of the three types of current limiting modules can specifically suppress harmonic current, increase inductor impedance, and increase line impedance to achieve layered current limiting under different fault levels and operating conditions. The module cut-out mechanism avoids energy loss caused by excessive current limiting. This effectively improves the accuracy, adaptability, and power supply reliability of current limiting in high-voltage systems, significantly reduces the risk of equipment damage and system oscillation caused by faults such as short circuits and insulation failures, and provides a reliable guarantee for the safe and stable operation of high-voltage power systems.

[0008] Optionally, the step of connecting the preset reactance current limiting module further includes the following sub-steps: The reactor current limiting module includes an air-core reactor to obtain the rated current of the target line. If the rated current is greater than the preset maximum current, a sliding iron core is installed inside the air-core reactor. A first speed comparison value is calculated based on the current increase rate and the first reference data. A first current comparison value is calculated based on the current data and the first limit data. A first power comparison value is calculated using a weighted average algorithm based on the first speed comparison value and the first current comparison value. The weight of the first speed comparison value is greater than the weight of the first current comparison value. The length of the iron core extending into the air-core reactor is adjusted according to the positive correlation of the first power comparison value.

[0009] By adopting the above technical solution, the flexible switching between air-core and iron-core reactors can be achieved through a sliding iron core, taking into account both low loss under small rated current and current limiting requirements under large rated current. Combined with a weighted algorithm that prioritizes the rate of current increase, the iron core extension length is dynamically adjusted to accurately adapt to the fault development trend, avoid the shortcomings of fixed inductor current limiting, improve the timeliness and accuracy of current limiting response, enhance the ability of high-voltage systems to cope with sudden current faults, and effectively reduce the risk of equipment damage.

[0010] Optionally, the step of connecting the preset resistor current limiting module further includes the following sub-steps: The resistor current limiting module includes multiple resistor units connected in parallel; The second speed comparison value is calculated based on the current increase rate and the second reference data. The second current comparison value is calculated based on the current data and the second limit data. The second power comparison value is calculated using a weighted average algorithm based on the second speed comparison value and the second current comparison value. The weight of the second speed comparison value is less than the weight of the second current comparison value. After the resistor current limiting module is connected to the target line and reaches the preset first time, the number of resistor units of the resistor current limiting module is adjusted according to the second power comparison value.

[0011] By adopting the above technical solution, the impedance requirements of different fault mitigation stages can be met by combining multiple units, avoiding the rigid limitations of current limiting by a single resistor. At the same time, the core reference value of current amplitude is highlighted, and the impact of frequent switching on system stability is avoided. By positively adjusting the number of cut-out resistor units, the energy loss caused by excessive current limiting can be reduced while ensuring the effectiveness of current limiting.

[0012] Optionally, the step of connecting the preset resistor current limiting module further includes the following sub-steps: The resistor units in the resistor current limiting module are sorted according to their resistance values; If the second power comparison value is greater than the first current comparison value, then the resistor units are cut out in descending order of resistance value; otherwise, the resistor units are cut out in ascending order of resistance value.

[0013] By adopting the above technical solution, the resistor units are sorted according to their resistance values. The cutting-out order of resistance values ​​from large to small or from small to large is flexibly selected by combining the relationship between the second power comparison value and the first current comparison value. This achieves fine-grained step adjustment of impedance, which can accurately adapt to the current limiting requirements under different fault conditions and avoid the impact of impedance changes on the system.

[0014] Optionally, the step of connecting the preset capacitor current limiting module further includes the following sub-steps: The capacitor current limiting module includes multiple capacitor units, which are initially connected in series. The harmonic contrast value is calculated based on the total harmonic distortion rate and harmonic reference data. After the capacitor unit is connected to the target line, if the reactance current limiting module is connected to the target line, the number of capacitor units connected in series will be adjusted according to the negative correlation of the harmonic comparison value, and the capacitor units cut out from the target line will be connected in parallel to the capacitor units connected in series in the target line.

[0015] By adopting the above technical solution, the basic configuration of the capacitor units initially connected in series, combined with the access conditions of the reactance current limiting module, adjusts the number of series capacitor units according to the negative correlation of the harmonic comparison value and connects the cut-out units in parallel, so as to realize the fine dynamic adjustment of the capacitor reactance, accurately adapt to the suppression requirements of different harmonic distortion levels, and at the same time take into account the impedance matching of multiple current limiting modules working together, avoid impedance conflicts between modules, improve the pertinence of harmonic current limiting and the stability of the system's multi-module collaborative operation, and effectively enhance the harmonic current suppression effect.

[0016] Optionally, the step of connecting the preset capacitor current limiting module further includes the following sub-steps: When all capacitor units are connected in parallel, if the current data is greater than the preset third limit data, the resistor current limiting module is connected, wherein the third limit data is less than the first limit data. The third comparison value is calculated based on the current data and the third limit data, and the resistance value of the current limiting module is adjusted according to the positive correlation of the third comparison value. If the current data is less than the second limit data, the capacitor current limiting module will be switched off at the same time as the resistor current limiting module.

[0017] By adopting the above technical solution, when the parallel connection of capacitor units still cannot effectively suppress abnormal current, the current limiting module of the third limit trigger resistor, which is lower than the first limit, intervenes in advance to accurately adapt to the complex working condition of harmonics accompanied by mild current abnormality. At the same time, the resistance value is adjusted according to the positive correlation of the third comparison value to achieve fine matching of the current limiting degree under such working conditions. When the current falls back to the safe range, the capacitor and resistor current limiting modules are switched off simultaneously to avoid excessive current limiting from interfering with the normal operation of the system. This effectively improves the timeliness and accuracy of the collaborative response of multiple current limiting modules to complex faults and further enhances the working condition adaptability of the system current limiting strategy.

[0018] Optionally, the method further includes the following steps: The timestamp for connecting the reactor current limiting module is recorded as the first timestamp; Based on the first timestamp, the timestamp of the current limiting resistor module is recorded as the second timestamp; The difference between the second timestamp and the first timestamp is calculated as the time difference. If the time difference is less than the preset time reference value, the high-voltage current-limiting fuse is connected to the target line.

[0019] By adopting the above technical solution, and by recording the access timestamps of the reactance and resistance current limiting modules and calculating the time difference, the high-voltage current limiting fuse is triggered when the fault develops rapidly (the time difference is less than the reference value). This adds a final layer of protection for emergency circuit breaking to the dynamic current limiting module, which can promptly cut off the rapidly deteriorating fault lines that the current limiting module cannot contain. This effectively avoids serious consequences such as damage to important power equipment and system instability caused by the further spread of the fault, and effectively protects the safety of important property within the system. At the same time, it improves the layered protection system from dynamic current limiting to emergency circuit breaking.

[0020] Optionally, the method further includes the following steps: Within the preset recording duration, the recording duration of the connection to the reactance current limiting module is the reactance current limiting duration, the recording duration of the connection to the resistor current limiting module is the resistor current limiting duration, and the recording duration of the connection to the capacitor current limiting module is the capacitor current limiting duration. The comprehensive current limiting time is calculated based on the current limiting time of reactance, current limiting time of resistor, and current limiting time of capacitor. The time recording comparison value is calculated based on the comprehensive time and the recorded time. The time reference value is adjusted based on the negative correlation of the time recording comparison value.

[0021] By adopting the above technical solution, the actual access time of each current limiting module within a preset time period is statistically analyzed and a comprehensive time comparison value is calculated. Based on this, the access time reference value of the high-voltage current limiting fuse is dynamically adjusted in a negative correlation. This achieves precise matching between the fuse access judgment conditions and the actual fault triggering frequency and operating condition characteristics of the system, avoiding the problem of fuse false triggering or emergency circuit breaker delay caused by fixed time reference values.

[0022] Secondly, this application provides a dynamic control system for high-voltage current limiting, which adopts the following technical solution: A dynamic control system for high-voltage current limiting includes a processor, wherein the processor executes the steps of the dynamic control method for high-voltage current limiting as described in any of the preceding claims.

[0023] In summary, this application includes at least one of the following beneficial technical effects: The high-voltage current limiting dynamic control method of this application breaks through the single mode and inherent defects of traditional passive current limiting of total power, avoids the cascading impact on power supply to non-faulty areas, and achieves independent and precise control of each current limiting module and multi-module collaborative adaptation through precise harmonic and current characteristic detection, hierarchical and progressive current limiting module access logic, combined with multi-module personalized design of capacitor unit series and parallel dynamic adjustment, reactor core sliding adaptation, and resistor unit fine-grained step adjustment. It can specifically deal with the complex operating conditions of pure harmonic anomaly, current mutation, and harmonic accompanied current anomaly. At the same time, through the emergency circuit breaking protection of high-voltage current limiting fuse and the self-adaptive adjustment of the fuse judgment time reference value based on the current limiting module access time, it improves the hierarchical protection system from dynamic current limiting to emergency circuit breaking. It not only achieves precise matching between current limiting strategy and system operating conditions, fault type and development trend, taking into account the effectiveness of current limiting and energy consumption control, but also effectively avoids the risks of equipment damage and system oscillation caused by the rapid deterioration of faults. Attached Figure Description

[0024] Figure 1 This is a flowchart illustrating the steps of a dynamic control method for high-voltage current limiting.

[0025] Figure 2 This is a sub-step diagram for connecting to the preset reactor current limiting module. Detailed Implementation

[0026] The embodiments of this application are described in detail below, and examples of the embodiments are shown in the accompanying drawings.

[0027] In the description of this specification, the references to "certain embodiments," "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples" refer to specific features, structures, materials, or characteristics described in connection with the described embodiment or example, which are included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0028] This application discloses a dynamic control method for high-voltage current limiting, referring to... Figure 1 It includes the following steps: Step 1: Current signal acquisition and preprocessing: Based on a preset current sensor, current data of the target high-voltage line is continuously acquired according to a preset acquisition period (e.g., 20kHz) to obtain the original current sampling sequence. The acquisition process follows the Nyquist sampling theorem to ensure that the sampling frequency is not less than twice the highest frequency of the current signal, thus avoiding aliasing distortion. The acquired raw data is preprocessed to filter out high-frequency noise, DC components, and random interference, resulting in a standardized time-domain current sampling sequence x(n), where n is the sampling point index and N is the number of sampling points.

[0029] Step 2: Zero-padding the sampled sequence and superimposing it with the window function: The preprocessed sampling sequence x(n) is padded with zeros: if the original number of sampling points N is not an integer power of 2, zeros are padded to the end of the sequence until the nearest integer power of 2 N′ is reached. This ensures the efficient operation of the subsequent FFT algorithm and improves the frequency resolution of the spectral analysis. Then, a Hanning window is superimposed on the zero-padded sampling sequence x′(n) to suppress spectral leakage. The expression for the Hanning window is: w(n)=0.5[1-cos(2πn / N′)], n=0, 1,…,N′-1; By using window function truncation, spectral leakage and picket fence effects caused by non-integer period sampling can be effectively suppressed, thereby improving the accuracy of frequency domain analysis.

[0030] Step 3: Frequency Domain Conversion and Harmonic Data Extraction: The sampled sequence after being overlaid with the Hanning window is converted into frequency domain data using Fast Fourier Transform (FFT). The FFT calculation formula is as follows: Where k is the frequency point index, this efficient implementation of the discrete Fourier transform can meet the real-time computing requirements. The amplitude and phase of each harmonic are extracted based on the frequency domain data X(k): Let the fundamental frequency be f0 (e.g., 50Hz), then the frequency corresponding to the h-th harmonic is h×f0, its amplitude is Ah=2|X(kh) / N′|, and its phase is ϕh=arg[X(kh)], h=2, 3, …, 40. The total harmonic distortion rate is calculated based on the amplitude of each harmonic: Where A1 is the fundamental amplitude.

[0031] Step 4: Determining the connection and disconnection of the capacitor current limiting module: Compare the calculated total harmonic distortion (THD) with the preset harmonic reference data (e.g., 5%): If THD > harmonic reference data, it means that the harmonic content of the line exceeds the standard. At this time, the preset capacitor current limiting module is connected to suppress harmonic current in a targeted manner through capacitive reactance characteristics, thereby reducing the interference of harmonics on the system. If THD ≤ harmonic reference data, it means that the harmonic content is within a safe range. At this time, the capacitor current limiting module should be switched off to avoid unnecessary energy consumption and impedance introduction.

[0032] Step 5: Current sequence filtering and current increase rate calculation: To accurately obtain the current change trend, a moving average algorithm is used to filter multiple consecutive sets of raw current data to eliminate high-frequency noise interference. The moving average formula is as follows: Where L is the length of the sliding window, for example, taking 10 sampling points, Let be the smoothed current value at time k. For the smoothed current sequence... Perform a differential operation to obtain the rate of increase of the current: ; where Δt is the sampling period, and this speed value reflects the rate of change of current and is used to determine the development trend of faults.

[0033] Step 6: Determining the connection and disconnection of the reactor current limiting module: Compare the current increase rate v(k) with a preset first reference data (e.g., 10A / ms), and simultaneously compare the current data i(k) with a preset first limit data (e.g., 1.2 times the rated current): If v(k) > the first reference data and i(k) > the first limit data, it indicates that the line is experiencing an abnormal condition of rapid current increase. At this time, the preset reactance current limiting module is connected to suppress the rapid current increase by increasing the line inductance impedance, thereby reducing the risk of fault expansion. If any of the above conditions are not met, it means that the current is in a stable or safe drop-off state. At this time, the reactor current limiting module should be switched off to avoid excessive current limiting affecting the normal operation of the system.

[0034] Step 7: Determining the connection and disconnection of the resistor current limiting module: Assuming the reactance current limiting module is already connected, further determine whether a resistance current limiting module is needed: compare the current increase rate v(k) with a preset second reference data (e.g., 5A / ms, less than the first reference data), and simultaneously compare the current data i(k) with a preset second limit data (e.g., 1.5 times the rated current, greater than the first limit data). If v(k) > the second reference data and i(k) > the second limit data, it means that the current is still rising rapidly and has reached a higher risk threshold. At this time, the preset resistor current limiting module is connected to further limit the current amplitude by increasing the line resistance impedance to avoid equipment damage. If i(k) < the second limit data, it means that the current has fallen back to the safe range. At this time, the resistor current limiting module is switched out synchronously based on the switching out state of the reactor current limiting module: if the reactor module has been switched out, the resistor module is switched out directly; if the reactor module is still running, the resistor module is switched out after the reactor module is switched out, so as to ensure the continuity and stability of current limiting.

[0035] Through the specific implementation steps described above, this method achieves dynamic current limiting control in different scenarios and at different levels: for harmonic anomalies, harmonics are suppressed through precise frequency domain analysis and capacitor module adaptation; for current surges, current trends are accurately captured through moving average filtering and differential calculation, and reactance and resistance modules are accessed in a layered manner using dual-parameter thresholds, avoiding the impact of traditional total power current limiting on non-faulty areas. Simultaneously, the switching-out mechanism of each module ensures that the system quickly returns to normal operation after the fault is cleared, reducing energy loss and the impact on power supply reliability.

[0036] Reference Figure 2 In the process of connecting the reactor current limiting module in step 6 above, this application also provides an optional refined control implementation method to further improve the adaptability and response accuracy of the reactor current limiting under operating conditions, specifically including the following sub-steps: Sub-step 6.1: Reactor structural adaptability configuration: The core component of the reactor current limiting module is an air-core reactor. First, the rated current value of the target high-voltage line is obtained, such as 1200A, and compared with a preset maximum current threshold (such as 1000A). If the rated current of the target line is greater than the maximum current threshold, it means that the line needs to cope with the high current fault scenario. At this time, a sliding iron core mechanism is installed inside the air-core reactor. The iron core is driven to move axially by an electric push rod to realize the flexible switching between the air-core reactor and the iron core reactor. If the rated current of the target line is less than or equal to the maximum current threshold, it indicates that the line is mainly operating under low current conditions. At this time, the core of the air reactor is completely withdrawn to maintain the low-loss operation characteristics of the air reactor and reduce energy consumption under normal operating conditions.

[0037] Sub-step 6.2: Weighted calculation of power comparison values: To accurately reflect the urgency of the fault development, a weighted fusion calculation is performed on the current increase rate and current amplitude: First speed comparison value calculation: Normalize the current current increase rate v(k) with the preset first reference data vref1 (e.g., 10A / ms) to obtain the first speed comparison value: Sv=v(k) / vref1; First current comparison value calculation: Normalize the current current data i(k) with the preset first limit data ilimit1 (e.g., 1.2 times the rated current) to obtain the first current comparison value: Si=i(k) / ilimit1; The first power comparison value is calculated by weighted average: The two comparison values ​​are combined by weighted average algorithm, where the weight of the first speed comparison value (e.g., 0.7) is greater than the weight of the first current comparison value (e.g., 0.3) to highlight the priority of the current increase rate, a core indicator of the urgency of the fault: Total = 0.7 × Sv + 0.3 × Si; Sub-step 6.3: Dynamic adjustment of the core insertion length: Based on the calculated first power comparison value Stotal, the iron core is moved axially along the hollow reactor by an electric push rod, thereby achieving positive correlation adjustment of the iron core extension length: When the total value is small (e.g., Total < 1), it indicates that the fault development is gradual and only low inductive impedance is needed to suppress the current. In this case, the core extension length is relatively short, such as 10%. When the total value is large (e.g., Total > 2), it indicates that the fault is developing rapidly, and the inductor impedance needs to be increased to quickly limit the current. At this time, the core extension length is relatively long, such as 60%. This dynamic adjustment mechanism enables the inductor impedance to adapt in real time to the fault development trend, avoiding the defects of "insufficient current limiting" or "excessive current limiting" of traditional fixed inductor reactance current limiting modules.

[0038] Through the above optional refinement steps, this implementation achieves adaptive configuration of the reactor current limiting module under various operating conditions: maintaining low-loss operation of the air-core reactor in low-rated current scenarios, and enhancing current limiting capability through a sliding core in high-rated current scenarios; at the same time, the weighted algorithm based on the urgency of the fault and dynamic core adjustment make the current limiting response more in line with the fault development rhythm, effectively improving the timeliness and accuracy of the high-voltage system in responding to sudden current faults, and further reducing the risk of mechanical and thermal damage to equipment caused by current surges.

[0039] In the process of connecting the resistor current limiting module in step 7 above, this application also provides an optional refined control implementation method to further improve the dynamic adaptability and system stability of the resistor current limiting, specifically including the following sub-steps: Sub-step 7.1: Structural configuration of the resistor current limiting module: The resistor-based current-limiting module consists of multiple independent resistor units connected in parallel. For example, it may contain five resistor units with resistance values ​​of 1Ω, 2Ω, 3Ω, 4Ω, and 5Ω. Initially, all resistor units are connected in parallel, resulting in the minimum total impedance of the module. This multi-unit parallel structure allows for stepped adjustment of the total impedance by removing different numbers of resistor units. The more resistor units removed, the greater the total impedance of the remaining parallel units, thus adapting to the impedance requirements of different fault mitigation stages and avoiding the rigid limitations of a single fixed resistor for current limiting.

[0040] Sub-step 7.2: Weighted calculation of the second power comparison value: To accurately reflect the current state during the fault mitigation phase, a weighted fusion calculation is performed on the current increase rate and current amplitude, with the current amplitude having a higher weight to highlight its core reference value in assessing fault severity. Second speed comparison value calculation: Normalize the current current increase rate v(k) with the preset second reference data vref2 (e.g., 5A / ms) to obtain the second speed comparison value: Sv2=v(k) / vref2; Second current comparison value calculation: Normalize the current current data i(k) and the preset second limit data ilimit2 (such as 1.5 times the rated current) to obtain the second current comparison value: Si2=i(k) / ilimit2; The weighted average calculation of the second power comparison value: The weighted average algorithm is used to merge the two comparison values ​​mentioned above. The weight of the second speed comparison value (e.g., 0.3) is less than the weight of the second current comparison value (e.g., 0.7) to highlight the core reference role of the current amplitude in the fault mitigation stage: Total2 = 0.3 × Sv2 + 0.7 × Si2; Sub-step 7.3: Delay debounce and resistor unit cut-out adjustment: To avoid frequent switching when the resistor module is first connected, which may interfere with system stability, a delay debouncing mechanism with a preset first duration (e.g., 50ms) is set: Once the resistor current limiting module is connected to the target line and reaches the first duration, the number of disconnected resistor units is adjusted positively according to the calculated second power comparison value Statotal2: If Total2≤0.5, it means that the current has dropped significantly and only minimum impedance is needed to maintain the current limit. At this time, one resistor unit is cut out. If 0.5 < Total2 ≤ 1.2, it means that the current is still in the medium risk range and the impedance needs to be increased. In this case, three resistor units should be cut out. If Total2 > 1.2, it indicates that the current is still in a high-risk state and requires maximum impedance current limiting. In this case, cut out 5 resistor units and keep only the unit with the smallest resistance value.

[0041] This positive correlation adjustment mechanism not only ensures the effectiveness of current limiting, but also avoids the impact of impedance changes on the system through stepped impedance adjustment. At the same time, it reduces the number of connected resistor units in a timely manner after the fault is relieved, thereby reducing the energy loss caused by excessive current limiting.

[0042] Through the above optional refinement steps, this implementation method realizes dynamic step-by-step adjustment of resistor current limiting: the multi-unit parallel structure meets the impedance requirements of different fault stages, the weighted algorithm highlights the core reference value of current amplitude, and the delay anti-jitter mechanism avoids frequent switching from affecting system stability. Ultimately, while ensuring the accuracy of current limiting, energy consumption loss is reduced, further improving the stability and economy of high-voltage system fault protection.

[0043] Based on the resistor unit cut-out adjustment in sub-step 7.3 above, this application further provides an optional implementation of refined impedance step adjustment, which avoids the impact of impedance abrupt changes on the system by optimizing the cut-out sequence of resistor units. Specifically, it includes the following sub-steps: Sub-step 7.3.1: Pre-sorting the resistance values ​​of the resistor units: During the initialization phase of the resistor current limiting module, the resistance values ​​of all parallel resistor units are sorted. For example, a module containing 5 resistor units (with resistance values ​​of 5Ω, 4Ω, 3Ω, 2Ω, and 1Ω) is pre-sorted into a sequence [5Ω, 4Ω, 3Ω, 2Ω, 1Ω] in descending order of resistance value. This pre-sorting provides a clear basis for subsequent precise switching, ensuring the step-wise and controllable nature of impedance adjustment.

[0044] Sub-step 7.3.2: Logic for determining the cutting order: Based on the calculated second power comparison value (Stotal2, reflecting the combined state of current velocity and amplitude during the fault mitigation phase) and the first current comparison value (Si, reflecting the current amplitude state during the reactance connection phase), the cut-off order is determined: If Total2 > Si, it means that the overall urgency of the fault (speed + amplitude) exceeds the risk of the current amplitude alone. In this case, it is necessary to gradually increase the impedance to avoid system impact. Therefore, select the resistor units in descending order of resistance value. If Total2≤Si, it means that the fault is mainly caused by the current amplitude. It is necessary to quickly increase the impedance to curb the current growth. Therefore, the resistor units should be cut out in order of increasing resistance value.

[0045] Sub-step 7.3.3: Sequentially cut out the resistor units: Based on the pre-sorting results and the decision logic, the resistor cell cut-out operation is executed: Slow impedance increase scenario (Stotal2 > Si): Cut out resistors in the order of 5Ω → 4Ω → 3Ω → 2Ω → 1Ω. Since large-value resistors contribute little to the total impedance in a parallel structure, the total impedance only increases gradually after cutting them out. For example, after cutting out 5Ω, the total impedance increases from about 0.43Ω to about 0.5Ω, avoiding the interference of sudden impedance changes on the system. For scenarios requiring rapid impedance increases (Stotal2≤Si): cut out resistors in the order of 1Ω→2Ω→3Ω→4Ω→5Ω. Since small-value resistors contribute significantly to the total impedance in a parallel structure, cutting them out results in a substantial increase in total impedance. For example, cutting out 1Ω resistors increases the total impedance from approximately 0.43Ω to approximately 0.67Ω, quickly adapting to the current-limiting requirements of high-amplitude currents.

[0046] Through the above optional refinement steps, this implementation achieves fine-grained step adjustment of impedance: the combination of pre-sorting and dynamic cut-out order not only ensures the accuracy of current limiting under different fault conditions, but also avoids system oscillation through gradual or rapid impedance changes, further improving the adaptability of the resistor current limiting module and the stability of system operation.

[0047] In the process of connecting the capacitor current limiting module in step 4 above, this application also provides an optional implementation method for fine-tuning capacitive reactance to adapt to the combined operating conditions of harmonics and current surges, and to improve the stability of multi-module collaborative operation. Specifically, it includes the following sub-steps: Sub-step 4.1: Initial structural configuration of the capacitor current limiting module: The capacitor current limiting module consists of multiple capacitor units of the same specification, such as six capacitor units with a capacitance of 10μF, initially connected in series. In the series configuration, the total capacitive reactance of the module is the sum of the capacitive reactances of each unit. For example, at the 5th harmonic frequency, when the capacitive reactance of a single unit is 10Ω, the initial total capacitive reactance is 60Ω. This can provide a large capacitive reactance when harmonic distortion is severe, accurately suppressing high-order harmonic currents.

[0048] Sub-step 4.2: Calculation of harmonic contrast values: Based on the obtained total harmonic distortion (THD) and the preset harmonic reference data (THDref, such as 5%), the harmonic comparison value is calculated as: Sh = THD / THDref; this value is a normalized quantitative index of the degree of harmonic distortion. Sh > 1 indicates that the harmonic content exceeds the standard, and the larger Sh is, the more severe the harmonic distortion.

[0049] Sub-step 4.3: Dynamic adjustment of capacitive reactance: After the capacitor unit is connected to the target line, the connection status of the reactance current limiting module is monitored in real time: If the current limiting module is not connected, it means that there is only harmonic anomaly in the system. Maintain the initial series connection of the capacitor unit to suppress harmonics with maximum capacitive reactance. If the reactor current limiting module is already connected, it indicates that the system is under a combined operating condition of harmonics and sudden current changes, and the capacitor connection method needs to be dynamically adjusted. Negative correlation adjustment of series quantity: The number of capacitor units retained in the series branch is adjusted according to the harmonic contrast value Sh; the larger Sh is (the more severe the harmonics), the more series units are retained; the smaller Sh is (the milder the harmonics), the fewer series units are retained.

[0050] Parallel connection adaptation of cut-out units: Capacitor units cut out from the series branch are directly connected in parallel to both ends of the current series branch. For example: When Sh=1.8 (THD=9%, severe harmonics), retain 5 units in series (total capacitive reactance 50Ω), cut out 1 unit and connect it in parallel to the series branch, the total capacitive reactance is 50Ω||10Ω≈8.33Ω; When Sh=0.9 (THD=4.5%, slight harmonics), retain 3 units in series (total capacitive reactance 30Ω), cut out 3 units and connect them in parallel to the series branch, the total capacitive reactance is 30Ω||(10Ω / 3)≈3.33Ω.

[0051] Through the above optional refinement steps, this implementation method achieves refined dynamic adjustment of capacitive reactance: the initial series configuration ensures the suppression effect in high harmonic scenarios, and the connection method adjustment combined with the reactor access condition not only accurately adapts to the requirements of different harmonic distortion levels, but also avoids resonance conflicts between modules through impedance matching of capacitive reactance and reactor, improves the stability of multi-module collaborative operation, and effectively strengthens the suppression effect of harmonic current.

[0052] Based on the dynamic adjustment of capacitive reactance in sub-step 4.3 above, this application further provides an optional implementation method for co-current limiting of capacitor and resistor modules to address the combined operating condition of harmonics accompanied by slight current anomalies, thereby achieving precise handling of combined faults. Specifically, this includes the following sub-steps: Sub-step 4.4: Determining the state of all capacitor units in parallel: After the capacitor units of the capacitor current limiting module are dynamically adjusted in sub-step 4.3, if the number of series units cut off reaches its maximum value, that is, all capacitor units are cut off from the series branch and connected in parallel, for example, all six 10μF units are connected in parallel, and the total capacitive reactance drops to approximately 1.67Ω at the 5th harmonic frequency, then the module is determined to have entered a fully parallel state. At this time, the capacitive reactance has been reduced to the minimum. If it is still not enough to suppress abnormal current, the resistor module needs to be activated for cooperative current limiting.

[0053] Sub-step 4.5: Third limit determination and resistor module connection: A third limit value, ilimit3 (e.g., 1.1 times the rated current), is preset. This value is less than the first limit value (1.2 times the rated current) in step 6, and is used to detect minor current anomalies in advance. Real-time monitoring of the current data i(k) of the target line. If i(k) > ilimit3 after all capacitor units are connected in parallel, it indicates that the system is in a combined operating condition of "harmonics + slight current change". At this time, the preset resistor current limiting module is immediately connected. The initial state is that all resistor units are connected in parallel, and the total impedance is minimized. The low threshold design of the third limit data can avoid the lag of traditional current limiting, which only activates resistor current limiting when the current reaches a high threshold, and achieve early intervention for mild current anomalies.

[0054] Sub-step 4.6: Calculation of the third comparison value and dynamic adjustment of the resistance value: The third comparison value is calculated as follows: Based on the current current data i(k) and the third limit data ilimit3, the normalized third comparison value is calculated: S3 = (i(k) - ilimit3) / (ilimit1 - ilimit3); where ilimit1 is the first limit data. This formula ensures that the value of S3 is in the range of [0, 1], which accurately quantifies the severity of mild current anomalies.

[0055] Resistance value positive correlation adjustment: The total resistance value of the current limiting module is dynamically adjusted according to the third comparison value S3. The adjustment logic is the same as that of sub-step 7.3 (achieved by cutting off the number of resistor units): If 0 < S3 ≤ 0.5 (mild current anomaly), cut out a small number of resistor units (e.g., 1 unit), and slightly increase the total impedance (e.g., from 0.43Ω to 0.5Ω) to avoid excessive current limiting; If 0.5 < S3 ≤ 1 (moderate current anomaly), cut out more resistor units (e.g., 3), significantly increasing the total impedance (e.g., from 0.43Ω to 0.83Ω), thus enhancing the current limiting effect; This adjustment mechanism achieves a precise match between the resistance value and the degree of current anomaly.

[0056] Sub-step 4.7: Synchronously switch out the capacitor and resistor modules: Real-time monitoring of current data i(k) is performed. When i(k) < ilimit2 (the second limit data, such as 1.5 times the rated current), it indicates that the composite fault has been effectively suppressed, and a synchronous cut-off operation is executed at this time. Simultaneously disconnect the capacitor current limiting module and the resistor current limiting module to avoid impedance sudden changes caused by disconnecting them separately; After being disconnected, the capacitor units return to their initial series connection state, and the resistor units return to their fully parallel connection state, preparing for the next fault response.

[0057] Through the above optional refinement steps, this implementation method achieves coordinated current limiting under complex operating conditions: the low threshold design of the third limit data triggers the intervention of the resistor module in advance to avoid the expansion of the fault; the resistance adjustment driven by the third comparison value ensures accurate adaptation of the current limiting degree; the synchronous cut-out mechanism ensures a smooth transition of the system, which not only solves the defect that a single capacitor module cannot cope with "harmonics + mild current anomaly", but also improves the stability and operating condition adaptability of multi-module coordinated operation, and further strengthens the fault protection capability of the high-voltage system.

[0058] To address extreme scenarios where faults develop rapidly, this application, based on the aforementioned layered current limiting of reactance and resistance, further adds a high-voltage current-limiting fuse emergency protection mechanism, forming a complete protection system of "dynamic current limiting + emergency circuit breaking," specifically including the following steps: Step 8: Record the timestamp of the rate limiting module connection: First timestamp acquisition: When the system performs the current limiting module connection operation in step 6, timestamp recording is triggered synchronously. The instant when the module completes the connection and begins to play the current limiting role is recorded as the first timestamp t1. The timestamp accuracy is set to the millisecond level (e.g., 1ms) to ensure accurate capture of the fault development sequence. Second timestamp acquisition: Using the first timestamp t1 as the timing reference, when the system performs the resistor current limiting module connection operation in step 7, the instant when the module completes the connection is immediately recorded as the second timestamp t2. The acquisition logic is consistent with the first timestamp to avoid timing deviation.

[0059] Step 9: Time Difference Calculation and Fault Development Speed ​​Determination: Time difference calculation: Based on the two collected timestamps, calculate the connection time difference between the resistor module and the reactance module: Δt=t2-t1; This difference directly reflects the evolution speed of the fault from "mild change" to "severe change", and the smaller Δt is, the more rapidly the fault deteriorates; Preset time reference value setting: The preset time reference value tref (e.g., 50ms) is determined through system simulation and equipment endurance test. Specifically, it is the maximum time interval threshold at which the dynamic current limiting module (reactor + resistor) can effectively suppress the fault. If Δt is less than this value, it means that the fault development speed exceeds the response capability range of the dynamic current limiting module.

[0060] Step 10: Connect the high-voltage current-limiting fuse to the control: Access determination logic: Compare the calculated time difference Δt with the preset time reference value tref: If Δt < tref, it is determined to be a "rapidly developing fault scenario". At this time, the combined current limiting of the reactor and resistor modules can no longer stop the current deterioration, and the connection command of the high-voltage current limiting fuse is immediately triggered. If Δt≥tref, it means that the fault development speed is within the controllable range of the dynamic current limiting module. Keep the fuse open and continue to perform hierarchical current limiting through the reactor and resistor modules. Fuse connection execution: The high-voltage current-limiting fuse is connected to the target line in series, and its action response time is ≤10ms, ensuring that the line is cut off before the fault spreads to critical equipment; after connection, the system synchronously sends a fault alarm signal to the monitoring center to prompt maintenance personnel to investigate in a timely manner.

[0061] Through the optional steps described above, this implementation adds a final layer of protection for emergency circuit breaking in high-voltage power systems: by recording millisecond-level timestamps and calculating differences, it accurately identifies extreme scenarios where faults develop rapidly, preventing the dynamic current limiting module from escalating due to insufficient response speed; the rapid connection of the high-voltage current limiting fuse can directly cut off the faulty line, completely blocking the impact of current on power equipment, effectively avoiding serious accidents such as large-scale power outages and equipment burnouts. At the same time, it complements the dynamic current limiting mechanism mentioned above, improving the full-scenario protection system from "precise current limiting for minor faults" to "emergency circuit breaking for extreme faults", further enhancing the safety redundancy and operational reliability of high-voltage power systems.

[0062] To achieve self-adaptive optimization of the connection judgment conditions for high-voltage current-limiting fuses, and to dynamically adjust the time reference value based on the actual fault conditions of the system, this application further provides an optional implementation method for dynamic adjustment of the time reference value, based on the above-mentioned emergency protection steps, specifically including the following steps: Step 11: Statistics on the duration of access to the rate limiting module: Preset recording duration setting: Set the preset recording duration Trec (e.g., 24 hours). This duration is determined in conjunction with the system operation and maintenance cycle and fault statistics requirements to ensure that it can cover sufficient fault sample data and reflect the long-term operating conditions of the system. Access duration recording for each module: Within the preset recording duration Trec, the actual access duration of the three types of rate limiting modules is recorded in real time. Record the duration of each connection of the reactor current limiting module and accumulate the reactor current limiting duration TL; Record the duration of each connection to the resistor current limiting module and accumulate the resistor current limiting duration TR. The duration of each connection to the capacitor current limiting module is recorded, and the cumulative capacitor current limiting duration TC is obtained. The duration statistics are accurate to the millisecond level to ensure data accuracy. Invalid duration data such as module connection failure and false triggering are automatically removed during the statistics process.

[0063] Step 12: Calculation of overall traffic limiting duration: Considering that the reactance and resistance modules directly handle sudden current surges (strongly correlated with fuse triggering scenarios), the capacitor module mainly targets harmonic anomalies. A weighted sum method is used to calculate the overall current limiting duration, highlighting the operational weight of the core current limiting module. Weighting: The weights for reactance current limiting duration are set as wL=0.4, resistor current limiting duration as wR=0.4, and capacitor current limiting duration as wC=0.2, with the sum of the weights being 1. System simulation has verified that this weighting ratio can accurately reflect the correlation between the severity of the fault and the triggering of the fuse. The formula for calculating the overall current limiting duration is: Ttotal = wL × TL + wR × TR + wC × TC; where Ttotal is the overall current limiting duration. This calculation method takes into account the working condition contributions of the three types of modules, and also highlights the statistical weight of modules related to current surge faults, ensuring that the overall duration can truly reflect the system fault risk level.

[0064] Step 13: Calculation of duration record comparison value: The comprehensive rate limiting duration and the preset recording duration are normalized to obtain the duration recording comparison value: ST=Ttotal / Trec; the value range is [0,1]. The larger ST is, the higher the frequency of system fault triggering and the longer the fault duration within the preset recording duration, and the higher the risk of system operation; the smaller ST is, the more stable the system operation.

[0065] Step 14: Adjusting for negative correlation of time reference values: Based on the time-recorded comparison value ST, the preset time reference value tref of the high-voltage current-limiting fuse is dynamically adjusted with negative correlation: Adjustment logic: The larger ST is, the more frequent the system failures and the higher the risk. The time reference value should be reduced to improve the fuse triggering sensitivity and avoid delay in emergency circuit breaking when the fault deteriorates rapidly. The smaller ST is, the more stable the system operation. The time reference value can be appropriately increased to reduce the probability of fuse false triggering. Adjustment formula: tref, new = tref, base × (1 - k × ST); where: tref, base is the initial time reference value, such as 50ms; k is an adjustment coefficient, ranging from 0.3 to 0.5, determined by system testing; For example, when ST=0.8 (frequent failures) and k=0.4, tref,new=50×(1-0.4×0.8)=34ms, ensuring more sensitive triggering when failures are frequent; Adjustment constraints: Set the value range of tref and new, such as 10ms~80ms, to avoid excessive adjustment that may cause the fuse to be falsely triggered or fail to respond.

[0066] Through the above optional steps, this implementation method achieves accurate adaptation between the time reference value and the actual operating conditions of the system: based on the access duration statistics of the three types of current limiting modules, the system fault risk level is quantified by the weighted sum method, and then the fuse triggering threshold is dynamically optimized by the negative correlation adjustment mechanism. This not only solves the lag problem of fixed time reference values ​​in fault-prone scenarios, but also avoids the risk of false triggering under stable operating conditions, so that the layered protection system of "dynamic current limiting + emergency circuit breaking" has self-learning and self-adaptation capabilities.

[0067] This application also discloses a dynamic control system for high-voltage current limiting, including a processor, wherein the processor executes the steps of the dynamic control method for high-voltage current limiting as described in any of the above embodiments.

[0068] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application.

Claims

1. A dynamic control method for high-voltage current limiting, characterized in that, Includes the following steps: The current data of the target line is acquired based on a preset current sensor according to a preset acquisition period. The sampling sequence is obtained based on the current data. The sampling sequence is padded with zeros to adjust the number of sampling points to an integer power of 2. The Hanning window algorithm is superimposed to suppress spectral leakage. The sampling sequence is converted into frequency domain data through a preset frequency domain conversion algorithm. Harmonic data is extracted from the frequency domain data. The total harmonic distortion rate is calculated based on the harmonic data. If the total harmonic distortion rate is greater than the preset harmonic reference data, then the preset capacitor current limiting module is connected. The capacitor current limiting module is used to limit the harmonic current in the target line; otherwise, the capacitor current limiting module is disconnected. The current sequence is obtained by performing a moving average to filter out noise based on multiple consecutive sets of current data, and then the current increase rate is obtained by performing a difference operation on the current sequence. If the rate of increase of current exceeds the preset first reference data and the current data exceeds the preset first limit data, then the preset reactance current limiting module is connected. The reactance current limiting module is used to increase the inductive impedance in the target line; otherwise, the reactance current limiting module is disconnected. After connecting the reactance current limiting module, if the current increase rate is greater than the preset second reference data and the current data is greater than the preset second limit data, then the preset resistance current limiting module is connected. The resistance current limiting module is used to increase the line impedance in the target line; wherein, the second limit data is greater than the first limit data and the second reference data is less than the first reference data. If the current data is less than the second limit data, the cut-out resistor current limiting module is activated based on the cut-out state of the reactance current limiting module.

2. The dynamic control method for high-voltage current limiting according to claim 1, characterized in that, The steps of connecting the preset reactor current limiting module also include the following sub-steps: The reactor current limiting module includes an air-core reactor to obtain the rated current of the target line. If the rated current is greater than the preset maximum current, a sliding iron core is installed inside the air-core reactor. A first speed comparison value is calculated based on the current increase rate and the first reference data. A first current comparison value is calculated based on the current data and the first limit data. A first power comparison value is calculated using a weighted average algorithm based on the first speed comparison value and the first current comparison value. The weight of the first speed comparison value is greater than the weight of the first current comparison value. The length of the iron core extending into the air-core reactor is adjusted according to the positive correlation of the first power comparison value.

3. The dynamic control method for high-voltage current limiting according to claim 1, characterized in that, The steps for connecting the preset resistor current limiting module also include the following sub-steps: The resistor current limiting module includes multiple resistor units connected in parallel; The second speed comparison value is calculated based on the current increase rate and the second reference data. The second current comparison value is calculated based on the current data and the second limit data. The second power comparison value is calculated using a weighted average algorithm based on the second speed comparison value and the second current comparison value. The weight of the second speed comparison value is less than the weight of the second current comparison value. After the resistor current limiting module is connected to the target line and reaches the preset first time, the number of resistor units of the resistor current limiting module is adjusted according to the second power comparison value.

4. The dynamic control method for high-voltage current limiting according to claim 3, characterized in that, The steps for connecting the preset resistor current limiting module also include the following sub-steps: The resistor units in the resistor current limiting module are sorted according to their resistance values; If the second power comparison value is greater than the first current comparison value, then the resistor units are cut out in descending order of resistance value; otherwise, the resistor units are cut out in ascending order of resistance value.

5. The dynamic control method for high-voltage current limiting according to claim 1, characterized in that, The steps for connecting the preset capacitor current limiting module also include the following sub-steps: The capacitor current limiting module includes multiple capacitor units, which are initially connected in series. The harmonic contrast value is calculated based on the total harmonic distortion rate and harmonic reference data. After the capacitor unit is connected to the target line, if the reactance current limiting module is connected to the target line, the number of capacitor units connected in series will be adjusted according to the negative correlation of the harmonic comparison value, and the capacitor units cut out from the target line will be connected in parallel to the capacitor units connected in series in the target line.

6. The dynamic control method for high-voltage current limiting according to claim 5, characterized in that, The steps for connecting the preset capacitor current limiting module also include the following sub-steps: When all capacitor units are connected in parallel, if the current data is greater than the preset third limit data, the resistor current limiting module is connected, wherein the third limit data is less than the first limit data. The third comparison value is calculated based on the current data and the third limit data, and the resistance value of the current limiting module is adjusted according to the positive correlation of the third comparison value. If the current data is less than the second limit data, the capacitor current limiting module will be switched off at the same time as the resistor current limiting module.

7. The dynamic control method for high-voltage current limiting according to claim 1, characterized in that, The method also includes the following steps: The timestamp for connecting the reactor current limiting module is recorded as the first timestamp; Based on the first timestamp, the timestamp of the current limiting resistor module is recorded as the second timestamp; The difference between the second timestamp and the first timestamp is calculated as the time difference. If the time difference is less than the preset time reference value, the high-voltage current-limiting fuse is connected to the target line.

8. The dynamic control method for high-voltage current limiting according to claim 7, characterized in that, The method also includes the following steps: Within the preset recording duration, the recording duration of the connection to the reactance current limiting module is the reactance current limiting duration, the recording duration of the connection to the resistor current limiting module is the resistor current limiting duration, and the recording duration of the connection to the capacitor current limiting module is the capacitor current limiting duration. The comprehensive current limiting time is calculated based on the current limiting time of reactance, current limiting time of resistor, and current limiting time of capacitor. The time recording comparison value is calculated based on the comprehensive time and the recorded time. The time reference value is adjusted based on the negative correlation of the time recording comparison value.

9. A dynamic control system for high-voltage current limiting, characterized in that, Includes a processor, wherein the processor performs the steps of the dynamic control method for high-voltage current limiting as described in any one of claims 1-8.

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