Data transmission method for double-microprocessor architecture
By employing a data transmission method that differentiates processing based on handshake characters and data packet types in a dual-microprocessor architecture, the problems of increased interface resource consumption and costs associated with upgrading dual-microprocessor architectures are solved, achieving efficient data transmission and independent upgrades.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-29
- Publication Date
- 2026-04-14
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
The existing upgrade interface cannot simultaneously meet the upgrade requirements of the dual-microprocessor architecture, resulting in increased hardware resource consumption and costs.
A data transmission method is adopted, which uses cascading operations between the host computer and the main and slave microprocessors to distinguish the processing mode by using handshake characters and data packet types, so as to realize independent upgrades and data transmission of the main and slave microprocessors and avoid the duplication of hardware resources.
It enables diversified data transmission in a dual-microprocessor architecture, meeting upgrade requirements without consuming hardware resources and reducing costs.
Smart Images
Figure CN121864564A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of communication technology, and more specifically to a data transmission method for a dual-microprocessor architecture. Background Technology
[0002] Walkie-talkies typically have upgrade interfaces for firmware updates, enabling them to fix system vulnerabilities, expand functionality, and perform long-term maintenance. Complex walkie-talkies, in order to meet the needs of task allocation, application, and enhanced system reliability, often require two microprocessors, a primary and a secondary one, to handle their respective functional modules. Existing upgrade interfaces usually only support upgrades for a single microprocessor and cannot meet the upgrade requirements of an architecture with two microprocessors. If two separate upgrade interfaces are set up for upgrading the primary and secondary microprocessors, it will not only consume hardware resources but also increase costs.
[0003] In view of this, the applicant has conducted in-depth research on the above-mentioned issues, which led to this case. Summary of the Invention
[0004] The purpose of this invention is to provide a data transmission method for dual-microprocessor architectures that meets the upgrade requirements of dual-microprocessor architectures, does not occupy hardware resources, and reduces costs.
[0005] To achieve the above objectives, the present invention adopts the following technical solution: A data transmission method for a dual-microprocessor architecture, wherein the dual-microprocessor architecture includes a main microprocessor and a secondary microprocessor that are communicatively connected, characterized in that the data transmission method includes the following steps: S1: The host computer sends a data packet to the main microprocessor. The data packet includes handshake characters, data type, number of data items, data content, checksum, and end character. S2: When the main microprocessor receives the data packet, it parses and identifies the data packet to obtain the handshake string of the handshake characters in the data packet. The handshake string is divided into three types, namely the first string, the second string, and the third string. S3: Determine the handshake string of the handshake character. When the handshake string is determined to be the first string, the main microprocessor buffers the data packet and sends it to the secondary microprocessor. When the handshake string is determined to be the second string, determine whether to upgrade the main microprocessor based on the data packet. If yes, the main microprocessor receives the data packet; otherwise, the main microprocessor directly passes the data packet to the secondary microprocessor. When the handshake string is determined to be the third string, the main microprocessor directly passes the data packet to the secondary microprocessor. S4: After receiving the data packet, the main microprocessor and the sub-microprocessor perform corresponding operations based on the data content in the data packet.
[0006] Furthermore, before the host computer sends a data packet to the main microprocessor, the host computer first sends a handshake request signaling to the main microprocessor. The main microprocessor performs a handshake response based on the handshake request signaling and determines whether the host computer has received the handshake response. If a handshake response is received, communication is maintained; if a handshake response is not received, communication is stopped.
[0007] Further, in step S3, when the handshake string is determined to be the first string, the main microprocessor continues to obtain the number of data items in the data packet. Based on the obtained number of data items in the data packet, a buffer is set. After receiving the data packet, the main microprocessor performs a CRC check on the data packet in the buffer. If the check fails, the main microprocessor sends an error message to the host computer. The host computer receives the error message and retransmits the data packet. If the check passes, the data packet is stored in the buffer. The main microprocessor sends the data packet stored in the buffer to the secondary microprocessor. After receiving the data packet, the secondary microprocessor performs a checksum on the data packet. If the check fails, the secondary microprocessor sends an error message to the main microprocessor. The main microprocessor receives the error message and retransmits the data packet. If the check passes, the data packet is stored in the secondary microprocessor.
[0008] Furthermore, in step S3, when it is determined that the handshake string is the second string, the main microprocessor obtains the data type in the data packet, and determines whether to upgrade the main microprocessor based on the obtained data type in the data packet. If so, the main microprocessor receives the data packet, and the main microprocessor continues to obtain the number of data items in the data packet. Based on the obtained number of data items in the data packet, a buffer is set. After receiving the data packet, the main microprocessor performs a checksum verification on the data packet in the buffer. If the checksum verification fails, the main microprocessor sends an error message to the host computer. The host computer receives the error message and resends the data packet. If the checksum verification passes, the data packet is stored in the main microprocessor. If not, the main microprocessor directly transmits the data packet to the secondary microprocessor. The secondary microprocessor continues to obtain the number of data items in the data packet and sets up a buffer based on the obtained number of data items. After receiving the data packet, the secondary microprocessor performs a checksum verification on the data packet in the buffer. If the checksum fails, the secondary microprocessor sends an error message to the host computer. The host computer receives the error message and retransmits the data packet. If the checksum passes, the data packet is stored in the secondary microprocessor.
[0009] Furthermore, in step S3, when it is determined that the handshake string is the third string, the main microprocessor directly transmits the data packet to the secondary microprocessor. The secondary microprocessor continues to obtain the number of data items in the data packet, sets up a buffer based on the obtained number of data items in the data packet, and stores the data packet in the buffer after receiving the data packet. The secondary microprocessor sends the received response message to the host computer and determines whether the host computer has received the response message within a preset time. If it has, it will not continue to send the data packet; if not, it will resend the data packet.
[0010] By adopting the above technical solution, the present invention has the following beneficial effects: This invention diversifies the data transmission between the host computer and the dual-microprocessor architecture through cascading operations, which can meet the upgrade requirements of having a main microprocessor and a secondary microprocessor without consuming hardware resources and reducing costs. Attached Figure Description
[0011] Figure 1 This is a flowchart of a data transmission method for a dual-microprocessor architecture according to the present invention; Figure 2 This is a schematic diagram of data packet transmission when the handshake string is the first string in this invention; Figure 3 This is a schematic diagram of data packet transmission when the handshake string is the second string in this invention; Figure 4 This is a schematic diagram of data packet transmission when the handshake string is the second string in this invention. Detailed Implementation
[0012] The invention will be further described below with reference to the accompanying drawings and specific embodiments.
[0013] like Figure 1 As shown, a data transmission method for a dual-microprocessor architecture is described. The dual-microprocessor architecture includes a main microprocessor and a secondary microprocessor that are communicatively connected. The data transmission method includes the following steps: S1: The host computer first sends a handshake request signaling to the main microprocessor. The main microprocessor responds to the handshake request signaling and determines whether the host computer has received the handshake response. If the handshake response is received, communication is maintained; if no handshake response is received, communication is stopped. The data packet includes handshake characters, data type, number of data items, data content, checksum, and end character. The data content contains instructions, and the data type contains a string representing the default value. If no handshake response is received, communication is stopped.
[0014] S2: When the main microprocessor receives a data packet, it parses and identifies the data packet and obtains the handshake string of the handshake characters in the data packet. The handshake string is divided into three types, namely the first string, the second string and the third string. In this embodiment, the first string is "PROGRAM", the second string is "UPDATE" and the third string is "FACTORY".
[0015] S3: Determine the handshake string. When the handshake string is the first string, the main microprocessor buffers the data packet and sends it to the slave microprocessor. When the handshake string is the second string, determine whether to upgrade the main microprocessor based on the data packet. If yes, the main microprocessor receives the data packet completely and does not send it to the slave microprocessor again. If not, the main microprocessor directly passes the data packet to the slave microprocessor. When the handshake string is the third string, the main microprocessor directly passes the data packet to the slave microprocessor.
[0016] like Figure 2As shown, when the handshake string is determined to be the first string, the main microprocessor continues to obtain the number of data items in the data packet. Based on this number, a buffer is set up. In this embodiment, the buffer is set to 512 bytes to accommodate the data packet storage bandwidth. After receiving the data packet, the main microprocessor performs a CRC check on the data packet in the buffer. If the check fails, the main microprocessor sends an error message to the host computer. The host computer receives the error message and resends the data packet. If the check passes, the data packet is stored in the buffer. The main microprocessor then sends the data packet stored in the buffer to the secondary microprocessor. After receiving the data packet, the secondary microprocessor... The secondary microprocessor performs a checksum verification on the data packet. If the checksum fails, the secondary microprocessor sends an error message to the primary microprocessor. Upon receiving the error message, the primary microprocessor retransmits the data packet. If the checksum passes, the data packet is stored in the secondary microprocessor. The dual-microprocessor architecture employs an independent error correction method. After the primary microprocessor completes the handshake with the host computer, it requests data from the host computer for buffering. After completing the data interaction with the host computer, it communicates independently with the secondary microprocessor. If the secondary microprocessor fails the checksum verification, it sends the data to the host computer. The primary microprocessor independently performs communication error judgment and retransmits the data separately, thereby achieving a faster data error retransmission operation between the two microprocessors.
[0017] like Figure 3 As shown, when the handshake string is determined to be the second string, the main microprocessor obtains the data type in the data packet. The data type includes a fourth string corresponding to the main microprocessor and a fifth string corresponding to the secondary microprocessor. In this embodiment, based on the data type in the obtained data packet, it is determined whether to upgrade the main microprocessor. If so, the main microprocessor receives the data packet and continues to obtain the number of data items in the data packet. Based on the number of data items in the obtained data packet, a 2048-byte buffer is set up and expanded to 2048 bytes to achieve high-speed transmission. After receiving the data packet, the main microprocessor performs a checksum verification on the data packet in the buffer. If the checksum fails, the main microprocessor sends an error message to the host computer. The host computer receives the error message and resends the data packet. If the checksum passes, the data packet is stored in the buffer.
[0018] If not, the main microprocessor directly passes the data packet to the secondary microprocessor. The secondary microprocessor obtains the number of data items in the data packet and sets up a 2048-byte buffer based on the obtained number of data items. After receiving the data packet, the secondary microprocessor performs a checksum verification on the data packet in the buffer. If the checksum fails, the secondary microprocessor sends an error message to the host computer. The host computer receives the error message and resends the data packet. If the checksum passes, the data packet is stored in the secondary microprocessor. By adding a data type, it is possible to distinguish whether the upgrade is performed on the main microprocessor or the secondary microprocessor, thereby realizing an independent upgrade mechanism between the two microprocessors, reducing upgrade risks and improving the reliability of the two microprocessors.
[0019] like Figure 4 As shown, when the handshake string is the third string, the main microprocessor directly transmits the data packet to the secondary microprocessor. The secondary microprocessor obtains the number of data items in the data packet and sets an 8-byte buffer based on the obtained number of data items. After receiving the data packet, it stores the data packet in the buffer. The secondary microprocessor does not perform a checksum on the data packet in the buffer. The secondary microprocessor sends the received response message to the host computer and determines whether the host computer has received the response message within a preset time. If it has, it will not continue to send data packets; if not, it will resend the data packet. In this embodiment, the preset time is 100ms, that is, if the host computer does not receive a response message within 100ms, it will resend the data packet without sending error information to the host computer, thereby achieving high-speed and error-free transmission.
[0020] S4: After the main microprocessor and the slave microprocessor correctly and completely receive the data packet, they perform the corresponding operations according to the data content of the data packet.
[0021] In summary, this invention, through the cascading operation between the host computer and the dual-microprocessor architecture, diversifies the data transmission between the dual-microprocessor architecture and the host computer, which can meet the upgrade requirements of having a main microprocessor and a secondary microprocessor without occupying hardware resources and reducing costs.
[0022] The present invention has been described in detail above with reference to the accompanying drawings. However, the embodiments of the present invention are not limited to the above embodiments. Those skilled in the art can make various modifications to the present invention based on the prior art, and these modifications all fall within the protection scope of the present invention.
Claims
1. A data transmission method for a dual-microprocessor architecture, applied in a dual-microprocessor architecture comprising a main microprocessor and a secondary microprocessor interconnected by communication, characterized in that, The data transmission method includes the following steps: S1: The host computer sends a data packet to the main microprocessor. The data packet includes handshake characters, data type, number of data items, data content, checksum, and end character. S2: When the main microprocessor receives the data packet, it parses and identifies the data packet to obtain the handshake string of the handshake characters in the data packet. The handshake string is divided into three types, namely the first string, the second string, and the third string. S3: Determine the handshake string of the handshake character. When the handshake string is determined to be the first string, the main microprocessor buffers the data packet and sends it to the secondary microprocessor. When the handshake string is determined to be the second string, determine whether to upgrade the main microprocessor based on the data packet. If yes, the main microprocessor receives the data packet; otherwise, the main microprocessor directly passes the data packet to the secondary microprocessor. When the handshake string is determined to be the third string, the main microprocessor directly passes the data packet to the secondary microprocessor. S4: After receiving the data packet, the main microprocessor and the sub-microprocessor perform corresponding operations based on the data content in the data packet.
2. The data transmission method for a dual-microprocessor architecture according to claim 1, characterized in that, Before the host computer sends a data packet to the main microprocessor, the host computer first sends a handshake request signaling to the main microprocessor. The main microprocessor performs a handshake reply based on the handshake request signaling and determines whether the host computer has received the handshake reply. If the handshake reply is received, communication is maintained. If no handshake response is received, communication is terminated.
3. The data transmission method for a dual-microprocessor architecture according to claim 1, characterized in that, In step S3, when the handshake string is determined to be the first string, the main microprocessor continues to obtain the number of data items in the data packet. Based on the obtained number of data items in the data packet, a buffer is set. After receiving the data packet, the main microprocessor performs a CRC check on the data packet in the buffer. If the check fails, the main microprocessor sends an error message to the host computer. The host computer receives the error message and retransmits the data packet. If the check passes, the data packet is stored in the buffer. The main microprocessor sends the data packet stored in the buffer to the secondary microprocessor. After receiving the data packet, the secondary microprocessor performs a checksum on the data packet. If the check fails, the secondary microprocessor sends an error message to the main microprocessor. The main microprocessor receives the error message and retransmits the data packet. If the check passes, the data packet is stored in the secondary microprocessor.
4. The data transmission method for a dual-microprocessor architecture according to claim 1, characterized in that, In step S3, when the handshake string is determined to be the second string, the main microprocessor obtains the data type in the data packet, and determines whether to upgrade the main microprocessor based on the obtained data type in the data packet. If so, the main microprocessor receives the data packet, and continues to obtain the number of data items in the data packet. Based on the obtained number of data items in the data packet, a buffer is set. After receiving the data packet, the main microprocessor performs a checksum verification on the data packet in the buffer. If the checksum verification fails, the main microprocessor sends an error message to the host computer. The host computer receives the error message and resends the data packet. If the checksum verification passes, the data packet is stored in the main microprocessor. If not, the main microprocessor directly transmits the data packet to the secondary microprocessor. The secondary microprocessor continues to obtain the number of data items in the data packet and sets up a buffer based on the obtained number of data items. After receiving the data packet, the secondary microprocessor performs a checksum verification on the data packet in the buffer. If the checksum fails, the secondary microprocessor sends an error message to the host computer. The host computer receives the error message and retransmits the data packet. If the checksum passes, the data packet is stored in the secondary microprocessor.
5. The data transmission method for a dual-microprocessor architecture according to claim 1, characterized in that, In step S3, when the handshake string is determined to be the third string, the main microprocessor directly transmits the data packet to the secondary microprocessor. The secondary microprocessor continues to obtain the number of data items in the data packet, sets up a buffer based on the obtained number of data items in the data packet, and stores the data packet in the buffer after receiving the data packet. The secondary microprocessor sends the received response message to the host computer and determines whether the host computer has received the response message within a preset time. If yes, the data packet is no longer sent; otherwise, the data packet is resent.