Layout pattern of static random access memory and manufacturing method thereof

By designing the diffusion regions of adjacent areas in the static random access memory layout pattern to be connected in different directions, the leakage current problem between adjacent areas is solved, thereby improving the performance of the memory and the overall quality of the semiconductor device.

CN121865607APending Publication Date: 2026-04-14UNITED MICROELECTRONICS CORP
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Patent Information

Application Number
CN202411530720.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-10-14
Filing Date
2024-10-30
Publication Date
2026-04-14

AI Technical Summary

Technical Problem

In embedded static random access memory, leakage current between adjacent regions can degrade memory performance, especially leakage current caused by electron flow when word lines are open, which affects memory operation.

Method used

Design a static random access memory layout pattern such that the diffusion regions of the transmission gate transistors in adjacent regions are separated from each other, while the gate structure remains in contact, thereby blocking leakage current. By designing the diffusion regions in the first and second regions to be connected in different directions, electron flow is reduced.

Benefits of technology

It effectively blocks leakage current between adjacent areas, improves the performance of static random access memory and the overall quality of semiconductor components, and reduces the impact of leakage current on memory operation.

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Abstract

A layout pattern of a static random access memory includes a first region adjacent to a second region, a first SRAM cell located in the first region, the first region including a first diffusion region, a second SRAM cell located in the second region, the second region including a second diffusion region, a gate structure, and a second SRAM cell located in the second region. The gate structure spans the first diffusion region and forms a first pass gate transistor of the first SRAM cell, the gate structure spans the second diffusion region and forms a second pass gate transistor of the second SRAM cell, and the gate structure extends along a first direction; and the first diffusion region and the second diffusion region which are overlapped with the gate structure are not connected in the first direction.
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