Display device and voltage regulation method
By grouping the data lines in the liquid crystal display device and optimizing voltage adjustment using shorting circuits and timing controllers, the high temperature problem caused by frequent voltage switching of the source driver is solved, achieving the dual advantages of heat dissipation and space saving.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- GUANGZHOU CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD
- Filing Date
- 2026-01-27
- Publication Date
- 2026-04-21
AI Technical Summary
In high refresh rate and high resolution LCD displays, the temperature of the source driver increases due to frequent data voltage switching, leading to increased heat dissipation requirements, occupying physical space within the display device, and increasing hardware costs.
The data lines are divided into several groups, each containing a first data line and a second data line. The first data voltage and the second data voltage, whose value ranges do not overlap, are output through the source driver. When the voltage jumps toward a preset intermediate voltage, the data lines are controlled to be shorted. The voltage adjustment process is optimized by using a shorting circuit and a timing controller.
This reduces heat generation from the source driver, saves physical space inside the display device, lowers hardware costs, and maintains consistent display performance.
Smart Images

Figure CN121905115A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of display driving technology, and in particular to a display device and a voltage regulation method. Background Technology
[0002] With the development of display technology, the performance of liquid crystal display devices is gradually upgrading towards higher refresh rates, larger sizes, and higher resolutions. The source driver, responsible for transmitting data signals to the pixel units to achieve image display, experiences an increased workload as refresh rates, sizes, and resolutions increase. When a liquid crystal display device operates under high load, the temperature of the source driver continuously rises, easily exceeding its normal operating temperature range.
[0003] Currently, to reduce the temperature of the source driver, physical cooling is usually used, which involves attaching an AL (aluminum) / CU (copper) heat sink to the chip of the source driver. This will take up additional physical space in the display device. Summary of the Invention
[0004] This application provides a display device to at least partially solve the above-mentioned technical problems.
[0005] To achieve the above objectives, according to a first aspect of this application, a display device is provided, comprising: The display area includes several pixel units arranged in an array; A plurality of signal line groups; each of the signal line groups includes a first data line and a second data line respectively connected to the pixel unit; A source driver is used to output a first data voltage to the first data line and a second data voltage to the second data line; wherein the value range of the first data voltage and the value range of the second data voltage do not overlap. A short-circuit circuit is used to control a short circuit between the first data line and the second data line when both the first data voltage and the second data voltage corresponding to the image to be displayed change in the direction of a preset intermediate voltage.
[0006] Optionally, the shorting circuit includes a shorting transistor; The shorting transistor includes a control electrode for receiving a shorting control signal, a first electrode connected to the first data line, and a second electrode connected to the second data line.
[0007] Optionally, it also includes a timing controller connected to the source driver and the shorting circuit, configured to: The source driver outputs grayscale data line by line to the source driver based on the original image data of the image to be displayed, so that the source driver outputs the first data voltage and the second data voltage respectively based on the grayscale data; The transition direction of the first data voltage and the second data voltage is determined based on the grayscale data, and when the first data voltage and the second data voltage corresponding to the image to be displayed both transition towards the direction of the preset intermediate voltage, the short-circuit control signal of the first level state is output to the short-circuit circuit so that the short-circuit circuit controls the short-circuit between the first data line and the second data line.
[0008] Optionally, the timing controller is further configured to: Before the first data voltage and the second data voltage corresponding to the image to be displayed change, the shorting control signal of the second level state is output to the shorting circuit so that the shorting circuit controls the disconnection between the first data line and the second data line.
[0009] Optionally, the source driver includes a first interface group, a second interface group, a first gating switch disposed between the first interface group and the first data line, and a second gating switch disposed between the second interface group and the second data line; The first interface group includes a plurality of first voltage interfaces, and the voltage values output by each first voltage interface increase sequentially; the first selection switch is used to control the conduction between the first data line and a first voltage interface, so as to output the first data voltage to the first data line; The second interface group includes a plurality of second voltage interfaces, and the voltage values output by each second voltage interface increase sequentially and are different from the voltage values output by the first voltage interface. The second selector switch is used to control the conduction between the second data line and a second voltage interface to output the second data voltage to the second data line.
[0010] Optionally, the source driver is further configured to: Based on the grayscale data of the image to be displayed, a first target interface matching the grayscale data is selected from the first interface group. After the short-circuit circuit controls the disconnection between the first data line and the second data line, the first gating switch controls the conduction between the first data line and the first target interface to output the first data voltage to the first data line. Based on the grayscale data of the image to be displayed, a second target interface matching the grayscale data is selected from the second interface group. After the short-circuit circuit controls the disconnection between the first data line and the second data line, the second gating switch controls the conduction between the second data line and the second target interface to output the second data voltage to the second data line.
[0011] Optionally, the maximum value of the voltage output by the first voltage interface is less than the minimum value of the voltage output by the second voltage interface; or, the minimum value of the voltage output by the first voltage interface is greater than the maximum value of the voltage output by the second voltage interface, so that the value range of the first data voltage and the value range of the second data voltage do not overlap.
[0012] Optionally, the source driver further includes a third gating switch disposed between the first data line and the second interface group, and a fourth gating switch disposed between the second data line and the first interface group; The third gating switch is used to control the conduction between the first data line and a second voltage interface according to the grayscale data of the image to be displayed; the fourth gating switch is used to control the conduction between the second data line and a first voltage interface according to the grayscale data of the image to be displayed. Specifically, for different frames of the image to be displayed, the first gating switch and the third gating switch work alternately to make the first data line alternately connected to the first interface group and the second interface group; the second gating switch and the fourth gating switch work alternately to make the second data line alternately connected to the first interface group and the second interface group.
[0013] Optionally, it also includes a power management chip connected to the power input terminal of the source driver; The power management chip is used to provide a standard voltage to the source driver so that the source driver generates multiple output voltages according to the standard voltage and outputs the output voltages to each of the signal line groups through the first interface group and the second interface group respectively.
[0014] According to a second aspect of this application, a voltage regulation method is provided, based on the above-described display device, wherein the method is applied to a timing controller, and the method includes: The source driver outputs grayscale data line by line to the source driver based on the original image data of the image to be displayed, so that the source driver outputs the first data voltage and the second data voltage respectively based on the grayscale data; The transition direction of the first data voltage and the second data voltage is determined based on the grayscale data, and when the first data voltage and the second data voltage corresponding to the image to be displayed both transition towards the direction of the preset intermediate voltage, a short-circuit control signal of the first level state is output to the short-circuit circuit so that the short-circuit circuit controls the short-circuit between the first data line and the second data line.
[0015] Optionally, it includes: Before the first data voltage and the second data voltage corresponding to the image to be displayed change, the shorting control signal of the second level state is output to the shorting circuit so that the shorting circuit controls the disconnection between the first data line and the second data line.
[0016] Optionally, determining the transition direction of the first data voltage and the second data voltage based on the grayscale data includes: For the signal line group, calculate the grayscale difference between the grayscale data corresponding to the pixel unit in the current row and the grayscale data corresponding to the pixel unit in the next row adjacent to the current row; If the grayscale difference between the first data line and the second data line in the signal line group is positive, then the transition direction is determined to be that both the first data voltage and the second data voltage transition towards a preset intermediate voltage.
[0017] In summary, this application first divides the data lines of the display device into several groups, each group containing a first data line and a second data line. A source driver outputs a first data voltage and a second data voltage with non-overlapping value ranges to the first and second data lines, creating a voltage difference between them. Next, a preset intermediate voltage is positioned between the value ranges of the two data voltage groups. Because of the voltage difference between the first and second data voltages, when both the first and second data voltages corresponding to the image to be displayed transition towards the preset intermediate voltage, shorting the first and second data lines causes their voltages to rapidly approach each other and adjust towards the preset intermediate voltage. This ensures that before the source driver adjusts the voltages on the first and second data lines, their voltages are already close to the target value corresponding to the image to be displayed. This shortens the time it takes for the source driver to adjust the first and second data voltages, thereby reducing the duration of current flow and the heat generated by the source driver. Thus, without adding physical heat dissipation devices to the source driver, the heat generated by the source driver can be reduced, saving internal space in the display device.
[0018] Other features and advantages of this application will be described in detail in the following detailed description section. Attached Figure Description
[0019] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0020] To gain a more complete understanding of this application and its beneficial effects, the following description will be provided in conjunction with the accompanying drawings, wherein the same reference numerals in the following description denote the same parts.
[0021] Figure 1 This is a schematic diagram of a heat sink mounted on a source driver in related technologies; Figure 2 This is a schematic diagram of a display device provided in an exemplary embodiment of this disclosure; Figure 3 These are waveform diagrams of the first data voltage and the second data voltage provided in the exemplary embodiments of this disclosure; Figure 4 This is a schematic diagram of a shorting circuit provided in an exemplary embodiment of this disclosure; Figure 5 This is a flowchart of a control method for a timing controller provided in an exemplary embodiment of this disclosure; Figure 6 This is a schematic diagram of the first gating switch and the second gating switch provided in an exemplary embodiment of this disclosure; Figure 7 This is a schematic diagram of the third and fourth gating switches provided in an exemplary embodiment of this disclosure; Figure 8 This is an architectural diagram of a display device provided in an exemplary embodiment of this disclosure.
[0022] Explanation of reference numerals in the attached diagram: AA, display area; 10, signal line group; D1, first data line; D2, second data line; 20, source driver; 21, first interface group; 22, second interface group; 23, first gating switch; 24, second gating switch; 25, third gating switch; 26, fourth gating switch; 30, shorting circuit. Detailed Implementation
[0023] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the protection scope of this application.
[0024] First, the background of this application will be further explained in conjunction with the aforementioned background information. The main reason for the overheating phenomenon of the source driver in a display device is that, under heavy screen load scenarios, the data voltage output by the source driver to the data line switches frequently, requiring frequent switching between different voltage levels within the source driver. If the voltage difference between the required voltage levels is large, the voltage adjustment time will be prolonged. According to Joule's law, during the flow of current through a conductor, electrical energy is converted into heat energy, and the total heat generated is proportional to the square of the current, the conductor resistance, and the duration of the current. With a fixed conductor resistance in the source driver, the longer the current duration, the more heat is generated, leading to a significant increase in the temperature of the source driver.
[0025] Reference Figure 1 , Figure 1 A schematic diagram illustrating attaching a thermal pad to the source driver of a display device is provided. While increasing the heat dissipation area through the thermal pad reduces the temperature of the source driver, this method does not reduce the heat generated by the source driver. It not only increases hardware costs but also occupies additional physical space within the display device. Based on this, embodiments of this application are proposed.
[0026] According to the first aspect of this application, referring to Figure 2 This disclosure provides a display device, including a display area AA, a plurality of signal line groups 10, a source driver 20, and a shorting circuit 30. The display area AA includes a plurality of pixel units arranged in an array. Each of the signal line groups 10 includes a first data line D1 and a second data line D2 respectively connected to a pixel unit. The source driver 20 is used to output a first data voltage to the first data line D1 and a second data voltage to the second data line D2. The value ranges of the first and second data voltages do not overlap. The shorting circuit 30 is used to control a short circuit between the first data line D1 and the second data line D2 when both the first and second data voltages corresponding to the image to be displayed transition towards a preset intermediate voltage.
[0027] As an example, the first data line D1 and the second data line D2 in signal line group 10 are channels for transmitting data voltage. The specific number of signal line groups 10 is set according to actual needs. For example, if the display device requires 960 data lines, then signal line groups 10 are set to 480 groups. Each signal line group 10 is connected to a pixel unit, providing different data voltages to the pixel unit to achieve different grayscale displays, thereby enabling the pixel unit to present different images.
[0028] The first data voltage and the second data voltage have different value ranges. For example, for a bipolar display device, the first data voltage can range from -6V to 0V, and the second data voltage can range from 0V to 6V; for a unipolar display device, the first data voltage can range from 0V to 8V, and the second data voltage can range from 9V to 16V.
[0029] The display device can be a liquid crystal display (LCD). In an LCD, the degree of deflection of the liquid crystal molecules is determined by the electric field strength formed between the pixel electrode and the common electrode. Within a certain range, the first data voltage and the second data voltage have a corresponding relationship, ensuring that the electric field strengths generated by the first and second data voltages are identical. For example, in a bipolar display device, the first data voltage (-6V to 0V) and the second data voltage (0V to 6V) are in positive and negative ranges, respectively, but the absolute values of the corresponding voltages can create electric fields of the same magnitude. For instance, when the first data voltage and the second data voltage are 3V and -3V, respectively, the generated electric field strengths are identical, thus driving the liquid crystal molecules to deflect at the same angle, resulting in a consistent display effect.
[0030] Reference Figure 3 The preset intermediate voltage is a fixed voltage value between the first data voltage range and the second data voltage range, and can be set according to the actual first and second data voltage ranges. For example, if the first data voltage range is 0V to 8V and the second data voltage range is 9V to 16V, then the preset intermediate voltage can be set to 8.5V. In this case, when the first data voltage jumps from 1V to 8.5V and the second data voltage jumps from 16V to 8.5V, the jump is in the direction of the preset intermediate voltage.
[0031] In the above embodiment, firstly, the data lines of the display device are divided into several groups, each group including a first data line D1 and a second data line D2. The source driver 20 outputs a first data voltage and a second data voltage with non-overlapping value ranges to the first data line D1 and the second data line D2, so that there is a certain voltage difference between the first data voltage and the second data voltage. Next, a preset intermediate voltage is located between the value ranges of the two groups of data voltages. Since there is a voltage difference between the first data voltage and the second data voltage, when the first data voltage and the second data voltage corresponding to the image to be displayed both jump towards the preset intermediate voltage, the short-circuit circuit 30 controls the short-circuit of the first data line D1 and the second data line D2 to make the voltages on the first data line D1 and the second data line D2 quickly approach each other and adjust towards the preset intermediate voltage. Before the source driver 20 adjusts the voltages on the first data line D1 and the second data line D2, the voltages on the first data line D1 and the second data line D2 are already close to the target value corresponding to the image to be displayed. This can shorten the speed at which the source driver 20 adjusts the first data voltage and the second data voltage, thereby reducing the duration of current flow and reducing the heat generated by the source driver 20. In this way, the heat of the source driver 20 can be reduced without the need to add physical heat dissipation devices to the source driver 20, thereby saving physical space inside the display device.
[0032] Reference Figure 4 In some embodiments, the shorting circuit 30 includes a shorting transistor. The shorting transistor includes a control electrode for receiving a shorting control signal, a first electrode connected to the first data line D1, and a second electrode connected to the second data line D2.
[0033] As an example, when the control electrode receives a short-circuit control signal of a first level (e.g., high level), the short-circuit transistor turns on, forming a path between its first and second electrodes, thus shorting the first data line D1 and the second data line D2. When a short-circuit control signal of a second level (e.g., low level) is received, the short-circuit transistor turns off, disconnecting the first and second electrodes, and thus disconnecting the first data line D1 and the second data line D2. This allows for a rapid short circuit between the first data line D1 and the second data line D2.
[0034] Reference Figure 5 In some embodiments, a timing controller connected to the source driver 20 and the shorting circuit 30 is also included, configured to execute steps S10-S20, which will be described in detail below.
[0035] Step S10: Output grayscale data line by line to the source driver 20 according to the original image data of the image to be displayed, so that the source driver 20 outputs the first data voltage and the second data voltage respectively according to the grayscale data.
[0036] The raw image data is the unprocessed, fundamental data used to display the image, including information such as the color and brightness of each pixel unit. The timing controller converts the raw image data into grayscale data, which represents the brightness level of a pixel. Different grayscale levels correspond to different voltage values. For example, 8-bit grayscale data can represent 256 brightness levels, corresponding to 256 different data voltages.
[0037] Step S20: Determine the transition direction of the first data voltage and the second data voltage based on the grayscale data, and output a short-circuit control signal of the first level state to the short-circuit circuit 30 when the first data voltage and the second data voltage corresponding to the image to be displayed both transition towards the preset intermediate voltage, so that the short-circuit circuit 30 controls the short-circuit between the first data line D1 and the second data line D2.
[0038] As an example, the transition direction refers to the trend of the first and second data voltages changing from their current values to the next value. At this point, the first and second data voltages transition from data written to the pixel unit of the current row to data written to the pixel unit of the next row. Grayscale data typically has a defined mapping relationship with the first and second data voltages; the same grayscale data corresponds to a specific first data voltage and a specific second data voltage. Furthermore, the grayscale data corresponding to the first data line is negatively correlated with the first data voltage, and the grayscale data corresponding to the second data line is positively correlated with the second data voltage. Thus, the timing controller can determine the transition direction of the first and second data voltages based on the grayscale data, so that when both the first and second data voltages transition towards a preset intermediate voltage, it can quickly output a short-circuit control signal to control the short-circuit between the first data line D1 and the second data line D2.
[0039] In some embodiments, the timing controller is further configured to output a short-circuit control signal of a second level state to the short-circuit circuit 30 before the first data voltage and the second data voltage corresponding to the image to be displayed change, so that the short-circuit circuit 30 controls the first data line D1 and the second data line D2 to disconnect.
[0040] As an example, the first data voltage on the first data line D1 needs to jump to the first target value, and the second data voltage on the second data line D2 needs to jump to the second target value. The jump satisfies that both the first data voltage and the second data voltage jump towards the preset intermediate voltage. After the shorting circuit 30 controls the shorting between the first data line D1 and the second data line D2, and before the first data voltage and the second data voltage corresponding to the image to be displayed jump, the voltage on the first data line D1 and the second data line D2 can also be detected. When it is detected that the first data voltage on the first data line D1 is adjusted to the first target value by shorting or the second data voltage on the second data line D2 is adjusted to the second target value by shorting, a shorting control signal of the second level state is output to the shorting circuit 30 so that the shorting circuit 30 controls the disconnection between the first data line D1 and the second data line D2. As another example, after the shorting circuit 30 controls the shorting between the first data line D1 and the second data line D2 and before the first data voltage and the second data voltage corresponding to the image to be displayed change, a shorting control signal of the second level state can be output to the shorting circuit 30 through a preset shorting duration table, so that the shorting circuit 30 controls the disconnection between the first data line D1 and the second data line D2; the shorting duration table stores the jump difference between the first data voltage and the second data voltage and the shorting duration corresponding to the jump difference.
[0041] As an example, the voltages on the first data line D1 and the second data line D2 are first adjusted to be close to the target value after the transition by shorting between the first data line D1 and the second data line D2. Then, before the first data voltage and the second data voltage corresponding to the image to be displayed transition, the shorting control signal in the second level state is used to make the shorting circuit 30 control the first data line D1 and the second data line D2 to disconnect. This can avoid the first data voltage and the second data voltage being affected by the shorting between the first data line D1 and the second data line D2 during the transition process, so that the voltages on the first data line D1 and the second data line D2 can be accurately adjusted to the target value respectively.
[0042] In some embodiments, the source driver 20 includes a first interface group 21, a second interface group 22, a first gating switch 23 disposed between the first interface group 21 and the first data line D1, and a second gating switch 24 disposed between the second interface group 22 and the second data line D2. The first interface group 21 includes a plurality of first voltage interfaces, each outputting a voltage value that increases sequentially. The first gating switch 23 controls the conduction between the first data line D1 and a first voltage interface to output a first data voltage to the first data line D1. The second interface group 22 includes a plurality of second voltage interfaces, each outputting a voltage value that increases sequentially and is different from the voltage values output by the first voltage interfaces. The second gating switch 24 controls the conduction between the second data line D2 and a second voltage interface to output a second data voltage to the second data line D2.
[0043] Reference Figure 6 As an example, the first voltage interfaces are GM1-GMa, and the second voltage interfaces are GMa+1-GM2a. The output voltage of each first voltage interface increases sequentially. For example, the first interface group 21 can have 7 first voltage interfaces, outputting voltages of 1V, 2V, 3V, 4V, 5V, 6.5V, and 8V respectively. The number of second voltage interfaces in the second interface group 22 is the same as the number of first voltage interfaces, outputting voltages of 9V, 10V, 11V, 12V, 13V, 14.5V, and 16V respectively. In this way, the voltages output by the second voltage interfaces are different from those output by the first voltage interfaces, satisfying the requirement that the value ranges of the first and second data voltages do not overlap. It should be noted that the interval and specific value between the voltages output by the first and second voltage interfaces can be set according to the actual situation, as long as the value ranges of the first and second data voltages do not overlap.
[0044] As an example, based on the grayscale data output by the timing controller, the corresponding first voltage interface in the first interface group 21 is selected to be connected to the first data line D1, thereby outputting the voltage of the first voltage interface as the first data voltage to the first data line D1. Similarly, the second selector switch 24 selects the corresponding second voltage interface in the second interface group 22 to be connected to the second data line D2 based on the grayscale data, outputting the second data voltage. For example, if the grayscale data output by the timing controller to the source driver 20 corresponds to a first data voltage of 1V and a second data voltage of 12V, then the first selector switch 23 controls the first voltage interface in the first interface group 21 that outputs 1V to be connected to the first data line D1, and the second selector switch 24 controls the second voltage interface in the second interface group 22 that outputs 12V to be connected to the second data line D2. Thus, the voltage on the first data line D1 can be controlled by the first selector switch 23, and the voltage on the second data line D2 can be controlled by the second selector switch 24, realizing the switching of the voltage on the first data line D1 and the second data line D2 by the source driver 20.
[0045] In some embodiments, the source driver 20 is also configured to perform steps S30-S40, which will be described in detail below.
[0046] Step S30: Select a first target interface that matches the grayscale data from the first interface group 21 according to the grayscale data of the image to be displayed. After the short-circuit circuit 30 controls the disconnection between the first data line D1 and the second data line D2, control the first data line D1 to conduct with the first target interface through the first gating switch 23 to output the first data voltage to the first data line D1.
[0047] The first target interface is the first voltage interface in the first interface group 21 that corresponds to the current grayscale data and can output the required first data voltage; the second target interface is the second voltage interface in the second interface group 22 that corresponds to the current grayscale data and can output the required second data voltage.
[0048] Step S40: Select a second target interface that matches the grayscale data from the second interface group 22 according to the grayscale data of the image to be displayed. After the short-circuit circuit 30 controls the disconnection between the first data line D1 and the second data line D2, control the conduction between the second data line D2 and the second target interface through the second gating switch 24 to output the second data voltage to the second data line D2.
[0049] As an example, the grayscale data of the current row pixel unit output by the timing controller corresponds to a first target interface that outputs 6V and a second target interface that outputs 9V. After the short-circuit circuit 30 has already controlled the first data line D1 and the second data line D2 to be disconnected, the first gating switch 23 controls the first data line D1 to be connected to the first target interface that outputs 1V, so as to achieve an output of 6V first data voltage. The second gating switch 24 controls the second data line D2 to be connected to the second target interface that outputs 9V, so as to achieve an output of 9V second data voltage. This avoids the voltage conflict problem caused by the output voltage when the data lines are short-circuited. In some embodiments, the maximum value of the voltage output by the first voltage interface is less than the minimum value of the voltage output by the second voltage interface. Alternatively, the minimum value of the voltage output by the first voltage interface is greater than the maximum value of the voltage output by the second voltage interface, so that the range of values for the first data voltage and the range of values for the second data voltage do not overlap.
[0050] As an example, the output voltage range of the first voltage interface of the first interface group 21 is 0V-8V, so the maximum value of the voltage output by the first voltage interface is 8V. The output voltage range of the second voltage interface of the second interface group 22 is 9V-16V, so the minimum value of the voltage output by the second voltage interface is 9V. In this case, the maximum value of the output voltage of the first voltage interface is less than the minimum value of the output voltage of the second voltage interface, thus ensuring that the value ranges of the first data voltage and the second data voltage do not overlap. Similarly, the minimum value of the output voltage of the first voltage interface being greater than the maximum value of the output voltage of the second voltage interface can also be set in the same way to ensure that the value ranges of the first data voltage and the second data voltage do not overlap.
[0051] Reference Figure 7 In some embodiments, the source driver 20 further includes a third gating switch 25 disposed between the first data line D1 and the second interface group 22, and a fourth gating switch 26 disposed between the second data line D2 and the first interface group 21. The third gating switch 25 is used to control the conduction between the first data line D1 and a second voltage interface according to the grayscale data of the image to be displayed. The fourth gating switch 26 is used to control the conduction between the second data line D2 and a first voltage interface according to the grayscale data of the image to be displayed.
[0052] Specifically, for different frames of the image to be displayed, the first gating switch 23 and the third gating switch 25 operate alternately to make the first data line D1 alternately connected between the first interface group 21 and the second interface group 22. The second gating switch 24 and the fourth gating switch 26 operate alternately to make the second data line D2 alternately connected between the first interface group 21 and the second interface group 22.
[0053] As an example, because the output voltage ranges provided by the first interface group 21 and the second interface group 22 are inconsistent, the value ranges of the first data voltage and the second data voltage transmitted on the first data line D1 and the second data line D2 do not overlap when displaying the same frame of the image. The first gating switch 23 and the third gating switch 25 work alternately. When the Nth frame of the image is displayed, the first gating switch 23 is activated, controlling the first data line D1 to conduct with the first interface group 21, outputting the first data voltage required by each row of pixel units; when the N+1th frame of the image is displayed, the third gating switch 25 is activated, controlling the first data line D1 to conduct with the second interface group 22, outputting the corresponding first data voltage through the second interface group 22, and so on. Similarly, the second gating switch 24 and the fourth gating switch 26 also work alternately in the above manner. Thus, when the Nth frame of the image is displayed, the first interface group 21 provides the first data voltage to the first data line D1 and the second interface group 22 provides the second data voltage to the second data line D2. When the N+1th frame of the image is displayed, the second interface group 22 provides the first data voltage to the first data line D1 and the first interface group 21 provides the second data voltage to the second data line D2, so that in each frame of the image to be displayed, the value ranges of the first data voltage and the second data voltage on the first data line D1 and the second data line D2 never overlap.
[0054] In the above embodiment, firstly, the source driver 20 outputs a first data voltage and a second data voltage with different value ranges to the first data line D1 and the second data line D2, and the first data voltage and the second data voltage can form a driving electric field of consistent strength to ensure the same display effect. At the same time, the source driver 20 is provided with a third and a fourth selector switch 26, which are respectively connected to the first data line D1 and the second interface group 22, and the second data line D2 and the first interface group 21. By alternating the operation of the first selector switch 23 and the third selector switch 25, and the second selector switch 24 and the fourth selector switch 26, the first data line D1 and the second data line D2 are alternately turned on with the first interface group 21 and the second interface group 22 when different frame images are displayed. Through the above-mentioned grouped power supply and alternating conduction method, the display requirements of different gray levels of pixel units can be met, and the liquid crystal can be avoided from deflecting for a long time under the same voltage, which can alleviate the problem of display ghosting caused by liquid crystal aging in the display device.
[0055] In some embodiments, the display device further includes a power management chip connected to the power input terminal of the source driver 20. The power management chip is used to provide a standard voltage to the source driver 20 so that the source driver 20 generates multiple output voltages according to the standard voltage and outputs the output voltages to each signal line group 10 through the first interface group 21 and the second interface group 22, respectively.
[0056] Reference Figure 8The display device also includes a gate driving circuit 60. The display area AA may include multiple scan lines G1 to Gn, multiple data line groups intersecting the scan lines G1 to Gn, and multiple pixel units respectively disposed in multiple regions defined by the intersections of the scan lines G1 to Gn and each data line group. For example, a pixel unit may include a thin-film transistor, which includes a gate and a source respectively connected to its corresponding scan line and data line. When a scan line is selected from the multiple scan lines G1 to Gn, the thin-film transistor of the pixel unit connected to the selected scan line is turned on, and then the source driver 20 can apply voltage to each data line group, thereby displaying an image. The power management chip 50 provides analog voltage as a power supply to the timing controller 40, the source driver 20, and the gate driving circuit 60. The timing controller 40 receives raw image data and control signals, and performs preprocessing on the raw image data, such as format conversion and data sorting, to obtain grayscale data. Simultaneously, the timing controller 40 also generates control signals and clock signals. Then, the grayscale data and control signals are sent to the source driver 20 and the gate driver circuit 60, respectively. The gate driver circuit 60 receives control signals and clock signals from the timing controller 40 to generate progressive scan gate drive signals. These gate drive signals sequentially turn the thin-film transistor switches in the display area AA on or off, controlling the selection of scan lines. After receiving the grayscale data from the timing controller 40, the source driver 20 converts it into corresponding first and second data voltages and outputs them synchronously according to the scan signals from the gate driver circuit 60.
[0057] Reference Figure 8 Based on the above-described display device architecture, this application exemplarily describes the operation process of the display device.
[0058] First, after the timing controller 40 generates grayscale data of the image to be displayed, it outputs the grayscale data to the source driver 20 line by line. The timing controller 40 first outputs the grayscale data corresponding to the pixel unit of the current row, so that the source driver 20 controls the corresponding first voltage interface to conduct between the first data line D1 and the second voltage interface to conduct between the second data line D2 according to the grayscale data of the pixel unit of that row, so as to output the first data voltage and the second data voltage to the pixel unit through each signal line group 10 respectively.
[0059] Next, the timing controller 40 determines the transition direction of the first data voltage and the second data voltage in each signal line group 10 based on the grayscale data of the next row of pixel units and the grayscale data corresponding to the current row of pixel units. If the first data voltage and the second data voltage in a signal line group 10 both transition towards a preset intermediate voltage, the timing controller 40 outputs a first-level short-circuit control signal to the short-circuit circuit 30 corresponding to that signal line group 10 to control the short-circuit between the first data line D1 and the second data line D2 in that signal line group 10, so that the voltages on the first data line D1 and the second data line D2 move closer to the preset intermediate voltage. When the voltages on the first data line D1 and the second data line D2 change to near the target value, the timing controller 40 outputs a second-level short-circuit control signal to the short-circuit circuit 30 corresponding to that signal line group 10 to control the disconnection between the first data line D1 and the second data line D2 in that signal line group 10. At this time, the voltage on the first data line D1 and the second data line D2 in the signal line group 10 is close to the target value required by the next row of pixel units.
[0060] Finally, the timing controller 40 outputs grayscale data corresponding to the next row of pixel units adjacent to the current row to the source driver 20, so as to switch the first target voltage interface and the first data line D1 to conduct through the first gating switch 23, and switch the second target voltage interface and the second data line D2 to conduct through the second gating switch 24. Since the voltage on the first data line D1 and the second data line D2 has been adjusted to close to the target value by shorting, the first target voltage interface and the second target voltage interface can quickly charge the voltage on the first data line D1 and the second data line D2 to the target value, thereby shortening the current action time of the source driver 20 due to voltage adjustment, and thus reducing the heat generated by the source driver 20.
[0061] Referring to Table 1, which displays the measured data of the source driver 20 in the display device, to further illustrate the technical effects of this application. Temperature #1, Temperature #2, Temperature #3, and Temperature #4 are four sets of temperature measurement data for the source driver 20. "Function ON" indicates the temperature data of the source driver 20 when using the embodiment of this application, and "Function OFF" indicates the temperature data of the source driver 20 when not using the embodiment of this application. It can be seen that the cooling effect of the embodiment of this application can be improved by about 15%.
[0062]
[0063] According to a second aspect of this application, a voltage regulation method is provided, based on the above-described display device, the method being applied to a timing controller, the method comprising steps S10-S20.
[0064] Step S10: Output grayscale data line by line to the source driver according to the original image data of the image to be displayed, so that the source driver outputs the first data voltage and the second data voltage respectively according to the grayscale data.
[0065] Step S20: Determine the transition direction of the first data voltage and the second data voltage based on the grayscale data, and output a short-circuit control signal of the first level state to the short-circuit circuit when the first data voltage and the second data voltage corresponding to the image to be displayed both transition towards the direction of the preset intermediate voltage, so that the short-circuit circuit controls the short-circuit between the first data line and the second data line.
[0066] In some embodiments, the voltage regulation method further includes: before the first data voltage and the second data voltage corresponding to the image to be displayed change, outputting a short-circuit control signal of a second level state to the short-circuit circuit, so that the short-circuit circuit controls the disconnection between the first data line and the second data line.
[0067] In some embodiments, the transition direction of the first data voltage and the second data voltage is determined based on grayscale data, including steps S201-S202, which will be described in detail below.
[0068] Step S201: For the signal line group, calculate the grayscale difference between the grayscale data corresponding to the pixel unit in the current row and the grayscale data corresponding to the pixel unit in the next row adjacent to the current row.
[0069] Step S202: If the grayscale difference between the first data line and the second data line in the signal line group is positive, then the transition direction is determined to be that both the first data voltage and the second data voltage transition towards the preset intermediate voltage.
[0070] Reference Figure 8 As an example, taking pixel units P11, P12, P21, and P22 as examples, pixel units P11 and P12 are located in the same row, pixel units P21 and P22 are located in the same row, pixel units P11 and P21 are located in the same column and are both connected to the first data line in the first signal line group, and pixel units P21 and P22 are located in the same column and are both connected to the second data line in the first signal line group. For this first signal line group, the grayscale difference between the grayscale data corresponding to the pixel unit in the current row and the grayscale data corresponding to the pixel unit in the next adjacent row can be expressed as ΔL1 = L11 - L21, where L21 represents the grayscale data of pixel unit P21 and L11 represents the grayscale data of pixel unit P11. The grayscale difference between the grayscale data of the pixel unit in the current row and the grayscale data of the pixel unit in the next row adjacent to the current row can be expressed as △L2=L12L-22, where L22 represents the grayscale data of pixel unit P22 and L12 represents the grayscale data of pixel unit P12.
[0071] If the grayscale difference between the first and second data lines in the signal line group is positive, it indicates that pixel unit P21 has a smaller grayscale than pixel unit P11, and pixel unit P22 has a smaller grayscale than pixel unit P12. Since the grayscale data on the first data line is negatively correlated with the first data voltage, and the grayscale data on the second data line is positively correlated with the second data voltage, a smaller grayscale data corresponds to a larger first data voltage, and a smaller grayscale data corresponds to a smaller second data voltage. This causes the first data voltage to jump in the direction of increasing, and the second data voltage to jump in the direction of decreasing. Furthermore, since the value ranges of the first and second data voltages do not overlap, it can be determined that the jumping directions of the first and second data voltages are opposite, and both jump towards the preset intermediate voltage.
[0072] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.
[0073] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.
[0074] The embodiments, implementation methods, and related technical features of this application can be combined and substituted for each other without conflict.
[0075] The above are merely preferred embodiments of this application and are not intended to limit this application in any way. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of this application without departing from the scope of the technical solution of this application shall still fall within the scope of the technical solution of this application.
Claims
1. A display device, characterized in that, include: The display area includes several pixel units arranged in an array; A plurality of signal line groups; each of the signal line groups includes a first data line and a second data line respectively connected to the pixel unit; A source driver is used to output a first data voltage to the first data line and a second data voltage to the second data line; wherein the value range of the first data voltage and the value range of the second data voltage do not overlap. A short-circuit circuit is used to control a short circuit between the first data line and the second data line when both the first data voltage and the second data voltage corresponding to the image to be displayed change in the direction of a preset intermediate voltage.
2. The display device according to claim 1, characterized in that, The shorting circuit includes a shorting transistor; The shorting transistor includes a control electrode for receiving a shorting control signal, a first electrode connected to the first data line, and a second electrode connected to the second data line.
3. The display device according to claim 2, characterized in that, It also includes a timing controller connected to the source driver and the shorting circuit, configured to: The source driver outputs grayscale data line by line to the source driver based on the original image data of the image to be displayed, so that the source driver outputs the first data voltage and the second data voltage respectively based on the grayscale data; The transition direction of the first data voltage and the second data voltage is determined based on the grayscale data, and when the first data voltage and the second data voltage corresponding to the image to be displayed both transition towards the direction of the preset intermediate voltage, the short-circuit control signal of the first level state is output to the short-circuit circuit so that the short-circuit circuit controls the short-circuit between the first data line and the second data line.
4. The display device according to claim 3, characterized in that, The timing controller is also configured to: Before the first data voltage and the second data voltage corresponding to the image to be displayed change, the shorting control signal of the second level state is output to the shorting circuit so that the shorting circuit controls the disconnection between the first data line and the second data line.
5. The display device according to claim 1, characterized in that, The source driver includes a first interface group, a second interface group, a first selector switch disposed between the first interface group and the first data line, and a second selector switch disposed between the second interface group and the second data line; The first interface group includes a plurality of first voltage interfaces, and the voltage values output by each first voltage interface increase sequentially; the first selection switch is used to control the conduction between the first data line and a first voltage interface, so as to output the first data voltage to the first data line; The second interface group includes a plurality of second voltage interfaces, and the voltage values output by each second voltage interface increase sequentially and are different from the voltage values output by the first voltage interface. The second selector switch is used to control the conduction between the second data line and a second voltage interface to output the second data voltage to the second data line.
6. The display device according to claim 5, characterized in that, The source driver is also configured to: Based on the grayscale data of the image to be displayed, a first target interface matching the grayscale data is selected from the first interface group. After the short-circuit circuit controls the disconnection between the first data line and the second data line, the first gating switch controls the conduction between the first data line and the first target interface to output the first data voltage to the first data line. Based on the grayscale data of the image to be displayed, a second target interface matching the grayscale data is selected from the second interface group. After the short-circuit circuit controls the disconnection between the first data line and the second data line, the second gating switch controls the conduction between the second data line and the second target interface to output the second data voltage to the second data line.
7. The display device according to claim 5, characterized in that, The maximum value of the voltage output by the first voltage interface is less than the minimum value of the voltage output by the second voltage interface; or, the minimum value of the voltage output by the first voltage interface is greater than the maximum value of the voltage output by the second voltage interface, so that the range of the first data voltage and the range of the second data voltage do not overlap.
8. The display device according to claim 5, characterized in that, The source driver further includes a third gating switch disposed between the first data line and the second interface group, and a fourth gating switch disposed between the second data line and the first interface group; The third gating switch is used to control the conduction between the first data line and a second voltage interface according to the grayscale data of the image to be displayed; the fourth gating switch is used to control the conduction between the second data line and a first voltage interface according to the grayscale data of the image to be displayed. Specifically, for different frames of the image to be displayed, the first gating switch and the third gating switch work alternately to make the first data line alternately connected to the first interface group and the second interface group; the second gating switch and the fourth gating switch work alternately to make the second data line alternately connected to the first interface group and the second interface group.
9. The display device according to claim 5, characterized in that, It also includes a power management chip connected to the power input terminal of the source driver; The power management chip is used to provide a standard voltage to the source driver so that the source driver generates multiple output voltages according to the standard voltage and outputs the output voltages to each of the signal line groups through the first interface group and the second interface group respectively.
10. A voltage regulation method, characterized in that, Based on the display device according to any one of claims 1 to 9, the method is applied to a timing controller, the method comprising: The source driver outputs grayscale data line by line to the source driver based on the original image data of the image to be displayed, so that the source driver outputs the first data voltage and the second data voltage respectively based on the grayscale data; The transition direction of the first data voltage and the second data voltage is determined based on the grayscale data, and when the first data voltage and the second data voltage corresponding to the image to be displayed both transition towards the direction of the preset intermediate voltage, a short-circuit control signal of the first level state is output to the short-circuit circuit so that the short-circuit circuit controls the short-circuit between the first data line and the second data line.
11. The voltage regulation method according to claim 10, characterized in that, include: Before the first data voltage and the second data voltage corresponding to the image to be displayed change, the shorting control signal of the second level state is output to the shorting circuit so that the shorting circuit controls the disconnection between the first data line and the second data line.
12. The voltage regulation method according to claim 10, characterized in that, Determining the transition direction of the first data voltage and the second data voltage based on the grayscale data includes: For the signal line group, calculate the grayscale difference between the grayscale data corresponding to the pixel unit in the current row and the grayscale data corresponding to the pixel unit in the next row adjacent to the current row; If the grayscale difference between the first data line and the second data line in the signal line group is positive, then the transition direction is determined to be that both the first data voltage and the second data voltage transition towards a preset intermediate voltage.