Data flow analysis method and device based on swan gap, and computer equipment

Abstract

The invention relates to the technical field of mobile operating system data processing, and discloses a self-adaptive SSE data stream analysis method and device based on a swan operating system, computer equipment and a storage medium. According to the method, a dynamic complexity score is generated by monitoring a system resource state in real time and analyzing SSE data flow protocol feature complexity; dynamically selecting a single-state machine mode, a dual-state machine cooperation mode or a multi-state machine assembly line mode based on a preset complexity threshold value and a memory utilization rate threshold value; and configuring a corresponding processing assembly line for analysis by utilizing a (at) ohos.buffer module of the swan mongolian system. According to the method, the problems of low memory efficiency, poor fault tolerance and insufficient analysis performance in the prior art are solved, and the data analysis efficiency and the system stability are remarkably improved.

Description

Technical Field

[0001] This invention relates to the field of mobile operating system data processing technology, and in particular to an adaptive SSE data stream parsing method, apparatus, computer device, and storage medium based on the HarmonyOS operating system. Background Technology

[0002] Server-Sent Events (SSE), as a lightweight server push technology, is widely used in real-time web applications. However, in mobile application scenarios based on HarmonyOS, existing SSE parsing solutions have significant shortcomings: General-purpose SSE parsing libraries (such as those derived from browser environments) fail to fully utilize HarmonyOS's underlying native buffer management mechanism when ported, resulting in unnecessary memory copying during data conversion and low memory usage efficiency. Furthermore, these solutions have poor fault tolerance for irregular data streams commonly encountered in network transmission (such as mixed newline characters) and often employ batch processing parsing, failing to meet the high real-time and low parsing latency requirements of mobile devices. Therefore, there is an urgent need for an SSE data stream parsing solution that can deeply integrate with HarmonyOS features to achieve high efficiency, stability, and low memory consumption. Summary of the Invention

[0003] In view of this, the purpose of this invention is to provide an adaptive SSE data stream parsing method, apparatus, computer device and storage medium based on the HarmonyOS operating system, so as to solve the problems of low memory efficiency, poor fault tolerance and insufficient parsing performance of existing SSE parsing methods in mobile environments.

[0004] To achieve the above objectives, the present invention adopts the following technical solution: In a first aspect, the present invention provides an adaptive SSE data stream parsing method based on the HarmonyOS operating system, comprising the following steps: The system resource status is obtained in real time through the resource monitoring interface of the HarmonyOS system. The system resource status includes memory usage, battery power and device temperature. The protocol feature complexity of SSE data streams is analyzed in real time to generate a dynamic complexity score. The protocol feature complexity includes the variance of data packet arrival time interval, the frequency of occurrence of multi-line data fields, and the distribution of line terminator types. Based on preset complexity thresholds and memory usage thresholds, the parsing architecture mode is selected according to the system resource status and dynamic complexity score. The first complexity threshold, the second complexity threshold, the first memory threshold, and the second memory threshold are pre-configured parameters based on device performance level, or dynamic parameters obtained by dynamic learning based on historical parsing performance data. When the dynamic complexity score is lower than the first complexity threshold and the memory utilization rate is lower than the first memory threshold, the single state machine mode is selected. When the dynamic complexity score is between the first complexity threshold and the second complexity threshold, the dual-state machine cooperative mode is selected; When the dynamic complexity score is higher than the second complexity threshold or the memory utilization rate is higher than the second memory threshold, the multi-state machine pipeline mode is selected. Based on the selected parsing architecture mode, the corresponding processing pipeline is dynamically configured using the @ohos.buffer module of the HarmonyOS system to execute SSE data stream parsing.

[0005] Furthermore, the first complexity threshold and the second complexity threshold can be dynamically determined based on factors such as the stability of the data packet arrival time interval, the complexity of concatenating multiple data fields, the consistency of line terminator types, and statistical analysis of historical parsing performance data.

[0006] Furthermore, the real-time analysis of the protocol feature complexity of the SSE data stream includes: quantifying the degree of data fragmentation by calculating the variance of the data packet arrival time interval; assessing the message structure complexity by analyzing the occurrence frequency and splicing pattern of the data field in multiple rows; and quantifying the line structure regularity by statistically analyzing the distribution of line terminator types and the consistency of field separators.

[0007] Furthermore, the method also includes optimizations based on the characteristics of the HarmonyOS system: obtaining battery status through the @ohos.system.battery module and enabling power-saving mode when the battery is low; monitoring device temperature through the @ohos.system.thermal module and reducing processing intensity when overheating; and adapting to the HarmonyOS application lifecycle and optimizing resource allocation when running in the background.

[0008] In a second aspect, the present invention provides a data processing apparatus, comprising: The resource status acquisition module is used to collect system resource data, including memory usage, battery level, and device temperature, through the HarmonyOS system interface. The complexity analysis module is used to quantify the complexity of SSE data streams and generate dynamic complexity scores by analyzing the variance of data packet arrival time intervals, the frequency of occurrence of multi-line data fields, and the distribution of line terminator types. An adaptive decision-making module is used to select a parsing architecture mode from a single-state machine mode, a dual-state machine cooperative mode, or a multi-state machine pipeline mode based on a preset complexity threshold and memory usage threshold, according to the system resource data and the dynamic complexity score. The pipeline management module is used to dynamically assemble the corresponding processing pipeline using the @ohos.buffer module of the HarmonyOS system based on the selection of the adaptive decision module.

[0009] Thirdly, the present invention provides a computer device including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of any one of the methods described in the first aspect above.

[0010] Fourthly, the present invention provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the method described in any one of the first aspects above.

[0011] Fifthly, the present invention provides a computer program product comprising computer instructions that, when executed by one or more processors, cause a computer to perform the method described in any one of the first aspects. Beneficial effects

[0012] By introducing an adaptive mechanism that incorporates complexity awareness and resource status monitoring, intelligent optimization configuration of the parsing architecture is achieved. This enables the system to automatically select the optimal parsing strategy in different scenarios, fundamentally improving the system's resource utilization efficiency, parsing performance, and stability.

[0013] Deeply integrated with HarmonyOS system features, it fully utilizes the native APIs and system characteristics of HarmonyOS at its underlying level. Through the @ohos.buffer module, it achieves efficient binary data conversion, avoiding unnecessary memory copying. Actual tests show that memory usage efficiency is improved by more than 40% compared to traditional methods.

[0014] Through multi-mode architecture design, the system can intelligently adjust the parsing strategy according to the actual needs of the scenario, maximize performance in simple scenarios, and ensure reliability in complex scenarios, achieving the best balance between performance and stability, and improving parsing speed by more than 30%.

[0015] Through continuous learning and intelligent optimization, the system can adapt to changing environmental conditions, providing increasingly accurate parsing strategy selections while ensuring the stability and data integrity of the system during dynamic adjustments. Attached Figure Description

[0016] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of the framework of an adaptive SSE data stream parsing system provided in an embodiment of the present invention; Figure 2 This is a flowchart illustrating a data flow parsing method under a single state machine mode according to an embodiment of the present invention; Figure 3 This is a schematic diagram of the state machine for the row parsing process according to an embodiment of the present invention; Figure 4 This is a schematic diagram of the structure of a computer device according to an embodiment of the present invention. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0019] According to an embodiment of the present invention, a data stream parsing method embodiment is provided. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.

[0020] Example 1 This embodiment demonstrates the basic implementation of an adaptive SSE data stream parsing method based on the HarmonyOS system. The method includes the following core steps: The system monitors resource status in real time through the HarmonyOS API, specifically as follows: TypeScript import battery from '@ohos.system.battery'; import memory from '@ohos.system.memory'; const getSystemResourceStatus = async () =>{ const batteryInfo = await battery.getBatteryInfo(); const memoryInfo = memory.getMemoryInfo(); return { batteryLevel: batteryInfo.capacity, memoryUsage: memoryInfo.availRam / memoryInfo.totalRam, thermalState: await getThermalState() }; }; Real-time analysis of the protocol feature complexity of SSE data streams to generate dynamic complexity scores: TypeScript const calculateComplexityScore = (packetTimestamps: number[], lines:string[]) =>{ / / Calculate the variance of data packet time intervals const intervalVariance = calculatePacketIntervalVariance(packetTimestamps); / / Detect multiple rows of data fields const multiLineCount = detectMultiLineData(lines); / / Analyze the distribution of line terminator types const lineEndingConsistency = analyzeLineEndingConsistency(lines); return combineScores(intervalVariance, multiLineCount,lineEndingConsistency); }; Adaptive decision-making based on preset thresholds: TypeScript const makeAdaptiveDecision = (complexityScore: number,resourceStatus: ResourceStatus) =>{ if (complexityScore<0.3&&resourceStatus.memoryUsage<0.65) { return ParserMode.SINGLE_STATE_MACHINE; } else if (complexityScore>= 0.3&&complexityScore<0.7) { return ParserMode.DUAL_STATE_MACHINE; } else { return ParserMode.MULTI_STATE_MACHINE_PIPELINE; } }; / / The thresholds (0.3, 0.7, 0.65) in the above decision-making process are exemplary values. In practical applications, they can be dynamically calculated and optimized based on the stability of the data packet arrival time interval, the complexity of concatenating multiple data fields, the consistency of line terminator types, and historical parsing performance data.

[0021] Efficient memory operations using the @ohos.buffer module: TypeScript import buffer from '@ohos.buffer'; const processBinaryStream = (stream: ArrayBuffer) =>{ const byteArray = new Uint8Array(buffer.from(stream).buffer); return processIncrementalData(byteArray); }; Example

[0022] Running news and information push applications on entry-level HarmonyOS devices with limited memory capacity presents critical challenges, as device resources and battery life are key considerations. These devices typically have 2-4GB of RAM and limited processor performance, placing extremely high demands on energy efficiency optimization and memory management.

[0023] This embodiment utilizes the `@ohos.system.battery` module of the HarmonyOS system to achieve real-time monitoring and energy efficiency optimization of battery status. The system registers a battery status change listener, which automatically triggers a parsing strategy adjustment when a change in battery level is detected. Specifically, when the battery level is below 25%, the system activates a super energy-saving mode, which significantly reduces power consumption by reducing the number of state machines, lowering data processing frequency, and disabling non-core verification functions. When the battery level is between 25% and 50%, a balanced mode is activated, moderately optimizing energy efficiency while ensuring basic functionality. When the battery level is above 50%, a performance mode is activated to fully leverage the device's performance advantages. This dynamic strategy adjustment based on battery status allows the device to maintain normal operation of core functions even with low battery levels, while significantly extending the device's battery life.

[0024] To address the limited memory capacity of resource-constrained devices, this embodiment utilizes the `@ohos.system.memory` module to implement fine-grained memory pressure monitoring and adaptive adjustment. The system periodically acquires available and total memory information and calculates real-time memory utilization. When memory utilization exceeds the high-pressure threshold of 75%, the system immediately initiates multi-level countermeasures: first, it reduces the data buffer size to decrease the amount of data processed per cycle; second, it clears cached data and intermediate results to release occupied memory space; and finally, it switches to a memory-efficient mode, which employs a more compact data structure and a more aggressive memory reclamation strategy. When memory utilization is in the moderate-pressure range of 60%-75%, the system enters an early warning state, preparing degradation plans in advance, but does not immediately execute resource-intensive operations, ensuring a rapid response should memory pressure increase further.

[0025] On resource-constrained devices, this embodiment places particular emphasis on a fine balance between energy efficiency and performance. The system comprehensively determines the optimal parsing strategy based on multiple dimensions of information, including the device's current battery status, memory pressure, and processor load. While ensuring the basic functionality of news push notifications remains available, the system dynamically adjusts parsing accuracy, buffering strategies, and concurrency levels. For example, under extreme resource constraints, the system prioritizes the parsing and display of text content, appropriately delaying or downgrading the processing of rich media content such as images. Through this adaptive resource management strategy, the system achieves a significant reduction in power consumption by 35% and memory usage by 40% on resource-constrained devices, while maintaining over 85% availability of core functions.

[0026] The specific implementation details are as follows: Deep integration of battery status: TypeScript / / Battery status monitoring and energy efficiency optimization class BatteryAwareParser { private batteryLevel: number; constructor() { / / Listen for changes in battery status battery.on('batteryChange', (info: battery.BatteryResponse) =>{ this.batteryLevel = info.capacity; this.adjustParsingStrategy(); }); } private adjustParsingStrategy() { if (this.batteryLevel<25) { / / Enable Super Energy Saving Mode this.enablePowerSavingMode(); } else if (this.batteryLevel<50) { / / Enable Balanced Mode this.enableBalancedMode(); } else { Enable performance mode this.enablePerformanceMode(); } } } Memory stress response mechanism: TypeScript / / Memory usage monitoring and adaptive adjustment const monitorMemoryPressure = () =>{ const memoryInfo = memory.getMemoryInfo(); const usageRatio = 1 - (memoryInfo.availRam / memoryInfo.totalRam); if (usageRatio>0.75) { / / High memory pressure, take immediate action this.reduceBufferSizes(); this.cleanupCachedData(); this.switchToMemoryEfficientMode(); } else if (usageRatio>0.6) { / / Moderate memory pressure, warning status this.prepareForMemoryPressure(); } }; In actual testing on entry-level HarmonyOS devices, this embodiment demonstrated excellent adaptability. During a 4-hour continuous news push scenario, the battery level of a device using a traditional parsing solution dropped from 100% to 45%, while the battery level of a device using the optimized solution in this embodiment only dropped to 68%, resulting in a battery life improvement of over 50%. Regarding memory usage, the traditional solution often experiences memory usage exceeding 85% during peak periods, leading to system lag and application crashes. This embodiment, through proactive memory management, consistently keeps memory usage below a safe threshold of 75%, improving system stability from 87% to 99.2%.

[0027] Example 3 Financial securities trading applications running on the HarmonyOS system receive real-time stock quote (SSE) data streams from stock exchanges. This scenario places extremely high demands on data accuracy, real-time performance, and system reliability. Data latency must be controlled at the millisecond level, and zero tolerance for parsing errors is required. Financial data is characterized by high-frequency updates, high numerical precision requirements, and strictly standardized data formats.

[0028] This embodiment employs multiple safeguards to address the unique characteristics of financial data. Regarding memory threshold configuration, the first threshold is set at 70% to ensure full utilization of system resources under normal market conditions; the second threshold is set at 88% to provide ample buffer space for sudden surges in market data. The system establishes a rigorous data verification mechanism, performing multi-layered verification on each data packet, including format verification, numerical range verification, and timing verification. For error handling, a zero-tolerance strategy is adopted; a reconnection mechanism is immediately triggered upon detecting data anomalies to ensure data integrity and accuracy. The system sets the parsing latency requirement to within 100ms to meet the stringent real-time requirements of financial trading pairs.

[0029] To address the large number of numeric fields in financial data, this embodiment specifically optimizes the numerical parsing module. It utilizes the high-precision calculation API of the HarmonyOS system to process numerical fields such as stock prices and trading volumes, supporting precise parsing to four decimal places to avoid floating-point precision issues. The timestamp parsing module achieves millisecond-level time synchronization, ensuring the time-series accuracy of market data. The system also establishes a complete data integrity verification chain, with verification points at each stage from data reception and parsing to distribution, ensuring data consistency throughout the entire processing flow. For special financial data formats, such as five-level market data and tick-by-tick transactions, the system provides specialized parsing optimizations to ensure processing efficiency for high-frequency data.

[0030] This embodiment implements real-time system health monitoring, continuously tracking parsing latency, data accuracy, and system resource usage. When network fluctuations or data anomalies are detected, the system immediately switches to a high-fault-tolerance mode, which employs stricter data verification standards and more conservative processing strategies. The system establishes an intelligent reconnection mechanism that dynamically adjusts reconnection strategies based on network conditions, ensuring data continuity while avoiding resource waste caused by excessive reconnections. For data bursts during special periods such as the opening and closing of financial markets, the system has a dedicated flow control mechanism that dynamically adjusts parsing granularity and buffering strategies to cope with instantaneous high loads.

[0031] In live trading environment testing, this embodiment demonstrated superior performance. Data parsing accuracy reached 99.99%, far exceeding the 99.5% of traditional solutions; market data latency was consistently controlled within 80ms, maintaining below 100ms even during peak periods. The system performed excellently in network fluctuation tests, maintaining 100% system availability even with a simulated 5% packet loss, and achieving a zero error rate in critical data processing. During 30 consecutive days of stress testing, the system exhibited no data loss or parsing errors, fully meeting the reliability requirements of financial-grade applications.

[0032] Example 4 The data acquisition system deployed on the HarmonyOS IoT gateway device simultaneously processes monitoring data uploaded from hundreds of sensors via the SSE protocol. IoT scenarios are characterized by a large number of devices, diverse data formats, complex network environments, and limited device resources, requiring the system to possess high concurrency processing capabilities and long-term operational stability.

[0033] This embodiment addresses the characteristics of large data volumes in the Internet of Things (IoT) by designing an efficient batch processing mechanism. The system supports 250 concurrent SSE connections, each corresponding to a physical sensor device. Through intelligent data aggregation algorithms, the system can batch process relevant data from multiple sensors, reducing redundant parsing overhead. The system implements a data priority-based processing strategy, prioritizing critical data (such as alarm information and status anomalies) to ensure timely processing of important information. Considering the limited resources of IoT devices, the system employs lightweight data structures and efficient memory management strategies to minimize resource consumption while maintaining full functionality.

[0034] This embodiment develops an intelligent resource scheduling system capable of dynamically allocating parsing resources based on data characteristics. The system monitors the activity and data volume of each connection in real time, dynamically adjusting processing priorities to prevent a single high-load connection from impacting overall system performance. Through connection pool management and load balancing algorithms, the system can rationally distribute 250 concurrent connections across multiple processing threads, ensuring system load balance. The system also implements an adaptive data processing strategy, dynamically adjusting batch size and frequency based on the current system load, optimizing system performance while maintaining real-time performance.

[0035] To address the need for 24 / 7 uninterrupted operation of IoT devices, this embodiment incorporates multiple stability assurance mechanisms. The system implements a memory leak prevention mechanism, ensuring no memory accumulation occurs during long-term operation through regular memory scanning and automatic cleanup. A connection status health monitoring system continuously tracks the activity status of each connection, promptly identifying and handling abnormal connections to prevent zombie connections from consuming system resources. A periodic optimization and adjustment mechanism for system resources dynamically optimizes configuration parameters based on runtime, adapting to the characteristics of different operational phases.

[0036] This embodiment fully considers the diversity of IoT devices and provides a flexible configuration interface to support different types of sensor data formats. The system has built-in data parsing templates for various common IoT protocols, supporting automatic identification and parsing of data from multiple sensors such as temperature, humidity, pressure, and vibration. Addressing the unstable nature of network environments, the system implements reconnection and data transmission resumption mechanisms to ensure rapid connection rebuilding and data transmission recovery after network interruption.

[0037] In practical industrial IoT deployments, this embodiment demonstrated excellent adaptability. The system supports 250 concurrent connections, up from the traditional 150, and its data processing throughput is tripled, meeting the needs of large-scale IoT scenarios. During 90 days of continuous operation testing, the system maintained 99.9% availability, significantly higher than the traditional 98.5%. The mean time between failures (MTBF) was extended to 6 months, greatly reducing maintenance costs. In terms of energy efficiency, while maintaining high performance, the system reduces power consumption by 25% compared to traditional solutions, making it particularly suitable for battery-powered IoT edge devices.

[0038] Example 5 This embodiment is a comparative verification scenario with traditional technologies. By comparing the present invention with existing traditional analytical techniques, the technical advantages and improvement effects of the present invention are objectively evaluated. The comparative test covers multiple dimensions such as performance, efficiency, and stability.

[0039] This embodiment designs a comprehensive comparative test scheme, selecting mainstream traditional SSE parsing schemes on the market (including the Node.js-based eventsource library, a ported version of the browser's standard EventSource API, etc.) as the comparison benchmark. The test environment uses the same hardware devices (Huawei HarmonyOS tablet, configured with Kirin 990 chip, 8GB memory) and network conditions (same Wi-Fi network, same server) to ensure the objectivity and comparability of the test results.

[0040] This embodiment designs three core test scenarios to comprehensively verify the adaptability of the invention: First, in the standard data stream parsing scenario, a normal SSE data stream with typical characteristics such as mixed line terminators (CR / LF / CRLF) and concatenation of multiple data fields is simulated to verify basic parsing capabilities; second, for high-complexity data processing scenarios, an extreme data stream with high-frequency update characteristics (thousands of messages per second), large data volume (single message exceeding 10KB), and containing a large number of multi-line data fields and irregular line terminators is constructed to test the system's processing performance under high load; finally, in the resource-constrained scenario, by actively limiting system resources, an extreme mobile device environment with memory usage exceeding 80% and battery power below 20% is simulated to evaluate the system's stability and degradation mechanism under resource-scarce conditions. These three test scenarios cover different application scenarios from normal to extreme, enabling a comprehensive and objective evaluation of the invention's performance in various practical application scenarios.

[0041] Performance and efficiency comparison

[0042] System resource and energy efficiency comparison

[0043] Comparison of system stability and error recovery

[0044] Based on a comprehensive analysis of comparative test results, this invention demonstrates significant advantages in several key performance indicators: In terms of parsing performance, it achieves a speed improvement of over 30%, particularly excelling in high-complexity data processing scenarios. This is primarily due to its adaptive architecture, which intelligently selects the optimal parsing mode based on data flow characteristics. Regarding resource efficiency, through deep integration with HarmonyOS features and the adoption of zero-copy operation technology, it achieves a 40% improvement in memory usage efficiency and a 35% reduction in power consumption. In terms of system stability, availability increases from 92% to 99.5%, and the crash rate decreases to 0.5%, highlighting the effectiveness of the multi-state machine fault-tolerant architecture and intelligent error recovery mechanism. In terms of user experience, improvements such as a 35% increase in battery life, a 7°C reduction in device temperature, and a 25% decrease in processor utilization directly enhance the user experience of mobile devices. These achievements fully demonstrate the core technological advantages of this invention in adaptive architecture design, deep system integration, multi-level fault-tolerant mechanisms, and energy efficiency optimization, providing an optimized solution with significant technological advancement and practical value for SSE data flow parsing under HarmonyOS.

[0045] Example 6 This embodiment demonstrates a specific implementation of the dual-state machine collaborative mode, suitable for medium-complexity data stream processing scenarios. This mode utilizes two specialized state machines working collaboratively to provide good error tolerance while maintaining high performance.

[0046] This embodiment divides the parsing process into two main stages, each handled by a specialized state machine. The first state machine focuses on byte stream processing and line parsing, responsible for converting raw binary data into structured line data. This state machine maintains complete state information, including the current position, field length identifier, and newline character processing status, and can accurately identify various line terminators and extract field information.

[0047] The second state machine is specifically responsible for message construction, receiving line data from the first state machine and assembling it into a complete message object. The two state machines exchange data through a shared buffer, enabling parallel processing. An efficient coordination mechanism is designed to ensure that the working rhythms of the two state machines match, avoiding data backlog or processing delays.

[0048] In the dual-state machine collaborative mode, the system achieves significant performance improvements. Through parallel processing mechanisms, the parsing throughput is increased by 25% compared to the single-state machine mode. Memory usage efficiency is optimized through dedicated buffer management, saving 30% of memory compared to the multi-state machine pipeline mode. The system supports stable processing of 150 concurrent connections with error recovery time controlled within 100 milliseconds.

[0049] Example 7 This embodiment demonstrates a specific implementation of the multi-state machine pipeline pattern, suitable for scenarios with highly complex data flows and limited resources. This pattern achieves highly parallelized processing through a three-stage pipeline architecture, providing the strongest fault tolerance and system stability.

[0050] This embodiment employs a three-stage pipeline design, including a byte stream processing state machine, a line parsing state machine, and a message building state machine. Each state machine is responsible for a specific processing stage, achieving high parallelism through a pipelined approach. The byte stream processing state machine handles the initial processing and verification of binary data, the line parsing state machine focuses on line structure recognition and field extraction, and the message building state machine is responsible for the final message assembly and verification.

[0051] The system leverages the multi-threading capabilities of HarmonyOS to distribute the three state machines across different worker threads for parallel execution. Through meticulously designed buffer management and data transfer mechanisms, efficient collaboration between different stages of the pipeline is ensured. The system monitors the processing load of each stage in real time and dynamically adjusts the data flow rate to prevent any single stage from becoming a performance bottleneck.

[0052] The multi-state machine pipeline pattern integrates advanced error detection and recovery mechanisms. The system can detect processing anomalies at each stage in real time and initiate corresponding recovery strategies. For recoverable errors, the system ensures data processing consistency through data retransmission and state rollback mechanisms. For unrecoverable errors, the system can isolate the faulty component and continue providing services, ensuring overall system availability.

[0053] In actual testing, the multi-state machine pipeline mode demonstrated outstanding performance. The system supports stable processing of over 300 concurrent connections, with a data throughput exceeding 2500 messages per second. The error recovery success rate reached 99.5%, and system availability reached 99.99%. In terms of memory usage efficiency, it improved by 55% compared to traditional methods, fully demonstrating the technical advantages of this invention in high-complexity scenarios.

[0054] Example 8 This embodiment specifically demonstrates the process and effect of the system dynamically switching between different parsing modes, verifying the actual performance of the adaptive decision-making mechanism. By simulating various scenario changes, it shows how the system intelligently selects the optimal parsing strategy.

[0055] This embodiment details the triggering conditions and management mechanism for mode switching. The system continuously monitors data flow complexity and system resource status. When the complexity score or resource utilization exceeds a preset threshold, a mode switching assessment is automatically triggered. The assessment process comprehensively considers factors such as current performance, predicted load changes, and switching costs to ensure the rationality of the switching decision.

[0056] The system implements lossless architecture refactoring at runtime, ensuring data continuity and consistency during mode switching. The switching process consists of four main stages: first, saving the current processing state and buffered data; second, gracefully stopping the current processing pipeline; third, initializing and configuring the processing components of the target mode; and finally, restoring the state and starting the new processing flow. The entire switching process is completed without the user's awareness, ensuring service continuity.

[0057] This embodiment optimizes the handover strategy and algorithm, keeping the average mode switching time below 200 milliseconds and the maximum handover time below 500 milliseconds. Data loss rate remains below 0.1%, and state recovery integrity reaches 100%. The system also establishes a handover performance learning mechanism, optimizing future handover strategies based on historical handover records to continuously improve handover efficiency and success rate.

[0058] Extensive testing has verified that the system demonstrates high reliability and efficiency in mode switching. Under various changing scenario conditions, the system can accurately identify the optimal parsing mode and quickly complete the switch. The switching success rate reaches 99.8%, significantly improving the system's adaptability and overall performance under different workloads.

[0059] Example 9 This embodiment also provides a data stream parsing device for implementing the above embodiments and preferred embodiments; details already described will not be repeated. As used below, the term "module" can refer to a combination of software and / or hardware that implements a predetermined function. Although the device described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated. This embodiment provides a data stream parsing device, such as... Figure 4 As shown, it includes: The byte stream processing module is used to convert the input binary data stream into a byte array format incrementally. Specifically, it uses the @ohos.buffer module of the HarmonyOS system to convert ArrayBuffer data into Uint8Array format, and directly manipulates the underlying memory buffer through the buffer.from() method to avoid unnecessary data copying.

[0060] The row parsing module is used to identify the row structure in the byte array through a state machine and extract the field identifiers and field contents of each row. Specifically, it is used to maintain multiple state variables, including the current position, field length identifier and newline character processing status, identify various line terminators including CR, LF or CRLF, and perform fault tolerance processing on irregular data formats.

[0061] The message construction module is used to construct structured message objects based on the parsed field content. Specifically, it accumulates the content of specific types of fields and outputs a complete message object when predetermined conditions are met. Specifically, it performs multi-line value concatenation on the data field in the Server-Sent Events protocol, performs integer validity validation on the retry field, and triggers message output when an empty line is detected.

[0062] In some alternative implementations, the line parsing module includes: The state management unit is used to maintain multiple state variables of the state machine, including the current position, field length identifier, and newline character processing state. The fault-tolerant processing unit is used to handle irregular data formats and network anomalies, including the identification of mixed line terminators and the processing of incomplete data packets.

[0063] In some alternative implementations, the message construction module includes: The field processing unit is used to perform cumulative processing on field content of a specific type, including concatenating the values ​​of multiple rows of the data field with newline characters; The validity validation unit is used to perform integer validity validation on the retry field and filter out non-integer values. The message output unit is used to output a complete message object when a predetermined condition is met, wherein the predetermined condition is the detection of a blank line.

[0064] In some alternative implementations, the byte stream processing module includes: The memory operation unit is used to directly operate the memory buffer through the underlying buffer management interface of the HarmonyOS system. The format conversion unit is used to convert a binary data stream in ArrayBuffer format to Uint8Array format.

[0065] Further functional descriptions of the above modules and units are the same as those in the corresponding embodiments described above, and will not be repeated here.

[0066] In this embodiment, the data stream parsing device is presented in the form of a functional unit. Here, a unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that execute one or more software or fixed programs, and / or other devices that can provide the above functions.

[0067] This device can be integrated into mobile terminal devices running HarmonyOS, such as mobile phones and tablets. Through the collaborative work of various modules, it can achieve efficient parsing of SSE data streams, resulting in a technical effect of improving memory usage efficiency by more than 40% and parsing speed by more than 30%.

[0068] Those skilled in the art should understand that the modules and units in the above-described device embodiments can be implemented using hardware, software, or a combination of both. For example, the functional modules can be implemented using the Ability framework of the HarmonyOS system, or hardware acceleration can be achieved using a dedicated processing chip. These changes in implementation should all be considered to fall within the protection scope of this invention.

[0069] Example 10 In this embodiment, the data flow device is presented in the form of a functional unit. Here, a unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that execute one or more software or fixed programs, and / or other devices that can provide the above functions.

[0070] This invention also provides a computer device having the data stream processing apparatus described above.

[0071] Please see Figure 4 , Figure 4 This is a schematic diagram of the structure of a computer device provided in an optional embodiment of the present invention, such as... Figure 4 As shown, the computer device includes one or more processors 10, memory 20, and interfaces for connecting the components, including high-speed interfaces and low-speed interfaces. The components communicate with each other via different buses and can be mounted on a common motherboard or otherwise installed as needed. The processors can process instructions executed within the computer device, including instructions stored in or on memory to display graphical information of a GUI on external input / output devices (such as display devices coupled to the interfaces). In some alternative implementations, multiple processors and / or multiple buses can be used with multiple memories and multiple memory modules, if desired. Similarly, multiple computer devices can be connected, each providing some of the necessary operations (e.g., as a server array, a group of blade servers, or a multiprocessor system). Figure 4 Take a processor 10 as an example.

[0072] Processor 10 may be a central processing unit, a network processor, or a combination thereof. Processor 10 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The programmable logic device may be a complex programmable logic device (CAMP), a field-programmable gate array (FPGA), a general-purpose array logic (GDA), or any combination thereof.

[0073] The memory 20 stores instructions executable by at least one processor 10 to cause the at least one processor 10 to perform the method shown in the above embodiments.

[0074] The memory 20 may include a program storage area and a data storage area. The program storage area may store the operating system and applications required for at least one function; the data storage area may store data created based on the use of the computer device. Furthermore, the memory 20 may include high-speed random access memory and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some alternative embodiments, the memory 20 may optionally include memory remotely located relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0075] The memory 20 may include volatile memory, such as random access memory; the memory may also include non-volatile memory, such as flash memory, hard disk or solid-state drive; the memory 20 may also include a combination of the above types of memory.

[0076] The computer device also includes an input device 30 and an output device 40. The processor 10, memory 20, input device 30, and output device 20 can be connected via a bus or other means. Figure 4 Taking the example of a connection between China and Israel via a bus.

[0077] Input device 30 can receive input numerical or character information, and generate key signal inputs related to user settings and function control of the computer device, such as a touchscreen, keypad, mouse, trackpad, touchpad, joystick, one or more mouse buttons, trackball, joystick, etc. Output device 40 may include display devices, auxiliary lighting devices (e.g., LEDs), and haptic feedback devices (e.g., vibration motors). The aforementioned display devices include, but are not limited to, liquid crystal displays, light-emitting diodes, displays, and plasma displays. In some alternative embodiments, the display device may be a touchscreen.

[0078] Example 11 This invention also provides a computer-readable storage medium. The methods described above according to embodiments of the invention can be implemented in hardware or firmware, or implemented as computer code that can be recorded on a storage medium, or implemented as computer code downloaded via a network and originally stored on a remote storage medium or a non-transitory machine-readable storage medium and then stored on a local storage medium. Thus, the methods described herein can be processed by software stored on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. The storage medium can be a magnetic disk, optical disk, read-only memory, random access memory, flash memory, hard disk, or solid-state drive, etc.; further, the storage medium can also include combinations of the above types of memory. It is understood that computers, processors, microprocessor controllers, or programmable hardware include storage components capable of storing or receiving software or computer code, which, when accessed and executed by the computer, processor, or hardware, implements the methods shown in the above embodiments.

[0079] Example 12 A portion of this application can be applied as a computer program product, such as computer program instructions, which, when executed by a computer, can invoke or provide the methods and / or technical solutions according to this application through the operation of the computer. Those skilled in the art will understand that the forms in which computer program instructions exist in a computer-readable medium include, but are not limited to, source files, executable files, installation package files, etc. Correspondingly, the ways in which computer program instructions are executed by a computer include, but are not limited to: the computer directly executing the instructions, or the computer compiling the instructions and then executing the corresponding compiled program, or the computer reading and executing the instructions, or the computer reading and installing the instructions and then executing the corresponding installed program. Here, the computer-readable medium can be any available computer-readable storage medium or communication medium accessible to a computer.

[0080] Although embodiments of the invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the invention, and all such modifications and variations fall within the scope defined by the appended claims.

Claims

1. An adaptive SSE data stream parsing method based on the HarmonyOS operating system, characterized in that, include: The system resource status is obtained in real time through the resource monitoring interface of the HarmonyOS system. The system resource status includes memory usage, battery power and device temperature. The protocol feature complexity of SSE data streams is analyzed in real time to generate a dynamic complexity score. The protocol feature complexity includes the variance of data packet arrival time interval, the frequency of occurrence of multi-line data fields, and the distribution of line terminator types. Based on preset complexity and memory usage thresholds, the parsing architecture mode is selected according to the system resource status and dynamic complexity score: When the dynamic complexity score is lower than the first complexity threshold and the memory utilization rate is lower than the first memory threshold, the single state machine mode is selected. When the dynamic complexity score is between the first complexity threshold and the second complexity threshold, the dual-state machine cooperative mode is selected; When the dynamic complexity score is higher than the second complexity threshold or the memory utilization rate is higher than the second memory threshold, the multi-state machine pipeline mode is selected. Based on the selected parsing architecture mode, the corresponding processing pipeline is dynamically configured using the @ohos.buffer module of the HarmonyOS system to execute SSE data stream parsing.

2. The method according to claim 1, characterized in that, The first complexity threshold and the second complexity threshold are dynamically determined based on the following factors: Stability of data packet arrival time intervals; The complexity of concatenating multiple rows of data fields; Consistency of line terminator types; Statistical analysis of historical parsing performance data.

3. The method according to claim 1, characterized in that, The protocol feature complexity of the real-time analysis of SSE data streams includes: The degree of data fragmentation is quantified by calculating the variance of the data packet arrival time interval; the larger the variance, the higher the degree of fragmentation. The complexity of the message structure is assessed by analyzing the frequency of occurrence and splicing pattern of multi-line data fields. The more multi-line data fields there are and the more complex the splicing pattern, the higher the score. The standardization of row structure is quantified by statistically analyzing the distribution of row terminator types and the consistency of field separators. The more mixed the row terminator types and the more inconsistent the separators, the higher the score.

4. The method according to claim 1, characterized in that, The threshold parameter supports dynamic adjustment and application-customized configuration, including: The first and second memory thresholds are preset based on the device performance level; The first and second complexity thresholds are dynamically calculated and optimized based on historical performance data.

5. The method according to any one of claims 1 to 4, characterized in that, The method further includes: The battery status is obtained through the @ohos.system.battery module, and power-saving mode is enabled when the battery level is lower than a preset value. The device temperature is monitored via the @ohos.system.thermal module, and the processing intensity is reduced when the device temperature exceeds a preset threshold. Adapt to the HarmonyOS application lifecycle and optimize resource allocation strategies when the application is running in the background.

6. A data processing apparatus, characterized in that, include: The resource status acquisition module is used to collect system resource data, including memory usage, battery level, and device temperature, through the HarmonyOS system interface. The complexity analysis module is used to quantify the complexity of SSE data streams and generate dynamic complexity scores by analyzing the variance of data packet arrival time intervals, the frequency of occurrence of multi-line data fields, and the distribution of line terminator types. An adaptive decision-making module is used to select a parsing architecture mode from a single-state machine mode, a dual-state machine cooperative mode, or a multi-state machine pipeline mode based on a preset complexity threshold and memory usage threshold, according to the system resource data and the dynamic complexity score. The pipeline management module is used to dynamically assemble the corresponding processing pipeline using the @ohos.buffer module of the HarmonyOS system based on the selection of the adaptive decision module.

7. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method as described in any one of claims 1 to 5.

8. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method as described in any one of claims 1 to 5.

9. A computer program product, characterized in that, Includes computer instructions that, when executed by one or more processors, cause the computer to perform the method as described in any one of claims 1 to 5.

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