Semi-arc air field plate structure of GaN HEMT (High Electron Mobility Transistor) and preparation method

Abstract

The invention relates to a semi-arc air field plate structure of a GaN HEMT and a preparation method thereof. The preparation method comprises the following steps: defining an active region range of a high-frequency semiconductor device; defining patterns of a source electrode and a drain electrode of the device, performing metal evaporation on the source electrode and the drain electrode, and performing high-temperature tempering at the same time; defining a device gate pattern to form a Y-shaped gate; after a photoresist is deposited in the Gate region to cover the gate, the photoresist is baked and hardened to protect the Gate region, and then a dielectric layer is deposited above the device; defining a field plate pattern above the dielectric layer, etching the dielectric layer at the position where field plate metal needs to be deposited in a wet etching or dry etching mode, and directly depositing the field plate metal; the photoresist is removed after metal deposition, the photoresist which is originally protected above the grid electrode is removed together, and an air cavity structure formed by an arc-shaped field plate is formed at the position of the grid electrode of the device. Air is used as an ultra-low dielectric material, so that the parasitic capacitance of the device is remarkably reduced, the Miller effect is reduced, the high-frequency characteristic is improved, and the switching loss is reduced.

Description

Technical Field

[0001] This invention relates to the field of high-frequency semiconductor devices, and in particular to a semi-circular air field plate structure and fabrication method for a GaN HEMT. Background Technology

[0002] In GaN HEMT high-frequency semiconductor devices, field plate structures are commonly used to modulate the electric field between the gate and drain, improving device breakdown voltage and reducing electric field peak values. Current field plate technologies generally employ a metal field plate combined with a dielectric layer. As shown in the figure, the field plate lies directly on top of the dielectric layer, which materials include SiN, SiO2, and Al2O3, with thicknesses ranging from hundreds of nanometers to several micrometers. The relatively high dielectric constant of the dielectric layer can easily lead to large parasitic capacitances between the field plate and the gate, thus affecting the device's high-frequency performance and parasitic capacitance. Summary of the Invention

[0003] The purpose of this invention is to provide a method for fabricating a semi-circular air field plate structure for GaN HEMTs, which can use air as an ultra-low dielectric material, significantly reduce the parasitic capacitance of the device, reduce the Miller effect, improve high-frequency characteristics, and reduce switching losses.

[0004] To achieve the above objectives, the present invention provides the following technical solution: a method for fabricating a semi-circular air field plate structure of GaN HEMT, characterized in that the fabrication method includes the following steps: Step S1: Define the active region range of the high-frequency semiconductor device using dry etching or ion implantation. Step S2: Define the source and drain patterns of the device, perform source and drain metal evaporation, and simultaneously perform high-temperature tempering. Step S3: Using a double-layer photoresist, define the device gate pattern and perform gate metal evaporation to form a Y-type gate; Step S4: After depositing photoresist in the Gate area to cover the gate, bake and harden the photoresist to protect the Gate area, and then deposit a dielectric layer on top of the device. Step S5: Define the field plate pattern above the dielectric layer, and etch the dielectric layer at the location where the field plate metal needs to be deposited by wet etching or dry etching, and directly deposit the field plate metal. Step S6: After metal deposition, the photoresist is removed. At the same time, the photoresist that was originally protecting the gate is also removed, forming an air cavity structure formed by an arc-shaped field plate at the gate position of the device.

[0005] Furthermore, the source and drain metals deposited in step S2 have a four-layer structure, namely a Ti layer, an Al layer, a Ni layer, and an Au layer.

[0006] Furthermore, the high-temperature tempering in step S2 is performed at a temperature of 850–930 °C for a time of 30–60 s.

[0007] Furthermore, the baking temperature in step S4 is 120 °C, and the baking time is 20–30 min.

[0008] Furthermore, the thickness of the dielectric layer in step S4 is 3000–5000 Å.

[0009] Furthermore, in step S6, the length of the field plate is half the length of the Gate.

[0010] A semi-arc-shaped air field plate structure includes a high-frequency semiconductor device body and a dielectric layer. A Y-type gate is disposed on the high-frequency semiconductor device body. The dielectric layer is disposed outside the Y-type gate. An opening is disposed on the dielectric layer. A field plate is disposed on the opening. An air cavity is disposed between the dielectric layer, the field plate and the Y-type gate.

[0011] Furthermore, the high-frequency semiconductor device body includes a substrate and an epitaxial layer, wherein the epitaxial layer is disposed on the substrate, and the epitaxial layer includes a buffer layer, a channel layer, a barrier layer and a cap layer stacked on the substrate from bottom to top.

[0012] The beneficial effects of this invention are: Air, as an ultra-low dielectric material, can significantly reduce the parasitic capacitance of devices, reduce the Miller effect, improve high-frequency characteristics, and reduce switching losses.

[0013] In actual device fabrication, a tilted field plate with an arc-shaped field plate is formed by the gate itself. The combined effect of the two field plates can form a more stable and smooth potential gradient in the electric field transition range, suppressing electric field spikes.

[0014] The curvature can be adjusted according to the requirements of the device, which can better match different device designs.

[0015] The arc-shaped structure reduces the risk of hot carrier injection and surface breakdown at the edges, thereby improving the breakdown voltage of the device. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the structure of a high-frequency semiconductor device; Figure 2 This is a structural diagram of the active region. Figure 3 This is a schematic diagram of the source and drain structure; Figure 4 This is a schematic diagram of a Y-type gate structure; Figure 5 This is a schematic diagram of the structure of photoresist; Figure 6 This is a schematic diagram of the dielectric layer structure; Figure 7 This is a schematic diagram of the structure of the field plate; Figure 8 This is a schematic diagram of the air cavity structure of the present invention.

[0017] The components are: 1. Substrate, 2. Stacked buffer layer, 3. Channel layer, 4. Barrier layer, 5. Cap layer, 6. Source, 7. Drain, 8. Y-type gate, 9. Photoresist, 10. Dielectric layer, 11. Field plate, 12. Air cavity. Detailed Implementation

[0018] The invention will now be further described with reference to the accompanying drawings.

[0019] Please see Figures 1 to 8 The present invention provides an embodiment: a method for fabricating a semi-circular air field plate 11 structure of GaN HEMT, characterized in that the fabrication method includes the following steps: Step S1: Define the active region of the high-frequency semiconductor device using dry etching or ion implantation. The size of the active region varies depending on the device size, ensuring that each component is independent and free from interference. Dry etching or ion implantation can be used. A cross-sectional view of the device is shown below. Figure 2 As shown.

[0020] Step S2: Define the source and drain patterns of the device, and perform metal evaporation on the source and drain 7, followed by high-temperature tempering; fabricate the ohmic contacts for the source and drain 7 of the device. The device cross-sectional view is shown below. Figure 3 As shown.

[0021] Step S3: Using double-layer photoresist 9, define the device gate pattern and perform gate metal evaporation to form a Y-type gate 8; the Y-type gate 8 facilitates the subsequent fabrication of the arc-shaped field plate 11 structure; the device cross-sectional view is shown below. Figure 4 As shown.

[0022] Step S4: After depositing photoresist 9 to cover the gate in the gate region, bake and harden the photoresist 9 to protect the gate region, and then deposit a dielectric layer 10 on top of the device; depositing photoresist 9 to cover the gate in the gate region can protect the gate region. The device cross-sectional view is shown below. Figure 5 As shown.

[0023] Step S5: Define the field plate 11 pattern above the dielectric layer 10. Etch the dielectric layer 10 at the locations where the metal of the field plate 11 needs to be deposited using wet etching or dry etching, and directly deposit the metal of the field plate 11. Then deposit another dielectric layer 10 on top of the device, covering the entire device. The device cross-sectional view is shown below. Figure 6As shown. A field plate 11 pattern is defined above the dielectric layer 10. The length of the field plate 11 is half the length of the gate. The dielectric layer 10 is etched open at the locations where the metal of the field plate 11 needs to be deposited using wet etching or dry etching, and the metal of the field plate 11 is directly deposited. Sputtering or other methods can be used. The metal of the field plate 11 can be Au or Ti / Pt / Au. The device cross-sectional view is shown below. Figure 7 As shown.

[0024] Step S6: After metal deposition, the photoresist 9 is removed. Simultaneously, the photoresist 9 originally protecting the gate is also removed, forming an air cavity 12 structure at the device gate location formed by the arc-shaped field plate 11. The photoresist 9 is removed using a conventional photoresist removal method after metal deposition. Simultaneously, the photoresist 9 originally protecting the gate is also removed, forming an air cavity 12 structure at the device gate location formed by the arc-shaped field plate 11. The device cross-sectional view is shown below. Figure 8 As shown.

[0025] Please continue reading. Figure 3 As shown, in one embodiment of the present invention, the source electrode 6 and drain electrode 7 in step S2 are provided with a four-layer structure, namely Ti layer, Al layer, Ni layer and Au layer.

[0026] Please continue reading. Figure 3 As shown, in one embodiment of the present invention, the high-temperature tempering temperature in step S2 is 850-930 °C, and the time is 30-60 s.

[0027] Please continue reading. Figure 5 As shown, in one embodiment of the present invention, the baking temperature in step S4 is 120 °C and the time is 20 to 30 min.

[0028] Please continue reading. Figure 6 As shown, in one embodiment of the present invention, the thickness of the dielectric layer 10 in step S4 is 3000–5000 Å.

[0029] Please continue reading. Figure 7 As shown, in one embodiment of the present invention, the length of the field plate 11 in step S6 is half the length of the Gate.

[0030] Please see Figure 7 The present invention provides another embodiment: a semi-arc air field plate 11 structure, including a high-frequency semiconductor device body and a dielectric layer 10. A Y-type gate 8 is disposed on the high-frequency semiconductor device body, and the dielectric layer 10 is disposed outside the Y-type gate 8. An opening is disposed on the dielectric layer 10, and a field plate 11 is disposed on the opening. An air cavity 12 is disposed between the dielectric layer 10 and the field plate 11 and the Y-type gate 8.

[0031] Please continue reading. Figure 1 As shown in Figure 1, in one embodiment of the present invention, the high-frequency semiconductor device body includes a substrate 1 and an epitaxial layer. The epitaxial layer is disposed on the substrate 1, and the epitaxial layer includes a buffer layer 2, a channel layer 3, a barrier layer 4, and a cap layer 5 stacked from bottom to top on the substrate 1. The substrate 1 can be Si, GaN, SiC, Al2O3, Diamond, etc. The epitaxial layer is grown on the substrate 1, and the buffer layer 2, channel layer 3, barrier layer 4, and cap layer 5 are stacked from bottom to top, as shown in Figure 1.

[0032] This invention operates on the following principle: Air, as an ultra-low dielectric material, can significantly reduce the parasitic capacitance of the device, reduce the Miller effect, improve high-frequency characteristics, and reduce switching losses. In device fabrication, a system is formed consisting of a tilted field plate inherent to the gate and an arc-shaped field plate 11. The combined effect of these two field plates creates a more stable and smooth potential gradient in the electric field transition region, suppressing electric field spikes. The curvature of the arc can be adjusted according to device requirements, allowing for better matching with different device designs. The arc structure reduces the risk of hot carrier injection and surface breakdown at the edges, thereby improving the device's breakdown voltage.

[0033] The above description is only a preferred embodiment of the present invention and should not be construed as a limitation of this application. All equivalent changes and modifications made in accordance with the scope of the patent application of the present invention should be covered by the present invention.

Claims

1. A method for fabricating a semi-circular air field plate structure for GaN HEMT, characterized in that: The preparation method includes the following steps: Step S1: Define the active region range of the high-frequency semiconductor device using dry etching or ion implantation. Step S2: Define the source and drain patterns of the device, perform source and drain metal evaporation, and simultaneously perform high-temperature tempering. Step S3: Using a double-layer photoresist, define the device gate pattern and perform gate metal evaporation to form a Y-type gate; Step S4: After depositing photoresist in the Gate area to cover the gate, bake and harden the photoresist to protect the Gate area, and then deposit a dielectric layer on top of the device. Step S5: Define the field plate pattern above the dielectric layer, and etch the dielectric layer at the location where the field plate metal needs to be deposited by wet etching or dry etching, and directly deposit the field plate metal. Step S6: After metal deposition, the photoresist is removed. At the same time, the photoresist that was originally protecting the gate is also removed, forming an air cavity structure formed by an arc-shaped field plate at the gate position of the device.

2. The semi-circular air field plate structure and its fabrication method for a GaN HEMT according to claim 1, characterized in that: The source and drain metals in step S2 have a four-layer structure, consisting of a Ti layer, an Al layer, a Ni layer, and an Au layer.

3. The semi-circular air field plate structure and its fabrication method for a GaN HEMT according to claim 1, characterized in that: The high-temperature tempering in step S2 is performed at a temperature of 850–930 °C for 30–60 seconds.

4. The semi-circular air field plate structure and its fabrication method for a GaN HEMT according to claim 1, characterized in that: The baking temperature in step S4 is 120 ℃, and the time is 20 to 30 min.

5. The semi-circular air field plate structure and its fabrication method for a GaN HEMT according to claim 1, characterized in that: The thickness of the dielectric layer in step S4 is 3000–5000 Å.

6. The semi-circular air field plate structure and its fabrication method for a GaN HEMT according to claim 1, characterized in that: The length of the field plate in step S6 is half the length of the Gate.

7. A GaNHEMT semi-circular air field plate structure employing the GaN HEMT semi-circular air field plate structure and preparation method described in claim 1, characterized in that: The device includes a high-frequency semiconductor device body and a dielectric layer. A Y-type gate is disposed on the high-frequency semiconductor device body. The dielectric layer is disposed outside the Y-type gate. An opening is disposed on the dielectric layer. A field plate is disposed on the opening. An air cavity is disposed between the dielectric layer, the field plate and the Y-type gate.

8. The semi-circular air field plate structure and its fabrication method for a GaN HEMT according to claim 1, characterized in that: The high-frequency semiconductor device body includes a substrate and an epitaxial layer. The epitaxial layer is disposed on the substrate and includes a buffer layer, a channel layer, a barrier layer, and a cap layer stacked on the substrate from bottom to top.

Images