Display panel, preparation method thereof and display device

Abstract

The invention provides a display panel, a preparation method thereof and a display device. The display panel comprises a substrate, a plurality of bonding pads, an insulation structure, an insulation layer, an isolation structure and a light emitting unit. A gap is formed between every two adjacent bonding pads, the insulation structure is at least partially located in the gap, the insulation layer is at least located in the non-display area and located on the side, away from the substrate, of the insulation structure, the isolation structure defines a plurality of isolation openings, and the light-emitting unit is located in the display area. At least part of the orthographic projection of the light-emitting unit on the substrate is located in the orthographic projection of the isolation opening on the substrate, and the light-emitting units are electrically connected. The insulation structure comprises a bonding surface which covers the side surface of the bonding pad. According to the display panel provided by the invention, the use performance of the display device can be improved.

Description

Technical Field

[0001] This application belongs to the field of display technology, and more specifically, relates to a display panel, a method for manufacturing the same, and a display device. Background Technology

[0002] Currently, flat panel display devices have advantages such as high image quality, energy saving, compact size, and wide range of applications, and are widely used in various consumer electronics products such as mobile phones, televisions, laptops, and desktop computers.

[0003] However, the performance and manufacturing process of current display products need to be improved. Summary of the Invention

[0004] The purpose of this application is to provide a display panel, a method for manufacturing the same, and a display device, so as to improve the performance / process performance of the display device.

[0005] To achieve the above objectives, the technical solution adopted in this application is as follows:

[0006] In a first aspect, this application provides a display panel, including a display area and a non-display area surrounding at least a portion of the display area. The display panel further includes a substrate, a plurality of pads, an insulating structure, an insulating layer, an isolation structure, and light-emitting units. The plurality of pads are located in the non-display area, and are spaced apart in their orthographic projection onto the substrate, with a gap between adjacent pads. The insulating structure is located at least in the non-display area and on the same side of the substrate as the pads, with at least a portion of the insulating structure located within the gap. The insulating layer is located at least in the non-display area and on the side of the insulating structure facing away from the substrate. The isolation structure is located at least in the display area and on one side of the substrate along its thickness direction, on the same side of the substrate as the insulating layer, defining a plurality of isolation openings. The light-emitting units are located in the display area, and are on the same side of the substrate as the isolation structure, with at least a portion of the light-emitting unit's orthographic projection onto the substrate located within the orthographic projection of the isolation openings onto the substrate, and are electrically connected to the pads. The insulating structure includes a bonding surface that covers the side surface of the pads.

[0007] Through the above technical solution, the insulating structure can be attached to the side of the pad. In the event of accidental over-etching of the insulating layer, the insulating structure can avoid the side being exposed, thereby preventing the side of the pad from contacting other metals (such as the metal forming the isolation structure) and causing a short circuit, thus improving reliability. Therefore, the display panel provided in this application can improve the performance.

[0008] Therefore, the display panel provided in this application can improve the performance of the display device.

[0009] In some embodiments, the sides of the pads include opposing first and second sides, and the bonding surfaces of the insulating structure include opposing first and second bonding surfaces. The first bonding surface covers the first side, and the second bonding surface covers the second side. In this way, the insulating structure can be bonded to the pads on both sides of the gap respectively.

[0010] Optionally, the distance between the edge of the first bonding surface facing away from the substrate and the substrate is greater than or equal to the distance between the edge of the first side facing away from the substrate and the substrate, and the distance between the edge of the second bonding surface facing away from the substrate and the substrate is greater than or equal to the distance between the edge of the second side facing away from the substrate and the substrate.

[0011] In some embodiments, the isolation structure is located on the side of the insulating layer away from the substrate, the insulating layer including a first insulating layer, the first insulating layer including at least a portion of a pixel defining layer, the pixel defining layer having a pixel opening in the display area communicating with the isolation opening.

[0012] In this way, the insulating layer can separate the pads from the isolation structure, preventing short circuits. Furthermore, the insulating structure can partially planarize the insulating layer at the gaps, preventing damage to the insulating layer (e.g., over-etching). Additionally, the pixel definition layer can also serve as an insulating layer, which helps save on process steps.

[0013] Optionally, the insulating layer further includes a second insulating layer located on the side of the pixel definition layer facing the substrate and adjacent to the pixel definition layer. In this way, the insulating layer can include both a first and a second insulating layer, which increases the difficulty of damage to the insulating layer, thereby improving reliability.

[0014] Optionally, the second insulating layer includes at least a portion of the passivation layer.

[0015] Optionally, the second insulating layer comprises an inorganic material.

[0016] Optionally, the inorganic material of the second insulating layer includes silicon oxide.

[0017] In some embodiments, the isolation structure is located on the side of the insulating layer facing away from the substrate, and the insulating layer includes a second insulating layer. In this way, the display panel provided in this application can use the second insulating layer to separate the pads from the isolation structure, preventing short circuits between the pads.

[0018] Optionally, the second insulating layer includes at least a portion of the passivation layer.

[0019] Optionally, the second insulating layer comprises an inorganic material.

[0020] Optionally, the inorganic material of the second insulating layer includes silicon oxide.

[0021] In some embodiments, the minimum distance between the surface of the insulating structure facing away from the substrate and the substrate is greater than or equal to the distance between the side edge of the insulating structure facing away from the substrate and the substrate. This further prevents the insulating structure from being exposed on the sides.

[0022] In some implementations, the insulation structure fills the gaps. This further prevents the insulation structure from being exposed on the sides.

[0023] Alternatively, the insulation structure protrudes beyond the gap. This further prevents the insulation structure from being exposed on the sides.

[0024] In some embodiments, the insulating structure includes multiple insulating portions and multiple gaps, with one insulating portion corresponding to one gap, and a first mating surface and a second mating surface disposed on opposite sides of the insulating portions.

[0025] In some embodiments, the insulating structure includes a first layer and a second layer stacked sequentially in a direction away from the substrate, the first layer being located within a gap and the second layer being at least partially located within the gap.

[0026] Optionally, the first layer includes at least a portion of the first flattened layer, and the second layer includes at least a portion of the second flattened layer.

[0027] In this way, the insulation structure can be formed through the first and second layers without additional steps, which simplifies the process.

[0028] Optionally, the gap includes a first gap and a second gap, the second gap being located on the side of the first gap away from the substrate, the orthographic projection of the first gap onto the substrate being located within the orthographic projection of the second gap onto the substrate, the first layer being located within the first gap and filling the first gap, and the second layer being at least partially located within the second gap.

[0029] Optionally, the projection of the second gap onto the substrate lies within the projection of the second layer onto the substrate.

[0030] In some embodiments, the insulating structure includes a first layer, a second layer, and a third layer stacked sequentially in a direction away from the substrate, wherein the first layer is located within a gap, the second layer is located within a gap, and the third layer is at least partially located within a gap.

[0031] Optionally, the first layer includes at least a portion of the first planarization layer, the second layer includes at least a portion of the second planarization layer, and the third layer includes at least a portion of the passivation layer.

[0032] In this way, the third layer can further improve the reliability of the insulation structure.

[0033] Optionally, the gap includes a first gap and a second gap, the second gap being located on the side of the first gap away from the substrate, the orthographic projection of the first gap onto the substrate being located within the orthographic projection of the second gap onto the substrate, the first layer being located within the first gap and filling the first gap, the second layer being located within the second gap, and the third layer being at least partially located within the second gap.

[0034] Optionally, the projection of the second gap onto the substrate lies within the projection of the third layer onto the substrate.

[0035] Optionally, the third layer may include inorganic materials.

[0036] Optionally, the inorganic material of the third layer includes silicon oxide.

[0037] In some implementations, the pad includes a first metal and a second metal connected together, the first metal being located on the side of the second metal facing the substrate, and the orthographic projection of the first metal onto the substrate falling within the orthographic projection of the second metal onto the substrate. This allows the pad to improve impedance performance.

[0038] Optionally, the second metal has a groove on the side facing the substrate, and the first metal is located within the groove.

[0039] In some implementations, portions of the insulating structure are located on the side of the pad facing away from the substrate and are adjacent to the pad.

[0040] This increases the reliability of the sides of the insulating structure covering the solder pads.

[0041] Secondly, this application provides a display panel, which includes a display area and a non-display area surrounding at least a portion of the display area. The display panel also includes a substrate, a plurality of pads, an insulating structure, an isolation structure, and light-emitting units. The plurality of pads are located in the non-display area, and are spaced apart in the orthographic projection of the pads onto the substrate, with a gap between adjacent pads. The insulating structure is located at least in the non-display area and on the same side of the substrate as the pads, with at least a portion of the insulating structure located within the gap. An insulating layer is located at least in the non-display area and on the side of the insulating structure opposite to the substrate. The isolation structure is located at least in the display area and on one side of the substrate along its thickness direction, and on the same side of the substrate as the insulating layer, defining a plurality of isolation openings. The light-emitting units are located in the display area, and are on the same side of the substrate as the isolation structure, with at least a portion of the light-emitting unit's orthographic projection onto the substrate located within the orthographic projection of the isolation openings onto the substrate. The light-emitting units are electrically connected to the pads, wherein the insulating structure fills the gap.

[0042] With the above technical solution, the insulating structure fills the gap, which can prevent the sides of the pads facing the gap from being exposed. This can prevent the sides of the pads facing the gap from contacting other metals (such as the metal forming the isolation structure) and causing short circuits, thereby improving reliability. Therefore, the display panel provided in this application can improve the performance.

[0043] Therefore, the display panel provided in this application can improve the performance of the display device.

[0044] In some embodiments, the isolation structure is located on the side of the insulating layer away from the substrate, the insulating layer including a first insulating layer, the first insulating layer including at least a portion of a pixel defining layer having a pixel opening communicating with the isolation opening.

[0045] Optionally, the insulating layer further includes a second insulating layer located on the side of the pixel definition layer facing the substrate and adjacent to the pixel definition layer.

[0046] Optionally, the second insulating layer includes at least a portion of the passivation layer.

[0047] Optionally, the second insulating layer comprises an inorganic material.

[0048] Optionally, the inorganic material of the second insulating layer includes silicon oxide.

[0049] In some embodiments, the isolation structure is located on the side of the insulating layer away from the substrate, and the insulating layer includes a second insulating layer.

[0050] Optionally, the second insulating layer includes at least a portion of the passivation layer.

[0051] Optionally, the second insulating layer comprises an inorganic material.

[0052] Optionally, the inorganic material of the second insulating layer includes silicon oxide.

[0053] In some embodiments, the insulating structure includes a first layer and a second layer stacked sequentially in a direction away from the substrate, the first layer being located within a gap and the second layer being at least partially located within the gap.

[0054] Optionally, the first layer includes at least a portion of the first flattened layer, and the second layer includes at least a portion of the second flattened layer.

[0055] Optionally, the gap includes a first gap and a second gap, the second gap is located on the side of the first gap away from the substrate, the orthographic projection of the first gap onto the substrate is located within the orthographic projection of the second gap onto the substrate, the first layer is located within the first gap and fills the first gap, and the second layer is at least not located within the second gap.

[0056] Optionally, the projection of the second gap onto the substrate lies within the projection of the second planarization layer onto the substrate.

[0057] In some embodiments, the insulating structure includes a first layer, a second layer, and a third layer stacked sequentially in a direction away from the substrate, wherein the first layer is located within a gap, the second layer is located within a gap, and the third layer is at least partially located within a gap.

[0058] Optionally, the first layer includes at least a portion of the first planarization layer, the second layer includes at least a portion of the second planarization layer, and the third layer includes at least a portion of the passivation layer.

[0059] Optionally, the gap includes a first gap and a second gap, the second gap being located on the side of the first gap away from the substrate, the orthographic projection of the first gap onto the substrate being located within the orthographic projection of the second gap onto the substrate, the first layer being located within the first gap and filling the first gap, the second layer being located within the second gap, and the third layer being at least partially located within the second gap.

[0060] Optionally, the projection of the second gap onto the substrate lies within the projection of the third layer onto the substrate.

[0061] Optionally, the third layer may include inorganic materials.

[0062] Optionally, the inorganic material of the third layer includes silicon oxide.

[0063] Thirdly, this application provides a method for manufacturing a display panel, the display panel including a display area and a non-display area surrounding at least a portion of the display area, the manufacturing method comprising:

[0064] Provide substrate;

[0065] A driving device layer is fabricated on one side of the substrate along the thickness direction. The driving device layer includes multiple pads located in the non-display area and an insulating structure. The multiple pads are spaced apart in the orthographic projection of the substrate, and there is a gap between two adjacent pads. The insulating structure includes a bonding surface that covers the side of the pads.

[0066] An insulating layer is prepared on the side of the pads and insulating structure facing away from the substrate;

[0067] An isolation structure is fabricated on the side of the insulating structure away from the substrate. The isolation structure has a first set of isolation openings located in the display area and a break located in the non-display area. The orthogonal projection of a portion of the pads onto the substrate is located within the orthogonal projection of the break onto the substrate.

[0068] A first set of light-emitting units is fabricated, wherein at least part of the orthographic projection of the first set of light-emitting units onto the substrate is located within the orthographic projection of the first set of isolation openings onto the substrate, and the light-emitting units are electrically connected to the pads.

[0069] The first group of light-emitting units was tested;

[0070] Prepare the second set of light-emitting units;

[0071] Remove at least a portion of the insulating layer and insulating structure on the side of the pad facing away from the substrate to expose the pad.

[0072] Through the above technical solution, the preparation method provided by this application can cover the side of the pad with the bonding surface of the insulating structure. The insulating structure can prevent the side of the pad from being exposed, thereby preventing the side of the pad from contacting other metals (such as the metal forming the isolation structure) and causing a short circuit, thereby improving reliability. Therefore, the preparation method provided by this application can improve the performance of the display panel.

[0073] Therefore, the preparation method provided in this application can improve the performance of the display device.

[0074] In some embodiments, fabricating the second set of light-emitting units includes:

[0075] A second set of isolation openings is prepared, located in the portion of the isolation structure within the display area;

[0076] A second set of light-emitting units is fabricated at the position corresponding to the second set of isolation openings, and the orthogonal projection of the second set of light-emitting units onto the substrate is at least partially located within the orthogonal projection of the second set of isolation openings onto the substrate;

[0077] And / or,

[0078] After fabricating the second set of light-emitting units, and before removing the insulating layer and at least a portion of the insulating structure on the side of the pad facing away from the substrate, the fabrication method provided in this application further includes:

[0079] Remove the portion of the isolation structure that is not displayed.

[0080] In some embodiments, after removing at least a portion of the insulating layer and the insulating structure on the side of the pad facing away from the substrate, the fabrication method provided in this application further includes:

[0081] A first encapsulation layer is prepared on the side of the light-emitting unit away from the substrate;

[0082] A second encapsulation layer is fabricated on the side of the first encapsulation layer that faces away from the substrate;

[0083] A third encapsulation layer is fabricated on the side of the second encapsulation layer that is away from the substrate;

[0084] Optionally, the materials of the first and third encapsulation layers include inorganic materials, and the material of the second encapsulation layer includes organic materials.

[0085] Fourthly, this application provides a display device including the display panel of the above embodiments. The display device provided by this application has the same or similar technical effects as the display panel of the above embodiments, and will not be described again here. Attached Figure Description

[0086] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0087] Figure 1 This is one of the schematic diagrams of the planar structure of the display panel provided in the embodiments of this application;

[0088] Figure 2 for Figure 1 A magnified view of a portion of point A in the middle;

[0089] Figure 3 for Figure 2 A magnified view of a portion of point B in the middle;

[0090] Figure 4 for Figure 2 A magnified view of a portion of point C in the middle;

[0091] Figure 5 For along Figure 3 One of the schematic diagrams of the cross-sectional structure of the DD line;

[0092] Figure 6 For along Figure 4 One of the schematic diagrams of the cross-sectional structure of the EE line;

[0093] Figure 7 This is one of the structural schematic diagrams of the display panel provided in the embodiments of this application;

[0094] Figure 8 This is a second schematic diagram of the structure of the display panel provided in the embodiments of this application;

[0095] Figure 9 This is the third schematic diagram of the structure of the display panel provided in the embodiments of this application;

[0096] Figure 10 Fourth schematic diagram of the structure of the display panel provided in the embodiments of this application;

[0097] Figure 11 This is one of the structural schematic diagrams illustrating the fabrication process of the isolation structure provided in the embodiments of this application;

[0098] Figure 12 This is the second schematic diagram of the structural process during the fabrication of the isolation structure provided in the embodiments of this application;

[0099] Figure 13 This is the third schematic diagram of the structural process in which the isolation structure provided in the embodiments of this application is fabricated;

[0100] Figure 14 This is the fourth schematic diagram of the structural process in which the isolation structure is prepared according to the embodiments of this application;

[0101] Figure 15 For along Figure 3 Schematic diagram of the cross-sectional structure of the DD line (Part 2);

[0102] Figure 16 For along Figure 4 Schematic diagram of the cross-sectional structure of the middle EE line (II);

[0103] Figure 17 This is a second schematic diagram of the planar structure of the display panel provided in an embodiment of this application;

[0104] Figure 18 For along Figure 3 Schematic diagram of the cross-sectional structure of the DD line (Part 3);

[0105] Figure 19 For along Figure 3 Schematic diagram of the cross-sectional structure of the DD line (Part 4);

[0106] Figure 20 For along Figure 3 Fifth schematic diagram of the cross-sectional structure of the DD line;

[0107] Figure 21 For along Figure 3 Sixth schematic diagram of the cross-sectional structure of the DD line;

[0108] Figure 22 For along Figure 3 Schematic diagram of the cross-sectional structure of the DD line (part 7);

[0109] Figure 23 For along Figure 3 Schematic diagram of the cross-sectional structure of the DD line (Part 8);

[0110] Figure 24 For along Figure 3 Schematic diagram of the cross-sectional structure of the DD line (Part 9);

[0111] Figure 25 For along Figure 3 Schematic diagram of the cross-sectional structure of the DD line (number ten);

[0112] Figure 26 This is one of the schematic flowcharts of the preparation method provided in the embodiments of this application;

[0113] Figure 27 This is a second schematic flowchart of the preparation method provided in the embodiments of this application.

[0114] The following are the labeling elements in the figure:

[0115] 100 - Display panel; 10 - Substrate; 20 - Driving device layer; 21 - Pad; 211 - First pad; 212 - Second pad; 22 - Interlayer dielectric layer; 23 - First metal; 24 - Second metal; 25 - First planarization layer; 26 - Second planarization layer; 27 - Passivation layer; 28 - Void; 30 - Pixel definition layer; 40 - Isolation structure; 41 - First isolation opening; 42 - Second isolation opening; 43 - Third isolation opening; 44 - Break; 50 - Light-emitting unit; 50 1-First electrode; 502-Light-emitting layer; 503-Second electrode; 51-First light-emitting unit; 52-Second light-emitting unit; 53-Third light-emitting unit; 60-First encapsulation layer; 61-First encapsulation part; 62-Second encapsulation part; 63-Third encapsulation part; 70-Second encapsulation layer; 80-Third encapsulation layer; 90-Gap; 91-First gap; 92-Second gap; 901-First side surface; 902-Second side surface; 201-First bonding surface; 202-Second bonding surface;

[0116] a-Silver ions; b-Silver particles; c-Photoresist; AA-Display area; NA-Non-display area. Detailed Implementation

[0117] To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.

[0118] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0119] It should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0120] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0121] Embodiments of this application provide a display panel 100, which can be an organic light-emitting diode (OLED) display panel 100, a micro light-emitting diode (Micro LED / μLED) display panel 100, or a liquid crystal display (LCD) display panel 100.

[0122] This application uses an OLED display panel 100 as an example for illustration.

[0123] Please refer to the following: Figure 1 , Figure 2 , Figure 3 , Figure 4 , Figure 5 , Figure 6 and Figure 7 The display panel 100 provided in this application embodiment includes a display area AA and a non-display area NA surrounding at least a portion of the display area AA. It is understood that the display panel 100 provided in this application embodiment may also include an integrated circuit (IC) and a plurality of pads (PADs) 21 located in the non-display area NA. The integrated circuit (not shown in the figure) may be electrically connected to the pads 21 in the non-display area NA.

[0124] In some embodiments, the display panel 100 provided in this application further includes a substrate 10, a plurality of pads 21 located on one side of the substrate 10 along the thickness direction, and the plurality of pads 21 are spaced apart in the orthographic projection of the substrate 10, with a gap 90 between two adjacent pads 21.

[0125] In some embodiments, the display panel 100 provided in this application further includes an insulating structure, which is located at least in the non-display area NA, and the insulating structure and the pad 21 are located on the same side of the substrate 10, and the insulating structure is located within the gap 90.

[0126] Please continue reading. Figure 7The display panel 100 provided in this application embodiment also includes a driving device layer 20, which is located on one side of the substrate 10 along the thickness direction. The driving device layer 20 may include the above-mentioned plurality of pads 21 and an insulating structure.

[0127] The display panel 100 provided in this embodiment further includes an isolation structure 40, which is located at least in the display area AA. The isolation structure 40 is located on one side of the substrate 10 along the thickness direction and defines a plurality of isolation openings. The isolation openings may include a first isolation opening 41, a second isolation opening 42, and a third isolation opening 43.

[0128] Please refer to the following: Figure 1 and Figure 2 Optionally, the isolation structure 40 is located in the display area AA and the non-display area NA. In order to reduce the area of ​​the isolation structure 40 in the non-display area NA and increase the difficulty of the isolation structure 40 lifting or even falling off in the non-display area NA, a break 44 can be provided in the part of the isolation structure 40 located in the non-display area NA.

[0129] The composition and preparation of the isolation structure 40 are detailed in patents CN118251982A, 202410864269.8, PCT / CN2024 / 098407, PCT / CN2024 / 102783, PCT / CN2024 / 098217, PCT / CN2024 / 099419, PCT / CN2024 / 099072, and CN. Further descriptions are provided in CN117979755A, CN117998900A, CN117062489A, CN117580403A, CN116583155A, CN116669477A, ​​CN117396039A, CN116669480A, CN116600606A, and CN117500332A for reference.

[0130] In some embodiments, the display panel 100 provided in this application further includes a light-emitting unit 50, which is located in the display area AA and the light-emitting unit 50 and the isolation structure 40 are located on the same side of the substrate 10. The orthographic projection of the light-emitting unit 50 on the substrate 10 is located within the orthographic projection of the isolation opening on the substrate 10. The light-emitting unit 50 is electrically connected to the pad 21.

[0131] There can be multiple light-emitting units 50. The light-emitting units 50 may include a first light-emitting unit 51, a second light-emitting unit 52 and a third light-emitting unit 53. The first light-emitting unit 51 is correspondingly disposed with the first isolation opening 41. The orthographic projection of the first light-emitting unit 51 on the substrate 10 is located within the orthographic projection of the first isolation opening 41 on the substrate 10. The orthographic projection of the second light-emitting unit 52 on the substrate 10 is located within the orthographic projection of the second isolation opening 42 on the substrate 10. The orthographic projection of the third light-emitting unit 53 on the substrate 10 is located within the orthographic projection of the third isolation opening 43 on the substrate 10.

[0132] It is understood that the first light-emitting unit 51, the second light-emitting unit 52, and the third light-emitting unit 53 can emit light of different colors. The first light-emitting unit 51 can emit green light, the second light-emitting unit 52 can emit blue light, and the third light-emitting unit 53 can emit red light. Optionally, the first light-emitting unit 51 can emit red light, the second light-emitting unit 52 can emit green light, and the third light-emitting unit 53 can emit blue light. Alternatively, the first light-emitting unit 51 can emit blue light, the second light-emitting unit 52 can emit red light, and the third light-emitting unit 53 can emit green light.

[0133] It is understood that the driving device layer 20 can be electrically connected to the light-emitting unit 50 to provide signals to the light-emitting unit 50. For example, the driving device layer 20 can be electrically connected to the light-emitting unit 50 via pad 21. The light-emitting unit 50 includes a first electrode 501, a light-emitting layer 502, and a second electrode 503 arranged sequentially. The first electrode 501 can be an anode, and the second electrode 503 can be a cathode.

[0134] In some embodiments, the display panel 100 provided in this application may further include a pixel definition layer 30 (PDL), the pixel definition layer 30 is located on the side of the driving device layer 20 away from the substrate 10, the isolation structure 40 is disposed on the side of the pixel definition layer 30 away from the substrate 10, the light-emitting layer 502 is formed on the pixel definition layer 30, and the first electrode 501 is located between the pixel definition layer 30 and the driving device layer 20.

[0135] In some embodiments, the driving device layer 20 includes multiple insulating film layers and multiple stacked and mutually insulated first metal layer (M1), second metal layer (M2), metal oxide layer (GATO), third metal layer (M3), and fourth metal layer (M4), the first metal layer, second metal layer, metal oxide layer, third metal layer, and fourth metal layer being disposed sequentially in a direction away from the substrate 10. The multiple insulating film layers are, respectively, a first gate dielectric layer (Gate Insulator 1, GL1), a capacitor dielectric layer (CI), a buffer layer (Buffer), a second gate dielectric layer (Gate Insulator 1, GL2), an interlayer dielectric layer 22 (ILD), a first planarization layer 25 (Planarization 1, PLN1), and a second planarization layer 26 (Planarization 2, PLN2) disposed sequentially in a direction away from the substrate 10.

[0136] The first metal layer is disposed between the first gate dielectric layer and the capacitor dielectric layer, the second metal layer is disposed between the capacitor dielectric layer and the buffer layer, the metal oxide layer is disposed between the second gate dielectric layer and the interlayer dielectric layer 22, the third metal layer is disposed between the interlayer dielectric layer 22 and the first planarization layer 25, and the fourth metal layer is disposed between the first planarization layer 25 and the second planarization layer 26.

[0137] The driving device layer 20 has a multilayer structure, and further includes polysilicon (PSI) and indium gallium zinc oxide (IGZO). The polysilicon is disposed between the substrate 10 and the first gate dielectric layer, and the IGZO is disposed between the buffer layer and the second gate dielectric layer. The first electrode 501 is disposed between the second planarization layer 26 and the pixel definition layer 30. In addition, the substrate 10 is provided with a bottom light-shielding layer opposite to the polysilicon.

[0138] It should be noted that the internal structure of the driving device layer 20 is not shown in the figure.

[0139] Please see Figure 8In some embodiments, the display panel 100 provided in this application may further include a first encapsulation layer 60. The first encapsulation layer 60 is located on the side of the light-emitting unit 50 facing away from the substrate 10. The first encapsulation layer 60 is used to encapsulate the light-emitting unit 50 and the isolation opening. The orthographic projection of the isolation opening onto the substrate 10 is located within the orthographic projection of the first encapsulation layer 60 onto the substrate 10. Optionally, the first encapsulation layer 60 includes a first encapsulation portion 61, a second encapsulation portion 62, and a third encapsulation portion 63. The first encapsulation portion 61 corresponds to the first isolation opening 41, and the orthographic projection of the first isolation opening 41 onto the substrate 10 is located within the orthographic projection of the first encapsulation portion 61 onto the substrate 10. The second encapsulation portion 62 corresponds to the second isolation opening 42, and the orthographic projection of the second isolation opening 42 onto the substrate 10 is located within the orthographic projection of the second encapsulation portion 62 onto the substrate 10. The third encapsulation portion 63 corresponds to the third isolation opening 43, and the orthographic projection of the third isolation opening 43 onto the substrate 10 is located within the orthographic projection of the third encapsulation portion 63 onto the substrate 10.

[0140] Exemplarily, the material of the first encapsulation layer 60 includes inorganic materials. Exemplarily, the first encapsulation layer 60 can be prepared by chemical vapor deposition (CVD) technology.

[0141] In some embodiments, the display panel 100 provided in this application may further include a second encapsulation layer 70, which is located on the side of the first encapsulation layer 60 facing away from the substrate 10, and covers the first encapsulation layer 60 and fills the recessed portion. Exemplarily, the material of the second encapsulation layer 70 may include organic materials. Exemplarily, the second encapsulation layer 70 may be fabricated using inkjet printing (IJP) technology.

[0142] In some embodiments, the display panel 100 provided in this application may further include a third encapsulation layer 80, which is located on the side of the second encapsulation layer 70 facing away from the substrate 10 and covers the second encapsulation layer 70. Exemplarily, the material of the third encapsulation layer 80 includes inorganic materials. Exemplarily, the third encapsulation layer 80 can be prepared using chemical vapor deposition (CVD) technology.

[0143] Please refer to the following: Figure 7 , Figure 8 , Figure 9 and Figure 10In some embodiments, during the fabrication of the display panel 100 provided in this application, an isolation structure 40 is formed on the side of the pixel definition layer 30 away from the substrate 10, and then a first isolation opening 41 and a second isolation opening 42 are patterned. After that, the pixel definition layer 30 is patterned to form pixel openings in the first isolation opening 41 and the second isolation opening 42. Then, the first light-emitting unit 51 and the second light-emitting unit 52 are fabricated in sequence, and finally the first encapsulation layer 60 is fabricated to form the first encapsulation part 61 and the second encapsulation part 62.

[0144] After forming the first encapsulation portion 61 and the second encapsulation portion 62, a third isolation opening 43 and a pixel opening corresponding to the third unit are formed, then the third light-emitting unit 53 is fabricated, and finally the first encapsulation layer 60 is fabricated to form the third encapsulation portion 63. After forming the third encapsulation portion 63, the second encapsulation layer 70 and the third encapsulation layer 80 are fabricated sequentially.

[0145] Optionally, the first encapsulation layer 60 may be an inorganic encapsulation layer formed by chemical vapor deposition (CVD) and patterning.

[0146] Optionally, the second encapsulation layer 70 can be made by inkjet printing (IJP).

[0147] Optionally, the third encapsulation layer 80 can be an inorganic encapsulation layer formed by chemical vapor deposition (CVD).

[0148] Optionally, the display panel 100 provided in this application may also include other film layers, which are located on the side of the third encapsulation layer 80 opposite to the substrate 10. These other film layers may include polarizing films, optically clear adhesive (OCA), etc.

[0149] Please refer to the following: Figure 11 , Figure 12 , Figure 13 as well as Figure 14 The inventors discovered that, when forming the first isolation opening 41 and the second isolation opening 42, the isolation structure 40 is first subjected to dry etching (such as...). Figure 11 As shown), the isolation structure 40 is then wet-etched (e.g. Figure 12 (As shown). Furthermore, the isolation structure 40 forms a break 44 in the non-display area NA. During wet etching of the isolation structure 40, the etching solution contains silver (Ag) ions a, and silver (Ag) particles b are precipitated from the silver ions a during the etching process. When fabricating the first light-emitting unit 51 and the second light-emitting unit 52, the isolation structure 40 needs to be exposed using photoresist c (e.g., ...). Figure 13 As shown), the silver particle b is also included. After the photoresist c is peeled off, the silver particle b remains on the edge of the isolation structure 40 near the break 44 and the edge of the pixel definition layer 30 (as shown). Figure 14 As shown in the figure, silver particles b may also remain in the isolation opening.

[0150] In some embodiments, the display panel 100 provided in this application further includes an insulating layer, which is located on the side of the insulating structure away from the substrate 10, and the isolation structure 40 may be located on the side of the insulating layer away from the substrate 10.

[0151] Please refer to the following: Figure 2 , Figure 3 , Figure 4 , Figure 15 as well as Figure 16 In the non-display area NA, the isolation structure 40 has a break 44, the insulating structure is located within the gap 90, and there is a gap 28 between the insulating structure and the pad 21. When the pixel definition layer 30 is patterned in the first isolation opening 41 and the second isolation opening 42, it is easy to over-etch the insulating layer at the break 44, causing the gap 28 to connect with the break 44. As a result, the silver particles b remaining at the edge of the isolation structure 40 will enter the gap 28, causing the isolation structure 40 to connect with the pad 21.

[0152] Although the insulating layer can block the isolation structure 40 from the pad 21, the gap 28 between the insulating structure and the pad 21 will cause poor flatness of the insulating layer at the gap 28. When the pixel opening is formed in the first isolation opening 41 and the second isolation opening 42, the insulating layer will be over-etched, causing the insulating layer to break at the gap 28. The silver particles b remaining at the edge of the isolation structure 40 will still enter the gap 28, causing the isolation structure 40 to connect with the pad 21.

[0153] When the isolation structure 40 is connected to different pads 21, it will cause the different pads 21 to be short-circuited. For example, the pads 21 include a first pad 211 and a second pad 212. The first pad 211 will be connected to the second pad 212 through the isolation structure 40, resulting in a short circuit between the first pad 211 and the second pad 212.

[0154] It is understandable that when the first light-emitting unit 51 and / or the second light-emitting unit 52 are illuminated and viewed from the side after fabrication, the first pad 211 and the second pad 212 will be directly or indirectly connected to the first light-emitting unit 51, or the first pad 211 and the second pad 212 will be directly or indirectly connected to the second light-emitting unit 52. A short circuit between the first pad 211 and the second pad 212 will cause different first light-emitting units 51 to be electrically connected, affecting the test results of the first light-emitting unit 51; or, a short circuit between the first pad 211 and the second pad 212 will cause different second light-emitting units 52 to be electrically connected, affecting the test results of the second light-emitting unit 52.

[0155] Please see Figure 17 In some embodiments, before fabricating the third light-emitting unit 53, the portion of the isolation structure 40 in the non-display area NA is removed when fabricating the third isolation opening 43, so that no short circuit occurs between different pads 21 when the third light-emitting unit 53 is tested.

[0156] Please see Figure 18 To address the technical problems discovered by the inventors, in some embodiments, the insulating structure is at least partially located within the gap 90. The insulating structure includes a bonding surface that covers the side surface of the pad 21. In this way, in the event of accidental over-etching of the insulating layer, the insulating structure prevents the side surface of the pad 21 from being exposed, thus preventing short circuits caused by contact between the side surface of the pad 21 and other metals (e.g., the metal forming the isolation structure 40). This avoids affecting the testing of the first light-emitting unit 51 and / or the second light-emitting unit 52, thereby improving reliability. Therefore, the display panel 100 provided in this application can improve performance.

[0157] Therefore, the display panel 100 provided in this application embodiment can improve the performance of the display device.

[0158] Furthermore, in the display panel 100 provided in this application embodiment, the insulating structure can fill the gap 28, improve the flatness of the insulating layer at the gap 28, and partially flatten the insulating layer at the gap 90, thereby preventing damage to the insulating layer (e.g., over-etching). In addition, the insulating layer can separate the pad 21 from the isolation structure 40, and can also prevent short circuits of the pad 21 to a certain extent.

[0159] Optionally, the sides of the pad 21 include opposing first side 901 and second side 902, and the gap 90 is located between the first side 901 of one of the two adjacent pads 21 and the second side 902 of the other. The bonding surfaces of the insulating structure include opposing first bonding surfaces 201 and second bonding surfaces 202, with the first bonding surface 201 covering the first side 901 and the second bonding surface 202 covering the second side 902. In this way, the insulating structure can cover the sides of the pad 21 located on both sides of the gap, preventing the pad 21 from contacting other metals and causing a short circuit in the event of accidental over-etching of the insulating layer.

[0160] It is understandable that when the bonding surface of the insulating structure is bonded to the side of the pad 21, the side of the pad 21 will not be exposed.

[0161] Optionally, the distance between the edge of the first bonding surface 201 facing away from the substrate 10 and the substrate 10 is greater than or equal to the distance between the edge of the first side surface 901 facing away from the substrate 10 and the substrate 10, and the distance between the edge of the second bonding surface 202 facing away from the substrate 10 and the substrate 10 is greater than or equal to the distance between the edge of the second side surface 902 facing away from the substrate 10 and the substrate 10. It is understood that the area of ​​the first bonding surface 201 is greater than the area of ​​the first side surface 901, and the first side surface 901 does not exceed the boundary of the first bonding surface 201; the area of ​​the second bonding surface 202 is greater than the area of ​​the second side surface 902, and the second side surface 902 does not exceed the boundary of the second bonding surface 202. In other words, the outline of the first side surface 901 is located within the area enclosed by the outline of the first bonding surface 201, and the outline of the second side surface 902 is located within the area enclosed by the outline of the second bonding surface 202. In this way, the first bonding surface 201 can cover the first side 901, which can further prevent the first side 901 from being exposed, and the second bonding surface 202 can cover the second side 902, which can further prevent the second side 902 from being exposed.

[0162] In this way, the display panel 100 provided in this application embodiment can further avoid exposing the first side 901 and / or the second side 902.

[0163] Optionally, in another display panel 100 provided in this application embodiment, the insulating structure fills the gap 90. The insulating structure can prevent the sides (first side 901 and second side 902) of the pad 21 from being exposed, thereby preventing the sides of the pad 21 from contacting other metals (such as the metal forming the isolation structure 40) and causing short circuits, thus improving reliability. Therefore, the display panel 100 provided in this application can improve its performance. In addition, after the insulating structure fills the gap 90, it can also improve the flatness of the insulating layer at the gap 28, making the part of the insulating layer at the gap 90 flat, which can prevent the insulating layer from being damaged (e.g., over-etching).

[0164] In some embodiments, the minimum distance between the surface of the insulating structure facing away from the substrate 10 and the substrate 10 is greater than or equal to the distance between the edge of the first side surface 901 facing away from the substrate 10 and the substrate 10. In this way, the insulating structure can further avoid exposing the first side surface 901.

[0165] In some embodiments, the minimum distance between the surface of the insulating structure facing away from the substrate 10 and the substrate 10 is greater than or equal to the distance between the edge of the second side surface 902 facing away from the substrate 10 and the substrate 10. In this way, the insulating structure can further prevent the second side surface 902 from being exposed.

[0166] In some embodiments, the minimum distance between the surface of the insulating structure facing away from the substrate 10 and the substrate 10 is greater than or equal to the distance between the edges of the first side 901 and the second side 902 facing away from the substrate 10 and the substrate 10. In this way, the insulating structure can further prevent the first side 901 and the second side 902 from being exposed.

[0167] In some embodiments, the insulating structure fills the gap 90. This further prevents the first side 901 and / or the second side 902 from being exposed.

[0168] Optionally, the insulation structure protrudes from the gap 90. In this way, the insulation structure can further prevent the first side 901 and / or the second side 902 from being exposed.

[0169] In summary, the insulating structure can fill the gap 28, improve the flatness of the insulating layer at the gap 28, and partially flatten the insulating layer at the gap 90, thus preventing damage to the insulating layer (e.g., over-etching).

[0170] Please see Figure 19 In other embodiments, the insulating structure has a recess on the side facing away from the substrate 10. The recess is located between the first bonding surface 201 and the second bonding surface 202, and is spaced apart from the first bonding surface 201 and the second bonding surface 202, respectively. In this way, the insulating structure can have other structural shapes, which improves its applicability.

[0171] Optionally, the distance between the bottom wall of the recess and the substrate 10 can be less than the distance between the edge of the first side 901 and / or the second side 902 facing away from the substrate 10 and the substrate 10. When the first bonding surface 201 covers the first side 901 and the second bonding surface 202 covers the second side 902, the depth of the recess will not affect the exposure of the first side 901 and the second side 902. It should be noted that the greater the depth of the recess, the smaller the distance between the bottom wall of the recess and the substrate 10; conversely, the smaller the depth of the recess, the greater the distance between the bottom wall of the recess and the substrate 10.

[0172] Please refer to the following: Figure 18 and Figure 20 In some examples, the insulating layer includes a first insulating layer, which comprises at least a portion of the pixel definition layer 30. The pixel definition layer 30 has a pixel opening communicating with the isolation opening in the display area AA. The light-emitting unit 50 includes a first electrode 501, a light-emitting layer 502, and a second electrode 503 sequentially stacked along a direction away from the substrate 10. The first electrode 501 is located on the side of the pixel definition layer 30 facing the substrate 10, and the light-emitting layer 502 is connected to the first electrode 501 through the pixel opening. In this way, the pixel definition layer 30 can simultaneously serve as the first insulating layer in the non-display area NA, which is beneficial for saving process time.

[0173] Please refer to the following: Figure 21 and Figure 22 Optionally, the insulating layer further includes a second insulating layer located on the side of the pixel definition layer 30 facing the substrate 10 and adjacent to the pixel definition layer 30. In this way, the insulating layer can include both a first insulating layer and a second insulating layer, which increases the difficulty of damage to the insulating layer, thereby improving reliability.

[0174] Please refer to the following: Figure 23 and Figure 24 In other examples, the insulating layer includes a second insulating layer on the side of the second insulating layer facing away from the substrate 10, where the pixel definition layer 30 is not disposed. In this way, the display panel 100 provided in this application can use the second insulating layer to separate the pads 21 from the isolation structure 40, thereby preventing short circuits in the pads 21.

[0175] Optionally, the second insulating layer includes at least a portion of the passivation layer 27 (PVX), so that the portion of the passivation layer 27 in the non-display area NA can also serve as the second insulating layer, which is beneficial for saving process steps.

[0176] Optionally, the second insulating layer may include an inorganic material. For example, the inorganic material of the second insulating layer may include silicon oxide (SiO / SiO2). It is understood that when the inorganic material of the second insulating layer is silicon oxide, it can exhibit good adhesion.

[0177] Please continue reading. Figures 18 to 24 In some embodiments, the insulating structure includes a first layer and a second layer stacked sequentially along a direction away from the substrate 10, the first layer being located within a gap 90, and the second layer being at least partially located within the gap 90.

[0178] Optionally, the first layer includes at least a portion of the first flattening layer 25, and the second layer includes at least a portion of the second flattening layer 26.

[0179] In this way, the insulation structure can be formed by the first planarization layer 25 and the second planarization layer 26 without additional steps, which helps to simplify the process.

[0180] In addition, the second insulating layer is adjacent to the second planarization layer 26, which has good water absorption. The second insulating layer can better integrate with the isolation structure and the pad 21, making it easier to planarize, thereby improving the planarity of the insulating layer.

[0181] Optionally, the gap 90 includes a first gap 91 and a second gap 92. The second gap 92 is located on the side of the first gap 91 facing away from the substrate 10. The orthographic projection of the first gap 91 onto the substrate 10 lies within the orthographic projection of the second gap 92 onto the substrate 10. The first layer is located within the first gap 91 and fills the first gap 91, while the second layer is at least partially located within the second gap 92. In this way, the insulating structure can fill the gap 90 and eliminate the void 28 between the insulating structure and the pad 21, thereby improving the flatness of the insulating layer.

[0182] Optionally, the projection of the second gap 92 onto the substrate 10 is located within the projection of the second layer onto the substrate 10.

[0183] Please see Figure 25 In other embodiments, the insulating structure includes a first layer, a second layer, and a third layer sequentially stacked along a direction away from the substrate 10, wherein the first layer is located within a gap 90, the second layer is located within a gap 90, and the third layer is at least partially located within a gap 90. It is understood that the third layer may fill at least a portion of the void 28 and is located on the side of the insulating layer facing the substrate 10, and the third layer may further improve the reliability of the insulating structure.

[0184] Optionally, the first layer includes at least a portion of the first planarization layer 25, the second layer includes at least a portion of the second planarization layer 26, and the third layer includes at least a portion of the passivation layer 27.

[0185] Optionally, the gap 90 includes a first gap 91 and a second gap 92. The second gap 92 is located on the side of the first gap 91 away from the substrate 10. The orthographic projection of the first gap 91 onto the substrate 10 is located within the orthographic projection of the second gap 92 onto the substrate 10. The first layer is located within the first gap 91 and fills the first gap 91. The second layer is located within the second gap 92. The third layer is located at least within the second gap 92.

[0186] Optionally, the projection of the second gap 92 onto the substrate 10 lies within the projection of the third layer onto the substrate 10.

[0187] Optionally, the third layer may include an inorganic material. For example, the inorganic material of the third layer may include silicon oxide (SiO / SiO2). It is understood that when the inorganic material of the third layer is silicon oxide, it can exhibit good adhesion.

[0188] In addition, the third layer is adjacent to the second planarization layer 26, which has good water absorption. The third layer can better integrate with the isolation structure and the pad 21, making it easier to planarize. This allows the insulation structure to better fit with the side of the pad 21 and improves the planarity of the insulation layer.

[0189] Please continue reading. Figure 18 , Figure 21 as well as Figure 23 In some embodiments, the insulating structure includes multiple insulating portions and multiple gaps 90, with one insulating portion corresponding to one gap 90. The first mating surface 201 and the second mating surface 202 are disposed on opposite sides of the insulating portions. In this way, the insulating portions can correspond one-to-one with the gaps 90.

[0190] Please continue reading. Figure 19 , Figure 20 , Figure 22 , Figure 24 as well as Figure 25 Optionally, the insulation structure also includes a connecting portion located between and connecting two adjacent insulation portions. This increases the coverage area of ​​the insulation structure, which helps to further improve reliability.

[0191] It should be noted that after the light-emitting unit is fabricated, the connection part of the insulating structure needs to be removed to expose the pad 21, thereby facilitating connection with the drive circuit (IC).

[0192] In some embodiments, the pad 21 includes a connected first metal 23 and a second metal 24, the first metal 23 being located on the side of the second metal 24 facing the substrate 10, and the orthographic projection of the first metal 23 onto the substrate 10 being within the orthographic projection of the second metal 24 onto the substrate 10. In this way, the pad 21 can improve impedance performance.

[0193] For example, the second metal 24 has a groove on the side facing the substrate 10, and the first metal 23 is located in the groove.

[0194] For example, the first metal 23 may be located in the third metal layer of the drive device layer 20, and the second metal 24 may be located in the fourth metal layer of the drive device layer 20.

[0195] In some embodiments, a portion of the insulating structure is located on the side of the pad 21 facing away from the substrate 10 and is adjacent to the pad 21. This increases the reliability of the insulating structure covering the side of the pad 21.

[0196] Please see Figure 26 This application also provides a method for manufacturing a display panel 100, which includes the following steps:

[0197] S1 provides a substrate 10.

[0198] S2, an actuator layer 20 is prepared on one side of the substrate 10 along the thickness direction. The actuator layer 20 includes a plurality of pads 21 and an insulating structure. The plurality of pads 21 are spaced apart in the orthographic projection of the substrate 10. There is a gap 90 between two adjacent pads 21. The insulating structure includes a bonding surface that covers the side of the pads 21.

[0199] S3, an insulating layer is prepared on the pad 21 and the side of the insulating structure facing away from the substrate 10.

[0200] S4, an isolation structure 40 is prepared on the side of the insulating structure away from the substrate 10. The isolation structure 40 has a first set of isolation openings located in the display area AA and a break 44 located in the non-display area NA. The orthogonal projection of a portion of the pad 21 onto the substrate 10 is located within the orthogonal projection of the break 44 onto the substrate 10.

[0201] S5, a first group of light-emitting units 50 is prepared. At least a portion of the first group of light-emitting units 50 in the orthographic projection of the substrate 10 is located within the orthographic projection of the first group of isolation openings on the substrate 10. The light-emitting units 50 are electrically connected to the pads 21.

[0202] S6, Test the first group of light-emitting units 50.

[0203] S7, Prepare the second set of light-emitting units 50.

[0204] S8, remove the portion of the isolation structure 40 in the non-display area NA.

[0205] S9, remove at least a portion of the insulating layer and insulating structure on the side of pad 21 away from substrate 10, exposing pad 21.

[0206] Optionally, the first group of light-emitting units 50 may include a first light-emitting unit 51 and a second light-emitting unit 52, and correspondingly, the first group of isolation openings may include a first isolation opening 41 and a second isolation opening 42.

[0207] The preparation method provided in this application embodiment can cover the side of the pad 21 with the bonding surface of the insulating structure, and the side of the pad 21 can be exposed. This can avoid short circuits caused by contact between other metals (such as the metal forming the isolation structure 40) on the side of the pad 21, thereby improving reliability. Therefore, the preparation method provided in this application can improve the performance of the display panel 100.

[0208] Furthermore, the preparation method provided in this application embodiment can perform a lighting test on the first group of light-emitting units 50 (e.g., the first light-emitting unit 51 and the second light-emitting unit 52) ​​during the preparation process, and can avoid the influence of the isolation structure 40 and the silver particles formed during the etching of the isolation structure 40 on the lighting test.

[0209] Furthermore, the fabrication method provided in this application embodiment can remove the portion of the isolation structure 40 in the non-display area NA, the insulating layer, and at least a portion of the insulating structure on the side of the pad 21 away from the substrate 10 after fabricating the second set of light-emitting units 50, thereby exposing the pad 21 and facilitating subsequent connection of the pad 21.

[0210] Therefore, the preparation method provided in this application embodiment can improve the performance of the display device.

[0211] Please see Figure 27 In some embodiments, in step S7, the fabrication of the second set of light-emitting units 50 includes:

[0212] S71, Prepare a second set of isolation openings, the second set of isolation openings being located in the portion of the isolation structure 40 in the display area AA.

[0213] S72, a second group of light-emitting units 50 is prepared at the position corresponding to the second group of isolation openings, and the orthogonal projection of the second group of light-emitting units 50 on the substrate 10 is at least partially located within the orthogonal projection of the second group of isolation openings on the substrate 10.

[0214] In this way, the manufacturing method provided in this application embodiment can manufacture the second set of isolation openings (e.g., the third isolation opening 53) and the second set of light-emitting units 50 (e.g., the third light-emitting unit 53) display panel 100 after the first set of light-emitting units 50 (e.g., the first set of light-emitting units 50 and the second set of light-emitting units 50) have been tested for illumination, which is beneficial to improving reliability.

[0215] Please continue reading. Figure 26 In some embodiments, the preparation method provided in this application further includes:

[0216] S10, a first encapsulation layer 60 is prepared on the side of the isolation structure 40 away from the substrate 10.

[0217] S11, a second encapsulation layer 70 is prepared on the side of the first encapsulation layer 60 that is away from the substrate 10.

[0218] S12, a third encapsulation layer 80 is prepared on the side of the second encapsulation layer 70 away from the substrate 10.

[0219] Optionally, the materials of the first encapsulation layer 60 and the third encapsulation layer 80 include inorganic materials, and the material of the second encapsulation layer 70 includes organic materials.

[0220] Optionally, the first encapsulation layer 60 may be an inorganic encapsulation layer formed by chemical vapor deposition (CVD) and patterning.

[0221] Optionally, the second encapsulation layer 70 can be made by inkjet printing (IJP).

[0222] Optionally, the third encapsulation layer 80 can be an inorganic encapsulation layer formed by chemical vapor deposition (CVD).

[0223] In this way, the preparation method provided in this application embodiment can prepare a first encapsulation layer 60 for encapsulating the light-emitting unit 50, and can also prepare a second encapsulation layer 70 and a third encapsulation layer 80 for encapsulating the first encapsulation layer 60 and the isolation structure 40.

[0224] This application also provides a display device, which includes the display panel 100 of the above embodiments. The display device provided in this application has the same or similar technical effects as the display panel 100 of the above embodiments, and will not be described again here.

[0225] Optionally, the display device can be a mobile phone, television, tablet computer, laptop computer, desktop computer, in-vehicle display terminal, wearable device, advertising display device, etc.

[0226] The above are merely preferred embodiments of this application and are not intended to limit this application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A display panel (100), characterized in that, The display panel (100) includes a display area (AA) and a non-display area (NA) surrounding at least a portion of the display area (AA). Substrate (10); Multiple pads (21) are located in the non-display area (NA), the multiple pads (21) are spaced apart in the orthographic projection of the substrate (10), and there is a gap (90) between two adjacent pads (21); An insulating structure, at least located in the non-display area (NA) and on the same side of the substrate (10) as the pad (21), is at least partially located within the gap (90); An insulating layer is located at least in the non-display area (NA) and on the side of the insulating structure opposite to the substrate (10); An isolation structure (40) is located at least in the display area (AA), the isolation structure (40) is located on one side of the substrate (10) along the thickness direction and on the same side of the substrate (10) as the insulating layer, the isolation structure (40) defining a plurality of isolation openings; The light-emitting unit (50) is located in the display area (AA) and on the same side of the substrate (10) as the isolation structure (40). At least a portion of the light-emitting unit (50) in the orthographic projection of the substrate (10) is located within the orthographic projection of the isolation opening on the substrate (10). The light-emitting unit is electrically connected to the pad (21). The insulating structure includes a bonding surface that covers the side of the pad (21).

2. The display panel (100) as described in claim 1, characterized in that, The side of the pad (21) includes a first side (901) and a second side (902) opposite each other, and the bonding surface of the insulating structure includes a first bonding surface (201) and a second bonding surface (202) opposite each other. The first bonding surface (201) covers the first side (901), and the second bonding surface (202) covers the second side (902). Preferably, the distance between the side of the first bonding surface (201) facing away from the substrate (10) and the substrate (10) is greater than or equal to the distance between the side of the first side surface (901) facing away from the substrate (10) and the substrate (10), and the distance between the side of the second bonding surface (202) facing away from the substrate (10) and the substrate (10) is greater than or equal to the distance between the side of the second side surface (902) facing away from the substrate (10) and the substrate (10).

3. The display panel (100) as described in claim 1, characterized in that, The isolation structure (40) is located on the side of the insulating layer away from the substrate (10). The insulating layer includes a first insulating layer, which includes at least a portion of a pixel definition layer (30). The pixel definition layer (30) has a pixel opening in the display area (AA) that communicates with the isolation opening. Preferably, the insulating layer further includes a second insulating layer, which is located on the side of the pixel definition layer (30) facing the substrate (10) and adjacent to the pixel definition layer (30); Preferably, the second insulating layer includes at least a portion of the passivation layer (27); Preferably, the second insulating layer comprises an inorganic material; Preferably, the inorganic material of the second insulating layer includes silicon oxide.

4. The display panel (100) as claimed in claim 1, characterized in that, The isolation structure (40) is located on the side of the insulating layer opposite to the substrate (10), and the insulating layer includes a second insulating layer; Preferably, the second insulating layer includes at least a portion of the passivation layer (27); Preferably, the second insulating layer comprises an inorganic material; Preferably, the inorganic material of the second insulating layer includes silicon oxide.

5. The display panel (100) as claimed in claim 1, characterized in that, The minimum distance between the surface of the insulating structure facing away from the substrate (10) and the substrate (10) is greater than or equal to the distance between the side of the side facing away from the substrate (10) and the substrate (10).

6. The display panel (100) as claimed in claim 1, characterized in that, The insulating structure fills the gap (90); Preferably, the insulating structure protrudes from the gap (90).

7. The display panel (100) as claimed in claim 2, characterized in that, The insulating structure includes multiple insulating parts and multiple gaps, with one insulating part corresponding to one gap, and the first bonding surface (201) and the second bonding surface (202) are disposed on opposite sides of the insulating parts.

8. The display panel (100) as claimed in claim 1, characterized in that, The insulating structure includes a first layer and a second layer stacked sequentially in a direction away from the substrate (10), the first layer being located within the gap (90), and the second layer being at least partially located within the gap (90); Preferably, the first layer includes at least a portion of a first flattening layer (25), and the second layer includes at least a portion of a second flattening layer (26); Preferably, the gap (90) includes a first gap (91) and a second gap (92), the second gap (92) is located on the side of the first gap (91) away from the substrate (10), the orthographic projection of the first gap (91) onto the substrate (10) is located within the orthographic projection of the second gap (92) onto the substrate (10), the first layer is located within the first gap (91) and fills the first gap (91), and the second layer is at least partially located within the second gap (92); Preferably, the projection of the second gap (92) onto the substrate (10) is located within the projection of the second layer onto the substrate (10).

9. The display panel (100) as claimed in claim 1, characterized in that, The insulating structure includes a first layer, a second layer and a third layer stacked sequentially in a direction away from the substrate (10), wherein the first layer is located within the gap (90), the second layer is located within the gap (90) and the third layer is at least partially located within the gap (90); Preferably, the first layer includes at least a portion of a first planarization layer (25), the second layer includes at least a portion of a second planarization layer (26), and the third layer includes at least a portion of a passivation layer (27); Preferably, the gap (90) includes a first gap (91) and a second gap (92), the second gap (92) is located on the side of the first gap (91) away from the substrate (10), the orthographic projection of the first gap (91) onto the substrate (10) is located within the orthographic projection of the second gap (92) onto the substrate (10), the first layer is located within the first gap (91) and fills the first gap (91), the second layer is located within the second gap (92), and the third layer is at least partially located within the second gap (92); Preferably, the projection of the second gap (92) onto the substrate (10) is located within the projection of the third layer onto the substrate (10); Preferably, the third layer comprises an inorganic material; Preferably, the inorganic material of the third layer includes silicon oxide.

10. The display panel (100) as claimed in claim 1, characterized in that, The pad (21) includes a first metal (23) and a second metal (24) connected together. The first metal (23) is located on the side of the second metal (24) facing the substrate (10). The orthographic projection of the first metal (23) on the substrate (10) is located within the orthographic projection of the second metal (24) on the substrate (10). Preferably, the second metal (24) has a groove on the side facing the substrate (10), and the first metal (23) is located in the groove.

11. The display panel (100) as claimed in claim 1, characterized in that, A portion of the insulating structure is located on the side of the pad (21) away from the substrate (10) and adjacent to the pad (21).

12. A display panel (100), characterized in that, The display panel (100) includes a display area (AA) and a non-display area (NA) surrounding at least a portion of the display area (AA). Substrate (10); Multiple pads (21) are located in the non-display area (NA), and the multiple pads (21) are spaced apart in the orthographic projection of the substrate (10), with a gap (90) between two adjacent pads (21); An insulating structure, at least located in the non-display area (NA) and on the same side of the substrate (10) as the pad (21), is at least partially located within the gap (90); An insulating layer is located at least in the non-display area (NA) and on the side of the insulating structure opposite to the substrate (10); An isolation structure (40) is located at least in the display area (AA), the isolation structure (40) is located on one side of the substrate (10) along the thickness direction and on the same side of the substrate (10) as the insulating layer, the isolation structure (40) defining a plurality of isolation openings; Multiple light-emitting units (50) are located in the display area (AA) and on the same side of the substrate (10) as the isolation structure (40). At least a portion of the light-emitting unit (50) in the orthographic projection of the substrate (10) is located within the orthographic projection of the isolation opening on the substrate (10). The light-emitting unit (50) is electrically connected to the pad (21). The insulating structure fills the gap (90).

13. The display panel (100) as claimed in claim 12, characterized in that, The isolation structure (40) is located on the side of the insulating layer away from the substrate (10). The insulating layer includes a first insulating layer, which includes at least a portion of a pixel definition layer (30). The pixel definition layer (30) has a pixel opening in the display area (AA) that communicates with the isolation opening. Preferably, the insulating layer further includes a second insulating layer, which is located on the side of the pixel definition layer (30) facing the substrate (10) and adjacent to the pixel definition layer (30); Preferably, the second insulating layer includes at least a portion of the passivation layer (27); Preferably, the second insulating layer comprises an inorganic material; Preferably, the inorganic material of the second insulating layer includes silicon oxide.

14. The display panel (100) as claimed in claim 12, characterized in that, The isolation structure (40) is located on the side of the insulating layer opposite to the substrate (10), and the insulating layer includes a second insulating layer; Preferably, the second insulating layer includes at least a portion of the passivation layer (27); Preferably, the second insulating layer comprises an inorganic material; Preferably, the inorganic material of the second insulating layer includes silicon oxide.

15. The display panel (100) as claimed in claim 12, characterized in that, The insulating structure includes a first layer and a second layer stacked sequentially in a direction away from the substrate (10), the first layer being located within the gap (90), and the second layer being at least partially located within the gap (90); Preferably, the first layer includes at least a portion of a first flattening layer (25), and the second layer includes at least a portion of a second flattening layer (26); Preferably, the gap (90) includes a first gap (91) and a second gap (92), the second gap (92) is located on the side of the first gap (91) away from the substrate (10), the orthographic projection of the first gap (91) onto the substrate (10) is located within the orthographic projection of the second gap (92) onto the substrate (10), the first layer is located within the first gap (91) and fills the first gap (91), and the second layer is at least partially located within the second gap (92); Preferably, the projection of the second gap (92) onto the substrate (10) is located within the projection of the second layer onto the substrate (10).

16. The display panel (100) as claimed in claim 12, characterized in that, The insulating structure includes a first layer, a second layer and a third layer stacked sequentially in a direction away from the substrate (10), wherein the first layer is located within the gap (90), the second layer is located within the gap (90) and the third layer is at least partially located within the gap (90); Preferably, the first layer includes at least a portion of a first planarization layer (25), the second layer includes at least a portion of a second planarization layer (26), and the third layer includes at least a portion of a passivation layer (27); Preferably, the gap (90) includes a first gap (91) and a second gap (92), the second gap (92) is located on the side of the first gap (91) away from the substrate (10), the orthographic projection of the first gap (91) onto the substrate (10) is located within the orthographic projection of the second gap (92) onto the substrate (10), the first layer is located within the first gap (91) and fills the first gap (91), the second layer is located within the second gap (92), and the third layer is at least partially located within the second gap (92); Preferably, the projection of the second gap (92) onto the substrate (10) is located within the projection of the third layer onto the substrate (10); Preferably, the third layer comprises an inorganic material; Preferably, the inorganic material of the third layer includes silicon oxide.

17. A method for preparing a display panel (100), characterized in that, The display panel (100) includes a display area (AA) and a non-display area (NA) surrounding at least a portion of the display area (AA), and the manufacturing method includes: Provide substrate (10); A driving device layer (20) is prepared on one side of the substrate (10) along the thickness direction. The driving device layer (20) includes a plurality of pads (21) located in the non-display area (NA) and an insulating structure. The plurality of pads (21) are arranged at intervals in the orthographic projection of the substrate (10), and there is a gap (90) between two adjacent pads (21). The insulating structure is at least partially located in the gap (90), and the insulating structure includes a bonding surface that covers the side surface of the pads (21). An insulating layer is prepared on the pad (21) and on the side of the insulating structure opposite to the substrate (10); An isolation structure (40) is prepared on the side of the insulating layer away from the substrate (10). The isolation structure (40) has a first set of isolation openings located in the display area (AA) and a break (44) located in the non-display area (NA). The orthographic projection of a portion of the pads on the substrate is located within the orthographic projection of the break on the substrate. A first set of light-emitting units (50) is prepared, wherein the first set of light-emitting units (50) is at least partially located within the orthographic projection of the first set of isolation openings on the substrate (10), and the light-emitting units (50) are electrically connected to the pads (21). The first group of light-emitting units (50) were tested; Prepare a second set of light-emitting units (50); Remove at least a portion of the insulating layer and the insulating structure on the side of the pad (21) away from the substrate (10) to expose the pad.

18. The preparation method according to claim 17, characterized in that, The preparation of the second set of light-emitting units (50) includes: Prepare a second set of isolation openings, wherein the second set of isolation openings is located in the portion of the isolation structure in the display area (AA); A second set of light-emitting units (50) is prepared at the position corresponding to the second set of isolation openings, and the second set of light-emitting units (50) is at least partially located within the orthogonal projection of the second set of isolation openings on the substrate (10) in the orthogonal projection of the substrate (10). And / or, After the fabrication of the second set of light-emitting units (50) and before the removal of at least a portion of the insulating layer and the insulating structure on the side of the pad (21) facing away from the substrate (10), the fabrication method further includes: Remove the portion of the isolation structure (40) in the non-display area (NA).

19. The preparation method according to claim 17, characterized in that, After removing at least a portion of the insulating layer and the insulating structure on the side of the pad (21) facing away from the substrate (10), the fabrication method further includes: A first encapsulation layer (60) is prepared on the side of the light-emitting unit (50) facing away from the substrate (10); A second encapsulation layer (70) is prepared on the side of the first encapsulation layer (60) facing away from the substrate (10); A third encapsulation layer (80) is prepared on the side of the second encapsulation layer (70) opposite to the substrate (10); Preferably, the materials of the first encapsulation layer (60) and the third encapsulation layer (80) include inorganic materials, and the material of the second encapsulation layer (70) includes organic materials.

20. A display device, characterized in that, Includes the display panel (100) as described in any one of claims 1 to 16.

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