Display panel, manufacturing method and display device

By designing an isolation structure in the OLED display panel, making the angle between the blocking part and the substrate surface greater than 80 degrees, and using dry and wet etching technology, the accuracy and cost issues of fine metal mask technology are solved, improving the integrity of the encapsulation layer and the performance of the display panel.

CN121908764APending Publication Date: 2026-04-21HEFEI GUOXIAN TECHNOLOGY CO LTD +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
HEFEI GUOXIAN TECHNOLOGY CO LTD
Filing Date
2026-01-28
Publication Date
2026-04-21

AI Technical Summary

Technical Problem

In the manufacturing process of traditional OLED display panels, the fine metal mask technology has problems such as limited precision and high cost, which leads to limitations in display size, resolution and other screen performance, and the encapsulation layer is prone to breakage and void defects.

Method used

The isolation structure design is adopted, and the angle between the side of the barrier and the substrate surface is greater than or equal to 80 degrees. The isolation and barrier are formed by dry and wet etching to ensure the perpendicularity of the barrier edge, reduce etching residue, and improve the film quality of the encapsulation layer.

Benefits of technology

It improves the integrity of the encapsulation layer, reduces the risk of encapsulation layer breakage and voids, ensures effective encapsulation of light-emitting devices, and enhances the performance of the display panel.

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Abstract

According to the display panel, the manufacturing method and the display device, the display panel comprises a substrate, an isolation structure and a plurality of light emitting devices, the isolation structure is arranged on one side of the substrate, a plurality of isolation openings are formed in the isolation structure, and the isolation structure comprises a blocking part; the included angle between the side face of the blocking part and the surface of the substrate is larger than or equal to 70 degrees, and the light-emitting devices are arranged in the isolation openings respectively. The side face of the blocking part is approximately perpendicular to the substrate or even perpendicular to the substrate, in the process of etching the blocking material layer to form the blocking part, the edge of the blocking part is removed in the mode approximately perpendicular to the substrate or even perpendicular to the substrate, etching of the edge of the blocking part is more complete, and the etching efficiency of the blocking part is improved. Residual materials are generated on the edge of the blocking part, and the risk of residual particles is low. Furthermore, when the first packaging layer is manufactured, the risks of breakage and cavity of the first packaging layer are reduced, the film forming quality of the first packaging layer is improved, and the packaging effectiveness of the light-emitting device is ensured.
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Description

Technical Field

[0001] This application relates to the field of display technology, and more specifically, to a display panel, a manufacturing method, and a display device. Background Technology

[0002] Organic light-emitting diode (OLED) display technology is considered the most promising next-generation display technology. Compared with liquid crystal display technology, OLED display technology has advantages such as low energy consumption, low cost, self-emissiveness, wide viewing angle, and fast response speed.

[0003] In the traditional OLED display panel manufacturing process, a fine metal mask (FMM) is typically used to pattern the light-emitting pixels. FMM technology is mature and has extensive mass production experience. However, FMM technology also suffers from limitations in precision and high cost. Fine metal mask-less technology eliminates the limitations of traditional OLED processes on display size, resolution, and other screen performance characteristics, offering advantages such as high performance, full-size display, and agile delivery. Patents CN118251982A, CN115666161A, CN116648095A, CN117062489A, CN117580403A, CN118678743A, CN118660490A, CN118678724A, CN118678806A, CN118742084A, and CN118946184A describe relevant content regarding fine metal mask-less technology and are provided for reference.

[0004] The performance of OLED display panels needs further improvement. Summary of the Invention

[0005] To overcome the technical problems mentioned in the background, embodiments of this application provide a display panel, including:

[0006] substrate; An isolation structure is disposed on one side of the substrate, and the isolation structure has multiple isolation openings; the isolation structure includes a blocking portion; the angle between the side of the blocking portion and the surface of the substrate is greater than or equal to 80°. Light-emitting devices are respectively disposed within the isolation openings; and The first encapsulation layer is disposed on the side of the light-emitting device away from the substrate, the inner side of the isolation structure, and the side of the isolation structure away from the substrate.

[0007] In some embodiments, the angle between the side of the blocking portion and the surface of the substrate is greater than or equal to 85 degrees.

[0008] In some embodiments, the width of the end of the blocking portion near the substrate is greater than or equal to the width of the end away from the substrate.

[0009] In some embodiments, the isolation structure further includes an isolation portion disposed on one side of the substrate, and a blocking portion disposed on the side of the isolation portion away from the substrate, wherein the orthographic projection of the isolation portion on the substrate is located within the orthographic projection of the blocking portion on the substrate; Optionally, the isolation structure further includes a base portion disposed on the side of the isolation portion facing the substrate, wherein the orthographic projection of the isolation portion on the substrate is located within the orthographic projection of the base portion on the substrate; Optionally, the material of the blocking portion includes a conductive material; Preferably, the material of the blocking portion includes titanium; Preferably, the material of the isolation portion includes a conductive material; Preferably, the material of the insulating part includes aluminum; Preferably, the base material includes a conductive material; Preferably, the material of the base includes molybdenum and / or titanium.

[0010] In some embodiments, the display panel further includes a first encapsulation layer disposed within the isolation opening, on the side of the light-emitting device facing away from the substrate, and on the side of the isolation structure facing away from the substrate; Optionally, within the isolation opening, the first encapsulation layer is connected to the side of the isolation portion, the side of the blocking portion, and the side of the blocking portion facing the substrate; Optionally, outside the isolation opening, the first encapsulation layer is spaced apart from the end face of the isolation structure on the side opposite to the substrate.

[0011] In some embodiments, the display panel further includes a first encapsulation layer disposed within the isolation opening, on the side of the light-emitting device facing away from the substrate, and on the side of the isolation structure facing away from the substrate; Optionally, within the isolation opening, the first encapsulation layer is connected to the side of the isolation portion, the side of the blocking portion, and the side of the blocking portion facing the substrate; Optionally, outside the isolation opening, the first encapsulation layer is spaced apart from the end face of the isolation structure on the side opposite to the substrate.

[0012] In some embodiments, the light-emitting device includes a first electrode, a light-emitting functional layer, and a second electrode sequentially stacked in a direction away from the substrate; Preferably, the second electrode is connected to the side of the base; Optionally, the second electrode is connected to the surface of the base that is opposite to the substrate; Optionally, the second electrode is also connected to the side of the isolation portion.

[0013] Another objective of this application is to provide a method for manufacturing a display panel, comprising: A substrate is provided, and a barrier material layer is formed on one side of the substrate; An isolation material layer and a barrier material layer are sequentially formed on the side of the isolation material layer opposite to the substrate; A photoresist material layer is formed on the side of the barrier material layer opposite to the substrate; The photoresist material layer is patterned to obtain a photoresist pattern layer. The photoresist pattern layer includes interconnected blocking blocks. Each blocking block includes a thick region and a thin region connected to the edge of the thick region. Using the photoresist pattern as a masking pattern, the blocking material layer is etched, and the isolation material layer is etched to obtain an isolation portion and a blocking portion disposed on the side of the isolation portion away from the substrate. Isolation openings are formed between the isolation portions and between the blocking portions. The angle between the side of the blocking portion and the surface of the substrate is greater than or equal to 80 degrees. A light-emitting device is fabricated within the isolation opening, and a first encapsulation layer is fabricated on the side of the light-emitting device and the blocking portion facing away from the substrate.

[0014] In some embodiments, patterning the photoresist material layer to obtain a photoresist patterned layer includes: A light mask is provided, which has a light-transmitting area, a light-blocking area and a semi-light-transmitting area, wherein the semi-light-transmitting area is connected to the edge of the light-blocking area; The photoresist material layer is exposed using the photomask, and the exposed photoresist material layer is developed to obtain the photoresist pattern layer.

[0015] In some embodiments, The etching of the barrier material layer and the isolation material layer using the photoresist pattern as a masking pattern includes: Using the photoresist pattern layer as a mask, the blocking material layer is etched to obtain multiple blocking portions corresponding to the masking block; Using the blocking portion as a masking pattern, the isolation material layer is etched to obtain multiple isolation portions corresponding to the blocking portion.

[0016] In some embodiments, the sequential formation of the barrier material layer on one side of the substrate further includes, before forming the barrier material layer: A base material layer is formed on one side of the substrate; and after etching the insulating material layer: Using the blocking portion as a masking pattern, the base material layer is etched to obtain multiple base portions corresponding to the blocking portion.

[0017] In some embodiments, the barrier material layer is etched using dry etching; Optionally, the insulating material layer can be etched using dry etching and wet etching methods; Optionally, the base material layer may be etched using either wet etching or dry etching.

[0018] In some embodiments, the method for manufacturing the display panel further includes: Before fabricating the isolation material layer, a pixel definition material layer is formed on one side of the substrate; and After the blocking portion is fabricated, the pixel definition material layer is etched using the blocking portion as a masking pattern to obtain a pixel definition layer with multiple pixel openings.

[0019] In some embodiments, the method for manufacturing the display panel further includes: A second encapsulation layer is formed on the side of the first encapsulation layer opposite to the substrate; and A third encapsulation layer is formed on the side of the second encapsulation layer that is opposite to the substrate.

[0020] In some embodiments, the thickness of the thin region is less than or equal to 70% of the thickness of the thick region; Optionally, the thickness of the thin region is less than or equal to 60% of the thickness of the thick region; Preferably, the thickness of the thin region is less than or equal to 50% of the thickness of the thick region; Optionally, the thickness of the thick region is 1.5 micrometers to 5 micrometers; Optionally, the thickness of the thick region is 2 micrometers to 5 micrometers.

[0021] Another objective of this application is to provide a display device that includes a display panel as described in the above embodiments, or a display panel manufactured by the manufacturing method of the display panel as described in the above embodiments.

[0022] The display panel, manufacturing method, and display device provided in this application have the following advantages: The display panel provided in this application embodiment has an isolation structure in which the angle between the side of the blocking portion and the surface of the substrate is greater than or equal to 70 degrees. The side of the blocking portion is nearly perpendicular to the substrate, or even perpendicular to the substrate. During the etching of the blocking material layer to form the blocking portion, the edge of the blocking portion is removed in a manner that is nearly perpendicular to or even perpendicular to the substrate. The etching of the edge of the blocking portion is more complete and thorough, and the risk of residual material or particles being generated at the edge of the blocking portion is lower. Furthermore, when fabricating the first encapsulation layer, it is beneficial to reduce the risk of breakage or voids in the first encapsulation layer, improve the film quality of the first encapsulation layer, and ensure the encapsulation effectiveness of the light-emitting device. Attached Figure Description

[0023] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a schematic diagram of the fabrication of an isolation structure for a display panel in the prior art, showing a photoresist layer with gently sloping edges; Figure 2 This is a schematic diagram of the fabrication of a display panel isolation structure in the prior art, wherein the edges of the isolation structure have residual metal; Figure 3 This is a schematic diagram of the fabrication of an isolation structure for a display panel in the prior art, in which the encapsulation layer has defects; Figure 4 A schematic diagram of the planar structure of the display panel provided in this application embodiment; Figure 5 Schematic cross-sectional structure of the display panel provided in the embodiments of this application Figure 1 This mainly shows the cross-sectional structure of the substrate; Figure 6 This is a schematic diagram of the pixel circuit of the display panel provided in an embodiment of this application; Figure 7 This is a plan view of the isolation structure in the display panel provided in the embodiments of this application; Figure 8 This is a schematic diagram of the light-emitting functional layer of the light-emitting device in the display panel provided in the embodiments of this application; Figure 9 yes Figure 4 Cross-sectional view along the SS line; Figure 10 This is a schematic diagram of the isolation structure in the display panel provided in the embodiments of this application; Figure 11This is a flowchart of the steps in the method for manufacturing a display panel according to an embodiment of this application; Figure 12 This is a schematic diagram of step S1 in the method for manufacturing a display panel provided in the embodiments of this application; Figure 13 This is a schematic diagram of step S2 in the method for manufacturing a display panel provided in the embodiments of this application; Figure 14 This is a schematic diagram of sub-step S31 of step S3 in the method for manufacturing a display panel provided in this application embodiment; Figure 15 This is a schematic diagram of sub-step S32 of step S3 in the method for manufacturing a display panel provided in the embodiments of this application; Figure 16 This is a schematic diagram of sub-step S41 of step S4 in the method for manufacturing a display panel provided in this application embodiment; Figure 17 This is a schematic diagram of sub-step S42 of step S4 in the method for manufacturing a display panel provided in this application embodiment; Figure 18 This is a schematic diagram of sub-step S43 of step S4 in the method for manufacturing a display panel provided in this application embodiment; Figure 19 This is a schematic diagram of sub-steps S51 and S52 of step S5 in the method for manufacturing a display panel provided in the embodiments of this application; Figure 20 This is a schematic diagram of sub-step S53 of step S5 in the method for manufacturing a display panel provided in the embodiments of this application; Figure 21 This is a schematic diagram of the structure of the display device provided in the embodiments of this application.

[0025] Figure label: 200 - Display device; 100, 100' - Display panel, AA - Display area, NA - Non-display area; 11-Substrate, 111-Substrate, 112-Drive circuit layer, 113-Planarization layer; T1 - drive transistor, T2 - data transistor, C1 - storage capacitor; 12-Isolation structure, 12a-Isolation opening, 12a1-First isolation opening, 12a2-Second isolation opening, 12a3-Third isolation opening, 121-Blocking part, 122-Isolation part, 123-Base; 13-Light-emitting device, 13a-First light-emitting device, 13b-Second light-emitting device, 13c-Third light-emitting device; 131-First electrode, 132-Light-emitting functional layer, HIL-Hole injection layer, HTL-Hole transport layer, EBL-Electron blocking layer, EML-Light-emitting material layer, HBL-Hole blocking layer, ETL-Electron transport layer, EIL-Electron injection layer, 133-Second electrode; 14-First encapsulation layer, 140-Encapsulation part, 1401-First encapsulation part, 1402-Second encapsulation part, 1403-Third encapsulation part; 15 - Second encapsulation layer; 16 - Third encapsulation layer; 17 - Pixel limiting layer; 170 - Pixel aperture; 21 - Pixel-defined material layer, 20 - Partition material layer, 22 - Base material layer, 23 - Isolation material layer, 24 - Barrier material layer; 25-Photoresist material layer, 251-Photoresist pattern layer, 252-Mask block, 253-Thick area, 254-Thin area, 255-Full exposure area, 256-Half exposure area, 257-Non-exposure area; 26-Light mask, 261-Transparent area, 262-Semi-transparent area, 263-Opaque area; 27-First encapsulation material layer, 28-Second electrode material layer, 29-Light-emitting functional material layer; 1002 - Partition structure, 1003 - Partition opening, 1004 - Photoresist pattern, 1005 - Encapsulation layer, 1006 - Isolation material, 1007 - Residual material. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0027] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0028] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. It should be noted that, unless otherwise specified, different features in the embodiments of this application can be combined with each other.

[0029] For ease of understanding, the accompanying drawings show the mutually orthogonal X, Y, and Z axes. The direction along the X-axis is called the X-direction, the direction along the Y-axis is called the Y-direction, and the direction along the Z-axis is called the Z-direction. The Z-direction is the normal direction relative to the plane containing the X and Y directions. Furthermore, the view of various elements parallel to the plane containing the X and Y directions is called a top view. Alternatively, the planes in the X and Y directions are planes parallel to the display surface of the display panel, and the Z-direction is a direction parallel to the thickness direction of the display panel.

[0030] For certain elements, terms like "above" or "overhead" are sometimes used when describing the position of an element in the Z direction, and "below" or "under" are used when describing the position of an element in the opposite direction. Furthermore, when using terms like "above," "overhead," "below," "under," or "relative" to define the positional relationship between two elements, this includes not only the state where the two elements are directly adjacent, but also the state where the two elements are separated by gaps or other elements. Additionally, terms like "first," "second," and "third" are used only for distinguishing descriptions and should not be interpreted as indicating or implying relative importance.

[0031] In the description of this application, unless otherwise stated, " / " indicates that the objects before and after are in an "or" relationship. For example, A / B can mean A or B. "And / or" in this application is merely a description of the relationship between the related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone, where A and B can be single or multiple. Furthermore, in the description of this application, "at least one of the following" or similar expressions refer to any combination of these items, including any combination of single or multiple items. For example, at least one of a, b, and c can represent: a, b, c, a+b, a+c, b+c, a+b+c, where a, b, and c can be single or multiple.

[0032] like Figures 1 to 3 As shown, in the related art, the display panel 100' has a partition structure 1002 for accommodating pixels and separating adjacent pixels. Specifically, as... Figure 3 As shown, the partition structure 1002 has multiple partition openings 1003, and pixels are disposed within the partition openings 1003. A portion of the encapsulation layer 1005 is disposed within the partition openings 1003 and connected to the inner surface of the partition openings 1003. The encapsulation layer 1005 encapsulates the pixels inside the partition openings 1003. The partition structure 1002 is fabricated using a photomask process.

[0033] The fabrication of the partition structure 1002 and its partition opening 1003 involves an etching process for the partition material. Specifically, as shown in the example... Figure 2 As shown, a photoresist layer is formed on the upper surface of the partition material. The photoresist layer is exposed and developed to obtain a photoresist pattern 1004. The partition material is etched using the photoresist pattern 1004 as a mask to form a pattern corresponding to the partition structure 1002.

[0034] The inventors of this application have discovered that the photoresist pattern 1004 has poor film coverage on the partition material, uneven thickness, insufficient thickness in some areas, greater thickness in the middle portion and thinner thickness at the edges, and gentle, even elliptical, angles at the edges. When etching the partition material using this gently sloping photoresist pattern 1004 as a shield, the resulting partition opening 1003 exhibits poor edge uniformity and perpendicularity.

[0035] The partition material includes a crystalline material layer containing grains. Because the edge thickness of the photoresist pattern 1004 is relatively small, when the partition material is etched using the photoresist pattern 1004 as a masking pattern, the edge portion of the photoresist pattern 1004 hinders the penetration of etching ions; that is, a transition zone for etching ion penetration exists on the photoresist pattern 1004. Due to the non-uniform internal structure of the crystalline material layer, the etching rate of the crystalline material layer in the transition zone is slow and it cannot be completely removed. In particular, the grains cannot be completely removed, while the portions between the grains are easily removed. Therefore, in the edge region, some grains cannot be completely etched away, resulting in some grain residue.

[0036] like Figure 2 As shown, regions with weaker atomic bonding are formed at the edges of the partition opening 1003. In subsequent processes, the atomic bonding in these edge regions (residual grains) will further decrease, such as... Figure 3 As shown, residual material 1007 may even detach and fall off, specifically as residual particles. These particles remain on the inner side of the partition opening 1003, adversely affecting the film formation quality of the encapsulation layer 1005 during its fabrication process. Figure 3 As shown, defects such as voids and cracks are generated on the encapsulation layer 1005 at the location of residual material 1007, leading to encapsulation failure.

[0037] Figure 4This is a schematic diagram of the structure of a display panel 100 according to one embodiment of this application. The display panel 100 can be an Organic Light Emitting Diode (OLED) display panel or a Quantum Dot Light Emitting Diode (QLED) display panel. The display panel 100 includes a display area AA and a non-display area NA. The non-display area NA can be located at the periphery or inner periphery of the display area AA. Here, it is shown that the non-display area NA is located at the periphery of the display area AA.

[0038] The display area AA of the display panel 100 can be rectangular, square, circular, oval, or other shapes.

[0039] The display area AA includes multiple light-emitting devices 13 arranged in an array along the X and Y directions. These light-emitting devices 13 include those of different colors. For example... Figure 4 As shown, in some embodiments, the light-emitting device 13 includes a first light-emitting device 13a, a second light-emitting device 13b, and a third light-emitting device 13c. For example, the first light-emitting device 13a is a blue light-emitting device 13, the second light-emitting device 13b is a green light-emitting device 13, and the third light-emitting device 13c is a red light-emitting device 13. In other alternative embodiments, the colors of the first light-emitting device 13a, the second light-emitting device 13b, and the third light-emitting device 13c can be interchanged. In some embodiments, in addition to including the light-emitting device 13, the light-emitting device 13 may also include a white or other colored light-emitting device 13.

[0040] refer to Figure 9 As shown, the display panel 100 includes a substrate 11 and a plurality of light-emitting devices 13 disposed on one side of the substrate 11.

[0041] refer to Figure 5 The substrate 11 includes a substrate 111 and a driving circuit layer 112 disposed on one side of the substrate 111. The driving circuit layer 112 includes pixel circuits for driving the light-emitting device 13 to emit light. Figure 3 The transistors in the pixel circuit are shown.

[0042] like Figure 5 , Figure 9 and Figure 10 As shown, the substrate 11 also includes a planarization layer 113 disposed on the side of the driving circuit layer 112 facing away from the substrate 111. A via (not shown) is provided in the planarization layer 113, and the light-emitting device 13 is connected to the driving circuit layer 112 through the via in the planarization layer 113.

[0043] like Figure 4As shown, the light-emitting device 13 includes a first electrode 131, a light-emitting functional layer 132, and a second electrode 133 sequentially disposed on the side of the planarization layer 113 facing away from the substrate 111. The first light-emitting device 13a, the second light-emitting device 13b, and the third light-emitting device 13c all include a first electrode 131, a light-emitting functional layer 132, and a second electrode 133 stacked together. Depending on the specific material of the light-emitting functional layer 132, the first light-emitting device 13a, the second light-emitting device 13b, and the third light-emitting device 13c emit different colors.

[0044] The first electrode 131 of the light-emitting device 13 is electrically connected to the transistor in the driving circuit layer 112 through a via. In addition, the driving circuit layer 112 also includes at least one insulating layer, which may include at least one of inorganic and organic layers, and the insulating layer is used to isolate the various layer structures in the transistor.

[0045] In addition, the substrate 11 also includes scan lines that provide scan signals Scan for the pixel circuit, data lines that provide data signals Data, etc.

[0046] refer to Figure 6 The transistors in the pixel circuit include a driving transistor T1 and a data transistor T2. The source of the data transistor T2 is connected to the data line that provides the data signal Data, the gate of the data transistor T2 is connected to the scan line that provides the scan signal Scan, and the drain of the data transistor T2 is connected to the gate of the driving transistor T1. The two ends of the storage capacitor C1 are respectively connected to the gate and the source of the driving transistor T1, and the drain of the driving transistor T1 is connected to the light-emitting device 13. Figure 4 This is one implementation of a pixel circuit; the pixel circuit described in this application is not limited to... Figure 4 The 2T1C pixel circuit shown can also be other pixel circuits, such as 7T1C, 8T1C pixel circuits, etc.

[0047] refer to Figure 7 and Figure 9 As shown, the isolation structure 12 is located on one side of the substrate 11 and encloses a plurality of isolation openings 12a. Corresponding to different colored light-emitting devices 13, the plurality of isolation openings 12a include a plurality of first isolation openings 12a1, a plurality of second isolation openings 12a2, and a plurality of third isolation openings 12a3. The first light-emitting device 13a is disposed corresponding to the first isolation opening 12a1, the second light-emitting device 13b is disposed corresponding to the second isolation opening 12a2, and the third light-emitting device 13c is disposed corresponding to the third isolation opening 12a3.

[0048] In one embodiment, one light-emitting device 13 is correspondingly disposed with one isolation opening 12a. For example, a first light-emitting device 13a is correspondingly disposed with a first isolation opening 12a1, a second light-emitting device 13b is correspondingly disposed with a second isolation opening 12a2, and a third light-emitting device 13c is correspondingly disposed with a third isolation opening 12a3. At least a portion of the first light-emitting device 13a is disposed within the corresponding first isolation opening 12a1, at least a portion of the second light-emitting device 13b is disposed within the corresponding second isolation opening 12a2, and at least a portion of the third light-emitting device 13c is disposed within the corresponding third isolation opening 12a3. In another embodiment, multiple light-emitting devices 13 are correspondingly disposed with one isolation opening 12a. For example, multiple light-emitting devices 13 with the same emission color are corresponding to one isolation opening 12a.

[0049] In one example, the isolation structure 12 includes an isolation portion 122 and a blocking portion 121 stacked along a direction away from the substrate 11 (i.e., the Z direction), wherein the width of the blocking portion 121 is greater than the width of the isolation portion 122. Alternatively, the orthographic projection of the isolation portion 122 onto the substrate 11 lies within the orthographic projection of the blocking portion 121 onto the substrate 11. Consequently, both ends of the blocking portion 121 protrude compared to the sides of the isolation portion 122; this shape of the isolation structure 12 is also referred to as a cantilever shape.

[0050] In some embodiments, the materials of the isolation portion 122 and the blocking portion 121 are different, and the etching rate of the blocking portion 121 is less than the etching rate of the isolation portion 122.

[0051] Optionally, the material of the isolation portion 122 includes a conductive material. More optionally, the material of the isolation portion 122 includes aluminum. In some optional embodiments, the material of the isolation portion 122 may specifically include at least one of aluminum (Al), aluminum alloys, and the aluminum alloy may include at least one of aluminum-neodymium alloy (AlNd), aluminum-yttrium alloy (AlY), or aluminum-silicon alloy (AlSi).

[0052] In some alternative embodiments, the material of the blocking portion 121 includes a conductive material.

[0053] Optionally, the blocking portion 121 can be a single-layer structure or a multi-layer structure. If the blocking portion 121 is a single-layer structure, its material may include titanium. In some optional embodiments, the material of the blocking portion 121 may include at least one of titanium, titanium nitride, molybdenum, tungsten, a molybdenum-tungsten alloy, or a molybdenum-niobium alloy. If the blocking portion 121 is a multi-layer structure, one layer of the blocking portion 121 may be made of at least one of titanium, titanium nitride, molybdenum, tungsten, a molybdenum-tungsten alloy, or a molybdenum-niobium alloy, and the other layer may be made of a conductive oxide or an inorganic insulating material. The conductive oxide may be, for example, indium tin oxide (ITO) or indium zinc oxide (IZO). In some specific embodiments, the material of the blocking portion 121 is titanium.

[0054] In some embodiments, reference Figure 9 The isolation structure 12 may also include a base 123 located on the side of the isolation portion 122 near the substrate 11. The base 123 protrudes relative to the isolation portion 122 in the direction toward the isolation opening 12a. In other words, the orthographic projection of the isolation portion 122 on the substrate 11 is located within the orthographic projection of the base 123 on the substrate 11.

[0055] In some alternative embodiments, the base 123 is made of a conductive material.

[0056] Optionally, the material of the base 123 may include at least one of molybdenum (Mo), titanium (Ti), titanium nitride (TiN), molybdenum-tungsten alloy (MoW), or molybdenum-niobium alloy (MoNb).

[0057] In one implementation, such as Figure 9 As shown, the display panel 100 may further include a pixel defining layer 17, and an isolation structure 12 is disposed on the pixel defining layer 17. The pixel defining layer 17 is provided with a pixel opening 170 communicating with the isolation opening 12a.

[0058] Specifically, the pixel opening 170 on the pixel defining layer 17 may include a first pixel opening communicating with the first isolation opening 12a1, a second pixel opening communicating with the second isolation opening 12a2, and a third pixel opening communicating with the third isolation opening 12a3. The areas of the orthographic projections of the first pixel opening, the second pixel opening, and the third pixel opening on the substrate 11 may be the same or different. The shapes of the orthographic projections of the pixel opening 170 and the corresponding isolation opening 12a on the substrate 11 may be the same or different. Generally, the area of ​​the orthographic projection of the isolation opening 12a on the substrate 11 is larger than the area of ​​the orthographic projection of the pixel opening 170 communicating with the isolation opening 12a on the substrate 11. The orthographic projections of the pixel opening 170 of the light-emitting device 13 on the substrate 11 overlap with the orthographic projections of the isolation opening 12a on the substrate 11. The pixel defining layer 17 is made of an inorganic material, such as an inorganic insulating material formed using at least one of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON).

[0059] In another embodiment, the isolation structure 12 is disposed within a groove (not shown) in the pixel limiting layer 17. Alternatively, the pixel limiting layer 17 may not be provided in the display panel 100, and the isolation structure 12 may be disposed on one side of the substrate 11, with the isolation structure 12 in contact with one side of the substrate 11.

[0060] A first electrode 131 is disposed on the substrate 11, and a pixel opening 170 is provided on the pixel defining layer 17, through which at least a portion of the first electrode 131 is exposed. In some embodiments, the pixel defining layer 17 covers the end of the first electrode 131, that is, the pixel opening 170 exposes a portion of the first electrode 131. The light-emitting functional layer 132 of each third light-emitting device 13 is located within the pixel opening 170 and is in contact with the first electrode 131. Specifically, the light-emitting functional layer 132 covers the inner sidewall of the pixel opening 170 of the pixel defining layer 17 and the side surface of the pixel defining layer 17 facing away from the substrate 11.

[0061] The second electrodes 133 of the first light-emitting device 13a, the second light-emitting device 13b, and the third light-emitting device 13c respectively cover the corresponding light-emitting functional layer 132. The second electrodes 133 are electrically connected to the isolation structure 12. For example, the second electrodes 133 are connected to the isolation portion 122 of the isolation structure 12, and / or the second electrodes 133 are connected to the base portion 123 of the isolation structure 12.

[0062] Optionally, the second electrode 133 is connected to the side of the base 123.

[0063] Optionally, the second electrode 133 is connected to the surface of the base 123 on the side opposite to the substrate 11.

[0064] Optionally, the second electrode 133 is also connected to the side of the isolation section 122.

[0065] The first electrode 131 can be an anode, and the second electrode 133 can be a cathode. The first electrode 131 of each light-emitting device 13 can be connected to the pixel circuit through a via, so that the pixel circuit drives the light-emitting device 13 to emit light.

[0066] The first electrode 131 may include a multilayer structure, such as a reflective layer and a pair of conductive oxide layers covering the upper and lower surfaces of the reflective layer, respectively. The reflective layer can be formed, for example, using silver, a metallic material with excellent light reflectivity. Each conductive oxide layer can be formed, for example, from a transparent conductive oxide such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), or IGZO (Indium Gallium Zinc Oxide). The second electrode 133 is formed, for example, from a metallic material such as an alloy of magnesium and silver (MgAg).

[0067] Figure 8 This is a schematic diagram of the light-emitting functional layer 132 in a light-emitting device 13 according to one embodiment of this application. The light-emitting functional layer 132 of at least one of the first light-emitting device 13a, the second light-emitting device 13b, and the third light-emitting device 13c includes a hole injection layer HIL, a hole transport layer HTL, an electron blocking layer EBL, a light-emitting material layer EML, a hole blocking layer HBL, an electron transport layer ETL, and an electron injection layer EIL stacked along a direction away from the substrate 11 (i.e., the Z direction). The light-emitting functional layer 132 may include a single light-emitting material layer EML, or a stacked light-emitting functional layer 132 including multiple light-emitting material layers EML.

[0068] In order for the light-emitting functional layer 132 to emit light, a pixel voltage VDD is provided to the first electrode 131 and a common voltage VSS is provided to the second electrode 133, forming a potential difference between the first electrode 131 and the second electrode 133, causing the light-emitting functional layer 132 disposed between the first electrode 131 and the second electrode 133 to emit light. In one embodiment, if a potential difference is formed between the first electrode 131 and the second electrode 133 of the first light-emitting device 13a, the light-emitting material layer EML of the light-emitting functional layer 132 emits blue light; if a potential difference is formed between the first electrode 131 and the second electrode 133 of the second light-emitting device 13b, the light-emitting material layer EML of the light-emitting functional layer 132 emits green light; and if a potential difference is formed between the first electrode 131 and the second electrode 133 of the third light-emitting device 13c, the light-emitting material layer EML of the light-emitting functional layer 132 emits red light.

[0069] In this configuration, the pixel voltage VDD of the first electrode 131 is provided by the pixel circuit, and the common voltage VSS of the second electrode 133 is provided by the isolation structure 12. Specifically, the second electrode 133 is electrically connected to the isolation structure 12, and the common voltage is supplied to the second electrode 133 by providing the isolation structure 12. That is, the isolation structure 12 has the function of supplying the common voltage to the second electrode 133.

[0070] like Figure 9 As shown, in some embodiments of this application, the display panel 100 further includes a first encapsulation layer 14. The first encapsulation layer 14 includes a plurality of encapsulation portions 140. The encapsulation portions 140 are located on the side of the second electrode 133 facing away from the substrate 11, and extend through the sidewall of the isolation structure 12 to the side of the isolation structure 12 facing away from the substrate 11. The first encapsulation layer 14 encapsulates the light-emitting device 13 inside the isolation opening 12a, so that the light-emitting device 13 is isolated from the outside.

[0071] The first encapsulation layer 14 comprises an inorganic material. In some embodiments, the material of the first encapsulation layer 14 includes at least one of silicon nitride (SiN), silicon oxide (SiO), and silicon oxynitride (SiON).

[0072] like Figure 9 As shown, in some embodiments of this application, the plurality of encapsulation portions 140 include a plurality of first encapsulation portions 1401 corresponding to a plurality of first light-emitting devices 13a, a plurality of second encapsulation portions 1402 corresponding to a plurality of second light-emitting devices 13b, and a plurality of third encapsulation portions 1403 corresponding to a plurality of third light-emitting devices 13c. The first encapsulation portion 1401 is disposed on the side of the corresponding first light-emitting device 13a away from the substrate 11, the second encapsulation portion 1402 is disposed on the side of the corresponding second light-emitting device 13b away from the substrate 11, and the third encapsulation portion 1403 is disposed on the side of the corresponding third light-emitting device 13c away from the substrate 11.

[0073] like Figure 9 As shown, in some embodiments, the display panel 100 further includes a second encapsulation layer 15, which is disposed on the side of the isolation structure 12 and the encapsulation portion 140 facing away from the substrate 11. That is, it covers the isolation structure 12 and the encapsulation portion 140. Figure 9 As shown, the second encapsulation layer 15 fills the isolation opening 12a and has a flat or nearly flat surface on the side opposite to the substrate 11.

[0074] The second encapsulation layer 15 is an organic insulating material. Optionally, the second encapsulation layer 15 includes at least one resin material such as epoxy resin and acrylic resin.

[0075] like Figure 9As shown, in some embodiments, the display panel 100 further includes a third encapsulation layer 16, which is disposed on the side of the second encapsulation layer 15 facing away from the substrate 11. That is, the third encapsulation layer 16 covers the second encapsulation layer 15.

[0076] The third encapsulation layer 16 comprises an inorganic material. In some embodiments, the material of the third encapsulation layer 16 includes at least one of silicon nitride (SiN), silicon oxide (SiO), and silicon oxynitride (SiON). The second encapsulation layer 15 and the third encapsulation layer 16 are continuously disposed over at least the entire display area AA. In some alternative embodiments, a portion of the second encapsulation layer 15 and the third encapsulation layer 16 is also disposed over the non-display area NA.

[0077] In the embodiments of this application, the base 123, the isolation portion 122, and the blocking portion 121 of the isolation structure 12 are formed through the same photomask 26 process. Specifically, in the blocking material layer 24 (see the relevant appendix of the subsequent manufacturing method), Figures 12 to 16 A photoresist layer is formed on the barrier material layer 24 (as shown). The photoresist has poor wettability and poor film thickness uniformity on the barrier material layer 24, with insufficient film thickness in some areas. When patterning the photoresist layer, the edges of the resulting masking pattern are gently sloping. When etching the barrier material layer 24 with this masking pattern, specifically dry etching, the plasma formed by gas ionization performs anisotropic etching on the barrier material layer 24. The gently sloping edges of the photolithographic masking pattern hinder the plasma, preventing it from bombarding the barrier material layer 24 perpendicularly. The plasma cannot vertically and completely etch the edges of the barrier material layer 24. Metal residue from the incompletely etched barrier material layer 24 forms edge remnants. The material adhesion at the edges of the barrier material layer 24 is weak, and the risk of detachment is high. In subsequent processes, the material at the edges of the barrier material layer 24 is very likely to fall off, forming residual particles, such as… Figure 2 As shown.

[0078] Furthermore, such as Figure 3 As shown, during the subsequent fabrication of the first encapsulation layer 14, these residual particles may fall onto the side of the isolation structure 12 near the substrate 11, or they may continue to remain on the edge of the barrier portion 121, resulting in reduced coverage of the first encapsulation material layer 27 on the edge of the barrier portion 121 and reduced coverage of the bottom of the isolation structure 12. Voids, cracks, etc. may appear on the first encapsulation layer 14 in the areas corresponding to the bottom and top of the isolation structure 12, leading to encapsulation failure and consequently causing the light-emitting device 13 to fail.

[0079] like Figure 10As shown, in some embodiments of this application, in the isolation structure 12 of the display panel 100, the angle α between the side of the blocking portion 121 and the surface of the substrate 11 is greater than or equal to 70° and less than or equal to 110°. This results in a large slope on the side of the blocking portion 121. The side of the blocking portion 121 is nearly perpendicular to the substrate 11 or even perpendicular to the substrate 11. During the etching of the blocking material layer 24 to form the blocking portion 121, the edge of the blocking portion 121 is removed in a manner that is nearly perpendicular to or even perpendicular to the substrate 11. The etching of the edge of the blocking portion 121 is more complete and thorough. Therefore, the risk of residual material or residual particles being generated at the edge of the blocking portion 121 is lower. Furthermore, when fabricating the first encapsulation layer 14, it is beneficial to reduce the risk of breakage or voids in the first encapsulation layer 14, and the film quality of the first encapsulation layer 14 ensures the encapsulation effectiveness of the light-emitting device 13.

[0080] The side of the blocking part 121 is a slope or a vertical surface perpendicular to the substrate 11, rather than an elliptical surface.

[0081] In some alternative embodiments, the angle α between the side of the blocking portion 121 and the surface of the substrate 11 is greater than or equal to 75 degrees and less than or equal to 105 degrees.

[0082] In some alternative embodiments, the angle α between the side of the blocking portion 121 and the surface of the substrate 11 is greater than or equal to 80 degrees and less than or equal to 100 degrees. The purpose of this arrangement is to make the side of the blocking portion 121 more close to being perpendicular or even perpendicular to the substrate 11.

[0083] In some alternative embodiments, the angle α between the side of the blocking portion 121 and the surface of the substrate 11 is greater than or equal to 85 degrees and less than or equal to 95 degrees.

[0084] In some specific embodiments, the included angle α between the side of the blocking portion 121 and the surface of the substrate 11 is 70°, 71°, 72°, 73°, 74°, 75°, 76°, 77°, 78°, 79°, 80°, 81°, 92°, 83°, 84°, 85°, 86°, 87°, 88°, 89°, 90°, 91°, 92°, 93°, 94°, 95°, 96°, 97°, 98°, 99°, 100°, 1011°, 102°, 103°, 104°, 105°, 106°, 107°, 108°, 109°, 110°, etc.

[0085] In some alternative embodiments, the width of the end of the blocking portion 121 near the substrate 11 is greater than or equal to the width of the end away from the substrate 11. For example... Figure 10As shown, on the side away from the isolation opening 12a, the included angle α between the side of the blocking part 121 and the surface of the substrate 11 is greater than or equal to 70° and less than or equal to 90°.

[0086] In some alternative embodiments, on the side opposite to the isolation opening 12a, the included angle α between the side of the blocking portion 121 and the surface of the substrate 11 is greater than or equal to 75° and less than or equal to 90°.

[0087] In some alternative embodiments, on the side opposite to the isolation opening 12a, the included angle α between the side of the blocking portion 121 and the surface of the substrate 11 is greater than or equal to 80° and less than or equal to 90°.

[0088] In some alternative embodiments, on the side opposite to the isolation opening 12a, the included angle α between the side of the blocking portion 121 and the surface of the substrate 11 is greater than or equal to 85° and less than or equal to 90°.

[0089] In some alternative embodiments, on the side opposite to the isolation opening 12a, the included angle α between the side of the blocking portion 121 and the surface of the substrate 11 is 70°, 71°, 72°, 73°, 74°, 75°, 76°, 77°, 78°, 79°, 80°, 81°, 92°, 83°, 84°, 85°, 86°, 87°, 88°, 89°, 90°, etc.

[0090] like Figure 9 As shown, in some embodiments of this application, within the isolation opening 12a, each encapsulation portion 140 is connected to the side surface of the isolation portion 122, the side surface of the blocking portion 121, and the side surface of the blocking portion 121 facing the substrate 11. Outside the isolation opening 12a, each encapsulation portion 140 is spaced apart from the end face of the isolation structure 12 on the side facing away from the substrate 11.

[0091] like Figure 11 As shown in the embodiments of this application, a method for manufacturing a display panel is also provided, which includes: Step S1, as follows Figure 12 As shown, a substrate 11 is provided, and a partition material layer 20 is formed on one side of the substrate 11; Step S2, as follows Figure 13 As shown, a photoresist material layer 25 is formed on the side of the partition material layer 20 facing away from the substrate 11. Step S3, as follows Figure 14 and Figure 15 As shown, the photoresist material layer 25 is patterned to obtain a photoresist pattern layer 251. The photoresist pattern layer 251 includes a plurality of spaced-apart blocking blocks 252. The blocking block 252 includes a thick region 253 and a thin region 254 connected to the edge of the thick region 253. Step S4, as follows Figures 16 to 18 As shown, the isolation material layer 20 is etched with the photoresist pattern layer 251 as the masking pattern to obtain an isolation structure 12 with multiple isolation openings 12a. Step S5, as follows Figure 19 As shown, a light-emitting device 13 is fabricated within the isolation opening 12a, and a first encapsulation layer 14 is fabricated on the side of the light-emitting device 13 and the isolation structure 12 facing away from the substrate 11.

[0092] In this embodiment, the middle region of the shielding block 252 is thicker than the edge region. In step S4, when etching the partition material layer 20 located below the shielding block 252, the plasma can more easily penetrate the thin region 254 of the shielding block 252. In other words, the thin region 254 is located at the edge of the thick region 253, which is equivalent to forming a side surface that is nearly perpendicular or even perpendicular to the substrate 11 at the edge of the thick region 253 (the part of the edge connected to the thin region 254). Furthermore, other edges on the thick region 253 that are not connected to the thin region 254 also have sides that are nearly perpendicular or even perpendicular to the substrate 11 during the exposure process. Thus, the shielding block 252 as a whole substantially has sides that are closer to or even perpendicular to the substrate 11, preventing the edges of the shielding block 252 from becoming a gentle slope.

[0093] In other words, by reducing the thickness of the edge region of the shielding block 252, the width of the ion penetration transition region on the shielding block 252 is reduced or even eliminated completely. As a result, the portion corresponding to the thin region 254 on the partition material layer 20 can be completely removed, while the corresponding thick region 253 can be retained as much as possible. This avoids the formation of areas that are not completely removed on the partition material layer 20, that is, it avoids edge material residue.

[0094] Based on this, and considering the side surface of the shielding block 252 as a whole, in step S4, the plasma can penetrate the thin region 254 in a manner nearly perpendicular to or even perpendicular to the substrate 11, and etch the barrier material layer 20 in a manner nearly perpendicular to or even perpendicular to the substrate 11. The plasma etching of the barrier material layer 20 is more complete and thorough, avoiding the formation of areas with weak adhesion on the inner surface of the isolation opening 12a, and thus preventing the formation of residual particles within the isolation opening 12a. Therefore, in the subsequent process of step S5, when fabricating the first encapsulation layer 14, the first encapsulation layer 14 will not cover residual particles, and the first encapsulation layer 14 has good film continuity and high film quality uniformity, providing excellent encapsulation for the light-emitting device 13.

[0095] Please refer to the following: Figure 18 As shown, at least a portion of the side surface of the resulting isolation opening 12a can be nearly perpendicular or even perpendicular to the substrate 11.

[0096] like Figure 12 As shown, in some embodiments of this application, step S1, forming a barrier material layer 20 on one side of the substrate 11, includes: Step S11: A base material layer 22 is formed on one side of the substrate 11; Step S12, forming an isolation material layer 23 on the side of the base material layer 22 facing away from the substrate 11; and Step S13: A barrier material layer 24 is formed on the side of the isolation material layer 23 facing away from the substrate 11.

[0097] In step S2, a photoresist material layer 25 is formed on the side of the barrier material layer 24 facing away from the substrate 11.

[0098] In step S4, etching the partition material layer 20 to obtain the isolation structure 12 with multiple isolation openings 12a includes: Step S41, as follows Figure 16 As shown, the photoresist pattern layer 251 is used as a masking pattern to etch the blocking material layer 24 to obtain multiple blocking portions 121; wherein, the side of the blocking portion 121 can be close to or even perpendicular to the substrate 11. Step S42, as follows Figure 17 As shown, the isolation material layer 23 is etched using the blocking portion 121 as a masking pattern to obtain a plurality of isolation portions 122; wherein the edges of the isolation portions 122 are recessed relative to the edges of the blocking portion 121; and Step S43, as follows Figure 18 As shown, the base material layer 22 is etched with the blocking part 121 as the shielding pattern to obtain a plurality of bases 123; wherein the edge of the isolation part 122 is recessed relative to the edge of the base 123.

[0099] like Figure 18 As shown, the base 123, the isolation portion 122, and the blocking portion 121 are stacked sequentially in a direction away from the substrate 11 to form the isolation structure 12. Please refer to [reference needed]. Figure 6 As shown, the isolation structure 12 is arranged in a continuous grid pattern. Specifically, the base 123, the isolation portions 122, and the blocking portions 121 are all arranged in a continuous grid pattern. The aforementioned plurality of blocking portions 121, isolation portions 122, and base portions 123 respectively refer to the blocking portions 121, the isolation portions 122, and the base portions 123 located on different sides of the isolation opening 12a.

[0100] In some embodiments of this application, the barrier material layer 24 is etched using a dry etching method in step S41. In step S41, the side surface of the resulting barrier portion 121 can be nearly perpendicular or even perpendicular to the substrate 11, and no residual material is formed on the side surface of the barrier portion 121.

[0101] In some embodiments of this application, the angle α between the side of the blocking portion 121 and the surface of the substrate 11 is greater than or equal to 70° and less than or equal to 110°.

[0102] In some alternative embodiments, the angle α between the side of the blocking portion 121 and the surface of the substrate 11 is greater than or equal to 75 degrees and less than or equal to 105 degrees.

[0103] In some alternative embodiments, the angle α between the side of the blocking portion 121 and the surface of the substrate 11 is greater than or equal to 80 degrees and less than or equal to 100 degrees. The purpose of this arrangement is to make the side of the blocking portion 121 more close to being perpendicular or even perpendicular to the substrate 11.

[0104] In some alternative embodiments, the angle α between the side of the blocking portion 121 and the surface of the substrate 11 is greater than or equal to 85 degrees and less than or equal to 95 degrees.

[0105] In some alternative embodiments, the width of the end of the blocking portion 121 near the substrate 11 is greater than or equal to the width of the end away from the substrate 11.

[0106] In some embodiments of this application, in step S42, the isolation material layer 23 is etched using dry etching and wet etching methods.

[0107] In some embodiments of this application, in step S43, the base material layer 22 is etched using a wet etching method or a dry etching method.

[0108] Optionally, dry etching is used to etch the barrier material layer 24 and the isolation material layer 23, completely removing the unmasked portion of the barrier material layer 24 and a portion of the isolation material layer 23 in the thickness direction of the substrate 11. Then, wet etching is used to continue etching the remaining portion of the isolation material layer 23 and the base material layer 22 until the unmasked portions of the isolation material layer 23 and the base material layer 22 are completely removed in terms of thickness. Optionally, the base material layer 22 includes molybdenum.

[0109] Alternatively, dry etching may be used to etch the barrier material layer 24 and the isolation material layer 23, completely removing the unmasked portion of the barrier material layer 24 and a portion of the isolation material layer 23 in the thickness direction of the substrate 11. Then, wet etching is used to continue etching the remaining portion of the isolation material layer 23 until it is completely removed in thickness. Finally, dry etching is used to remove the unmasked portion of the base material layer 22. Optionally, the base material layer 22 comprises titanium.

[0110] like Figure 12 As shown, in some embodiments of this application, step S1, which involves forming a barrier material layer 20 on one side of the substrate 11, further includes, before step S11: In step S10, a plurality of first electrodes 131 are formed on one side of the substrate 11, and a pixel definition material layer 21 is formed on the side of the first electrodes 131 facing away from the substrate 11.

[0111] In step S11, the base 123 material is formed on the side of the pixel definition material layer 21 away from the substrate 11.

[0112] Please see Figure 18 As shown, in some embodiments of this application, step S4 further includes etching the pixel definition material layer 21 to obtain a pixel definition layer with a plurality of pixel openings 170; wherein the pixel openings 170 and the isolation openings 12a are connected in the orthogonal projection direction of the substrate 11.

[0113] Specifically, in this step, the pixel definition material layer 21 is etched using the isolation structure 12 as a masking pattern.

[0114] In some embodiments of this application, please refer to Figure 14 and Figure 15 As shown, in step S3, the process of patterning the photoresist material layer 25 to obtain the photoresist pattern layer 251 includes: Step S31, as follows Figure 14 As shown, a photomask 26 is provided, and the photomask 26 is provided with a plurality of light-transmitting areas 261, non-light-transmitting areas 263 and semi-light-transmitting areas 262, with the semi-light-transmitting areas 262 connected to the edge of the semi-light-transmitting areas 262. Step S32, as follows Figure 15 As shown, the photoresist material layer 25 is exposed by the photomask 26, and the exposed photoresist material layer 25 is developed to obtain the photoresist pattern layer 251.

[0115] In step S32, the portion of the photoresist material layer 25 corresponding to the light-transmitting area 261 is fully exposed, the portion corresponding to the semi-light-transmitting area 262 is partially exposed, and the portion corresponding to the non-light-transmitting area 263 is not exposed.

[0116] In some embodiments, the photoresist material layer 25 is a positive photoresist material layer. For a positive photoresist material layer, the exposed portion undergoes a chemical change and is removed during the development process.

[0117] Therefore, as Figure 15 As shown, for a portion of the exposed area of ​​the photoresist material layer 25, the portion of the photoresist material layer 25 away from the substrate 11 in the thickness direction is removed by development. The thin region 254 and the thick region 253 are connected to the side of the thick region 253 near the substrate 11. Alternatively, the sides of both the thin region 254 and the thick region 253 near the substrate 11 are in contact with the barrier material layer 24, and there is a height difference between the sides of the thin region 254 and the thick region 253 away from the substrate 11.

[0118] In some embodiments of this application, the thickness h of the thin region 254 is less than or equal to 70% of the thickness H of the thick region 253. The purpose of this setting is to make the thin region 254 and the thick region 253 form a clear distinction between penetration and non-penetration under the same plasma bombardment conditions, while making the exposed side of the thick region 253 as close to vertical as possible or even disposed on the substrate 11.

[0119] In some embodiments of this application, the thickness h of the thin region 254 is less than or equal to 60% of the thickness H of the thick region 253.

[0120] In some embodiments of this application, the thickness h of the thin region 254 is less than or equal to 50% of the thickness H of the thick region 253.

[0121] In some embodiments of this application, the thickness h of the thin region 254 is greater than or equal to 30% of the thickness H of the thick region 253.

[0122] In some embodiments of this application, the thickness h of the thin region 254 is greater than or equal to 40% of the thickness H of the thick region 253.

[0123] In some specific embodiments of this application, the thickness h of the thin region 254 is 30%, 35%, 40%, 45%, 50%, 55%, 60%, 65%, 70%, etc., of the thickness H of the thick region 253.

[0124] In some embodiments of this application, the thickness H of the thick region 253 is 1.5 micrometers to 5 micrometers. The purpose of this setting is to ensure that the thick region 253 of the photoresist pattern layer 251 has sufficient thickness to shield the plasma.

[0125] In some embodiments of this application, the thickness H of the thick region 253 is 2 micrometers to 4.5 micrometers.

[0126] In some embodiments of this application, the thickness H of the thick region 253 is 1.5 micrometers to 4.5 micrometers.

[0127] In some embodiments of this application, the thickness H of the thick region 253 is 1.5 micrometers to 4 micrometers.

[0128] In some embodiments of this application, the thickness H of the thick region 253 is 1.8 micrometers to 4 micrometers.

[0129] In some specific embodiments of this application, the thickness H of the thick region 253 is 1.5 μm, 1.6 μm, 1.8 μm, 2.0 μm, 2.2 μm, 2.4 μm, 2.5 μm, 2.6 μm, 2.8 μm, 3.0 μm, 3.2 μm, 3.4 μm, 3.5 μm, 3.6 μm, 3.8 μm, 4.0 μm, 4.2 μm, 4.4 μm, 4.5 μm, 4.6 μm, 4.8 μm, 5.0 μm, etc.

[0130] In some embodiments of this application, the thickness h of the thin region 254 is less than or equal to 3.5 micrometers. In some embodiments of this application, the thickness h of the thin region 254 is less than or equal to 3.0 micrometers. In some embodiments of this application, the thickness h of the thin region 254 is less than or equal to 2.5 micrometers. In some embodiments of this application, the thickness h of the thin region 254 is less than or equal to 2.0 micrometers. In some embodiments of this application, the thickness h of the thin region 254 is less than or equal to 1.5 micrometers. In some embodiments of this application, such as... Figure 15 As shown, the width D of the thin region 254 is less than or equal to 4 micrometers. The purpose of this setting is to minimize plasma reflection while allowing the plasma to penetrate the thin region 254, thereby improving plasma etching efficiency.

[0131] In some embodiments of this application, such as Figure 15 As shown, the width D of the thin region 254 is greater than or equal to 1 micrometer. The purpose of this setting is to ensure that the thin region 254 can be formed and manufactured.

[0132] In some embodiments of this application, such as Figure 15 As shown, the width D of the thin region 254 is greater than or equal to 2 micrometers. In some specific embodiments of this application, such as... Figure 15 As shown, the width D of the thin region 254 is 1 micrometer, 1.2 micrometer, 1.4 micrometer, 1.5 micrometer, 1.6 micrometer, 1.8 micrometer, 2.0 micrometer, 2.2 micrometer, 2.4 micrometer, 2.5 micrometer, 2.6 micrometer, 2.8 micrometer, 3.0 micrometer, 3.2 micrometer, 3.4 micrometer, 3.5 micrometer, 3.6 micrometer, 3.8 micrometer, 4.0 micrometer, etc.

[0133] In some embodiments of this application, such as Figure 11 As shown, the manufacturing method of this display panel also includes: Step S6: A second encapsulation layer 15 is formed on the side of the first encapsulation layer 14 facing away from the substrate 11; and Step S7: A third encapsulation layer 16 is formed on the side of the second encapsulation layer 15 that is opposite to the substrate 11.

[0134] Please refer to the following: Figure 9 As shown, in the obtained display panel 100, the orthographic projection of the first encapsulation layer 14 on the substrate 11 is located within the orthographic projection of the second encapsulation layer 15 on the substrate 11, and the orthographic projection of the second encapsulation layer 15 on the substrate 11 is located within the orthographic projection of the third encapsulation layer 16 on the substrate 11.

[0135] Please see Figure 15 and Figure 16 As shown, this application embodiment also provides an intermediate structure for a display panel, which includes a substrate 11, a barrier material layer 20, and a photoresist pattern layer 251. The barrier material layer 20 is disposed on one side of the substrate 11 and includes a base material layer 22, an isolation material layer 23, and a barrier material layer 24 sequentially stacked in a direction away from the substrate 11. The photoresist pattern layer 251 includes a plurality of spaced-apart blocking blocks 252, each blocking block 252 including a thick region 253 and a thin region 254 connected to the edge of the thick region 253.

[0136] like Figure 15 As shown, the thin region 254 and the thick region 253 are connected at the ends of their sides near the substrate 11. Alternatively, the sides of both the thin region 254 and the thick region 253 near the substrate 11 are in contact with the barrier material layer 24, and the sides of the thin region 254 and the thick region 253 away from the substrate 11 have a height difference.

[0137] Steps S2 to S5 of the manufacturing method of the display panel 100 according to the embodiments of this application will be described below.

[0138] In one embodiment, in steps S2 to S4, an isolation structure 12 with multiple first isolation openings 12a1 is formed on one side of the substrate 11. In step S5, a first light-emitting device 13a and its corresponding encapsulation portion 140 are formed within the first isolation openings 12a1. Then, steps S2 to S4 are repeated to form an isolation structure 12 with multiple second isolation openings 12a2. In step S5, a second light-emitting device 13b and its corresponding encapsulation portion 140 are formed within the second isolation openings 12a2. Similarly, steps S2 to S4 are repeated to form an isolation structure 12 with multiple third isolation openings 12a3. In step S5, a third light-emitting device 13c and its corresponding encapsulation portion 140 are formed within the third isolation openings 12a3. Here, the colors and manufacturing order of the first light-emitting device 13a, the second light-emitting device 13b, and the third light-emitting device 13c are not limited.

[0139] In another case, through steps S2 to S4, an isolation structure 12 with multiple isolation openings 12a is formed on one side of the substrate 11; wherein the isolation structure 12 is provided with multiple isolation openings 12a, and the multiple isolation openings 12a include multiple first isolation openings 12a1, multiple second isolation openings 12a2, and multiple third isolation openings 12a3. Step S5 specifically includes: Step S51, as follows Figure 19 As shown, a film layer for the first light-emitting device 13a is fabricated. The film layer for the first light-emitting device 13a includes a light-emitting functional material layer 29 and a second electrode layer 133. Specifically, step S51 includes forming a complete layer of the light-emitting functional material layer 29 and the second electrode material layer 28 of the first light-emitting device 13a on the side of the isolation structure 12 facing away from the substrate 11.

[0140] The first light-emitting device 13a has a light-emitting functional material layer 29 and a second electrode 133 layer in the multiple first isolation openings 12a1, multiple second isolation openings 12a2 and multiple third isolation openings 12a3, as well as at one end of the isolation structure 12 away from the substrate 11.

[0141] Step S52, as follows Figure 19 As shown, the encapsulation portion 140 of the first light-emitting device 13a is fabricated. Specifically, in step S52, a full-length first encapsulation material layer 27 is formed on the side of the second electrode material layer 28 facing away from the substrate 11 and on the side of the isolation structure 12 facing away from the substrate 11.

[0142] Step S53, as follows Figure 20As shown, the first encapsulation material layer 27, the light-emitting functional material layer 29, and the second electrode 133 layer of the first light-emitting device 13a within the multiple second isolation openings 12a2 and multiple third isolation openings 12a3 are etched away, thereby forming the light-emitting functional layer 132, the second electrode 133, and the encapsulation portion 140 corresponding to the first light-emitting device 13a only at the locations of the multiple first isolation openings 12a1.

[0143] By repeating steps S51 to S53, a light-emitting functional layer 132, a second electrode 133, and a corresponding encapsulation portion 140 of the second light-emitting device 13b can be formed within a plurality of second isolation openings 12a2; by continuing to repeat steps S51 to S53, a light-emitting functional layer 132, a second electrode 133, and a corresponding encapsulation portion 140 of the third light-emitting device 13c can be formed within a plurality of third isolation openings 12a3.

[0144] The blocking blocks 252 are interconnected in a grid pattern. The thin area 254 is ring-shaped.

[0145] In some embodiments of this application, the thickness h of the thin region 254 is less than or equal to 70% of the thickness H of the thick region 253. In some embodiments of this application, the thickness h of the thin region 254 is less than or equal to 60% of the thickness H of the thick region 253. In some embodiments of this application, the thickness h of the thin region 254 is less than or equal to 50% of the thickness H of the thick region 253. In some embodiments of this application, the thickness h of the thin region 254 is greater than or equal to 30% of the thickness H of the thick region 253. In some embodiments of this application, the thickness h of the thin region 254 is greater than or equal to 40% of the thickness H of the thick region 253. In some specific embodiments of this application, the thickness h of the thin region 254 is 30%, 35%, 40%, 45%, 50%, 55%, 60%, 65%, 70%, etc., of the thickness H of the thick region 253.

[0146] In some embodiments of this application, the thickness H of the thick region 253 is 1.5 μm to 5 μm. In some embodiments of this application, the thickness H of the thick region 253 is 1.5 μm to 4.5 μm. In some embodiments of this application, the thickness H of the thick region 253 is 1.5 μm to 4 μm. In some embodiments of this application, the thickness H of the thick region 253 is 1.8 μm to 4 μm. In some specific embodiments of this application, the thickness H of the thick region 253 is 1.5 μm, 1.6 μm, 1.8 μm, 2.0 μm, 2.2 μm, 2.4 μm, 2.5 μm, 2.6 μm, 2.8 μm, 3.0 μm, 3.2 μm, 3.4 μm, 3.5 μm, 3.6 μm, 3.8 μm, 4.0 μm, 4.2 μm, 4.4 μm, 4.5 μm, 4.6 μm, 4.8 μm, 5.0 μm, etc.

[0147] In some embodiments of this application, the thickness h of the thin region 254 is less than or equal to 3.5 micrometers.

[0148] In some embodiments of this application, the thickness h of the thin region 254 is less than or equal to 3.0 micrometers.

[0149] In some embodiments of this application, the thickness h of the thin region 254 is less than or equal to 2.5 micrometers.

[0150] In some embodiments of this application, the thickness h of the thin region 254 is less than or equal to 2.0 micrometers.

[0151] In some embodiments of this application, the thickness h of the thin region 254 is less than or equal to 1.5 micrometers.

[0152] In some embodiments of this application, such as Figure 15 As shown, the width D of thin region 254 is less than or equal to 4 micrometers.

[0153] In some embodiments of this application, such as Figure 15 As shown, the width D of the thin region 254 is greater than or equal to 1 micrometer. The purpose of this setting is to ensure that the thin region 254 can be formed and manufactured.

[0154] In some embodiments of this application, such as Figure 15 As shown, the width D of the thin region 254 is greater than or equal to 2 micrometers. In some specific embodiments of this application, such as... Figure 15 As shown, the width D of the thin region 254 is 1 micrometer, 1.2 micrometer, 1.4 micrometer, 1.5 micrometer, 1.6 micrometer, 1.8 micrometer, 2.0 micrometer, 2.2 micrometer, 2.4 micrometer, 2.5 micrometer, 2.6 micrometer, 2.8 micrometer, 3.0 micrometer, 3.2 micrometer, 3.4 micrometer, 3.5 micrometer, 3.6 micrometer, 3.8 micrometer, 4.0 micrometer, etc.

[0155] In some embodiments, reference Figure 21 This application also provides a display device 200, which includes the display panel 100 described in the above embodiments of this application, or the display panel 100 manufactured by the manufacturing method of the display panel described in the above embodiments.

[0156] The display device 200 may include devices with image processing capabilities, such as mobile phones, desktop computers, laptops, tablets, automotive displays, wearable devices, etc. Since the display device 200 includes the display panel 100 described in this application, the encapsulation layer of the display panel 100 has high film quality, provides good encapsulation of the light-emitting device 13, and has reliable performance.

[0157] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A display panel, characterized in that, include: substrate; An isolation structure is provided on one side of the substrate, and the isolation structure is provided with multiple isolation openings; The isolation structure includes a blocking portion; the angle between the side of the blocking portion and the surface of the substrate is greater than or equal to 80°. Light-emitting devices are respectively disposed within the isolation opening; as well as The first encapsulation layer is disposed on the side of the light-emitting device away from the substrate, the inner side of the isolation structure, and the side of the isolation structure away from the substrate.

2. The display panel as described in claim 1, characterized in that, The angle between the side of the blocking portion and the surface of the substrate is greater than or equal to 85 degrees.

3. The display panel as described in claim 2, characterized in that, The width of the end of the blocking portion near the substrate is greater than or equal to the width of the end away from the substrate.

4. The display panel as described in claim 1, characterized in that, The isolation structure further includes an isolation portion disposed on one side of the substrate, and a blocking portion disposed on the side of the isolation portion away from the substrate. The orthographic projection of the isolation portion on the substrate is located within the orthographic projection of the blocking portion on the substrate. Preferably, the isolation structure further includes a base portion disposed on the side of the isolation portion facing the substrate, wherein the orthographic projection of the isolation portion on the substrate is located within the orthographic projection of the base portion on the substrate; Preferably, the material of the blocking portion includes a conductive material; Preferably, the material of the blocking portion includes titanium; Preferably, the material of the isolation portion includes a conductive material; Preferably, the material of the insulating part includes aluminum; Preferably, the base material includes a conductive material; Preferably, the material of the base includes molybdenum and / or titanium.

5. The display panel as described in claim 4, characterized in that, The display panel further includes a first encapsulation layer, which is disposed within the isolation opening, on the side of the light-emitting device facing away from the substrate, and on the side of the isolation structure facing away from the substrate. Preferably, within the isolation opening, the first encapsulation layer is connected to the side of the isolation portion, the side of the blocking portion, and the side of the blocking portion facing the substrate; Preferably, outside the isolation opening, the first encapsulation layer is spaced apart from the end face of the isolation structure on the side opposite to the substrate.

6. The display panel as described in claim 4, characterized in that, The light-emitting device includes a first electrode, a light-emitting functional layer, and a second electrode that are sequentially stacked in a direction away from the substrate; Preferably, the second electrode is connected to the side of the base; Preferably, the second electrode is connected to the surface of the base that is opposite to the substrate; Preferably, the second electrode is also connected to the side of the isolation portion.

7. A method for manufacturing a display panel, characterized in that, include: A substrate is provided, wherein an insulating material layer and a barrier material layer are sequentially formed on one side of the substrate; A photoresist material layer is formed on the side of the barrier material layer opposite to the substrate; The photoresist material layer is patterned to obtain a photoresist pattern layer. The photoresist pattern layer includes interconnected blocking blocks. Each blocking block includes a thick region and a thin region connected to the edge of the thick region. Using the photoresist pattern as a masking pattern, the blocking material layer is etched, and the isolation material layer is etched to obtain an isolation portion and a blocking portion disposed on the side of the isolation portion away from the substrate. Isolation openings are formed between the isolation portions and between the blocking portions. The angle between the side of the blocking part and the surface of the substrate is greater than or equal to 80 degrees; A light-emitting device is fabricated within the isolation opening, and a first encapsulation layer is fabricated on the side of the light-emitting device and the blocking portion facing away from the substrate.

8. The method for manufacturing a display panel as described in claim 7, characterized in that, The process of patterning the photoresist material layer to obtain a photoresist pattern layer includes: A light mask is provided, which has a light-transmitting area, a light-blocking area and a semi-light-transmitting area, wherein the semi-light-transmitting area is connected to the edge of the light-blocking area; The photoresist material layer is exposed using the photomask, and the exposed photoresist material layer is developed to obtain the photoresist pattern layer.

9. The method for manufacturing a display panel as described in claim 7, characterized in that, The etching of the barrier material layer and the isolation material layer using the photoresist pattern as a masking pattern includes: Using the photoresist pattern layer as a mask, the blocking material layer is etched to obtain multiple blocking portions corresponding to the masking block; Using the blocking portion as a masking pattern, the isolation material layer is etched to obtain multiple isolation portions corresponding to the blocking portion.

10. The method for manufacturing a display panel as described in claim 9, characterized in that, This also includes, prior to the formation of the insulating material layer: A base material layer is formed on one side of the substrate; And, after etching the insulating material layer: Using the blocking portion as a masking pattern, the base material layer is etched to obtain multiple base portions corresponding to the blocking portion.

11. The method for manufacturing a display panel as described in claim 10, characterized in that, The barrier material layer was etched using a dry etching method; Preferably, the insulating material layer is etched using both dry etching and wet etching methods; Preferably, the base material layer is etched using a wet etching method or a dry etching method.

12. The method for manufacturing a display panel as described in claim 9, characterized in that, The method for manufacturing the display panel further includes: Before fabricating the isolation material layer, a pixel definition material layer is formed on one side of the substrate; and After the blocking portion is fabricated, the pixel definition material layer is etched using the blocking portion as a masking pattern to obtain a pixel definition layer with multiple pixel openings.

13. A method for manufacturing a display panel as described in any one of claims 7 to 12, characterized in that, The method for manufacturing the display panel further includes: A second encapsulation layer is formed on the side of the first encapsulation layer opposite to the substrate; and A third encapsulation layer is formed on the side of the second encapsulation layer that is opposite to the substrate.

14. The method for manufacturing a display panel as described in any one of claims 7 to 12, characterized in that, The thickness of the thin region is less than or equal to 70% of the thickness of the thick region; Preferably, the thickness of the thin region is less than or equal to 60% of the thickness of the thick region; Preferably, the thickness of the thin region is less than or equal to 50% of the thickness of the thick region; Preferably, the thickness of the thick region is 1.5 micrometers to 5 micrometers; Preferably, the thickness of the thick region is 2 micrometers to 5 micrometers.

15. A display device, characterized in that, It includes a display panel as described in any one of claims 1 to 6, or a display panel manufactured by the method of manufacturing a display panel as described in any one of claims 7 to 14.

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