Display device

Abstract

A display device is provided. The display device includes: a substrate including sub-pixels; a first cover layer disposed on the substrate and including a base portion and a protruding portion disposed on the base portion; a light emitting diode disposed in the sub-pixel and covering a top surface of the base portion and a side surface of the protruding portion; a first optical pattern disposed on the light emitting diode; and a second optical pattern disposed on and overlapping the first optical pattern, the first optical pattern and the second optical pattern protruding in different directions, in which the side surface of the protruding portion forms an inclined surface with respect to the top surface of the base portion.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2024-0144214, filed on October 21, 2024, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference. Technical Field

[0003] This disclosure relates to a display device, and more specifically, to a display device with improved viewing angle. Background Technology

[0004] Recently, with the full arrival of the information society, display devices that visually display electrical information signals are developing rapidly. Various researches are constantly being conducted to develop a variety of display devices that are thin, light, consume low power, and have improved performance.

[0005] Representative display devices include liquid crystal display (LCD) devices, electrowetting display (EWD) devices, and organic light-emitting diode (OLED) display devices.

[0006] Among these display devices, those including organic light-emitting diode (OLED) displays refer to self-emissive display devices. Unlike liquid crystal displays (LCDs), electroluminescent displays do not require a separate light source, thus allowing them to be manufactured into thin and lightweight devices. Furthermore, electroluminescent displays are advantageous in terms of power consumption because they operate at low voltages. Moreover, due to their excellent performance in color reproduction, response speed, viewing angle, and contrast ratio (CR), electroluminescent displays are expected to be used in various fields. Summary of the Invention

[0007] One objective of this disclosure is to provide a display device that improves viewing angle by setting multiple optical patterns on the encapsulation unit of the display panel.

[0008] Another objective of this disclosure is to provide a display device that uses a touch sensing unit as an optical pattern to reduce the optical pattern forming process.

[0009] Another objective of this disclosure is to provide a display device that simultaneously improves both front and side brightness.

[0010] Another objective of this disclosure is to provide a display device that improves 3D crosstalk.

[0011] Another objective of this disclosure is to provide a display device with reduced thickness by forming multiple optical patterns together with a touch sensing unit.

[0012] The purpose of this disclosure is not limited to the above-mentioned purposes, and other purposes not mentioned above will be clearly understood by those skilled in the art from the following description.

[0013] According to one aspect of this disclosure, a display device is provided. The display device includes: a substrate including sub-pixels; a first cover layer disposed on the substrate and including a base and a protrusion disposed on the base; a light-emitting diode disposed in the sub-pixels and covering a top surface of the base and a side surface of the protrusion; a first optical pattern disposed on the light-emitting diode; and a second optical pattern disposed on and overlapping the first optical pattern, the first optical pattern and the second optical pattern protruding in different directions, wherein the side surface of the protrusion forms an inclined surface relative to the top surface of the base.

[0014] According to another aspect of this disclosure, a display device is provided. The display device includes: a substrate including sub-pixels; a cover layer disposed on the substrate and including a base and a protrusion disposed on the base; a light-emitting diode disposed in the sub-pixels and covering a top surface of the base and a side surface of the protrusion; a concave lens disposed above the light-emitting diode; and a convex pattern on the concave lens overlapping the concave lens.

[0015] Further details of exemplary embodiments are included in the detailed description and accompanying drawings.

[0016] According to this disclosure, multiple optical patterns are arranged on the display panel to improve the front and side brightness, thereby enabling the display device to be driven with low power.

[0017] According to this disclosure, the left-eye image is suppressed from entering the right-eye image, thereby suppressing crosstalk.

[0018] According to this disclosure, the touch sensing unit and the optical pattern are formed together, thereby optimizing the process and reducing the manufacturing process and cost of the display device.

[0019] According to this disclosure, multiple optical patterns are disposed in the touch sensing unit, thereby reducing the thickness of the display device.

[0020] The effects of this disclosure are not limited to those described above, and those skilled in the art will clearly understand from the following description other effects not mentioned above. Attached Figure Description

[0021] The above and other aspects, features and advantages of this disclosure will become clearer from the following detailed description taken in conjunction with the accompanying drawings, wherein:

[0022] Figure 1This is a functional block diagram of a display device according to an exemplary embodiment of the present disclosure;

[0023] Figure 2 This is a plan view of the pixels of a display device according to an exemplary embodiment of the present disclosure;

[0024] Figure 3 This is a circuit diagram of a sub-pixel of a display device according to an exemplary embodiment of the present disclosure;

[0025] Figure 4 This is a plan view of the sub-pixels of a display device according to an exemplary embodiment of the present disclosure;

[0026] Figure 5 It is along Figure 2 A cross-sectional view taken by line A-A';

[0027] Figure 6 This is a cross-sectional view of a sub-pixel of a display device according to another exemplary embodiment of the present disclosure. Detailed Implementation

[0028] Most of the terms used herein are general terms widely used in the art to which this disclosure pertains. However, some terms used herein may be constructed to reflect the intent, precedent, or new technology of someone skilled in the art. Furthermore, some terms used herein may be arbitrarily chosen by the applicant. In such cases, these terms are defined in detail below. Therefore, the specific terms used herein should be understood based on their unique meaning and the entire context of this disclosure.

[0029] In this disclosure, unless otherwise stated, “including” or “comprising” should be interpreted as potentially including other components, but not excluding them.

[0030] The expression "at least one of a, b, and c" described throughout the application may include "a alone," "b alone," "c alone," "a and b," "a and c," "b and c," or "all of a, b, and c." The advantages and features of this disclosure, as well as methods for implementing it, will become clearer from the embodiments described below with reference to the accompanying drawings.

[0031] The shapes, areas, ratios, angles, quantities, etc., shown in the accompanying drawings used to describe exemplary embodiments of this disclosure are merely examples, and this disclosure is not limited thereto. Furthermore, in the following description, detailed explanations of known related technologies may be omitted to avoid unnecessarily obscuring the subject matter of this disclosure.

[0032] Terms such as “comprising,” “having,” and “including” as used herein are generally intended to allow for the addition of additional components, unless these terms are used in conjunction with the term “only.” Any reference to the singular may include the plural unless otherwise expressly stated. Even without explicit statement, components are interpreted as including the general range of tolerances.

[0033] For example, when using terms such as “on,” “above,” “below,” and “next” to describe the positional relationship between two parts, one or more parts may be located between the two parts. When an element or layer is said to be “on” another element or layer, it may be directly on the other element or layer, or there may be an intermediate element or layer.

[0034] Although the terms "first," "second," etc., are used to describe various components, these components are not limited to these terms. These terms are only used to distinguish one component from other components. Therefore, within the technical concept of this disclosure, the first component mentioned below can be a second component.

[0035] Since the area, dimensions, and thickness of each component shown in the accompanying drawings are illustrated for ease of explanation, this disclosure is not necessarily limited to the dimensions and thickness of each component shown.

[0036] Features of the various embodiments of this disclosure may be combined or integrated with each other in part or in whole, and may be interconnected and operated in various technical ways, and the embodiments may be performed independently or in association with each other.

[0037] Furthermore, the terminology described below is defined with reference to the functionality of implementing this disclosure and may vary depending on the intent or habit of the user or operator. Therefore, it should be defined based on the entire content of this application.

[0038] The transistors constituting the pixel circuit of this disclosure may include at least one of oxide TFT (oxide thin film transistor; oxide TFT), amorphous silicon TFT (a-Si TFT), and low temperature polycrystalline silicon TFT (LTPS).

[0039] Expressions such as "first," "second," and "third" are terms used to distinguish the configurations of each implementation, but the implementation is not limited to these terms. Therefore, it should be noted that the same term may refer to different configurations depending on the implementation.

[0040] In the following description, embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0041] Figure 1 This is a functional block diagram of a display device according to an exemplary embodiment of the present disclosure.

[0042] The display device 100 according to an exemplary embodiment of the present disclosure can be an electroluminescent display device. The electroluminescent display device can be an organic light-emitting diode (OLED) display device, a quantum dot light-emitting diode display device, or an inorganic light-emitting diode display device.

[0043] Reference Figure 1 The display device 100 may include a display panel PN, a data driving circuit 130, a gate driving circuit 120, and a timing controller 140.

[0044] The display panel PN can generate images to be provided to the user. For example, the display panel PN can generate and display images to be provided to the user through pixels PX, which are equipped with multiple pixel circuits.

[0045] The data driving circuit 130, the gate driving circuit 120, and the timing controller 140 can provide signals for the operation of the pixel PX via signal lines. These signal lines may include, for example, a data line DL and a gate line GL.

[0046] The data line DL is set in the column direction and can include multiple wirings connected to the pixel PX set in the column direction, and the gate line GL is set in the row direction and can include multiple wirings connected to the pixel PX set in the row direction.

[0047] In some cases, the display device 100 may further include a power supply unit. In this case, signals for the operation of the pixels PX can be provided via a power line connecting the power supply unit and the display panel PN. According to an exemplary embodiment, the power supply unit can supply power to the data driving circuit 130 and the gate driving circuit 120. The data driving circuit 130 and the gate driving circuit 120 can be driven based on the power supplied from the power supply unit.

[0048] For example, the data driving circuit 130 can apply a data signal to each pixel PX via the data line DL. The gate driving circuit 120 can apply a gate signal to each pixel PX via the gate line GL. The power supply unit can provide a power supply voltage to each pixel PX via the power supply voltage supply line.

[0049] The timing controller 140 can control the data driving circuit 130 and the gate driving circuit 120. For example, the timing controller 140 rearranges the externally input digital video data RGB according to the resolution of the display panel PN, so as to provide the digital video data RGB to the data driving circuit 130.

[0050] The data drive circuit 130 converts digital video data input from the timing controller 140 into analog data voltage based on the data control signal, so as to provide the converted analog data voltage to multiple data lines DL.

[0051] The gate driving circuit 120 can generate scan signals and light emission signals (or light emission control signals) based on gate control signals. The gate driving circuit 120 may include a scan driver and a light emission signal driver. The scan driver generates scan signals in a row-sequential manner to drive at least one scan line connected to each pixel row, thereby providing a scan signal to the scan line. The light emission signal driver generates light emission signals in a row-sequential manner to drive at least one light emission signal line connected to each pixel row, thereby providing a light emission signal to the light emission signal line.

[0052] According to an exemplary embodiment, the gate driving circuit 120 may be disposed in the display panel PN as an in-panel gate driver (GIP). For example, the gate driving circuit 120 may be divided into multiple circuits and disposed on at least two sides of the display panel PN.

[0053] The display panel PN may include an active area and an inactive area surrounding the active area.

[0054] The effective area of ​​the display panel PN can include multiple pixels PX disposed in the row and column directions. Pixels PX can be disposed in the intersection area of ​​multiple data lines DL and multiple gate lines GL.

[0055] A pixel PX can include multiple subpixels that emit different colors of light. For example, a pixel PX uses multiple subpixels to achieve blue, red, and green. However, it is not limited to this; in some cases, a pixel PX may also include subpixels for further achieving a specific color (e.g., white).

[0056] The inactive region can be set along the outer periphery of the active region. Various components used to drive the multiple sub-pixel circuits disposed in pixel PX can be disposed in the inactive region. For example, at least a portion of the gate drive circuit 120 can be disposed in the inactive region. The inactive region can be referred to as the border region.

[0057] In the following text, reference will be made to Figure 2 Describe multiple pixels (PX) in detail.

[0058] Figure 2 This is a plan view of the pixels of a display device according to an exemplary embodiment of the present disclosure.

[0059] Reference Figure 2 A pixel PX may include a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3. For example, the first sub-pixel SP1 may be a red sub-pixel, the second sub-pixel SP2 may be a green sub-pixel, and the third sub-pixel SP3 may be a blue sub-pixel, but it is not limited to these.

[0060] The first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can have the same shape. For example, they can have the same area. However, they are not limited to this; they can have different shapes. For example, considering the lifespan and luminous efficiency of the light-emitting diode, they can have different areas.

[0061] In addition, although in Figure 2 The diagram shows that the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 have circular planar shapes, but the planar shapes of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 are not limited to this.

[0062] A light-shielding pattern 190 is provided in each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3.

[0063] The light-shielding pattern 190 can be configured not to overlap with the optical pattern 150. For example, the optical pattern 150 can be located in the central portion of each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3, and the light-shielding pattern 190 can be located at the edge of each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3.

[0064] A touch sensing unit 180 is provided in each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3.

[0065] The touch sensing unit 180 includes insulating layers such as an inorganic insulating layer, an organic layer 183, and an organic insulating layer; and metal layers such as touch electrodes 182 and bridging electrodes 184. For example, touch electrodes 182 and bridging electrodes 184 may be configured to be spaced apart from each other with the organic layer 183 therebetween.

[0066] The touch electrode 182 and the bridging electrode 184 can be configured not to overlap with the optical pattern 150. For example, the optical pattern 150 can be located in the central portion of each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3, and the touch electrode 182 and the bridging electrode 184 can be located at the edge of each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3.

[0067] Multiple optical patterns 150 are provided in each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3. The multiple optical patterns 150 can be configured not to overlap with the touch electrode 182 and the bridging electrode 184 of the touch sensing unit 180 and the light-shielding pattern 190.

[0068] Multiple optical patterns 150 are disposed on multiple light-emitting diodes in each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 to transmit light emitted from each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3. In this case, the multiple optical patterns 150 can limit or change the direction of travel of light emitted from each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3.

[0069] The plurality of optical patterns 150 may have shapes that restrict or alter the direction of travel of light emitted from each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3. For example, the plurality of optical patterns 150 may have shapes that protrude in one direction.

[0070] The plurality of optical patterns 150 may have a shape corresponding to the shape of each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3. For example, each of the plurality of optical patterns 150 may have a circular planar shape when each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 has a circular planar shape, but is not limited thereto.

[0071] The plurality of optical patterns 150 may include a first optical pattern 151 and a second optical pattern 152.

[0072] The first optical pattern 151 and the second optical pattern 152 can have different areas. For example, the area of ​​the first optical pattern 151 overlapping with the substrate can be larger than the area of ​​the second optical pattern 152 overlapping with the substrate. (Refer to...) Figure 2 The width W1 of the first optical pattern 151 can be greater than the width W2 of the second optical pattern 152.

[0073] The first optical pattern 151 and the second optical pattern 152 can overlap each other. Therefore, when the area of ​​the first optical pattern 151 is larger than the area of ​​the second optical pattern 152, a portion of the first optical pattern 151 can be exposed from the second optical pattern 152.

[0074] The center of the first optical pattern 151 and the center of the second optical pattern 152 can correspond to each other. Therefore, the central portion of the first optical pattern 151 can overlap with the second optical pattern 152, and the edge of the first optical pattern 151 can be exposed from the second optical pattern 152.

[0075] The first optical pattern 151 and the second optical pattern 152 can be configured to correspond to the central portion of each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3. Therefore, the central portion of each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can overlap with both the first optical pattern 151 and the second optical pattern 152. The edges of each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can overlap with the first optical pattern 151, but may not overlap with the second optical pattern 152.

[0076] Therefore, among the light emitted from the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3, light traveling toward the central portion of the first optical pattern 151 can simultaneously pass through the first optical pattern 151 and the second optical pattern 152 to reach the outside of the display device 100. Light traveling toward the edge of the first optical pattern 151 can only pass through the first optical pattern 151 to reach the outside of the display device 100.

[0077] One surface of the first optical pattern 151 may be formed to have a planar shape, and the other surface of the first optical pattern 151 opposite to one surface of the first optical pattern 151 may be formed to have a non-planar shape. One surface of the second optical pattern 152 may be formed to have a planar shape, and the other surface of the second optical pattern 152 opposite to one surface of the second optical pattern 152 may be formed to have a non-planar shape. For example, the other surface of each of the first optical pattern 151 and the second optical pattern 152 may have a convex shape, such that the first optical pattern 151 and the second optical pattern 152 may have a hemispherical shape, but are not limited thereto.

[0078] Furthermore, the first optical pattern 151 and the second optical pattern 152 may protrude in different directions. For example, the first optical pattern 151 may protrude toward the bottom surface of the display device 100, and the second optical pattern 152 may protrude toward the top surface of the display device 100.

[0079] In the following text, reference will be made to Figure 3 and 4 Describes the sub-pixels of a display device 100 according to an exemplary embodiment of the present disclosure.

[0080] Figure 3 This is a circuit diagram of a sub-pixel of a display device according to an exemplary embodiment of the present disclosure. Figure 4 This is a plan view of the sub-pixels of a display device according to an exemplary embodiment of the present disclosure. Figure 4 For ease of description, the light-emitting diode 160 and multiple optical patterns 150 are not shown.

[0081] Reference Figure 3 and Figure 4 A subpixel may include six transistors, a storage capacitor Cst, an auxiliary capacitor Cgv, and a light-emitting diode 160.

[0082] For example, a sub-pixel circuit may include a driving transistor DT, a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a storage capacitor Cst, an auxiliary capacitor Cgv, and a light-emitting diode 160. A sub-pixel circuit including six transistors, one storage capacitor, and one auxiliary capacitor can be called a 6T2C circuit, but is not limited to this. Although in Figure 3 The description indicates that the driving transistor DT, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are implemented using p-type transistors, but this disclosure is not limited thereto. In the case of p-type transistors, the low-level voltage of each driving signal can indicate the voltage at which the transistor is turned on, and the high-level voltage of each driving signal can indicate the voltage at which the transistor is turned off.

[0083] Here, the first electrode or second electrode of the transistor described below can refer to the source electrode or the drain electrode. However, the terms first electrode and second electrode are used to distinguish electrodes, but are not limited to what each electrode corresponds to. Furthermore, within each electrode, the first electrode may not refer to the same electrode.

[0084] The subpixel circuit can be provided with a high-potential voltage VDD, a low-potential voltage VSS, a reference voltage Vref, and a data voltage Vdata. The high-potential voltage VDD, the low-potential voltage VSS, and the reference voltage Vref can be DC voltages, and the data voltage Vdata can be AC ​​voltages, but is not limited to these.

[0085] The sub-pixel circuit can be connected to a high-potential voltage line VDDL that provides a high-potential voltage VDD, a low-potential voltage line that provides a low-potential voltage VDD, a reference voltage line VL that provides a reference voltage Vref, and a data line DL that provides a data voltage Vdata. The high-potential voltage VDD can be referred to as the first voltage, and the low-potential voltage VSS can be referred to as the second voltage, which is lower than the first voltage, but this disclosure is not limited thereto.

[0086] The high-potential voltage VDD can have a higher voltage value than the low-potential voltage VSS and the reference voltage Vref. The low-potential voltage VSS can be equal to or lower than the reference voltage Vref. The data voltage Vdata can have a voltage value within a specific range. For example, the data voltage Vdata can have a value between 0 and 10V, but this disclosure is not limited thereto.

[0087] The driving transistor DT is a transistor used to drive the light-emitting diode 160, and the driving current applied to the light-emitting diode 160 can be controlled according to the source-gate voltage. The first electrode of the driving transistor DT can be connected to the high-potential voltage line VDDL. The second electrode of the driving transistor DT can be connected to the third node N3. The gate electrode of the driving transistor DT can be connected to the second node N2. The driving transistor DT is turned on or off according to the voltage of the second node N2, and when turned on, it can provide the high-potential voltage VDD provided by the high-potential voltage line VDDL to the third node N3.

[0088] The first transistor T1 can supply the data voltage Vdata from the data line DL, which provides the data voltage Vdata, to the first node N1. The first electrode of the first transistor T1 can be connected to the data line DL. The second electrode of the first transistor T1 can be connected to the first node N1. For example, the second electrode of the first transistor T1 can be connected to the first electrode of the storage capacitor Cst and can also be connected to the first electrode of the fifth transistor T5.

[0089] The gate electrode of the first transistor T1 can be connected to the first scan line SL1, which provides the first scan signal SC1. The first transistor T1 can be turned on or off according to the first scan signal SC1. When the first transistor T1 is turned on, the first node N1 and the data line DL can be connected. In this case, the data voltage Vdata can be provided to the first node N1 through the data line DL.

[0090] The second transistor T2 can form a diode connection between the gate and drain electrodes of the driving transistor DT. The first electrode of the second transistor T2 can be connected to the second node N2. The first electrode of the second transistor T2 can be connected to the gate electrode of the driving transistor DT and the storage capacitor Cst. The second electrode of the second transistor T2 can be connected to the third node N3. The second electrode of the second transistor T2 can be connected to the first electrode of the third transistor T3 and the second electrode of the driving transistor DT.

[0091] The gate electrode of the second transistor T2 can be connected to the second scan line SL2, which provides the second scan signal SC2. The second transistor T2 can be turned on or off according to the second scan signal SC2. The second transistor T2 is turned on to connect between the second node N2 and the third node N3.

[0092] like Figure 4As shown, the second transistor T2 may include multiple sub-transistors. In this case, the second transistor T2 may be referred to as a multiple transistor, a dual transistor, or a dual-gate transistor. Optionally, the second transistor T2 may include multiple gate electrodes. In this case, the second transistor T2 may be referred to as a multi-gate transistor, a dual-gate transistor, or a dual-gate transistor.

[0093] When the second transistor T2 includes multiple sub-transistors or multiple gate electrodes, the leakage current from the second transistor T2, such as the leakage current between the second node N2 and the reference voltage line VL, can be effectively reduced.

[0094] The third transistor T3 can form a current path between the driving transistor DT and the light-emitting diode 160. The third transistor T3 can be connected between the third node N3 and the fourth node N4. The first electrode of the third transistor T3 can be connected to the third node N3. For example, the first electrode of the third transistor T3 can be connected to the second electrode of the second transistor T2 and the second electrode of the driving transistor DT. The second electrode of the third transistor T3 can be connected to the fourth node N4. For example, the second electrode of the third transistor T3 can be connected to the second electrode of the fourth transistor T4 and the light-emitting diode 160.

[0095] The gate electrode of the third transistor T3 can be connected to the light-emitting signal line EML that provides the light-emitting signal EM. The third transistor T3 can be turned on or off according to the light-emitting signal EM provided from the light-emitting signal line EML. When the third transistor T3 is turned on, the third node N3 and the fourth node N4 are connected to form a current path between the driving transistor DT and the light-emitting diode 160.

[0096] The fourth transistor T4 can apply a reference voltage Vref to the first electrode of the light-emitting diode 160. The fourth transistor T4 can be connected to the reference voltage line VL providing the reference voltage Vref, the fifth transistor T5, and the fourth node N4. The first electrode of the fourth transistor T4 can be connected to the fifth transistor T5 and the reference voltage line VL. For example, the first electrode of the fourth transistor T4 can be connected to the second electrode of the fifth transistor T5 and the reference voltage line VL. The second electrode of the fourth transistor T4 can be connected to the fourth node N4. The second electrode of the fourth transistor T4 can be connected to the third transistor T3 and the light-emitting diode 160. For example, the second electrode of the fourth transistor T4 can be connected to the second electrode of the third transistor T3 and the first electrode of the light-emitting diode 160.

[0097] The gate electrode of the fourth transistor T4 can be connected to the second scan line SL2, which provides the second scan signal SC2. The fourth transistor T4 can be turned on or off according to the second scan signal SC2 provided through the second scan line SL2. When the fourth transistor T4 is turned on, it is connected between the fourth node N4 and the reference voltage line VL to charge the fourth node N4 using the reference voltage Vref.

[0098] As described above, when the fourth node N4 is charged using the reference voltage Vref, the effect of voltage rise at the electrode (e.g., the first electrode) of the LED 160 connected to the fourth node N4 can be reduced even when the second transistor T2 is turned on. Since the voltage rise at the first electrode is reduced, the initial peak phenomenon of excessive voltage rise during the initial period can be reduced. Because the initial peak is reduced, brightness imbalances at the edges or center of the display panel, such as black floating phenomena, can be improved, and brightness uniformity can be enhanced.

[0099] The fifth transistor T5 can apply a reference voltage Vref to the first node N1. The first electrode of the fifth transistor T5 can be connected to the first node N1. For example, the first electrode of the fifth transistor T5 can be connected to the storage capacitor Cst and can also be connected to the second electrode of the first transistor T1. The second electrode of the fifth transistor T5 can be connected to the fourth transistor T4 and the reference voltage line VL that provides the reference voltage Vref. For example, the second electrode of the fifth transistor T5 can be connected to the first electrode of the fourth transistor T4 and the reference voltage line VL.

[0100] The gate electrode of the fifth transistor T5 can be connected to the light-emitting signal line EML that provides the light-emitting signal EM. The fifth transistor T5 can be turned on or off according to the light-emitting signal EM input through the light-emitting signal line EML. When the fifth transistor T5 is turned on, it is connected between the first node N1 and the reference voltage line VL to charge the first node N1 using the reference voltage Vref.

[0101] The light-emitting diode 160 can be disposed between the fourth node N4 and a low-potential voltage line supplied with a low-potential voltage VSS. For example, the first electrode of the light-emitting diode 160 can be connected to the fourth node N4, and the second electrode of the light-emitting diode 160 can be connected to the low-potential voltage line. The low-potential voltage VSS can be lower than the aforementioned high-potential voltage VDD. For example, the voltage supplied through the low-potential voltage line can include ground voltage. The low-potential voltage VSS and the high-potential voltage VDD can be preset.

[0102] The storage capacitor Cst can be connected between the first node N1 and the second node N2. For example, the first capacitor electrode of the storage capacitor Cst can be connected to the second node N2, which is connected to the gate electrode of the driving transistor DT. The second capacitor electrode of the storage capacitor Cst can be connected to the first node N1, which is connected to the first transistor T1 and the fifth transistor T5.

[0103] The storage capacitor Cst can be a component that charges electrical energy (e.g., charge or data voltage) to maintain a constant voltage within a frame. For example, when the input data voltage Vdata through the first transistor T1 is stopped during the driving of the sub-pixel circuit, the storage capacitor Cst provides the stored data voltage to the driving transistor DT to maintain the driving of the driving transistor DT within a frame.

[0104] The sub-pixel circuit may also include an auxiliary capacitor Cgv. The auxiliary capacitor Cgv can be positioned between the first capacitor electrode of the storage capacitor Cst and the high-potential voltage line VDDL that provides the high-potential voltage VDD. The auxiliary capacitor Cgv can suppress the voltage rise of the gate electrode of the driving transistor DT due to kick-back.

[0105] In addition, Figure 3 and Figure 4 The present invention describes a display device 100 according to an exemplary embodiment of the present disclosure, wherein the driving circuit for the sub-pixel SP has a 6T2C structure comprising six transistors, a storage capacitor Cst, and an auxiliary capacitor Cgv. However, it is not limited thereto, and the number and connection relationship of the transistors and capacitors can be varied in various ways depending on the design.

[0106] In the following text, reference will be made to Figure 5 The sub-pixels of a display device 100 according to an exemplary embodiment of the present disclosure are described in detail.

[0107] Figure 5 It is along Figure 2 A cross-sectional view taken from line A-A'. Figure 5 This is a cross-sectional view of the first sub-pixel SP1.

[0108] Reference Figure 5In the display device 100 according to an exemplary embodiment of the present disclosure, a buffer layer 101, a gate insulating layer 102, a first interlayer insulating layer 103, a second interlayer insulating layer 104, a first overcoating layer 105, a dam 106, a light-shielding layer LS, an auxiliary electrode BCNT, a storage capacitor Cst, a first connection electrode CE1, a second connection electrode CE2, a driving transistor DT, a light-emitting diode 160, a packaging unit 170, a touch sensing unit 180, a light-shielding pattern 190, a second overcoating layer 109, and a plurality of optical patterns 150 may be provided on the substrate Sub.

[0109] The substrate Sub may include an insulating material. The substrate Sub may include a transparent material. For example, the substrate Sub may include glass or plastic.

[0110] The buffer layer 101 may be disposed on the substrate Sub. The buffer layer 101 may include a first buffer layer 101a and a second buffer layer 101b.

[0111] A first buffer layer 101a may be disposed on a substrate Sub. The first buffer layer 101a can reduce the penetration of moisture or impurities through the substrate Sub. The first buffer layer 101a may include an inorganic insulating material, such as silicon oxide (SiOx) or silicon nitride (SiNx). The first buffer layer 101a may have a multilayer structure. For example, the first buffer layer 101a may have a laminated structure of a film formed of silicon nitride (SiNx) and a film formed of silicon oxide (SiOx).

[0112] A light-shielding layer LS can be disposed on the first buffer layer 101a. The light-shielding layer LS is disposed to at least overlap with the semiconductor layer 111 of the driving transistor DT to block light incident on the semiconductor layer 111. Furthermore, although the light-shielding layer LS is shown as a single layer in the figure, it can be formed from multiple layers. The light-shielding layer LS can be formed from various conductive materials such as magnesium (Mg), aluminum (Al), nickel (Ni), chromium (Cr), molybdenum (Mo), tungsten (W), gold (Au), or alloys thereof.

[0113] The second buffer layer 101b may be disposed on the light-shielding layer LS. Furthermore, the second buffer layer 101b can protect the driving transistor DT from impurities such as alkaline ions leaking from the substrate Sub. Additionally, the second buffer layer 101b can improve the adhesion strength between the layer disposed above the second buffer layer 101b and the substrate Sub. Furthermore, the second buffer layer 101b may include an inorganic insulating material, such as silicon oxide (SiOx) or silicon nitride (SiNx). The second buffer layer 101b may have a multilayer structure. For example, the second buffer layer 101b may have a laminated structure of a film formed of silicon nitride (SiNx) and a film formed of silicon oxide (SiOx).

[0114] The driving transistor DT can be set on the buffer layer 101.

[0115] Reference Figure 5 The driving transistor DT may include a semiconductor layer 111, a gate electrode 113, a source electrode 115, and a drain electrode 117.

[0116] A patterned semiconductor layer 111 is disposed above the buffer layer 101.

[0117] Semiconductor layer 111 can be formed of oxide semiconductor material. Alternatively, semiconductor layer 111 can be formed of polycrystalline silicon, in which case impurities can be doped at both edges of semiconductor layer 111.

[0118] A gate insulating layer 102 formed of an insulating material may be disposed above the semiconductor layer 111. The gate insulating layer 102 may include an insulating material. For example, the gate insulating layer 102 may include an inorganic insulating material, such as silicon oxide (SiOx) or silicon nitride (SiNx). The gate insulating layer 102 may include a material having a high dielectric constant. For example, the gate insulating layer 102 may include a high-k material, such as hafnium oxide (HfO). The gate insulating layer 102 may have a multilayer structure.

[0119] The gate insulating layer 102 may extend between the semiconductor layer 111 and the gate electrode 113 of the driving transistor DT.

[0120] In addition, Figure 5 The diagram shows a gate insulating layer 102 disposed on the entire surface of the substrate Sub, but the gate insulating layer 102 can be patterned to have the same shape as the gate electrode 113.

[0121] A gate electrode 113, formed of a conductive material such as a metal, is disposed above the gate insulating layer 102, corresponding to the semiconductor layer 111. Furthermore, a gate line (not shown) may be disposed above the gate insulating layer 102. The gate line may extend along a row direction.

[0122] The gate electrode 113 can be formed of various conductive materials such as magnesium (Mg), aluminum (Al), nickel (Ni), chromium (Cr), molybdenum (Mo), tungsten (W), gold (Au), or alloys thereof.

[0123] An auxiliary electrode BCNT is disposed above the gate insulating layer 102. The auxiliary electrode BCNT is an electrode used to apply a voltage to the light-shielding layer LS below the buffer layer 101. For example, the auxiliary electrode BCNT can be formed of the same material as the gate electrode 113 of the driving transistor DT. The auxiliary electrode BCNT can be formed of various conductive materials such as magnesium (Mg), aluminum (Al), nickel (Ni), chromium (Cr), molybdenum (Mo), tungsten (W), gold (Au), or alloys thereof.

[0124] For example, the light-shielding layer LS is electrically connected to another structure disposed on the substrate Sub via an auxiliary electrode BCNT so that a voltage can be applied. For example, see together. Figure 4 The auxiliary electrode BCNT can be connected to the driving transistor DT and the high-potential voltage line VDDL. Therefore, the light-shielding layer LS, to which a voltage is applied through the auxiliary electrode BCNT, does not operate as a floating gate, and the fluctuation of the threshold voltage of the driving transistor DT caused by the floating light-shielding layer LS can be minimized.

[0125] The storage capacitor Cst, which includes a first capacitor electrode Cst1 and a second capacitor electrode Cst2, is disposed above the gate insulating layer 102.

[0126] The first capacitor electrode Cst1 of the storage capacitor Cst can be disposed on the gate insulating layer 102. For example, the first capacitor electrode Cst1 can be formed of the same material as the gate electrode 113 of the driving transistor DT. The first capacitor electrode Cst1 can be formed of various conductive materials such as, for example, magnesium (Mg), aluminum (Al), nickel (Ni), chromium (Cr), molybdenum (Mo), tungsten (W), gold (Au), or alloys thereof.

[0127] The first interlayer insulating layer 103 may be disposed on the gate electrode 113. The first interlayer insulating layer 103 may include an insulating material. For example, the first interlayer insulating layer 103 may include an inorganic insulating material, such as silicon oxide (SiOx) or silicon nitride (SiNx).

[0128] The first interlayer insulating layer 103 may be located on the gate insulating layer 102. The first interlayer insulating layer 103 may extend between the gate electrode 113 and the source electrode 115 of the driving transistor DT, and between the gate electrode 113 and the drain electrode 117. For example, the source electrode 115 and the drain electrode 117 of the driving transistor DT may be insulated from the gate electrode 113 by the first interlayer insulating layer 103. The first interlayer insulating layer 103 may cover the gate electrode 113 of the driving transistor DT.

[0129] The second capacitor electrode Cst2 of the storage capacitor Cst can be disposed on the first interlayer insulating layer 103. The second capacitor electrode Cst2 can be disposed on the first interlayer insulating layer 103 to overlap with the first capacitor electrode Cst1.

[0130] The second capacitor electrode Cst2 can be formed from various conductive materials such as magnesium (Mg), aluminum (Al), nickel (Ni), chromium (Cr), molybdenum (Mo), tungsten (W), gold (Au), or alloys thereof.

[0131] The second interlayer insulating layer 104 may be disposed on the first interlayer insulating layer 103. Contact holes for exposing the semiconductor layer 111 of the driving transistor DT, contact holes for exposing the first capacitor electrode Cst1, contact holes for exposing the second capacitor electrode Cst2, and contact holes for exposing the auxiliary electrode BCNT may be formed in the second interlayer insulating layer 104. The second interlayer insulating layer 104 may be composed of a single layer or multiple layers of silicon nitride (SiNx) or silicon oxide (SiOx), but is not limited thereto.

[0132] The source electrode 115 and the drain electrode 117 may be located on the second interlayer insulating layer 104. The source electrode 115 and the drain electrode 117 may be formed of various conductive materials such as magnesium (Mg), aluminum (Al), nickel (Ni), chromium (Cr), molybdenum (Mo), tungsten (W), gold (Au), or alloys thereof.

[0133] The source electrode 115 and the drain electrode 117 are in contact with the semiconductor layer 111 through contact holes in the second interlayer insulating layer 104, the first interlayer insulating layer 103 and the gate insulating layer 102.

[0134] The drain electrode 117 of the driving transistor DT can be electrically connected to the anode electrode 161 of the light-emitting diode 160, which will be described below.

[0135] The first connecting electrode CE1 may be located on the second interlayer insulating layer 104. The first connecting electrode CE1 may be electrically connected to the first capacitor electrode Cst1 through contact holes in the second interlayer insulating layer 104 and the first interlayer insulating layer 103. For example, the first connecting electrode CE1 may be electrically connected to another structure disposed on the substrate Sub and may apply a voltage to the first capacitor electrode Cst1. The first connecting electrode CE1 may be formed of various conductive materials such as magnesium (Mg), aluminum (Al), nickel (Ni), chromium (Cr), molybdenum (Mo), tungsten (W), gold (Au), or alloys thereof.

[0136] The second connection electrode CE2 can be located on the second interlayer insulating layer 104. The second connection electrode CE2 can be electrically connected to the second capacitor electrode Cst2 through the contact holes of the second interlayer insulating layer 104. Furthermore, the second connection electrode CE2 can be electrically connected to another structure disposed on the substrate Sub, and a voltage can be applied to the second capacitor electrode Cst2. For example, the second connection electrode CE2 can also be electrically connected to the source electrode 115 or the drain electrode 117, but is not limited thereto. The second connection electrode CE2 can be formed of various conductive materials such as magnesium (Mg), aluminum (Al), nickel (Ni), chromium (Cr), molybdenum (Mo), tungsten (W), gold (Au), or alloys thereof.

[0137] The first cover layer 105 may be disposed above the driving transistor DT, the first connection electrode CE1, and the second connection electrode CE2. The first cover layer 105 may include an insulating material. The first cover layer 105 may include an organic insulating material. For example, the first cover layer 105 may be formed of polyimide, acrylic, or benzocyclobutene (BCB) resin, but is not limited thereto.

[0138] The first covering layer 105 includes a base 105a and a protrusion 105b.

[0139] The base 105a and the protrusion 105b can be integrally formed. For example, the base 105a and the protrusion 105b can be formed simultaneously from the same material using the same process (e.g., by a mask process), but are not limited thereto.

[0140] A base 105a is disposed on the driving transistor DT. The top surface of the base 105a has a surface parallel to the substrate Sub. Therefore, the base 105a can protect the driving transistor DT and planarize the steps of the layer disposed on the substrate Sub.

[0141] A protrusion 105b is provided on the base 105a. The protrusion 105b is integrally formed with the base 105a and has a shape that protrudes from the base 105a. Therefore, the top surface of the protrusion 105b can be set to be smaller than the bottom surface, but is not limited thereto.

[0142] The protrusion 105b has a top surface and a side surface. The top surface of the protrusion 105b is the surface located at the uppermost part of the protrusion 105b, and may be a surface parallel to the base 105a or the substrate Sub. The side surface of the protrusion 105b may be a surface that connects the top surface of the protrusion 105b and the base 105a. The side surface of the protrusion 105b may slope from the top surface of the protrusion 105b toward the base 105a.

[0143] In this disclosure, a first cover layer 105 has been described as including a base 105a having a flat top surface and a protrusion 105b projecting from the base 105a. However, as long as the first cover layer 105 is implemented by the base 105a and the protrusion 105b, the detailed configuration of the first cover layer 105 is not limited to the base 105a and the protrusion 105b, but can be defined in various ways.

[0144] The light-emitting diode 160 may be located on the first cover layer 105. The light-emitting diode 160 may cover the top surface of the base 105a and the side surface of the protrusion 105b of the first cover layer 105.

[0145] Reference Figure 5 The light-emitting diode 160 may include an anode electrode 161, a light-emitting structure 162, and a cathode electrode 163, which are sequentially stacked on a substrate Sub.

[0146] An anode electrode 161 is disposed on the first cover layer 105 to cover the side and top surfaces of the base 105a and the protrusion 105b. For example, the anode electrode 161 is disposed on the top surface of the base 105a where the protrusion 105b is not disposed, a portion of the top surface of the protrusion 105b, and the side surface, and is disposed according to the shape of the base 105a and the protrusion 105b. Therefore, the anode electrode 161 may have a flat top surface on the top surface of the base 105a of the first cover layer 105 and an inclined top surface on the side surface of the protrusion 105b.

[0147] The anode electrode 161 may include a conductive material. The anode electrode 161 may include a material with high reflectivity. For example, the anode electrode 161 may include metals such as aluminum (Al) and silver (Ag). The anode electrode 161 may have a multilayer structure. For example, the anode electrode 161 may have a structure in which a reflective electrode formed of a metal is located between transparent electrodes formed of transparent conductive materials such as indium tin oxide (ITO) and indium zinc oxide (IZO).

[0148] The anode electrode 161 of the light-emitting diode 160 can be electrically connected to the drain electrode 117 (or source electrode 115) of the driving transistor DT through the contact hole of the first cover layer 105.

[0149] The dam 106 may be located between the anode electrodes 161 of adjacent sub-pixels and disposed above the protrusion 105b. The dam 106 may include an insulating material. For example, the dam 106 may include an organic insulating material. For example, the dam 106 may be formed of polyimide, acrylic, or benzocyclobutene (BCB) resin, and the dam 106 may include a material different from the first cover layer 105.

[0150] The embankment 106 may cover a portion of the anode electrode 161 of the light-emitting diode 160. For example, the embankment 106 may cover the edge of the anode electrode 161.

[0151] A light-emitting structure 162 is disposed on the anode electrode 161. The light-emitting structure 162 may include a light-emitting layer that emits light of a specific color. Therefore, the light-emitting structure 162 disposed in the first sub-pixel SP1 may be different from the light-emitting structures disposed in the second sub-pixel SP2 and the third sub-pixel SP3. Furthermore, the light-emitting structure 162 may include at least one of a light-emitting layer, a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL). However, it is not limited to this; the light-emitting structure 162 may also include a common layer disposed in the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3.

[0152] The light-emitting structure 162 is disposed on the first cover layer 105 to overlap with the side and top surfaces of the base 105a and the protrusion 105b. For example, the light-emitting structure 162 is disposed to overlap with the top surface of the base 105a where the protrusion 105b is not disposed and the side surface of the protrusion 105b. The light-emitting structure 162 is disposed according to the shape of the anode electrode 161 disposed on the base 105a and the protrusion 105b. Therefore, the light-emitting structure 162 may have a flat top surface on the top surface of the base 105a of the first cover layer 105 and an inclined top surface on the side surface of the protrusion 105b. In addition, the light-emitting structure 162 may also be disposed to overlap with a portion of the embankment 106. For example, the light-emitting structure 162 is disposed to overlap with the side surface of the lower part of the embankment 106 and may have an inclined top surface along the side surface of the lower part of the embankment 106.

[0153] A cathode electrode 163 is disposed on the light-emitting structure 162. The cathode electrode 163 may include a conductive material. The transmittance of the cathode electrode 163 may be higher than that of the anode electrode 161. For example, the cathode electrode 163 may be formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). Therefore, in the display device 100 according to an exemplary embodiment of the present disclosure, light generated by the light-emitting structure 162 can be emitted through the cathode electrode 163.

[0154] A cathode electrode 163 is disposed on the first cover layer 105 and the embankment 106, overlapping the side and top surfaces of the base 105a and the protrusion 105b. For example, the cathode electrode 163 is disposed to overlap the top surface of the base 105a where the protrusion 105b is not disposed and the side surface of the protrusion 105b. The cathode electrode 163 is disposed according to the shape of the light-emitting structure 162 disposed on the base 105a and the protrusion 105b. Furthermore, the cathode electrode 163 is disposed to overlap the side surface of the embankment 106, and may have an inclined top surface along the side surface of the embankment 106 and extend to the top surface of the embankment 106 to have a flat top surface.

[0155] The encapsulation unit 170 can be located on the light-emitting diode 160. The encapsulation unit 170 can prevent the light-emitting diode 160 from being damaged by external moisture and impact.

[0156] The packaging unit 170 may have a multi-layer structure. For example, the packaging unit 170 may include a first packaging layer 171, a second packaging layer 172 and a third packaging layer 173 stacked in sequence, but the exemplary embodiments of this disclosure are not limited thereto.

[0157] A first encapsulation layer 171 is disposed on the light-emitting diode 160 to suppress the penetration of moisture or oxygen. The first encapsulation layer 171 may be formed of an inorganic material such as silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiNxOy), or aluminum oxide (AlyOz), but is not limited thereto.

[0158] A second encapsulation layer 172 is disposed on the first encapsulation layer 171 to planarize the surface. Furthermore, the second encapsulation layer 172 can cover foreign matter or particles that may be generated during the manufacturing process. The second encapsulation layer 172 can be formed of organic materials such as silicon oxycarbide (SiOxCz), acrylic, or epoxy resin, but is not limited thereto.

[0159] The third encapsulation layer 173 is disposed on the second encapsulation layer 172 and can inhibit the penetration of moisture or oxygen, just like the first encapsulation layer 171. In this case, the third encapsulation layer 173 and the first encapsulation layer 171 can be formed to seal the second encapsulation layer 172. Therefore, the penetration of moisture or oxygen into the light-emitting diode 160 can be effectively reduced by the third encapsulation layer 173. The third encapsulation layer 173 can be formed of inorganic materials such as silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiNxOy), or aluminum oxide (AlyOz), but is not limited thereto.

[0160] An inorganic buffer layer 107 may be disposed on the packaging unit 170. The inorganic buffer layer 107 can reduce the inflow of impurities such as alkali ions and improve the adhesion strength between the packaging unit 170 and the touch sensing unit 180 disposed above and below the inorganic buffer layer 107. The inorganic buffer layer 107 may include an inorganic insulating material, such as silicon oxide (SiOx) or silicon nitride (SiNx). Furthermore, the inorganic buffer layer 107 has a laminated structure formed by films of silicon nitride (SiNx) and silicon oxide (SiOx), but is not limited thereto.

[0161] The touch sensing unit 180 can be disposed on the inorganic buffer layer 107. The touch sensing unit 180 is disposed in the effective area including the light-emitting diode 160 to sense touch input. The touch sensing unit 180 can use the user's finger or stylus to sense external touch information.

[0162] The touch sensing unit 180 includes an inorganic insulating layer 181, an organic layer 183, a bridging electrode 184, a touch electrode 182, and an organic insulating layer 185.

[0163] The bridging electrode 184 can be disposed on the inorganic buffer layer 107. The bridging electrode 184 can be configured to connect disconnected touch electrodes 182 at the point where touch electrodes 182 extending in the row direction and touch electrodes 182 extending in the column direction intersect each other.

[0164] The side surface of each touch electrode 182 may be tilted relative to the top surface of the organic layer 183. For example, the touch electrode 182 may be formed by patterning a metal layer formed on the top surface of the organic layer 183. Thus, during the process of patterning the metal layer, the side of the touch electrode 182 may be formed to be tilted relative to the top surface of the organic layer 183.

[0165] An inorganic insulating layer 181 may be disposed on the bridging electrode 184. The inorganic insulating layer 181 may cover the top surface and side surface of the bridging electrode 184. The inorganic insulating layer 181 may be formed of an inorganic material. For example, the inorganic insulating layer 181 may be formed of an inorganic material such as silicon nitride (SiNx) and silicon oxynitride (SiON), but is not limited thereto.

[0166] A light-shielding pattern 190 is disposed on an inorganic insulating layer 181. The light-shielding pattern 190 can suppress color mixing that may occur in adjacent second sub-pixels SP2 and adjacent third sub-pixels SP3 and reflect external light.

[0167] The light-shielding pattern 190 can be configured to overlap with the bridging electrode 184. The light-shielding pattern 190 can be a black matrix and can be formed from black resin or chromium oxide.

[0168] An organic layer 183 may be disposed above the inorganic insulating layer 181 and the light-shielding pattern 190. The organic layer 183 ensures the gap between the light-shielding pattern 190 and the structures disposed thereon, for example, ensuring the gap between the light-shielding pattern 190 and the bridging electrode 184 and the first optical pattern 151, and the organic layer 183 may be formed of an organic insulating material. For example, the organic layer 183 may be formed of optical acrylic, benzocyclobutene (BCB), polyimide (PI), or polyamide (PA), but is not limited thereto.

[0169] Additionally, the organic layer 183 may include a top surface recessed in a region that does not overlap with the bridging electrode 184 and the touch electrode 182, in a direction toward the substrate Sub. For example, the top surface of the organic layer 183 may include a portion that protrudes along the bottom surface of the first optical pattern 151 in a direction toward the substrate Sub.

[0170] The first optical pattern 151 is disposed on the organic layer 183.

[0171] The first optical pattern 151 can be configured to overlap with the light-emitting diode 160. For example, the first optical pattern 151 can overlap with the top surface of the base 105a exposed by the protrusion 105b.

[0172] The first optical pattern 151 may have a downwardly convex shape. For example, the first optical pattern 151 may have a bottom surface corresponding to the concave top surface of the organic layer 183. For example, the first optical pattern 151 may have a bottom surface protruding in the direction of the substrate Sub.

[0173] The first optical pattern 151 may have a flat top surface. For example, the cross-sectional shape of the first optical pattern 151 may be semi-circular. Therefore, the first optical pattern 151 may be referred to as a concave lens. However, it is not limited to this, and the cross-sectional shape of the first optical pattern 151 may have various shapes, such as pyramidal or conical.

[0174] The first optical pattern 151 can be formed of a light-transmitting material. For example, the first optical pattern 151 can be formed of a transparent organic insulating material.

[0175] The first optical pattern 151 can improve the side viewing angle of the light-emitting diode 160. For example, in the light emitted from the light-emitting diode 160, light incident on the bottom surface of the first optical pattern 151 is refracted from the interface between the organic layer 183 and the first optical pattern 151 to travel in a lateral direction. For example, refer to... Figure 5 It is confirmed that the second light L2 emitted from the light-emitting diode 160 is refracted at the interface between the organic layer 183 and the first optical pattern 151, thereby increasing the angle formed with the normal of the substrate Sub.

[0176] In addition, such as Figure 5 As shown, the first optical pattern 151 can be disposed between adjacent touch electrodes 182, and the touch electrodes 182 and the first optical pattern 151 can be non-overlapping. Therefore, light emitted from the light-emitting diode 160 can be discharged through the first optical pattern 151.

[0177] Despite Figure 5 The illustration shows a first optical pattern 151 set in a first sub-pixel SP1, but the present disclosure is not limited thereto. For example, multiple first optical patterns 151 may be set in a first sub-pixel SP1.

[0178] Touch electrode 182 can be disposed on organic layer 183. Touch electrode 182 can be disposed in a flat shape along the top surface of organic layer 183. Touch electrode 182 can be disposed in both row and column directions.

[0179] An organic insulating layer 185 can be disposed on the touch electrode 182. The organic insulating layer 185 can cover the top surface and side surface of the touch electrode 182. In addition, the organic insulating layer 185 can planarize the upper part of the touch electrode 182.

[0180] The organic insulating layer 185 can be formed from organic materials. For example, the organic insulating layer 185 can be formed from optical acrylic, benzocyclobutene (BCB), polyimide (PI), or polyamide (PA), but is not limited thereto.

[0181] although Figure 5 Although not shown in the diagram, in the non-active area, wiring can be configured to connect the outermost touch electrode 182 located in the active area to the touch pad located in the non-active area.

[0182] Despite Figure 5 The illustration shows a touch-on-encapsulation (TOE) structure in which a touch sensing unit 180 is disposed above the display panel PN, but the structure of the touch sensing unit 180 according to an exemplary embodiment of the present disclosure is not limited thereto.

[0183] The second optical pattern 152 may be located on the touch sensing unit 180. The second optical pattern 152 may be disposed between the touch electrodes 182.

[0184] The second optical pattern 152 may be configured to overlap with a portion of the first optical pattern 151. For example, the second optical pattern 152 may be configured to overlap with the central portion of the first optical pattern 151.

[0185] The area overlapping the second optical pattern 152 with the substrate Sub can be smaller than the area overlapping the first optical pattern 151 with the substrate Sub. For example, referring to... Figure 5 The width W2 of the second optical pattern 152 can be smaller than the width W1 of the first optical pattern 151.

[0186] The second optical pattern 152 may have a flat bottom surface. Conversely, the top surface of the second optical pattern 152 may convex in the direction of the second cover layer 109. For example, the cross-sectional shape of the second optical pattern 152 may be semi-circular. However, it is not limited to this, and the cross-sectional shape of the second optical pattern 152 may have various shapes, such as pyramidal or conical. Therefore, the second optical pattern 152 may be referred to as a convex lens and / or a convex pattern.

[0187] The second optical pattern 152 can be formed of a light-transmitting material. For example, the second optical pattern 152 can be formed of a transparent organic insulating material.

[0188] The second optical pattern 152 can easily focus the light emitted from the light-emitting diode 160. For example, in the light emitted from the light-emitting diode 160, the light incident on the second optical pattern 152 is refracted at the interface between the second optical pattern 152 and the second capping layer 109 to travel in the forward direction. For example, the first light L1 emitted from the light-emitting diode 160 passes through the second optical pattern 152 to travel in the normal direction.

[0189] Additionally, refer to Figure 5 The first light L1 can be light that passes through the first optical pattern 151. That is, the second optical pattern 152 can refract some of the light that travels in the lateral direction after being refracted from the first optical pattern 151 to the front direction. Therefore, the second optical pattern 152 can suppress the problem that all the light emitted from the first optical pattern 151 is refracted to the lateral direction, resulting in a decrease in front brightness.

[0190] Despite Figure 5 The illustration shows a second optical pattern 152 disposed in a first sub-pixel SP1, but the present disclosure is not limited thereto. For example, multiple second optical patterns 152 may be disposed in a first sub-pixel SP1.

[0191] The second cover layer 109 may be disposed on the second optical pattern 152. The second cover layer 109 may include an insulating material. The second cover layer 109 may include an organic insulating material. For example, the second cover layer 109 may be formed of polyimide, acrylic or benzocyclobutene (BCB) resin, but is not limited thereto.

[0192] The second cover layer 109 can planarize the upper part of the second optical pattern 152. For example, the second cover layer 109 can have a convex bottom surface corresponding to the top surface of the second optical pattern 152 and can have a flat top surface.

[0193] In addition, although in Figure 5 The diagram only shows a cross-sectional view of the first sub-pixel SP1, but the second sub-pixel SP2 and the third sub-pixel SP3 can have the same structure as the first sub-pixel SP1.

[0194] In the display device 100 according to an exemplary embodiment of the present disclosure, the light-emitting structure 162 and cathode electrode 163 of the light-emitting diode 160 are configured to overlap with the side surface of the protrusion 105b of the first cover layer 105. Therefore, the light-emitting diode 160 can be configured to be tilted relative to the top surface of the base 105a and the top surface of the substrate Sub in the region overlapping with the side surface of the protrusion 105b. The light-emitting diode 160 can emit light from the protrusion 105b having the tilted surface. Therefore, compared to an example where the light-emitting diode 160 is only disposed on the base 105a having a flat top surface, the light emitted from the light-emitting diode 160 can easily travel in a lateral direction. Therefore, the display device 100 according to an exemplary embodiment of the present disclosure includes a light-emitting diode 160 with a tilted surface to improve the lateral viewing angle of each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3.

[0195] Furthermore, in the display device 100 according to an exemplary embodiment of the present disclosure, a first optical pattern 151 and a second optical pattern 152 protruding in different directions are provided above the light-emitting diode 160 to simultaneously improve front brightness and side brightness. For example, the first optical pattern 151 may have a concave lens protruding toward the substrate Sub, and the second optical pattern 152 may have a convex lens protruding toward the second cover layer 109. Therefore, light incident on the first optical pattern 151 is refracted to travel in a lateral direction. Thus, the light incident on the first optical pattern 151 can improve the side brightness of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3. In addition, among the light refracted from the first optical pattern 151, the light incident on the second optical pattern 152 can be refracted from the interface between the second optical pattern 152 and the second cover layer 109 toward the front direction. Therefore, the light incident on the second optical pattern 152 in the region corresponding to the central portion of the first optical pattern 151 is concentrated in the front direction, thereby improving the front brightness. Therefore, the second optical pattern 152 can suppress the problem of all light emitted from the first optical pattern 151 being refracted to the side, resulting in reduced front brightness. Thus, in the display device 100, front and side brightness are improved, leading to a reduction in driving voltage and consequently lower power consumption. Furthermore, reduced brightness and heat generation improve the lifespan of the light-emitting diode 160.

[0196] Figure 6 This is a cross-sectional view of a sub-pixel of a display device according to another exemplary embodiment of the present disclosure. Figure 6 The display device 600 and Figures 1 to 5 The only differences between the display device 100 and the original are the organic insulating layer 685 of the touch sensing unit 680, the second optical pattern 652 of the plurality of optical patterns 650, and the second cover layer 609, but the other configurations are basically the same. Therefore, redundant descriptions will be omitted.

[0197] Reference Figure 6 The touch sensing unit 680 includes an inorganic insulating layer 181, an organic layer 183, a bridging electrode 184, a touch electrode 182, and an organic insulating layer 685.

[0198] Touch electrode 182 and multiple second optical patterns 652 of multiple optical patterns 650 are disposed on bridging electrode 184, inorganic insulating layer 181 and organic layer 183.

[0199] Each of the plurality of second optical patterns 652 may have a side surface that is tilted relative to the top surface of the organic layer 183. For example, the plurality of second optical patterns 652 may be formed by patterning a metal layer formed on the top surface of the organic layer 183. Thus, during the process of patterning the metal layer, the sides of the plurality of second optical patterns 652 may be formed to be tilted relative to the top surface of the organic layer 183.

[0200] Multiple second optical patterns 652 can be configured to overlap with the first optical pattern 151. One first optical pattern 151 can be configured to overlap with at least two or more second optical patterns 652. For example, multiple second optical patterns 652 can be configured to correspond to the sides of the first optical pattern 151. Therefore, the central portion of the first optical pattern 151 may not overlap with the multiple second optical patterns 652.

[0201] Reference Figure 6 Two second optical patterns 652 can be provided on the portion of a first optical pattern 151 other than the central portion and both ends. Therefore, the ends of the first optical pattern 151 may not overlap with the multiple second optical patterns 652.

[0202] The plurality of second optical patterns 652 can be formed of an opaque material. For example, the plurality of second optical patterns 652 can be formed of a metallic material such as aluminum (Al) and silver (Ag). The plurality of second optical patterns 652 can be formed on the same layer as the touch electrode 182 using the same material, but are not limited thereto.

[0203] Furthermore, when the plurality of second optical patterns 652 are formed of an opaque material, the plurality of second optical patterns 652 can block light incident on the plurality of second optical patterns 652 from the light emitted from the light-emitting diode 160. For example, when the plurality of second optical patterns 652 are configured to expose the central portion and both ends of the first optical pattern 151, the plurality of second optical patterns 652 can block all light except light traveling in the region corresponding to the central portion of the first optical pattern 151 and light traveling in the regions corresponding to the ends of the first optical pattern 151. For example, see reference. Figure 6 The multiple second optical patterns 652 only allow the first light L1 traveling between multiple adjacent second optical patterns 652 and the second light L2 traveling between the multiple second optical patterns 652 and the touch electrode 182 to travel to the outside of the display device 600.

[0204] An organic insulating layer 685 covering each of the plurality of second optical patterns 652 and the top and side surfaces of the touch electrode 182 may be disposed on the plurality of second optical patterns 652 and the touch electrode 182. The organic insulating layer 685 may planarize the upper part of the plurality of second optical patterns 652 and the touch electrode 182.

[0205] A second cover layer 609 is disposed on the touch sensing unit 680. The second cover layer 609 may be disposed along the flat top surface of the organic insulating layer 685.

[0206] In a display device 600 according to another exemplary embodiment of the present disclosure, the light-emitting structure 162 and the cathode electrode 163 of the light-emitting diode 160 are configured to overlap with the side surface of the protrusion 105b of the first cover layer 105. Therefore, the light-emitting diode 160 can be configured to be tilted relative to the top surface of the base 105a and the top surface of the substrate Sub in the region overlapping with the side surface of the protrusion 105b. This improves the side viewing angle of each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3.

[0207] A display device 600 according to another exemplary embodiment of the present disclosure includes a plurality of optical patterns 650, including a first optical pattern 151 and a second optical pattern 652 protruding in different directions to improve frontal brightness and facilitate control of side viewing angles. For example, in the display device 600 according to another exemplary embodiment of the present disclosure, the first optical pattern 151 having a concave lens shape is disposed above a light-emitting diode 160, thereby improving the side viewing angle of each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3. Furthermore, in the display device 600 according to another exemplary embodiment of the present disclosure, the second optical pattern 652 formed of an opaque material is disposed to overlap a portion of the first optical pattern 151. Therefore, light incident on the plurality of second optical patterns 652 from the light emitted from the light-emitting diode 160 can be blocked. Therefore, when the plurality of second optical patterns 652 are disposed on both sides corresponding to each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3, the viewing angle of a specific area of ​​each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can be blocked. When the display device 600 is a stereoscopic image display device, a plurality of second optical patterns 652 separate the images for the left and right eyes to suppress crosstalk. Therefore, the display device 600 according to another exemplary embodiment of the present disclosure can easily control the viewing angle and improve image quality by using a plurality of optical patterns 650.

[0208] Furthermore, in a display device 600 according to another exemplary embodiment of the present disclosure, the side surfaces of a plurality of second optical patterns 652 are inclined relative to the top surface of the substrate Sub to improve the side viewing angle. For example, the top surface of the plurality of second optical patterns 652 may be smaller than the bottom surface of the plurality of second optical patterns 652. Therefore, light emitted from each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can be emitted without limiting the viewing angle based on the inclined surface of the plurality of second optical patterns 652. For example, if the top surface of the plurality of second optical patterns 652 is equal to or larger than the bottom surface of the plurality of second optical patterns 652, light traveling at a smaller tilt angle relative to the normal of the substrate Sub is permissible and is not limited by the bottom surface of the plurality of second optical patterns 652. However, light traveling at a larger tilt angle relative to the normal of the substrate Sub may be limited by the top surface of the plurality of second optical patterns 652. Therefore, in a display device 600 according to another exemplary embodiment of the present disclosure, the side surfaces of the plurality of second optical patterns 652 include inclined surfaces that are tilted relative to the top surface of the substrate Sub, so as to emit light that travels at a large tilt angle relative to the normal of the substrate Sub. Therefore, the side viewing angle can be improved in the display device 600 according to another exemplary embodiment of the present disclosure.

[0209] Furthermore, in another exemplary embodiment of the display device 600 according to this disclosure, a plurality of second optical patterns 652 are disposed on the same layer as the touch electrode 182 of the touch sensing unit 680. Therefore, the plurality of second optical patterns 652 can be formed using the same process as the touch electrode 182 of the touch sensing unit 680, eliminating the need for additional manufacturing processes for the plurality of second optical patterns 652, thereby reducing manufacturing costs or process flow. Furthermore, in another exemplary embodiment of the display device 600 according to this disclosure, the plurality of second optical patterns 652 are formed together with the touch sensing unit 680, thereby reducing the thickness of the display device 600.

[0210] Exemplary embodiments of this disclosure can also be described as follows:

[0211] According to one aspect of this disclosure, a display device is provided. The display device includes: a substrate including sub-pixels; a first cover layer disposed on the substrate and including a base and a protrusion disposed on the base; a light-emitting diode disposed in the sub-pixels and covering a top surface of the base and a side surface of the protrusion; a first optical pattern disposed on the light-emitting diode; and a second optical pattern disposed on and overlapping the first optical pattern, the first optical pattern and the second optical pattern protruding in different directions, wherein the side surface of the protrusion forms an inclined surface relative to the top surface of the base.

[0212] The first optical pattern can overlap with the top surface of the base exposed by the protrusion.

[0213] The first optical pattern can protrude toward the bottom surface of the display device, and the second optical pattern can protrude toward the top surface of the display device.

[0214] The area where the second optical pattern overlaps with the substrate can be smaller than the area where the first optical pattern overlaps with the substrate.

[0215] The display device may further include a touch sensing unit disposed on the light-emitting diode, wherein the touch sensing unit includes a bridging electrode, an inorganic insulating layer, an organic layer, a touch electrode, and an organic insulating layer sequentially stacked on the light-emitting diode, and the first optical pattern may be disposed on the organic layer, such that the top surface of the organic layer may include a portion protruding along the bottom surface of the first optical pattern toward the substrate.

[0216] The display device may further include: a second cover layer disposed on the second optical pattern, wherein the bottom surface of the first optical pattern may protrude in the direction of the substrate, and the top surface of the second optical pattern may protrude in the direction of the second cover layer.

[0217] The second optical pattern can be formed from a light-transmitting material.

[0218] The center of the second optical pattern and the center of the first optical pattern can correspond to each other.

[0219] The second optical pattern can be disposed on the same layer as the touch electrode.

[0220] The second optical pattern can be formed from an opaque material.

[0221] The second optical pattern can be formed on the same layer as the touch electrode using the same material.

[0222] The side surface of the second optical pattern may be tilted relative to the top surface of the substrate.

[0223] The second optical pattern can be multiple and is disposed on the portion of the first optical pattern excluding the central portion and both ends.

[0224] The first optical pattern and the second optical pattern may be disposed in the central portion of the sub-pixel.

[0225] The first optical pattern can be formed from a light-transmitting material.

[0226] The base and the protrusion can be integrally formed.

[0227] The first optical pattern may have a flat top surface, and the second optical pattern may have a flat bottom surface.

[0228] The display device may further include a dam portion disposed above the protrusion of the first cover layer, wherein the light-emitting diode may be configured to overlap with a portion of the dam portion.

[0229] According to another aspect of this disclosure, a display device is provided. The display device includes: a substrate comprising sub-pixels; a cover layer disposed on the substrate and including a base and a protrusion disposed on the base; a light-emitting diode disposed in the sub-pixels and covering a top surface of the base and a side surface of the protrusion; a concave lens disposed above the light-emitting diode; and a convex pattern on the concave lens overlapping the concave lens.

[0230] The display device may further include a touch sensing unit disposed on the light-emitting diode, wherein the touch sensing unit may include a bridging electrode, an inorganic insulating layer, an organic layer, a touch electrode, and an organic insulating layer sequentially stacked on the light-emitting diode, and the concave lens may be disposed between adjacent touch electrodes.

[0231] The convex pattern can be formed on the touch sensing unit.

[0232] The convex pattern can be formed from a light-transmitting material.

[0233] The convex pattern may overlap with the central portion of the concave lens, and the edge of the concave lens may not overlap with the convex pattern.

[0234] The convex pattern can be disposed on the same layer as the touch electrode.

[0235] The convex pattern can be formed from an opaque material.

[0236] Two or more convex patterns can be set on a concave lens.

[0237] The two or more convex patterns may not overlap with the central portion of the concave lens.

[0238] Although exemplary embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the present disclosure is not limited thereto, and the present disclosure can be implemented in many different forms without departing from the technical concept of the present disclosure. Therefore, the exemplary embodiments of the present disclosure are provided for illustrative purposes only and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the above exemplary embodiments are merely illustrative in all respects and do not limit the present disclosure. The scope of protection of the present disclosure should be interpreted based on the following claims, and all technical concepts within the equivalent scope thereof should be interpreted as falling within the scope of the present disclosure.

Claims

1. A display device, comprising: Substrate including sub-pixels; A first cover layer is disposed on the substrate and includes a base and a protrusion disposed on the base; A light-emitting diode disposed in the sub-pixel and covering the top surface of the base and the side surface of the protrusion; A first optical pattern disposed on the light-emitting diode; as well as A second optical pattern is disposed on and overlaps with the first optical pattern, wherein the first optical pattern and the second optical pattern protrude in different directions. The side surface of the protrusion forms an inclined surface relative to the top surface of the base.

2. The display device of claim 1, wherein the first optical pattern overlaps with the top surface of the base exposed by the protrusion.

3. The display device according to claim 1, wherein the first optical pattern protrudes toward the bottom surface of the display device, and the second optical pattern protrudes toward the top surface of the display device.

4. The display device according to claim 3, wherein the area of ​​the second optical pattern overlapping the substrate is smaller than the area of ​​the first optical pattern overlapping the substrate.

5. The display device according to claim 1, further comprising: A touch sensing unit disposed on the light-emitting diode. The touch sensing unit includes a bridging electrode, an inorganic insulating layer, an organic layer, a touch electrode, and an organic insulating layer sequentially stacked on the light-emitting diode. The first optical pattern is disposed on the organic layer such that the top surface of the organic layer includes a portion protruding along the bottom surface of the first optical pattern toward the substrate.

6. The display device according to claim 5, further comprising: A second cover layer disposed on the second optical pattern. The bottom surface of the first optical pattern protrudes in the direction of the substrate, and the top surface of the second optical pattern protrudes in the direction of the second cover layer.

7. The display device according to claim 5, wherein the second optical pattern is formed of a light-transmitting material.

8. The display device according to claim 7, wherein the center of the second optical pattern and the center of the first optical pattern correspond to each other.

9. The display device according to claim 5, wherein the second optical pattern is disposed on the same layer as the touch electrode.

10. The display device according to claim 5, wherein the second optical pattern is formed of an opaque material.

11. The display device of claim 10, wherein the second optical pattern and the touch electrode are formed on the same layer of the same material.

12. The display device of claim 10, wherein the side surface of the second optical pattern is inclined relative to the top surface of the substrate.

13. The display device according to claim 10, wherein the second optical pattern is provided as a plurality and disposed on a portion of the first optical pattern other than the central portion and the two ends.

14. The display device according to claim 1, wherein the first optical pattern and the second optical pattern are disposed in the central portion of the sub-pixel.

15. The display device according to claim 1, wherein the first optical pattern is formed of a light-transmitting material.

16. The display device according to claim 1, wherein the base and the protrusion are integrally formed.

17. The display device of claim 3, wherein the first optical pattern has a flat top surface and the second optical pattern has a flat bottom surface.

18. The display device according to claim 1, further comprising a dam portion disposed above the protrusion of the first cover layer. The light-emitting diode is configured to overlap with a portion of the embankment.

19. A display device, comprising: Substrate including sub-pixels; A cover layer disposed on the substrate and including a base and a protrusion disposed on the base; A light-emitting diode disposed in the sub-pixel and covering the top surface of the base and the side surface of the protrusion; A concave lens positioned above the light-emitting diode; as well as A convex pattern on the concave lens that overlaps with the concave lens.

20. The display device according to claim 19, further comprising: A touch sensing unit disposed on the light-emitting diode. The touch sensing unit includes a bridging electrode, an inorganic insulating layer, an organic layer, a touch electrode, and an organic insulating layer stacked sequentially on the light-emitting diode, and the concave lens is disposed between adjacent touch electrodes.

21. The display device according to claim 20, wherein the raised pattern is disposed on the touch sensing unit.

22. The display device according to claim 21, wherein the raised pattern is formed of a light-transmitting material.

23. The display device of claim 22, wherein the convex pattern overlaps with the central portion of the concave lens, and the edge of the concave lens does not overlap with the convex pattern.

24. The display device of claim 20, wherein the raised pattern is disposed on the same layer as the touch electrode.

25. The display device of claim 24, wherein the raised pattern is formed of an opaque material.

26. The display device according to claim 25, wherein two or more convex patterns are provided on a concave lens.

27. The display device according to claim 26, wherein the two or more convex patterns do not overlap with the central portion of the concave lens.

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