Display device and display panel

Abstract

The invention provides a display device and a display panel. The display panel may include a display area in which light emitted from a light emitting element including a first electrode, a light emitting layer, and a second electrode is presented, and a bezel area located outside the display area and including an auxiliary electrode, the auxiliary electrode electrically contacts the second electrode at a contact region overlapping the light emitting layer.

Description

Technical Field

[0001] This disclosure relates to a device, and in particular, for example, but not limited to, electronic devices, and more specifically, to display devices and display panels having a narrow bezel structure. Background Technology

[0002] As display devices that use digital data to display images, liquid crystal display (LCD) devices that utilize liquid crystals and organic light-emitting diode (OLED) devices are widely used.

[0003] Among these display devices, organic light-emitting diodes (OLEDs) that use OLEDs as self-emissive elements have characteristics such as fast response speed, high contrast, high luminous efficiency, high brightness, and wide viewing angle. For example, OLEDs can be implemented using inorganic or organic materials.

[0004] An organic light-emitting display device may include an organic light-emitting diode (OLED) in each of a plurality of sub-pixels SP disposed in a display panel. An image can be generated from the light emitted by the OLED by controlling the current flowing through it or the voltage applied to it, and in this way, the organic light-emitting display device can display an image when the brightness from each sub-pixel is controlled.

[0005] In an example where the organic light-emitting display device is configured to have a top-emitting structure, the cathode may comprise a transparent metal or a metal with translucent properties in order for light emitted from the light-emitting layer to travel upwards. Furthermore, to obtain a cathode with transmittance sufficient to allow a adequate amount of light to pass through, the cathode may have a very small thickness.

[0006] Based on these considerations, the cathode may comprise a sufficiently thin ITO or an alloy of silver (Ag) and magnesium (Mg).

[0007] The descriptions provided in the background section should not be construed as prior art simply because they are mentioned in or associated with that section. The background section may include information describing one or more aspects of the subject matter art, and the descriptions in that section do not limit this disclosure. Summary of the Invention

[0008] The inventors of this disclosure have recognized that reducing the thickness of the cathode may increase its resistance. Due to this increased resistance, a voltage drop (i.e., IR drop) may occur in the driving voltage supplied to the organic light-emitting display panel, and the light emission of the image displayed through the display panel may become uneven.

[0009] In particular, the inventors of this disclosure have recognized that this voltage drop may be exacerbated as the size of the display panel increases.

[0010] To address these issues, the inventors of this disclosure have invented a display device and a display panel that include a structure capable of reducing voltage drop in the display panel.

[0011] One or more aspects of this disclosure may provide a display device and display panel including a structure in which an auxiliary electrode in electrical contact with a cathode is disposed in a bezel region, and is capable of being driven at low power by minimizing or reducing voltage drop in the display panel.

[0012] One or more aspects of this disclosure may provide a display device and display panel including a structure in which a cathode and an auxiliary electrode are electrically contacted to each other at a location in a bezel region where they overlap with the light-emitting layer, and is able to ensure deposition margin in the bezel region and achieve a lightweight narrow bezel.

[0013] According to one or more exemplary embodiments of the present disclosure, a display panel may be provided, including a display area and a border area, wherein light emitted from a light-emitting element including a first electrode, a light-emitting layer, and a second electrode is displayed in the display area, and the border area is located outside the display area and includes an auxiliary electrode that electrically contacts the second electrode at a contact area overlapping with the light-emitting layer.

[0014] According to one or more exemplary embodiments of the present disclosure, a display device may be provided, which includes a display panel and a driving circuit. The display panel includes a display area and a frame area. Light emitted from a light-emitting element including a first electrode, a light-emitting layer and a second electrode is displayed in the display area. The frame area is located outside the display area and includes an auxiliary electrode that electrically contacts the second electrode at a contact area overlapping with the light-emitting layer.

[0015] According to one or more aspects of this disclosure, the display device and display panel can provide the effect or advantage of reducing voltage drop in the display panel.

[0016] According to one or more aspects of this disclosure, the display device and display panel can provide the effect or advantage of minimizing or reducing voltage drop in the display panel and driving with low power by providing an auxiliary electrode in the bezel area that is in electrical contact with the cathode.

[0017] According to one or more aspects of this disclosure, based on the structure in which the cathode and auxiliary electrodes are electrically contacted at the location where they overlap with the light-emitting layer in the bezel region, the display device and display panel can provide the effect or advantage of ensuring deposition margin in the bezel region and achieving a lightweight, narrow bezel.

[0018] It should be understood that the foregoing general description and the following detailed description are exemplary and illustrative, and are intended to provide further explanation of the claimed inventive concept. Attached Figure Description

[0019] The accompanying drawings are included to provide a further understanding of this disclosure and are incorporated in and constitute a part of this disclosure. The drawings illustrate aspects of this disclosure and, together with the description, serve to illustrate the principles of this disclosure. In the drawings:

[0020] Figure 1 An example display device according to aspects of this disclosure is shown;

[0021] Figure 2 This is an example perspective view of a display device according to aspects of this disclosure;

[0022] Figure 3 An example equivalent circuit of at least one sub-pixel included in a display device according to aspects of this disclosure is shown;

[0023] Figure 4 This is an example cross-sectional view of a display device according to various aspects of this disclosure;

[0024] Figure 5 An example configuration is shown in which the first electrode and the second electrode in a display device according to aspects of the present disclosure are electrically in contact with each other in a frame region;

[0025] Figures 6 to 9 An example process for manufacturing a display panel according to aspects of this disclosure is shown;

[0026] Figure 10 An example design margin is shown in a configuration according to an aspect of this disclosure, in which the first electrode and the second electrode are in electrical contact with each other in a bezel area overlapping with the light-emitting layer in the display panel;

[0027] Figure 11 An example design margin in a configuration according to an aspect of this disclosure is shown, wherein the first electrode and the second electrode are electrically in contact with each other in a contact region overlapping with the light-emitting layer in the second frame region;

[0028] Figure 12 This is an example plan view of a first contact area formed in a first bezel area in a display panel according to aspects of this disclosure;

[0029] Figure 13 This is an example plan view of a second contact area formed in a second bezel area in a display panel according to aspects of this disclosure;

[0030] Figure 14A , Figure 14B , Figure 14C and Figure 14DAn example shape of a contact area according to an aspect of the present disclosure is shown, in which a first electrode and a second electrode are electrically in contact with each other at a location where they overlap with a light-emitting layer in a bezel area of ​​a display panel.

[0031] Figure 15 An exemplary first contact area formed in a first bezel area in a display panel according to aspects of this disclosure is shown; and

[0032] Figure 16 An example contact area is shown that is formed differently in a first border region and a second border region in a display panel according to aspects of this disclosure.

[0033] Throughout the accompanying drawings and detailed description, unless otherwise stated, the same reference numerals should be understood to refer to the same elements, features, and structures. For clarity, illustration, and convenience, the relative dimensions and depictions of these elements may be exaggerated. Detailed Implementation

[0034] In the following, some embodiments of this disclosure will be described in detail with reference to the exemplary accompanying drawings. Exemplary embodiments of this disclosure will now be referred to in detail, examples or aspects of which may be illustrated in the drawings. In the following description, unless otherwise stated, the structures, implementations, methods, and operations described herein are not limited to the specific examples, aspects, and embodiments set forth herein, and may be changed as is known in the art. Unless otherwise stated, the same reference numerals always denote the same elements. The names of the elements used in the following description are chosen only for ease of writing and may therefore differ from the names used in actual products. Furthermore, in the following description of examples or embodiments of this disclosure, detailed descriptions of well-known functions and components incorporated herein are omitted where it is determined that the description may make the subject matter of some embodiments of this disclosure considerably unclear. Where terms such as “comprising,” “having,” “containing,” “including,” “constituting,” “forming,” “comprise,” “structure,” “form,” etc., are used, one or more additional elements may be added unless terms such as “only” are used. Elements described in the singular are intended to include multiple elements and vice versa, unless the context clearly indicates otherwise.

[0035] The advantages and features of this disclosure and its implementation methods will be illustrated by the following exemplary embodiments described with reference to the accompanying drawings. However, this disclosure may be implemented in different forms and should not be construed as limited to the exemplary embodiments set forth herein. Rather, these exemplary embodiments are provided to make this disclosure thorough and complete enough to assist those skilled in the art in fully understanding its scope.

[0036] Any implementation described as an "example" in this document is not necessarily to be construed as preferred or superior to other implementations.

[0037] Although the terms “first,” “second,” A, B, (a), (b), etc., may be used herein to describe various elements, these elements should not be construed as being limited by these terms, as they are not used to define a particular order or priority. These terms are used only to distinguish one element from another. For example, without departing from the scope of this disclosure, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element.

[0038] The terms “first element,” “second element,” and / or “third element” should be understood as one of the first, second, and third elements, or any or all combinations of the first, second, and third elements. For example, A, B, and / or C can refer to only A; only B; only C; any or some combinations of A, B, and C; or all of A, B, and C.

[0039] The term “at least one” should be understood to include any and all combinations of one or more of the associated listed items. For example, “at least one of the first element, the second element, and the third element” means a combination of all three listed elements, a combination of any two of the three elements, and each individual element, the first element, the second element, or the third element.

[0040] When referring to the first element and the second element as "connected or joined," "in contact or overlapping," etc., it should be interpreted as meaning that not only can the first element be "directly connected or joined" or "directly in contact or overlapping" with the second element, but a third element can also be "inserted" between the first element and the second element, or the first element and the second element can be "connected or joined," "in contact or overlapping," etc., with each other via a fourth element. Here, the second element can be included in at least one of two or more elements that are "connected or joined," "in contact or overlapping," etc., with each other.

[0041] When time-related terms such as “after,” “follow,” “next,” or “before” are used to describe a process or operation of an element or configuration, or a flow or step in an operation, processing, or manufacturing method, these terms may be used to describe a discontinuous or non-sequential process or operation, unless the terms “directly” or “immediately” are used together.

[0042] Furthermore, when referring to any size, relative size, etc., it should be assumed that the numerical or corresponding information of an element or feature (e.g., level, range, etc.) includes the range of tolerances or errors that may be caused by various factors (e.g., process factors, internal or external influences, noise, etc.), even if no relevant description is specified. Additionally, the term "may" fully encompasses all the meanings of the term "able to".

[0043] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which the exemplary embodiments pertain. It should also be understood that terms (such as those defined in common dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant field and should not be interpreted in an idealized or overly formal sense unless expressly defined herein. For example, the terms “part” or “unit” can be applied to, for example, a single circuit or structure, an integrated circuit, a computational block of a circuit arrangement, or any structure configured to perform the functions described herein that would be understood by one of ordinary skill in the art.

[0044] Instead, these implementations may be provided to make this disclosure thorough and complete enough to help those skilled in the art to fully understand the scope of this disclosure.

[0045] As will be fully understood by those skilled in the art, the features of the various embodiments of this disclosure may be joined or combined in part or in whole, and may interoperate and be technology-driven in various ways. Embodiments of this disclosure may be performed independently of each other, or may be performed together in an interdependent relationship.

[0046] Various embodiments of this disclosure will be described in detail below with reference to the accompanying drawings.

[0047] Figure 1 An example display device according to aspects of this disclosure is shown.

[0048] refer to Figure 1 In one or more exemplary embodiments, the display device 100 may include a display panel 110 and at least one driving circuit for driving the display panel 110.

[0049] The display panel 110 may include a display area DA for displaying images and a border area BA for not displaying images. The border area BA may also be referred to as a non-display area or an inactive area.

[0050] Display panel 110 may include a plurality of subpixels SP for image display. For example, the plurality of subpixels SP may be disposed in display area DA. In one or more aspects, at least one subpixel SP may be disposed in border area BA. The at least one subpixel SP disposed in border area BA may be referred to as a dummy subpixel.

[0051] The display panel 110 may include multiple signal lines for driving multiple sub-pixels SP. For example, the multiple signal lines may include multiple data lines DL and multiple gating lines GL. Depending on the structure of the sub-pixel SP, in addition to the multiple data lines DL and multiple gating lines GL, the signal lines may also include other signal lines. For example, such signal lines may include driving voltage lines, reference voltage lines, etc.

[0052] Multiple data lines (DL) and multiple gating lines (GL) can intersect each other. Each of the multiple data lines (DL) can extend in a first direction. Each of the multiple gating lines (GL) can extend in a second direction different from the first direction. For example, the first direction can be a column or vertical direction, and the second direction can be a row or horizontal direction. Here, the column and row directions do not necessarily represent absolute directions, but rather relative directions. For example, the column direction can be vertical, and the row direction can be horizontal. In another example, the column direction can be horizontal, and the row direction can be vertical.

[0053] At least one driving circuit may include a data driving circuit 130 for driving multiple data lines DL and a gating driving circuit 120 for driving multiple gating lines GL. At least one driving circuit may also include a timing controller 140 for controlling the data driving circuit 130 and the gating driving circuit 120.

[0054] The data driving circuit 130 can be a circuit for driving multiple data lines DL, and can output data signals (which can be referred to as data voltages) corresponding to the image signals to the multiple data lines DL. The gating driving circuit 120 can be a circuit for driving multiple gating lines GL, and can generate gating signals and provide the generated gating signals to the multiple gating lines GL. The gating signals can include at least one scan signal and at least one light emission signal.

[0055] The timing controller 140 can start scanning pixels according to a corresponding timing set in each frame, and can control the data drive at a timing set for scanning one or more corresponding pixels. The timing controller 140 can convert image data received from external devices or systems (e.g., host system 200) into a data signal form that can be read by the data drive circuit 130, and then provide the converted image data to the data drive circuit 130.

[0056] The timing controller 140 can receive display drive control signals and image data from the external host system 200. In one or more aspects, the display drive control signals may include vertical synchronization signals, horizontal synchronization signals, input data enable signals, clock signals, etc. However, the aspects of this disclosure are not limited thereto.

[0057] The timing controller 140 can generate a data drive control signal DCS and a gating drive control signal GCS based on the display drive control signal received from the host system 200. The timing controller 140 can control the drive operation and timing of the data drive circuit 130 by providing the data drive control signal DCS to the data drive circuit 130. The timing controller 140 can control the drive operation and timing of the gating drive circuit 120 by providing the gating drive control signal GCS to the gating drive circuit 120.

[0058] The data driver circuit 130 may include one or more source driver integrated circuits (SDICs). Each source driver integrated circuit (SDIC) may include a shift register, latch circuit, digital-to-analog converter, output buffer, etc. However, this disclosure is not limited thereto. In one or more aspects, each source driver integrated circuit (SDIC) may also include an analog-to-digital converter (ADC).

[0059] In one or more aspects, each source driver integrated circuit (SDIC) may be connected to the display panel 110 via automated ribbon bonding (TAB) technology, or to conductive pads, such as the pads of the display panel 110, via chip-on-glass (COG) technology or chip-on-panel (COP) technology, or to the display panel 110 via chip-on-film (COF) technology. However, the aspects of this disclosure are not limited thereto.

[0060] The gating drive circuit 120 can provide a gating signal with an on-level voltage, a gating signal with an off-level voltage, or a gating signal with both on-level and off-level voltages, according to the control of the timing controller 140. The gating drive circuit 120 can sequentially drive multiple gating lines GL by sequentially providing gating signals with on-level voltages to multiple gating lines GL.

[0061] The gating drive circuit 120 may include one or more gating drive integrated circuits (GDICs).

[0062] In one or more aspects, the gate drive circuit 120 may be connected to the display panel 110 via tape-on-board (TAB) technology, or to conductive pads (e.g., bonding pads of the display panel 110) via chip-on-glass (COG) technology or chip-on-panel (COP) technology, or to the display panel 110 via chip-on-film (COF) technology. However, the present disclosure is not limited thereto. In one or more aspects, the gate drive circuit 120 may be disposed in the bezel region BA of the display panel 110 via gate-in-panel (GIP) technology. The gate drive circuit 120 may be disposed on the substrate or connected to the substrate. In an example where the gate drive circuit 120 is implemented via gate-in-panel (GIP) technology, the gate drive circuit 120 may be disposed in the bezel region BA of the substrate. For example, when using a GIP-type gate drive circuit 120, the GIP-type gate drive circuit 120 may be disposed and / or electrically connected to one side or edge (e.g., left or right side) of the display panel 110, but is not limited thereto. In one or more aspects, when the gate drive circuit 120 is implemented by chip-on-glass (COG) technology, chip-on-film (COF) technology, etc., the gate drive circuit 120 can be connected to the substrate.

[0063] In one or more aspects, at least one of the data driving circuit 130 and the gating driving circuit 120 may be disposed in the display area DA. For example, at least one of the data driving circuit 130 and the gating driving circuit 120 may be configured not to overlap with the sub-pixel SP, or may be configured to overlap with one or more or all of the sub-pixels SP.

[0064] The data driving circuit 130 may be located and / or electrically connected to, but not limited to, only one side or edge (e.g., the upper or lower part) of the display panel 110. In one or more aspects, depending on the driving scheme, panel design, etc., the data driving circuit 130 may be provided and / or electrically connected to at least two of the two sides or edges (e.g., the upper and lower parts) or four sides or edges (e.g., the upper, lower, left, and right parts) of the display panel 110.

[0065] The gating drive circuit 120 may be located and / or electrically connected to, but not limited to, one side or edge (e.g., left or right) of the display panel 110. In one or more aspects, depending on the driving scheme, panel design, etc., the gating drive circuit 120 may be provided and / or electrically connected to at least two of the two sides or edges (e.g., left and right) or four sides or edges (e.g., left, right, top, and bottom) of the display panel 110, but is not limited thereto.

[0066] The timing controller 140 can be implemented in a separate component from the data drive circuitry 130, or integrated with the data drive circuitry 130, such that the timing controller 140 and the data drive circuitry 130 can be implemented in a single integrated circuit. The timing controller 140 can be a controller used in typical display technologies, or a control device / apparatus capable of performing additional control functions beyond the typical functions of a timing controller. In one or more embodiments, the timing controller 140 can be one or more other control circuits different from the timing controller, or a circuit or component within a control device / apparatus. The timing controller 140 can be implemented using various circuits or electronic components, such as integrated circuits (ICs), field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), processors, etc.

[0067] The timing controller 140 can be mounted on a printed circuit board or flexible printed circuit, and can be electrically connected to the data drive circuit 130 and the gating drive circuit 120 via the printed circuit board or flexible printed circuit, etc. The timing controller 140 can send signals to and receive signals from the data drive circuit 130 via one or more predetermined interfaces. In one or more aspects, such interfaces may include a low-voltage differential signaling (LVDS) interface, an embedded clock point-to-point interface (EPI), a serial peripheral interface (SPI), etc. However, aspects of this disclosure are not limited thereto.

[0068] In one or more aspects, the display device 100 may be a liquid crystal display device, a self-emissive display device in which light is emitted from the display panel 110 itself, etc. In an example where the display device 100 is a self-emissive display device, each of the plurality of sub-pixels SP included in the display device 100 may include a light-emitting element such as an organic light-emitting diode, an inorganic light-emitting diode, a quantum dot light-emitting diode, a micro light-emitting diode, a miniature light-emitting diode, etc. In one or more aspects, the display device 100 may be an organic light-emitting display device in which an organic light-emitting diode (OLED) is used to implement the light-emitting element.

[0069] In one or more aspects, the display device 100 may be an inorganic light-emitting display device in which light-emitting elements are implemented using light-emitting diodes based on inorganic materials. In one or more aspects, the display device 100 may be a quantum dot display device in which light-emitting elements are implemented using quantum dots, which are self-emissive semiconductor crystals.

[0070] Figure 2 This is an example perspective view of a display device 100 according to aspects of this disclosure.

[0071] refer to Figure 2In one or more exemplary embodiments, the display device 100 may be applied to portable electronic devices such as mobile phones, smartphones, tablet PCs, mobile communication terminals, electronic notebooks, e-books, portable multimedia players (PMPs), navigation devices, ultra-mobile PCs (UMPCs), etc.

[0072] In addition, the display device 100 can be applied to televisions, laptops, monitors, billboards, wearable devices such as smartwatches, and watch phones.

[0073] The display device 100 may include a display panel 110, a data driving circuit 130, a touch circuit 150, and a printed circuit board 220.

[0074] The display panel 110 may have a rectangular shape having a short side in a first direction and a long side in a second direction intersecting the first direction. The corners where the short side in the first direction and the long side in the second direction intersect may be rounded to have a predetermined curvature or formed at right angles. The shape of the display panel 110 in a plan view is not limited to a rectangle or a square. For example, the display panel 110 may be formed as a polygon, a circle, or an ellipse in a plan view. The display panel 110 may be formed as a flat surface, but is not limited thereto. For example, the display panel 110 may include curved portions formed at the left and right ends and having a constant or varying curvature. In one or more aspects, the display panel 110 may be flexibly formed to allow at least a portion of the display panel 110 to be bent, rolled, folded, or rolled up.

[0075] The display panel 110 may include a display area DA in which an image can be displayed and a border area BA outside or around the display area DA. The display area DA may include sub-pixels capable of emitting light for generating an image.

[0076] The printed circuit board 220 can be disposed on one side of the display panel 110, and the touch circuit 150 and the data driving circuit 130 can be mounted on the printed circuit board 220. The gating driving circuit can be disposed in the bezel area BA of the display panel 110 in GIP type.

[0077] In one or more aspects, the locations of the data driving circuit 130 and the touch circuit 150 may be interchanged, and the data driving circuit 130 and the touch circuit 150 may be mounted together on a single printed circuit board 220, or they may be mounted separately on different printed circuit boards. However, the aspects of this disclosure are not limited thereto.

[0078] In one or more aspects, the touch circuit 150 may be implemented in an integrated circuit (IC) and may be attached to the display panel 110 by means of chip-on-glass (COG) technology, chip-on-film (COF) technology or ultrasonic bonding technology, but the aspects of this disclosure are not limited thereto.

[0079] The printed circuit board 220 can be attached to one side of the display panel 110. According to this embodiment, the printed circuit board 220 can be electrically connected to the display panel 110 and the touch circuit 150.

[0080] Touch circuit 150 can be implemented as an integrated circuit (IC) and attached to printed circuit board 220. Touch circuit 150 can be electrically connected to touch electrodes of a touchscreen panel located in (or on or under) display panel 110. Touch circuit 150 can apply touch drive signals to a plurality of touch electrodes, detect changes in capacitance formed on at least one or more of the plurality of touch electrodes, and determine whether a touch object (e.g., a finger, pen, etc.) is in contact with or near a touch-sensitive portion or surface of display panel 110. For example, a touch object may be, for example, the user's body (like a finger) or a pen (like a pen) making direct contact with the surface of a cover glass placed on the touch electrodes. For example, a touch object may be, for example, the user's body (like a finger) or a pen (like a pen) hovering a certain distance away from the surface of the cover glass.

[0081] The display panel 110 and the data driving circuit 130 can receive digital video data, timing signals, and driving voltages via the printed circuit board 220. In one or more aspects, the printed circuit board 220 may be in the form of a flexible film, such as a flexible printed circuit board or a chip on a film, but this disclosure is not limited thereto.

[0082] Figure 3 An example equivalent circuit of at least one sub-pixel included in a display device 100 according to an aspect of this disclosure is shown.

[0083] refer to Figure 3 In one or more exemplary embodiments, each or at least one of the plurality of sub-pixels SP included in the touch display device 100 may include one or more transistors and capacitors, and may include an organic light-emitting diode (OLED) as a light-emitting element.

[0084] For example, a subpixel SP may include a driving transistor DRT, a switching transistor SWT, a sensing transistor SENT, a storage capacitor Cst, and a light-emitting element ED such as an organic light-emitting diode (OLED), an inorganic light-emitting diode (LED), a quantum dot (QD) light-emitting element, a micro light-emitting diode, a mini light-emitting diode, etc.

[0085] The driving transistor DRT has a first node N1, a second node N2, and a third node N3. The first node N1 of the driving transistor DRT can be a gate node, where the data voltage Vdata transmitted from the data driving circuit 130 via the data line DL is applied when the switching transistor SWT is turned on. The second node N2 of the driving transistor DRT can be electrically connected to the anode of the light-emitting element ED, and can be either a source node or a drain node of the driving transistor DRT. The third node N3 of the driving transistor DRT can be electrically connected to a high-voltage line DVL (which can be called the sub-pixel driving voltage line DVL) to which a high voltage EVDD (which can be called the sub-pixel driving voltage EVDD) is applied, and can be either a drain node or a source node.

[0086] In these configurations, during the display driving period, the subpixel driving voltage EVDD required to generate the image can be provided via the high-voltage line DVL. For example, the subpixel driving voltage EVDD can be approximately 27V.

[0087] The switching transistor SWT can be electrically connected between the first node N1 and the data line DL, and is driven by the scan signal SCAN transmitted via the gating line GL connected to the gate node of the switching transistor SWT. When the switching transistor SWT is turned on, it can control the operation of the driving transistor DRT by transmitting the data voltage Vdata transmitted via the data line DL to the gate node of the driving transistor DRT.

[0088] The sensing transistor SENT can be electrically connected between the second node N2 of the driving transistor DRT and the reference voltage line RVL, and is driven by the sensing signal SENSE transmitted through the gating line GL connected to the gate node of the sensing transistor SENT. When the sensing transistor SENT is turned on, the sensing reference voltage Vref transmitted through the reference voltage line RVL can be transmitted to the second node N2 of the driving transistor DRT.

[0089] For example, the voltage in the first and second nodes of the driving transistor DRT can be controlled by controlling the switching transistor SWT and the sensing transistor SENT, thereby providing current to the organic light-emitting diode (OLED) for driving the OLED.

[0090] The gate nodes of the switching transistor SWT and the sensing transistor SENT can be connected to the signal gating line GL or different signal lines. Figure 3 An example structure is shown in which the scan transistor SWT and the sensing transistor SENT are connected to different gate lines GL, and in this structure, the scan transistor SWT and the sensing transistor SENT can be independently controlled by the scan signal SCAN and the sensing signal SENSE transmitted through different gate lines GL.

[0091] In another example structure where the scan transistor SWT and the sensing transistor SENT are connected to a gate line GL, the scan transistor SWT and the sensing transistor SENT can be controlled simultaneously or together by a scan signal SCAN or a sensing signal SENSE transmitted through a gate line GL, thereby improving the aperture ratio of the corresponding sub-pixel SP.

[0092] In one or more aspects, one or more transistors disposed in the sub-pixel SP can be n-type transistors or p-type transistors. For example, Figure 3 The transistors (DRT, SWT, and SENT) are shown to be n-type transistors.

[0093] The storage capacitor Cst is electrically connected between the first node N1 and the second node N2 of the driving transistor DRT, and can maintain the data voltage during a frame or a frame period.

[0094] The storage capacitor Cst can be connected between the first node N1 and the third node N3 of the driving transistor DRT, depending on the type of driving transistor DRT. The anode of the light-emitting element ED can be electrically connected to the second node N2 of the driving transistor DRT, and a low voltage EVSS (which can be referred to as the base voltage EVSS) can be applied to the cathode of the light-emitting element ED.

[0095] For example, the base voltage EVSS can be ground voltage or a voltage higher or lower than ground voltage. The base voltage EVSS can vary depending on the driving conditions. For example, the base voltage EVSS during display driving and the base voltage EVSS during sensor driving can be set to different values.

[0096] It should be understood that Figure 3 The subpixel structure shown with three transistors (3T) and one capacitor (1C) is merely an example of a possible subpixel structure for ease of discussion, and exemplary embodiments of this disclosure can be implemented in various structures. For example, a subpixel may also include at least one transistor and / or at least one capacitor. In one or more aspects, multiple subpixels may have the same structure, or at least one of the multiple subpixels may have a structure different from the remaining one or more subpixels.

[0097] Figure 4 This is an exemplary cross-sectional view of a display device 100 according to aspects of this disclosure.

[0098] In one or more exemplary embodiments, in the display device 100, at least one driving transistor DRT may be disposed on a substrate SUB located in at least one sub-pixel SP in the display area DA. Although Figure 4Only one driving transistor, DRT, is shown, but Figure 3 The switching transistor SWT, sensing transistor SENT, and / or storage capacitor Cst included in the sub-pixel may also be included. Figure 4 In the stacking configuration.

[0099] Reference Figure 4 In the display device 100, the driving transistor DRT formed in the display area DA may include a gate GE, a source SE or drain DE, a semiconductor layer SEMI, etc.

[0100] The gate (GE) and the semiconductor layer (SEMI) can overlap each other through the gate insulating layer (GI). The source (SE) can be disposed on the insulating layer (INS) and contact one side of the semiconductor layer (SEMI), and the drain (DE) can be disposed on the insulating layer (INS) and contact the other side of the semiconductor layer (SEMI).

[0101] The light-emitting element ED may include a first electrode E1 (which may be an anode), a light-emitting layer EL disposed on the first electrode E1, and a second electrode E2 (which may be a cathode) disposed on the light-emitting layer EL.

[0102] The first electrode E1 can be electrically connected to the source SE of the drive transistor DRT, which is exposed through the contact hole of the planarization layer PLN.

[0103] In the light-emitting region defined by the dam BANK, a light-emitting layer EL can be disposed on the first electrode E1. The light-emitting layer EL may comprise a stack of one or more hole-related layers, an intermediate layer, and one or more electron-related layers, which may be stacked on the first electrode E1 in this order or in reverse order. A second electrode E2 may be configured facing the first electrode E1, with the light-emitting layer EL interposed between the second electrode E2 and the first electrode E1. In one or more aspects, the one or more hole-related layers may be hole transport layers, hole injection layers, electron blocking layers, and / or p-type charge generation layers, but this disclosure is not limited thereto. In one or more aspects, the one or more electron-related layers may be electron transport layers, electron injection layers, hole blocking layers, or n-type charge generation layers, but this disclosure is not limited thereto.

[0104] The encapsulation layer ENCAP prevents external moisture or oxygen from penetrating into the light-emitting element (ED), which is susceptible to external moisture or oxygen. The encapsulation layer ENCAP can be a single layer or a stack of multiple layers (PAS1, PCL, PAS2).

[0105] For example, when the encapsulation layer ENCAP includes multiple stacked layers (PAS1, PCL, PAS2), the encapsulation layer ENCAP may include one or more inorganic encapsulation layers (PAS1 and PAS2) and one or more organic encapsulation layers PCL. For example, the encapsulation layer ENCAP may have a stack of a first inorganic encapsulation layer PAS1, an organic encapsulation layer PCL, and a second inorganic encapsulation layer PAS2 stacked in sequence, but aspects of this disclosure are not limited thereto.

[0106] The organic encapsulation layer PCL may also include at least one organic encapsulation layer or at least one inorganic encapsulation layer, but this disclosure is not limited thereto.

[0107] In these encapsulation layers, the first inorganic encapsulation layer PAS1 can be located closest to the light-emitting element ED, and can be disposed, for example, on a substrate SUB on which a second electrode E2, serving as a cathode, is disposed. The first inorganic encapsulation layer PAS1 can include, for example, inorganic insulating materials capable of being deposited at low temperatures, such as silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), aluminum oxide (Al2O3), etc., but this disclosure is not limited thereto. Since the first inorganic encapsulation layer PAS1 is deposited in a low-temperature atmosphere, it can prevent or reduce damage to the light-emitting layer EL, including organic materials susceptible to high-temperature atmospheres, during the deposition process.

[0108] The organic encapsulation layer PCL can be disposed in an area smaller than that of the first inorganic encapsulation layer PAS1. For example, the organic encapsulation layer PCL can be disposed such that both ends of the first inorganic encapsulation layer PAS1 are exposed. The organic encapsulation layer PCL can act as a buffer to alleviate stress between layers disposed on or under the organic encapsulation layer PCL due to bending of the touch-supporting display device 100, and also to improve planarization performance. The organic encapsulation layer PCL may include, for example, organic insulating materials such as acrylic resin, epoxy resin, polyimide, polyethylene, silicon-oxygen carbon (SiOC), etc., but aspects of this disclosure are not limited thereto.

[0109] When an organic encapsulation layer (PCL) is formed using an inkjet process, one or more barrier barriers (DAMs) can be positioned in a barrier region corresponding to the boundary region between the non-display area (or border region BA) and the display region DA, or a portion of the non-display area.

[0110] For example, the barrier region can be located between the pad area with multiple touch pads TP in the non-display area and the display area DA. The barrier region may include a first barrier DAM1 adjacent to the display area DA and a second barrier DAM2 adjacent to the pad area.

[0111] When the organic encapsulation layer PCL is formed in the display area DA, one or more barrier DAMs located in the barrier area can prevent or reduce the overflow of the liquid form of the organic encapsulation layer PCL toward the non-display area and into the pad area.

[0112] The first barrier DAM1 or the second barrier DAM2 can have a single-layer or multi-layer structure. For example, the first barrier DAM1 or the second barrier DAM2 can be formed simultaneously using the same material as at least one of the dam bank and the spacers. Thus, the barrier structure can be formed without additional masking processes and increased costs. For example, the spacers can be disposed on the dam bank.

[0113] In one or more aspects, the first barrier DAM1 or the second barrier DAM2 may have a structure in which a first inorganic encapsulation layer PAS1 and a second inorganic encapsulation layer PAS2 are stacked on the dam BANK. An organic encapsulation layer PCL comprising organic material may be located on the inner surface of the first barrier DAM1, or may be located on at least a portion of at least one of the first barrier DAM1 and the second barrier DAM2. For example, the first inorganic encapsulation layer PAS1 and the second inorganic encapsulation layer PAS2 may be in contact with each other in the barrier region to seal the edges of the organic encapsulation layer PCL and prevent moisture penetration.

[0114] The second inorganic encapsulation layer PAS2 can be disposed on a substrate SUB on which the organic encapsulation layer PCL is disposed, such that the second inorganic encapsulation layer PAS2 covers the corresponding upper and side surfaces of the organic encapsulation layer PCL and the first inorganic encapsulation layer PAS1. The second inorganic encapsulation layer PAS2 can minimize, prevent, or reduce the penetration of external moisture or oxygen into the first inorganic encapsulation layer PAS1 and the organic encapsulation layer PCL. The second inorganic encapsulation layer PAS2 may include, for example, inorganic insulating materials, such as silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), aluminum oxide (Al2O3), etc., but this disclosure is not limited thereto.

[0115] In one or more aspects, the display device 100 may include a touch sensing structure in which a plurality of X touch electrode lines (which may be referred to as a plurality of X touch electrode arrays, each of the plurality of X touch electrode arrays including a plurality of X touch electrodes) and a plurality of Y touch electrode lines (which may be referred to as a plurality of Y touch electrode arrays, each of the plurality of Y touch electrode arrays including a plurality of Y touch electrodes) are disposed. Reference Figure 4 Multiple X-touch electrode lines and multiple Y-touch electrode lines can be set on the ENCAP encapsulation layer.

[0116] Multiple X-touch electrode lines can be arranged in a first direction, and multiple Y-touch electrode lines can be arranged in a second direction different from the first direction.

[0117] The first and second directions can be relatively different directions. For example, the first direction can be the x-axis direction, and the second direction can be the y-axis direction. In another example, the first direction can be the y-axis direction, and the second direction can be the x-axis direction. The first and second directions can be orthogonal to each other, or they can be non-orthogonal to each other.

[0118] Each of the multiple X-touch electrode lines may include multiple X-touch electrodes X-TE electrically connected to each other, and each of the multiple Y-touch electrode lines may include multiple Y-touch electrodes Y-TE electrically connected to each other.

[0119] Multiple X-touch electrodes (X-TE) and multiple Y-touch electrodes (Y-TE) may be included in multiple touch electrodes (TE) disposed in the display panel 110. For example, the multiple X-touch electrodes (X-TE) included in each of the multiple X-touch electrode lines may be touch driving electrodes, and the multiple Y-touch electrodes (Y-TE) included in each of the multiple Y-touch electrode lines may be touch sensing electrodes. The multiple X-touch electrode lines may correspond to touch driving electrode lines, and the multiple Y-touch electrode lines may correspond to touch sensing electrode lines.

[0120] In one or more aspects, in addition to multiple X touch electrode lines and multiple Y touch electrode lines, the touch sensor metal for touch sensing may also include multiple touch lines.

[0121] Multiple touch lines may include one or more X-touch lines X-TL connected to multiple X-touch electrode lines and one or more Y-touch lines Y-TL connected to multiple Y-touch electrode lines.

[0122] Each of the multiple X-Touch electrode lines may include multiple X-Touch electrodes X-TE arranged in the same row (or column) and one or more X-Touch electrode connecting lines X-CL electrically interconnecting the multiple X-Touch electrodes X-TE. The X-Touch electrode connecting line X-CL used to connect two adjacent X-Touch electrodes X-TE may be a metal integral with the two adjacent X-Touch electrodes X-TE, or it may be a metal connected to the two adjacent X-Touch electrodes X-TE through a contact hole.

[0123] refer to Figure 4 The touch buffer layer T-BUF can be disposed on the encapsulation layer ENCAP. The touch buffer layer T-BUF can be located between the touch sensor metal, which includes the touch electrodes (X-TE, Y-TE) and the touch electrode connecting lines (X-CL, Y-CL), and the second electrode E2 of the light-emitting element ED.

[0124] The touch buffer layer T-BUF can be designed to maintain a predetermined minimum distance (e.g., about 1 μm) between the touch sensor metal and the second electrode E2 of the light-emitting element ED. According to this structure, parasitic capacitance formed between the touch sensor metal and the second electrode E2 of the light-emitting element ED can be reduced or prevented, thereby preventing or reducing the degradation of touch sensitivity caused by parasitic capacitance.

[0125] In one or more aspects, the touch sensor metal, including the touch electrodes (X-TE, Y-TE) and touch electrode connecting lines (X-CL, Y-CL), can be disposed on the encapsulation layer ENCAP without the touch buffer layer T-BUF.

[0126] The touch buffer layer T-BUF prevents chemical solutions (e.g., developer solutions, etchants, etc.) or external moisture used in the manufacturing process of the touch sensor metal disposed on the touch buffer layer T-BUF from penetrating into the light-emitting layer EL, which includes organic materials. Therefore, the touch buffer layer T-BUF can prevent or reduce damage to the light-emitting layer EL, which is susceptible to chemical solutions or moisture. For example, the touch buffer layer T-BUF can be configured to cover the touch sensor metal, thereby preventing or reducing corrosion of the touch sensor metal by external moisture, etc.

[0127] The touch buffer layer T-BUF can be formed at low temperatures (e.g., about 100°C) or lower to prevent or reduce damage to the light-emitting layer EL, which includes organic materials susceptible to high temperatures. The touch buffer layer T-BUF comprises an organic insulating material with a low dielectric constant. For example, the touch buffer layer T-BUF may comprise acrylic, epoxy, or siloxane-based materials, but this disclosure is not limited thereto. The touch buffer layer T-BUF, having an organic insulating material and planarization properties, can prevent or reduce damage to the layers (PAS1, PCL, and PAS2) included in the encapsulation layer ENCAP and breakage of the touch sensor metal disposed on the touch buffer layer T-BUF due to bending of the display device 100. In one or more aspects, the touch buffer layer T-BUF may not be disposed on the encapsulation layer ENCAP. For example, the touch buffer layer T-BUF may be omitted.

[0128] In a touch sensing structure configured to sense touch based on mutual capacitance, the X touch electrode line X-TEL and the Y touch electrode line Y-TEL can be disposed on the touch buffer layer T-BUF, and the X touch electrode line X-TEL and the Y touch electrode line Y-TEL can be configured to cross each other. In one or more aspects, the Y touch electrode line Y-TEL may include a plurality of Y touch electrode connection lines Y-CL for electrically interconnecting the plurality of Y touch electrodes Y-TE.

[0129] Multiple Y-touch electrodes (Y-TE) and multiple Y-touch electrode connecting lines (Y-CL) can be located in different layers, with an interlayer dielectric layer (ILD) between them.

[0130] Multiple Y-touch electrodes Y-TE can be spaced apart from each other at a constant interval along the Y-axis. Each of the multiple Y-touch electrodes Y-TE can be electrically connected to another adjacent Y-touch electrode Y-TE in the Y-axis direction via a corresponding Y-touch electrode connecting line Y-CL.

[0131] Y-touch electrode connection lines (Y-CL) can be disposed on the touch buffer layer (T-BUF). Each Y-touch electrode connection line (Y-CL) can be exposed through the touch contact hole of the interlayer dielectric layer (ILD) and electrically connected to two adjacent Y-touch electrodes (Y-TE) in the Y-axis direction.

[0132] The Y-touch electrode connection line Y-CL can be configured to overlap with the dam section BANK. This configuration prevents or reduces the reduction in the aperture ratio of the display device 100 due to the Y-touch electrode connection line Y-CL.

[0133] In one or more aspects, the X-Touch Electrode Line (X-TEL) may include multiple X-Touch Electrode Connection Lines (X-CLs) for electrically interconnecting multiple X-Touch Electrodes (X-TEs). The multiple X-Touch Electrodes (X-TEs) and the multiple X-Touch Electrode Connection Lines (X-CLs) may be located in different layers, with an interlayer dielectric layer (ILD) located between these different layers.

[0134] Multiple X-touch electrodes (X-TEs) can be spaced apart from each other at a constant interval along the X-axis on the interlayer dielectric layer (ILD). Each of the multiple X-touch electrodes (X-TEs) can be electrically connected to another adjacent X-touch electrode (X-TE) in the X-axis direction via a corresponding line in the X-touch electrode connection line (X-CL).

[0135] Each X-touch electrode connection line X-CL can be disposed on the same plane or layer as the X-touch electrode X-TE, thereby electrically connecting to two adjacent X-touch electrodes X-TE in the X-axis direction without a separate contact hole, or it can be integrally formed with two adjacent X-touch electrodes X-TE in the X-axis direction.

[0136] The X-touch electrode connection line X-CL can be configured to overlap with the dam section BANK. This configuration prevents or reduces the reduction in the aperture ratio of the display device 100 due to the X-touch electrode connection line X-CL.

[0137] Each Y-touch electrode line Y-TEL can be electrically connected to the touch circuit 150 via the corresponding Y-touch line Y-TL and the corresponding Y-touch pad Y-TP. Each X-touch electrode line X-TEL can be electrically connected to the touch circuit 150 via the corresponding X-touch line X-TL and the corresponding X-touch pad X-TP.

[0138] In one or more aspects, at least one pad cover electrode may also be provided, which covers at least one X-touch pad X-TP and at least one Y-touch pad Y-TP.

[0139] The corresponding X-touch line X-TL and corresponding X-touch pad X-TP connected to each X-touch electrode line X-TEL can be formed separately from each other, or the X-touch pad X-TP can be a portion generated by extending the X-touch line X-TL. Similarly, the corresponding Y-touch line Y-TL and corresponding Y-touch pad Y-TP connected to each Y-touch electrode line Y-TEL can be formed separately from each other, or the Y-touch pad Y-TP can be a portion generated by extending the Y-touch line Y-TL.

[0140] In the example where the X-touch pad X-TP is a portion extending from the X-touch line X-TL, and the Y-touch pad Y-TP is a portion extending from the Y-touch line Y-TL, the X-touch pad X-TP, X-touch line X-TL, Y-touch pad Y-TP, and Y-touch line Y-TL may comprise the same first conductive material. In one or more aspects, the first conductive material may be in the form of a single layer or multiple layers, using metals with strong corrosion resistance, acid resistance, and good conductivity, such as aluminum (Al), titanium (Ti), copper (Cu), molybdenum (Mo), etc., but the aspects of this disclosure are not limited thereto.

[0141] For example, the X-touch pad X-TP, X-touch line X-TL, Y-touch pad Y-TP, and Y-touch line Y-TL, which include a first conductive material, may have a stack of three layers (e.g., Ti / Al / Ti or Mo / Al / Mo), but this disclosure is not limited thereto.

[0142] The pad cover electrode, which can cover at least one X-touch pad (X-TP) and at least one Y-touch pad (Y-TP), may include a second conductive material of the same material as the X-touch electrode and the Y-touch electrode (X-TE, Y-TE). The second conductive material may include a transparent conductive material, such as ITO or IZO, which has strong corrosion resistance and acid resistance. For example, the pad cover electrode may be exposed by a touch buffer layer (T-BUF). In this example, the pad cover electrode may be bonded to the touch circuit 150 or to a circuit film on which the touch circuit 150 is mounted.

[0143] The touch buffer layer (T-BUF) can be formed to cover the touch sensor metal. Thus, the touch buffer layer (T-BUF) can prevent or reduce corrosion of the touch sensor metal by external moisture. For example, the touch buffer layer (T-BUF) can include an organic insulating material, or it can be formed in the form of a circular polarizer or film including epoxy or acrylic materials. In one or more aspects, the touch buffer layer (T-BUF) may not be disposed on the encapsulation layer (ENCAP). For example, the touch buffer layer (T-BUF) can be omitted.

[0144] Reference Figure 4 The Y-Touch Line Y-TL can be electrically connected to the Y-Touch Electrode Y-TE through the Touch Line Contact Hole, or it can be integrally formed with the Y-Touch Electrode Y-TE.

[0145] The Y-touch line Y-TL can extend into the non-display area. For example, the Y-touch line Y-TL can extend from the display area along the top and side surfaces of the ENCAP package layer and the top and side surfaces of the DAM barrier layer, and reach the Y-touch pad Y-TP. Therefore, the Y-touch line Y-TL can be electrically connected to the Y-touch pad Y-TP. Thus, the Y-touch line Y-TL can be electrically connected to the touch circuit 150 through the Y-touch pad Y-TP.

[0146] The Y-TL touch line can transmit touch sensing signals from the Y-TE touch electrode to the touch circuit 150, and / or transmit touch driving signals from the touch circuit 150 to the Y-TE touch electrode.

[0147] refer to Figure 4 The Y-touch bridge cable Y-BL, connected via contact holes CH, can be positioned below the Y-touch line Y-TL within the notch area NT and the bend area BD. The Y-touch line Y-TL and the Y-touch bridge cable Y-BL can be electrically connected via one or more contact holes CH spaced at intervals. Therefore, the Y-touch line Y-TL and the Y-touch bridge cable Y-BL can transmit the same touch drive signal or touch sensing signal.

[0148] Therefore, in the configuration where the Y-touch line Y-TL and the Y-touch bridge line Y-BL are electrically connected, the resistance caused during the transmission of touch drive signals or touch sensing signals can be reduced. Furthermore, in a structure where the Y-touch line Y-TL and the Y-touch bridge line Y-BL are connected through one or more contact holes CH, even if a short circuit occurs in a portion of the Y-touch line Y-TL or the Y-touch bridge line Y-BL, the touch signal (e.g., touch drive signal or touch sensing signal) can be bypassed through the corresponding one of the one or more contact holes CH, thus maintaining touch sensing performance.

[0149] refer to Figure 4 Y-Touch Line Y-TL and Y-Touch Bridge Line Y-BL can be insulated with an interlayer dielectric layer (ILD) in an area other than one or more contact holes (CH).

[0150] Multiple Y-touch lines (Y-TL1, Y-TL2, Y-TL3, Y-TL4) can be set in the border area BA, and at least one Y-touch bridge electrode Y-BE can be set below the Y-touch lines (Y-TL1, Y-TL2, Y-TL3, Y-TL4) and integrally formed with or connected to the Y-touch lines (Y-TL1, Y-TL2, Y-TL3, Y-TL4).

[0151] When at least one Y-touch bridge electrode Y-BE is integrally formed with Y-touch lines (Y-TL1, Y-TL2, Y-TL3, Y-TL4) (hereinafter, it may be referred to as an integrally formed structure), at least one Y-touch bridge electrode Y-BE may have a width equal to or greater than that of the Y-touch lines (Y-TL1, Y-TL2, Y-TL3, Y-TL4) to cover the area occupied by the Y-touch lines (Y-TL1, Y-TL2, Y-TL3, Y-TL4) located on at least one Y-touch bridge electrode Y-BE.

[0152] In one or more aspects, the Y-touch bridge electrode Y-BE may be connected to ground voltage to release noise charge flowing into the display panel 110, and may be separated from the Y-touch bridge wiring Y-BL located in the curved area BD.

[0153] According to this structure, noise charges entering the display panel 110 can be easily discharged to the ground voltage GND through the Y touch bridge electrode (Y-BE) with an integrally formed structure to cover the area occupied by the Y touch lines (Y-TL1, Y-TL2, Y-TL3, Y-TL4), thereby the display device 100 can provide the advantages of improved touch sensing performance and reduced defects caused by display driving.

[0154] Reference Figure 4 The X-Touch Line X-TL can be electrically connected to the X-Touch Electrode X-TE through the touch contact hole, or it can be integrally formed with the X-Touch Electrode X-TE.

[0155] The X-Touch Line X-TL can extend into non-display areas. For example, the X-Touch Line X-TL can extend from the display area along the top and side surfaces of the ENCAP package layer and the DAM barrier layer, reaching the X-Touch Pad X-TP. Therefore, the X-Touch Line X-TL can be electrically connected to the X-Touch Pad X-TP. Thus, the X-Touch Line X-TL can be electrically connected to the touch circuit 150 through the X-Touch Pad X-TP.

[0156] The X-Touch Line X-TL can transmit touch drive signals from the touch circuit 150 to the X-Touch Electrode X-TE, and / or transmit touch sensing signals from the X-Touch Electrode X-TE to the touch circuit 150.

[0157] The settings for the X-Touch Line (X-TL) and the Y-Touch Line (Y-TL) can be changed according to the design requirements of the display panel 110.

[0158] refer to Figure 4 The touch protection layer PAC can be disposed on the X touch electrode X-TE and the Y touch electrode Y-TE. The touch protection layer PAC can extend to the front or rear of the barrier DAM, and can also be disposed on the X touch line X-TL and the Y touch line Y-TL.

[0159] It should be noted that Figure 4 The cross-sectional structure shown conceptually illustrates the stacked configuration of the display device 100, and the corresponding position, thickness, or width of one or more patterns (e.g., one or more layers or one or more electrodes) can vary depending on the viewing direction or position, and the corresponding connection structure of one or more patterns can also vary. Furthermore, in addition to the layers shown, one or more layers can be added, and / or some of the layers shown can be omitted or integrated. For example, the width of the embankment bank can be greater than... Figure 4 The width is narrow, and the height of the barrier DAM can be greater than Figure 4 The height is low or high.

[0160] In one or more aspects, the display device 100 may be a mobile terminal such as a smartphone, tablet computer, etc., or a monitor, television (TV), etc. Such a device may be configured in various types, sizes, and shapes. The display device 100 according to the aspects of this disclosure is not limited thereto, and may include various types, sizes, and shapes configured to display information or images. The display device according to the aspects of this disclosure can be applied to mobile devices, video phones, smartwatches, watch phones, wearable devices, foldable devices, rollable devices, bendable devices, flexible devices, stretchable devices, bending devices, sliding devices, variable devices, electronic notebooks, e-books, portable multimedia players (PMPs), personal digital assistants (PDAs), MP3 players, mobile medical devices, desktop PCs, laptop PCs, netbooks, workstations, navigation devices, in-vehicle display devices, in-vehicle equipment, cinema equipment, cinema display devices, televisions, wallpaper devices, gaming devices, laptop computers, monitors, cameras, camcorders, and home appliances, etc.

[0161] The display device 100 can determine the presence or location of a touch by detecting touch sensing signals from one or more touch electrodes TE based on a single sensing enable structure or a differential sensing enable structure.

[0162] For example, in an example where the display device 100 has a top light-emitting structure that emits light upwards, the second electrode E2, which serves as the cathode, can be implemented as an electrode with transparent properties or an electrode with semi-transparent properties to emit light emitted from the light-emitting layer EL upwards.

[0163] In this embodiment, in order to obtain a cathode with transmittance that allows a sufficient amount of light to pass through, the cathode can have a very small thickness. For example, to obtain a second electrode E2 with a sufficiently thin thickness, the second electrode E2 may include an alloy of ITO, silver (Ag), and magnesium (Mg).

[0164] However, reducing the thickness of the second electrode E2 may increase its resistance. This increased resistance can cause a voltage drop (i.e., IR drop) in a portion of the display panel 110 (particularly the central portion), potentially leading to uneven light emission from the image displayed on the panel. This voltage drop can worsen as the size of the display panel increases. For example, when the second electrode E2 is formed very thin (e.g., to improve transparency and light extraction), its resistance increases, and the problem becomes more severe when the display panel is made very large (e.g., a large-screen TV).

[0165] In one or more aspects, the display device 100 may include a structure in which the cathode is electrically contacted with an auxiliary electrode in a bezel region, thereby providing the advantages of reducing the resistance of the cathode and minimizing or reducing the voltage drop caused by the cathode, which can help provide uniform brightness across the entire screen.

[0166] In particular, the display device 100 may include a structure in which the cathode and auxiliary electrode are electrically contacted to each other at the locations where they overlap with the light-emitting layer in the bezel region, thereby providing the advantage of ensuring deposition margin in the bezel region BA and achieving a narrow bezel.

[0167] Figure 5 An example configuration is shown in which the first electrode and the second electrode in a display device 100 according to an aspect of the present disclosure are electrically in contact with each other in a frame region.

[0168] refer to Figure 5 In one or more exemplary embodiments, the display panel 110 included in the display device 100 may include a display area DA in which an image may be displayed and a border area BA in which no image is displayed.

[0169] In a plan view, the border area BA may include a first border area BA1 located to the left and right of the display area DA and a second border area BA2 located above and below the display area DA.

[0170] In one or more aspects, the light-emitting layer EL disposed on the first electrode E1, which serves as the anode, can extend from the display area DA to a portion of the bezel area BA. To reduce the voltage drop in the second electrode E2, which serves as the cathode, the display panel 110 may include a structure in which the first electrode E1, serving as the anode, electrically contacts the second electrode E2.

[0171] Furthermore, the second electrode E2 can be disposed on the light-emitting layer EL, such that the second electrode E2 covers the light-emitting layer EL. For example, the second electrode E2 can extend from the display area DA to the border area BA, and further extend from the light-emitting layer EL to the outward area or the outer edge of the light-emitting layer EL.

[0172] refer to Figure 5 To reduce the voltage drop of the second electrode E2, the display panel 110 may include a contact area CTA for electrically connecting the second electrode E2 and the first electrode E1 located below the second electrode E2 through a cut-off area, where a portion of the light-emitting layer EL disposed in the bezel area BA is cut off. In other words, a portion of the light-emitting layer EL can be removed or burned off, allowing a portion of the second electrode E2 to contact the first electrode E1.

[0173] In this configuration, if the contact area CTA used for electrically connecting the second electrode E2 and the first electrode E1 is formed in the display area DA, the resolution of the display area DA may be reduced.

[0174] To address this issue, in one or more aspects, it may be desirable for the display panel 110 to have a structure in which a contact area CTA for electrically connecting the second electrode E2 and the first electrode E1 is provided in a bezel area BA, and the bezel area BA is designed to have a narrow width (which may be referred to as a narrow bezel).

[0175] A contact area CTA for electrically connecting the second electrode E2 and the first electrode E1 can be formed along the outer edge of the display area DA. The contact area CTA can be the area for electrically connecting the first electrode E1 and the second electrode E2, and a portion of the light-emitting layer EL corresponding to the contact area CTA can be cut off.

[0176] In one or more aspects, the contact area CTA for electrically connecting the first electrode E1 and the second electrode E2 can be continuously formed along the border area BA.

[0177] refer to Figure 5 In one or more aspects, the disconnected region ECA where the first electrode E1 and the second electrode E2 are not in electrical contact with each other may be included in a portion of the contact region CTA.

[0178] Therefore, the disconnected region ECA can be the region where the first electrode E1 and the second electrode E2 are not in electrical contact with each other. For example, the disconnected region ECA can be the region where the first electrode E1 and the second electrode E2 are spaced apart from each other.

[0179] In one or more aspects, the disconnected region ECA can be a region in which the light-emitting layer EL is not cut off. In one or more aspects, the disconnected region ECA can be a region in which the first electrode E1 or the second electrode E2 is not formed.

[0180] The disconnected area ECA can be an area that exerts an influence (capacitance, magnetic field, electrical effect, etc.) on adjacent signal lines through the electrical connection between the first electrode E1 and the second electrode E2, or it can be an area for effectively setting up signal lines without forming the first electrode E1 or the second electrode E2. For example, the disconnected area ECA can be an area for setting up wiring structures, and by keeping the first electrode E1 and the second electrode E2 spaced apart and disconnected from each other in this area, their impact on the image quality of the displayed image can be prevented or minimized.

[0181] In one or more aspects, the break region ECA may be located in the second border region BA2.

[0182] In one or more aspects, the first electrode E1 of the first border region BA1 and the first electrode E1 of the second border region BA2 may be connected to each other or may not be connected.

[0183] For example, the base voltage line to which the base voltage EVSS is applied can be connected to the second electrode E2. Therefore, the contact area CTA can be formed along the area where the base voltage line is provided, and the disconnect area ECA can be formed in the area where the base voltage line is not provided.

[0184] For example, in an example where the data driving circuit 103 is disposed on the upper part of the display panel 110 and the base voltage line for transmitting the base voltage extends along the left and right surfaces of the display panel 110, the contact area CTA where the first electrode E1 and the second electrode E2 are electrically connected can be formed along the first frame area BA1.

[0185] Therefore, the disconnected region ECA, where the first electrode E1 and the second electrode E2 are not in electrical contact with each other, can be formed along the second border region BA2, where no basic voltage line is formed.

[0186] In one or more aspects, the portion of the border region BA in which the first electrode E1 is not formed may be the disconnected region ECA.

[0187] Based on these structures, a narrow bezel can be achieved while minimizing or reducing voltage drop when a portion of the light-emitting layer EL in the bezel region BA is cut off and the first electrode E1 and the second electrode E2 are in electrical contact with each other at the position where they overlap with the light-emitting layer EL.

[0188] Figures 6 to 9 An example process for manufacturing a display panel 110 according to aspects of this disclosure is shown.

[0189] refer to Figure 6 In one or more exemplary embodiments, in the display device 100, a substrate SUB, a gate insulating layer GI, and an insulating layer INS may be deposited sequentially across the display area DA and the bezel area BA.

[0190] Figure 6 The diagram shows that a curved area BD and a recessed area NT of the display panel 110 are respectively provided on the outside of the border area BA. However, it can also be considered that the curved area BD and the recessed area NT are both included in the border area BA.

[0191] At least one driving transistor DRT used to drive the corresponding sub-pixel SP can be set in the display area DA, but the driving transistor DRT may not be formed in the border area BA.

[0192] The planarization layer PLN can extend from the display area DA to the bezel area BA. In one or more aspects, the planarization layer PLN can have a structure of a first planarization layer PLN1 and a second planarization layer PLN2 with stacked different materials.

[0193] One or more barriers (DAM1, DAM2) can be formed in a barrier region located within a portion of the border region BA.

[0194] For example, the barrier region may include a first barrier DAM1 adjacent to the display region DA and a second barrier DAM2 adjacent to the first barrier DAM1 outward. For example, the second barrier DAM2 may be located outside the first barrier DAM1 and surround the first barrier DAM1.

[0195] One or more barriers (DAM1, DAM2) set in the barrier area can prevent or reduce the overflow of the liquid form organic encapsulation layer PCL toward the border area BA while the liquid form organic encapsulation layer PCL is formed in the display area DA.

[0196] The first barrier DAM1 or the second barrier DAM2 can have a single-layer or multi-layer structure. For example, the first barrier DAM1 or the second barrier DAM2 may include a dam bank and spacers. Thus, the barrier structure can be formed without additional masking processes and increased costs. The spacers can be disposed on the dam bank.

[0197] Additional spacers can also be installed on the embankment bank in the area extending inward from the barrier zone.

[0198] The light-emitting element ED located in the display area DA may include a first electrode E1 as an anode, a light-emitting layer EL disposed on the first electrode E1, and a second electrode E2 disposed on the light-emitting layer EL as a cathode.

[0199] In this configuration, the first electrode E1 can be disposed on the planarization layer PLN, and is formed not only in the display area DA, but also in the bezel area BA. The first electrode E1 disposed in the bezel area BA can be electrically separated from the first electrode disposed in the display area DA.

[0200] The first electrode E1 may be formed only in a portion of the border region BA, or it may extend from the border region BA to the barrier region.

[0201] For example, in the wider first border region BA1 between the first electrode E1 and the second electrode E2 (e.g., ...), Figure 5In the first border region BA1), the first electrode E1 can extend into the barrier region, and in the second border region BA2 where the first electrode E1 and the second electrode E2 do not contact each other (e.g., Figure 5 In the second border region BA2), or in the second border region BA2 where the contact area is narrower, the first electrode E1 may be formed only in the boundary between the display area DA and the border region BA.

[0202] In one or more aspects, the light-emitting layer EL located in the display area DA can be configured to contact the first electrode E1 in the light-emitting area formed in the opening area of ​​the dam BANK. Therefore, the light-emitting area located in the display area DA can be the area illuminated by the first electrode E1, the light-emitting layer EL, and the second electrode E2 stacked sequentially, and corresponds to the opening area of ​​the dam BANK.

[0203] Similarly, the light-emitting layer EL located in the border region BA can also be exposed through the opening region of the dam BANK. In one or more aspects, the contact region CTA of the border region BA can be located in the opening region of the dam and formed such that its width is smaller than the width of the opening region of the dam. In one or more aspects, multiple contact regions CTA can be formed in the opening region of the dam.

[0204] The contact area CTA in the border area BA can be the area where the light-emitting layer EL is cut off and the first electrode E1 and the second electrode E2 are in electrical contact with each other.

[0205] Therefore, the contact area CTA of the frame region BA can reduce the voltage drop by making the first electrode E1 and the second electrode E2 electrically contact each other.

[0206] In one or more aspects, the light-emitting layer EL may include a stack of one or more hole-related layers, one or more element-related layers, and one or more electron-related layers, which are stacked on the first electrode E1 in this order or in reverse order.

[0207] Reference Figure 7 At least a portion of the luminescent layer EL in the contact area CTA located in the border area BA can be removed using a high-frequency signal such as an ultraviolet laser.

[0208] In this process, the light-emitting layer EL in the contact area CTA located in the border area BA can be removed using a high-frequency signal, or it can be removed using various methods such as photolithography.

[0209] Reference Figure 8A second electrode E2 can be formed to cover the light-emitting layer EL, while the light-emitting layer EL is cut off by a high-frequency signal injected into the contact area CTA of the frame area BA.

[0210] In this process, the second electrode E2 can make electrical contact with the first electrode E1 through the contact area CTA in which the light-emitting layer EL is disconnected.

[0211] Based on these structures, the resistance of the second electrode E2 can be reduced, thus minimizing or reducing the voltage drop phenomenon.

[0212] refer to Figure 9 To prevent external moisture or oxygen from penetrating into the light-emitting element (ED), which is susceptible to external moisture or oxygen, an encapsulation layer (ENCAP) can be formed on the ED. The ENCAP encapsulation layer can be formed from a portion of the display area (DA) to the bezel area (BA).

[0213] The ENCAP encapsulation layer can be a single layer or a stack of multiple layers (PAS1, PCL, PAS2).

[0214] For example, when the encapsulation layer ENCAP includes multiple stacked layers (PAS1, PCL, PAS2), the encapsulation layer ENCAP may include one or more inorganic encapsulation layers (PAS1 and PAS2) and one or more organic encapsulation layers PCL. For example, the encapsulation layer ENCAP may have a stack of a first inorganic encapsulation layer PAS1, an organic encapsulation layer PCL, and a second inorganic encapsulation layer PAS2 stacked in sequence.

[0215] The overflow of the organic package layer PCL toward the pad area can be prevented or reduced by forming one or more barriers (DAM1, DAM2) in the barrier area of ​​the border area BA.

[0216] The first inorganic encapsulation layer PAS1 and the second inorganic encapsulation layer PAS2 can be stacked sequentially on the first barrier DAM1 and the second barrier DAM2.

[0217] Figure 10 An example design margin is shown in a configuration according to an aspect of this disclosure, in which the first electrode E1 and the second electrode E2 are in electrical contact with each other in a border region BA that overlaps with the light-emitting layer EL in the display panel 110.

[0218] refer to Figure 10 In one or more exemplary embodiments, the display panel 110 may include a border area mask allowance (BM allowance) for forming a border area BA outside the display area DA and a package layer allowance (ENCAP allowance) for preventing or reducing the overflow of the package layer ENCAP toward the pad area.

[0219] In this configuration, the smaller the mask margin (BM margin) of the border area, the easier it is to form a narrow border.

[0220] The first electrode E1 located in the border area BA can be electrically separated from the first electrode E1 located in the display area DA.

[0221] In the first frame region BA1, which has a relatively wide electrical contact area between the first electrode E1 and the second electrode E2, the first electrode E1 can be formed into a part of the barrier region.

[0222] In the border region BA, the light-emitting layer EL can be located on the first electrode E1, such that the light-emitting layer EL overlaps with a portion of the first electrode E1.

[0223] In one or more aspects, the display panel 110 may provide the advantages of reducing the resistance of the second electrode E2 and minimizing or reducing voltage drop by including a structure in which the second electrode E2 and the first electrode E1 are in electrical contact with each other.

[0224] Furthermore, the display panel 110 can provide the advantage of a narrow bezel by including a contact area CTA formed by cutting the light-emitting layer EL to allow electrical contact between the first electrode E1 and the second electrode E2, resulting in a sufficiently small bezel area mask margin (BM margin). For example, by cutting the light-emitting layer EL to allow the contact area CTA between the first electrode E1 and the second electrode E2, this configuration can save space and allow for a smaller bezel, such as... Figure 10 The example at the bottom shows (for example, instead of) Figure 10 The example at the top, in Figure 10 In the example at the top, the first electrode E1 and the second electrode E2 are in contact with each other at the outermost edge of the light-emitting layer EL.

[0225] In one or more aspects, in an example where the display panel 110 includes a contact area CTA in which a first electrode E1 and a second electrode E2 are electrically contacted each other in both a first border region BA1 and a second border region BA2, the first contact area formed in the first border region BA1 and the second contact area formed in the second border region BA2 may have different structures.

[0226] Figure 11 An example design margin in a configuration according to an aspect of this disclosure is shown, wherein the first electrode E1 and the second electrode E2 are electrically in contact with each other in a contact region that overlaps with the light-emitting layer EL in the second border region BA2.

[0227] refer to Figure 11In one or more exemplary embodiments, the display panel 110 may include a configuration in which a first contact area formed in a first border region BA1 and a second contact area formed in a second border region BA2 have different structures.

[0228] For example, when Figure 10 When the border area is the first border area BA1 located on the left and right sides of the display panel 110, Figure 11 The border area can be a second border area BA2 located above and below the display panel 110.

[0229] The second border area BA2 may include border area mask allowance (BM allowance) and encapsulation layer allowance (ENCAP allowance) for preventing or reducing encapsulation layer ENCAP overflow toward the pad area.

[0230] The first electrode E1 formed in the second border region BA2 can be electrically separated from the first electrode E1 formed in the display region DA. In one or more exemplary embodiments, the width of the first electrode E1 disposed in the second border region BA2 may be different from the width of the first electrode E1 disposed in the first border region BA1.

[0231] For example, the first electrode E1 disposed in the second border region BA2 may extend into the barrier region, or the first electrode E1 disposed in the second border region BA2 may not extend into the barrier region. For example, as Figure 11 As shown, the first electrode E1 can terminate within the frame region mask margin (BM margin) before reaching the barrier region.

[0232] The light-emitting layer EL can be disposed on the first electrode E1 disposed in the second frame region BA2, such that the light-emitting layer EL overlaps with a portion of the first electrode E1.

[0233] A portion of the light-emitting layer EL can be cut off, allowing the second electrode E2 on the light-emitting layer EL and the first electrode E1 below the light-emitting layer EL to make electrical contact with each other. This configuration reduces the resistance of the second electrode E2, minimizing or reducing the voltage drop.

[0234] In one or more aspects, in an example of a structure in which the display panel 110 includes a contact area CTA in which a first electrode E1 and a second electrode E2 are electrically in contact with each other in both a first border region BA1 and a second border region BA2, the first contact area formed in the first border region BA1 and the second contact area formed in the second border region BA2 may have different areas or sizes.

[0235] Figure 12This is an example plan view of a first contact area formed in a first border region BA1 in a display panel 110 according to aspects of this disclosure. Figure 13 This is an example plan view of a second contact area formed in the second border region BA2 of the display panel 110 according to aspects of this disclosure.

[0236] refer to Figure 12 In one or more exemplary embodiments, in the first border region BA1 of the display panel 110, a plurality of first contact regions CTA1 may be formed (e.g., in the form of multiple lines), in which the first electrode E1 and the second electrode E2 are electrically contacted with each other in the light-emitting layer region ELA in which the light-emitting layer EL is disposed. For example, a plurality of first contact regions CTA1 may also be formed in the light-emitting layer region ELA in which the light-emitting layer EL is disposed, in which the first electrode E1 and the second electrode E2 are electrically contacted with each other in each first contact region CTA1.

[0237] In the first border region BA1, the first electrode E1 can extend into the barrier region. Therefore, the first electrode E1 located in the first border region BA can have a larger area than the first electrode E1 located in the second border region BA2.

[0238] Since the base voltage line used to transmit the base voltage to the second electrode E2 can be located in the first frame region BA1, it may be desirable to increase the area of ​​the first contact region CTA1. With this in mind, the first contact region CTA1 can be formed as multiple lines in the light-emitting layer region ELA where the light-emitting layer EL is located within the first frame region BA1.

[0239] According to these configurations, when the first contact area CTA1 is formed as multiple lines in the first frame area BA1, the area of ​​electrical contact between the first electrode E1 and the second electrode E2 can be increased, thereby reducing the voltage drop caused by the second electrode E2.

[0240] In one or more aspects, reference Figure 13 In the second border region BA2, the second contact region CTA2, in which the first electrode E1 and the second electrode E2 are electrically connected in the light-emitting layer region ELA where the light-emitting layer EL is provided, can be formed as a single line.

[0241] The area of ​​the second contact area CTA2 set in the second border area BA2 can be smaller than the area of ​​the first contact area CTA1 set in the first border area BA1.

[0242] Since no base voltage line for transmitting the base voltage to the second electrode E2 is provided in the second border area BA2, the second contact area CTA2, which is in electrical contact with the first electrode E1 and the second electrode E2, can be formed with a relatively small width, or the second contact area CTA2 can be omitted.

[0243] Figure 13 An example is shown where the second contact area CTA2 is formed as a single line in the second border area BA2.

[0244] In one or more aspects, a dummy light-emitting layer (dummy EL) for forming dummy subpixels may be disposed in a second border region BA2. In this configuration, the light-emitting layer EL and the dummy light-emitting layer (dummy EL) of the second border region BA2 may be separated by a second contact region CTA2.

[0245] In one or more aspects, the electrical contacts of the first electrode E1 and the second electrode E2 at the location where they overlap with the light-emitting layer in the bezel area BA in the display panel 110 can be formed in various shapes.

[0246] Figure 14A , Figure 14B , Figure 14C and Figure 14D An example shape of a contact region according to an aspect of this disclosure is shown, in which the first electrode E1 and the second electrode E2 are in electrical contact with each other at a location where they overlap with the light-emitting layer EL in the border region BA.

[0247] refer to Figure 14A , Figure 14B , Figure 14C and Figure 14D In one or more exemplary embodiments, in the display panel 110, the contact area CTA where the first electrode E1 and the second electrode E2 are in electrical contact with each other may have a small dot shape.

[0248] When a high-frequency signal, such as a laser, is irradiated at a constant level onto the light-emitting layer EL formed in the border region BA, the light-emitting layer EL can be cut into dots, and then a second electrode E2 can be formed on them. According to this process, a dotted contact region CTA can be formed.

[0249] In this configuration, such as Figure 14A As shown, multiple point-like contact regions CTA, in which the first electrode E1 and the second electrode E2 are electrically in contact with each other, can also be formed in the light-emitting layer region ELA where the light-emitting layer EL is disposed. For example, multiple point-like contact regions CTA, in which the first electrode E1 and the second electrode E2 are electrically in contact with each other, can be formed in the light-emitting layer region ELA where the light-emitting layer EL is disposed.

[0250] In one or more aspects, multiple point contact areas (CTAs) may be spaced apart from each other, or may overlap in one or more portions of each or one or more of the multiple point contact areas (CTAs), depending on the location where the high-frequency signal is transmitted. For example, as Figure 14A As shown, the holes through the light-emitting layer EL used to connect the first electrode E1 and the second electrode E2 to each other can be formed in a grid configuration, but the implementation is not limited to this.

[0251] like Figure 14B As shown, multiple point-contact areas (CTAs) can overlap in the horizontal direction, such as... Figure 14C As shown, multiple point contact areas (CTAs) can overlap in the vertical direction. In one or more schemes, such as Figure 14D As shown, multiple point-contact areas (CTAs) can overlap each other in both the horizontal and vertical directions.

[0252] In one or more aspects, in the display panel 110, the contact area CTA may be formed in the first bezel area BA1, or may be formed in both the first bezel area BA1 and the second bezel area BA2.

[0253] Figure 15 An exemplary first contact area is shown in a first bezel area BA1 in a display panel 110, according to aspects of this disclosure.

[0254] refer to Figure 15 In one or more exemplary embodiments, the display panel 110 may have a first contact area CTA1 formed in a first border area BA1.

[0255] The first border area BA1 may be an area where a base voltage line is provided to apply the base voltage, and may correspond to a portion of the left and right border areas BA of the display panel 110.

[0256] In one or more aspects, the second border region BA2 may be an area in which no base voltage line is provided, and may correspond in a plan view to the portion of the border region BA located above and below the display panel 110.

[0257] In one or more aspects, the first contact region CTA1 may be formed in the shape of multiple dots, wherein the first electrode E1 and the second electrode E2 are electrically contacted with each other at the locations where they overlap with the light-emitting layer EL in the first border region BA1. For example, multiple dot-shaped first contact regions CTA1 may be formed, wherein the first electrode E1 and the second electrode E2 are electrically contacted with each other at the locations where they overlap with the light-emitting layer EL in the first border region BA1.

[0258] Figure 16Exemplary contact areas formed differently in a first border region BA1 and a second border region BA2 in a display panel 110 according to aspects of this disclosure are shown.

[0259] refer to Figure 16 In one or more exemplary embodiments, the display panel 110 may have a first contact area CTA1 formed in a first border area BA1 and a second contact area CTA2 formed in a second border area BA2, which have different structures.

[0260] The first contact area CTA1 can be formed as multiple dot shapes, in which the first electrode E1 and the second electrode E2 are electrically contacted with each other at the position where they overlap with the light-emitting layer EL in the first border area BA1. For example, multiple dot-shaped first contact areas CTA1 can be formed, wherein the first electrode E1 and the second electrode E2 are electrically contacted with each other at the position where they overlap with the light-emitting layer EL in the first border area BA1. In this configuration, the multiple dot-shaped first contact areas CTA1 can be arranged along the shape of the first border area BA1. Therefore, the first contact area CTA1 can be provided over a large area in the middle part of the first border area BA1, and the area of ​​the first contact area CTA1 can decrease towards the top and bottom of the first border area BA1.

[0261] In one or more aspects, a plurality of second contact regions CTA may be formed in a linear shape, wherein in each second contact region CTA, the first electrode E1 and the second electrode E2 are electrically contacted with each other at a position where they overlap with the light-emitting layer EL in the second border region BA2.

[0262] As described above, since the display device 100 includes a structure in which a first electrode E1, serving as an anode, and a second electrode E2, serving as a cathode, are electrically contacted with each other at a position where they overlap with the light-emitting layer EL in the frame region BA, the display device 100 can provide the advantage of reducing the resistance of the second electrode E2 and minimizing or reducing the voltage drop caused by the second electrode E2.

[0263] Furthermore, since the display device 100 includes a structure in which one or more contact areas CTA, in which the first electrode E1 and the second electrode E2 are electrically connected to each other, are formed in different shapes according to a portion of the bezel area BA, taking into account the configuration of the base voltage line for transmitting the base voltage to the second electrode E2, the display device 100 can provide the advantages of ensuring the deposition margin of the bezel area BA and achieving a narrow bezel.

[0264] The examples, aspects, and implementation methods described in this article are briefly described below.

[0265] According to one or more exemplary embodiments described herein, a display panel may be provided including a display area and a bezel area, wherein light emitted from a light-emitting element including a first electrode, a light-emitting layer, and a second electrode is presented in the display area, and the bezel area is located outside the display area and includes an auxiliary electrode that electrically contacts the second electrode at a contact area overlapping with the light-emitting layer.

[0266] In one or more aspects, the luminescent layer can extend from the display area to the border area.

[0267] In one or more aspects, the contact area may be a region of the light-emitting layer that is cut off by a high-frequency signal in the border area.

[0268] In one or more aspects, the first electrode may be an anode, and the second electrode may be a cathode. In one or more aspects, the auxiliary electrode may be separate from the first electrode and may comprise the same material as the first electrode.

[0269] In one or more aspects, the second electrode may cover the light-emitting layer in the border area.

[0270] In one or more aspects, the border region may include a disconnected region in which the second electrode and the auxiliary electrode are not electrically connected.

[0271] In one or more aspects, the border region may include a first border region and a second border region, wherein the first border region is provided with a base voltage line for transmitting a base voltage to the second electrode, and the second border region is not provided with a base voltage line. In one or more aspects, the contact region may include a first contact region provided in the first border region and a second contact region provided in the second border region, wherein the first contact region and the second contact region may have different shapes.

[0272] In one or more aspects, the first contact area may have a width smaller than that of the opening area of ​​the embankment on the light-emitting layer.

[0273] In one or more aspects, the first contact area may be provided in multiple numbers in the opening area of ​​the dike.

[0274] In one or more aspects, the first contact area can be configured as a straight line.

[0275] In one or more aspects, the first contact area can be set as multiple point shapes.

[0276] In one or more aspects, the first contact area may be provided in multiple quantities, and the corresponding portion of one or more of the first contact areas may overlap with the corresponding portion of one or more of the remaining first contact areas.

[0277] In one or more aspects, the first contact area may be set along the shape of the first border area.

[0278] In one or more aspects, the second contact area can be configured as a single straight line shape.

[0279] In one or more aspects, the second contact region may include a disconnect region, wherein the second electrode and the auxiliary electrode are not electrically connected.

[0280] In one or more aspects, the bezel region may include a barrier region, wherein one or more barriers are provided to prevent or reduce the overflow of the organic encapsulation layer in liquid form located in the display region, and an auxiliary electrode may be disposed in the barrier region. In one or more aspects, a contact region may be disposed between the display region and the barrier region.

[0281] According to one or more exemplary embodiments described herein, a display device may be provided, comprising a display panel and a driving circuit, the display panel including a display area and a bezel area, the display area displaying light emitted from a light-emitting element including a first electrode, a light-emitting layer and a second electrode, the bezel area being located outside the display area and including an auxiliary electrode electrically contacting the second electrode at a contact area overlapping with the light-emitting layer.

[0282] The above description has been presented to enable any person skilled in the art to make and use the technical ideas of this disclosure, and has been provided in the context of a particular application and its requirements. Various modifications, additions, and substitutions to the described embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments and applications without departing from the technical concept and scope of this disclosure. The above description and figures provide examples of the technical ideas of this disclosure for illustrative purposes only. That is, the disclosed embodiments are intended to illustrate the scope of the technical ideas of this disclosure.

[0283] Cross-references to related applications

[0284] This application claims priority to Korean Patent Application No. 10-2024-0143558, filed on October 21, 2024, with the Korean Intellectual Property Office, which is incorporated herein by reference for all purposes as if fully set forth herein.

Claims

1. A display panel, the display panel comprising: The display area includes a light-emitting element, which has a first electrode, a light-emitting layer, and a second electrode. as well as A border area, which is located outside the display area. The frame region includes an auxiliary electrode and a contact region, and The second electrode is in electrical contact with the auxiliary electrode at the contact area, and the contact area corresponds to at least one hole in the light-emitting layer.

2. The display panel according to claim 1, wherein, The light-emitting layer extends from the display area to the border area.

3. The display panel according to claim 1, wherein, In the contact area, the at least one hole in the light-emitting layer is formed by a high-frequency signal or a laser.

4. The display panel according to claim 1, wherein, The first electrode is the anode, and the second electrode is the cathode. The auxiliary electrode is separate from the first electrode and comprises the same material as the first electrode.

5. The display panel according to claim 4, wherein, The second electrode covers the light-emitting layer in the border area.

6. The display panel according to claim 1, wherein, The border area includes a break area, and The second electrode and the auxiliary electrode are electrically isolated from each other in the disconnected region.

7. The display panel according to claim 1, wherein, The border region includes a first border region and a second border region. The first border region includes a base voltage line configured to provide a base voltage to the second electrode, and the second border region does not include the base voltage line. The contact area includes a first contact area in the first border area and a second contact area in the second border area. The shape of the first contact area in the first border area is different from the shape of the second contact area in the second border area.

8. The display panel according to claim 7, wherein, The width of the first contact area is smaller than the width of the opening area of ​​the embankment on the light-emitting layer.

9. The display panel according to claim 8, wherein, The first contact area includes a plurality of first contact areas in the opening area of ​​the embankment.

10. The display panel according to claim 8, wherein, The first contact area has a straight line shape or a rectangular strip shape.

11. The display panel according to claim 7, wherein, The first contact area has multiple point shapes.

12. The display panel according to claim 11, wherein, The first contact area includes a plurality of first contact areas, and Among the plurality of first contact areas, at least two adjacent first contact areas overlap each other.

13. The display panel according to claim 7, wherein, The first contact area extends along the shape of the first border area.

14. The display panel according to claim 7, wherein, The second contact area has a single straight line shape or a rectangular strip shape.

15. The display panel according to claim 7, wherein, The second contact area includes a disconnection area, and The second electrode and the auxiliary electrode are electrically isolated from each other in the disconnected region.

16. The display panel according to claim 7, wherein, The second border area also includes a dummy light-emitting layer, which is separated from the light-emitting layer through the second contact area.

17. The display panel according to claim 1, wherein, The border area includes a barrier area. The barrier region includes one or more barriers configured to prevent the organic encapsulation layer in the display region from overflowing. The auxiliary electrode extends into the barrier region, and The contact area is located between the display area and the barrier area.

18. A display device, the display device comprising: The display panel includes: A display area, the display area including a light-emitting element, the light-emitting element having a first electrode, a light-emitting layer, and a second electrode; and A border area, the border area being located outside the display area, and A driving circuit, configured to drive the display panel, The frame region includes an auxiliary electrode and a contact region, and The second electrode is in electrical contact with the auxiliary electrode at the contact area, and the contact area corresponds to at least one hole in the light-emitting layer.

19. A display device, the display device comprising: Multiple sub-pixels are disposed in the display area of ​​the substrate; A first electrode layer is disposed across the display area; A light-emitting layer is disposed on the first electrode layer and extends into the border region of the substrate, the border region being located outside the display area; A second electrode layer is disposed on the light-emitting layer and extends into the border region; An auxiliary electrode is disposed in the frame area and is separated from the first electrode layer in the display area; as well as At least one hole, the at least one hole extending through the light-emitting layer in the border region, The auxiliary electrode comprises the same material as the first electrode layer, and The second electrode layer contacts the auxiliary electrode in at least one hole in the frame region.

20. The display device according to claim 19, wherein, The at least one hole extending through the light-emitting layer in the border area includes a plurality of holes arranged in a grid pattern, or Wherein, the at least one hole extending through the light-emitting layer in the border area has a strip shape or a shape with multiple overlapping points.

Images