Light emitting diode and light emitting device
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- TIANJIN SANAN OPTOELECTRONICS
- Filing Date
- 2023-08-28
- Publication Date
- 2026-04-21
AI Technical Summary
The existing light emitting diodes have shortcomings in terms of luminous brightness, luminous efficiency and reliability, and it is difficult to meet the increasing application needs.
By optimizing the barrier layer thickness and components of the quantum well structure in the active layer, the uniform distribution of carriers in the active layer is improved, the carrier aggregation is reduced, and the recombination efficiency is improved, thereby improving the luminous brightness and efficiency of the light emitting diode.
The uniform distribution of carriers and recombination efficiency are achieved, the luminous brightness and efficiency of the light emitting diodes are improved, while reducing heat generation, improving aging performance and reliability.
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Figure CN121909761A_ABST
Abstract
Description
Light-emitting diodes and light-emitting devices Technical Field
[0001] The present invention relates to the field of semiconductor manufacturing, and in particular to a light emitting diode and a light emitting device. Background Art
[0002] Light-emitting diodes (LEDs), with their advantages of high luminous intensity, high efficiency, compact size, and long life, are considered one of the most promising light sources. In recent years, LEDs have been widely used in everyday applications such as lighting, signal displays, backlighting, automotive lighting, and large-screen displays. These applications, however, place increasing demands on LED brightness, efficiency, and reliability. Technical Solutions
[0003] In order to improve the luminance, luminous efficiency and reliability of a light-emitting diode, the present invention proposes a light-emitting diode and a light-emitting device, wherein the light-emitting diode comprises: a semiconductor epitaxial stack having a first surface and a second surface relative to each other, comprising a first-type semiconductor layer, an active layer and a second-type semiconductor layer stacked in sequence from the first surface to the second surface; the active layer comprises a first active layer, a second active layer and a third active layer from the first surface to the second surface; the first active layer comprises a quantum well structure with n1 periods, the second active layer comprises a quantum well structure with n2 periods, and the third active layer comprises a quantum well structure with n3 periods; the quantum well structure of each period comprises a well layer and a barrier layer deposited in sequence, the band gap of the barrier layer being greater than the band gap of the well layer; and the light-emitting diode is characterized in that: the barrier layer thickness of the first active layer is d1, the barrier layer thickness of the second active layer is d2, and the barrier layer thickness of the third active layer is d3, and d2>d1≥d3.
[0004] In some optional embodiments, n2<n1, n2<n3.
[0005] In some optional embodiments, 12≤n1≤30; 1≤n2≤5; and 12≤n1≤30.
[0006] In some optional embodiments, the range of d1 is 4~16nm.
[0007] In some optional embodiments, the range of d2 is 20~100nm.
[0008] In some optional embodiments, the range of d3 is 2~16nm.
[0009] In some optional embodiments, the ratio of d2 to d1 is greater than 1.5.
[0010] In some optional embodiments, the well layer is made of Al x Ga 1-x InP material; the barrier layer is made of Al y Ga 1-y Composed of InP material, where 0≤x≤y≤1.
[0011] In some optional embodiments, the well layer is made of In x Ga 1‑x As material, the barrier layer is composed of Al y Ga 1‑y As material composition, where 0≤x≤1, 0≤y≤1.
[0012] In some optional embodiments, the Al component content y of the barrier layer is in the range of 0.75 to 1.0.
[0013] In some optional embodiments, the Al composition content of the barrier layer of the first active layer is y1, the Al composition content of the barrier layer of the second active layer is y2, and the Al composition content of the barrier layer of the third active layer is y3, and y1>y2>y3.
[0014] In some optional embodiments, the Al component content of the barrier layer of the first active layer is y1, the Al component content of the barrier layer of the second active layer is y2, and the Al component content of the barrier layer of the third active layer is y3, y2>y1, y2>y3.
[0015] In some optional embodiments, the Al component content of the barrier layer of the first active layer is y1, the Al component content of the barrier layer of the second active layer is y2, and the Al component content of the barrier layer of the third active layer is y3, and y1=y2=y3.
[0016] In some optional embodiments, the thickness of the well layer is 2-6 nm.
[0017] In some optional embodiments, the total thickness of the active layer is d, and the range of d is 150-600 nm.
[0018] In some optional embodiments, the range of d is 160~400nm.
[0019] In some optional embodiments, the light emitting diode includes a first electrode and a second electrode, which are electrically connected to the first type semiconductor layer and the second type semiconductor layer respectively.
[0020] In some optional embodiments, the light emitting diode includes an insulating protection layer located on the surface and sidewalls of the semiconductor epitaxial stack.
[0021] In some optional embodiments, the active layer radiates light with a wavelength of 550-950 nm.
[0022] The present invention further provides a light-emitting device, comprising any one of the aforementioned light-emitting diodes. Beneficial effects
[0023] The present invention has the following beneficial effects:
[0024] By optimizing the thickness and composition of the barrier layer of the quantum well structure in the active layer, the present invention can improve the uniform distribution of carriers in the active layer, reduce the aggregation of carriers on the second surface of the active layer, improve the recombination efficiency of carriers in the active layer, and improve the luminous brightness and luminous efficiency of the light-emitting diode; at the same time, it can reduce heat generation and improve the aging performance and reliability of the light-emitting diode.
[0025] The present invention can reduce the number of logarithms of the quantum well structure of the active layer by enhancing the confinement effect of carriers. Reducing the number of logarithms of the quantum well structure of the active layer can reduce the light absorption of the active layer; at the same time, increasing the Al component of the barrier layer can reduce the light absorption of the barrier layer, thereby improving the luminous brightness and luminous efficiency of the light-emitting diode.
[0026] Other features and advantages of the present invention will be described in the following description, and in part will become apparent from the description, or will be understood by practicing the present invention. The purposes and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the description, claims and drawings.
[0027] Although the present invention will be described below in conjunction with some exemplary implementations and methods of use, it should be understood by those skilled in the art that it is not intended to limit the present invention to these embodiments. On the contrary, it is intended to cover all substitutes, modifications and equivalents within the spirit and scope of the present invention as defined by the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In addition, the accompanying drawings are for description only and are not drawn to scale.
[0029] FIG1 is a schematic diagram of the epitaxial structure mentioned in Example 1 of the present invention.
[0030] FIG2 is a schematic structural diagram of the active layer mentioned in Example 1 of the present invention.
[0031] 3 to 5 are schematic diagrams showing the band gap variation of the epitaxial structure mentioned in Example 1 of the present invention.
[0032] FIG6 is a schematic structural diagram of the light emitting diode mentioned in Example 1 of the present invention.
[0033] 7 and 8 are schematic structural diagrams of the light emitting diode manufacturing process mentioned in Example 2 of the present invention.
[0034] FIG9 is a schematic structural diagram of the light emitting diode mentioned in Example 3 of the present invention.
[0035] 10 to 12 are schematic structural diagrams of the light emitting diode during the preparation process mentioned in Example 4 of the present invention.
[0036] FIG13 is a schematic structural diagram of the light-emitting device mentioned in Example 6 of the present invention.
[0037] Figure numerals: growth substrate: 100; buffer layer: 101; etching stop layer: 102; first ohmic contact layer: 103; first current spreading layer: 104; first covering layer: 105; active layer: 106; second covering layer: 107; second current spreading layer: 108; second ohmic contact layer: 109; substrate: 200; bonding layer: 201; mirror layer: 202; ohmic contact metal layer: 202a; dielectric material layer: 202b; first electrode: 203; second electrode: 204 bonding glue: 205; temporary substrate: 206; light-emitting device: 300; light-emitting diode: 1. Modes for Carrying Out the Invention
[0038] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention. Example 1
[0039] This embodiment provides a light-emitting diode. By optimizing the thickness and composition of the barrier layer of the quantum well structure in the active layer, the light-emitting diode can improve the uniform distribution of carriers in the active layer, reduce the aggregation of carriers on the second surface of the active layer, and improve the recombination efficiency of carriers in the active layer, thereby improving the luminous brightness and luminous efficiency of the light-emitting diode; at the same time, it can reduce heat generation and improve the aging performance and reliability of the light-emitting diode.
[0040] Figure 1 is a schematic diagram of a light-emitting diode epitaxial structure of a preferred embodiment, which includes: a growth substrate 100; a semiconductor epitaxial stack, including a first current spreading layer 104, a first cover layer 105, a first spacer layer 106, an active layer 107, a second spacer layer 108, a second cover layer 109, a second current spreading layer 110, and a second ohmic contact layer 111, which are sequentially stacked on the growth substrate 100.
[0041] Specifically, referring to Figure 1 , the material of the growth substrate 100 includes, but is not limited to, GaAs; other materials, such as GaP and InP, may also be used. In this embodiment, a GaAs growth substrate 100 is used as an example. Optionally, a buffer layer 101, an etch stop layer 102, and a first ohmic contact layer 103 are sequentially disposed between the growth substrate 100 and the first current spreading layer 104. Since the lattice quality of the buffer layer 101 is superior to that of the growth substrate 100, growing the buffer layer 101 on the growth substrate 100 facilitates eliminating the effects of lattice defects of the growth substrate 100 on the semiconductor epitaxial stack. The etch stop layer 102 serves as a stop layer for chemical etching in subsequent steps. In some optional embodiments, the etch stop layer 102 is an n-type etch stop layer made of n-GaInP. To facilitate subsequent removal of the growth substrate 100, its thickness is controlled to be within 500 nm, more preferably within 200 nm. In some optional embodiments, the ohmic contact layer 103 is made of GaAs material with a thickness ranging from 10 to 100 nm and a doping concentration ranging from 1 to 10E+18 / cm 3 , preferably 2E18 / cm 3 , to achieve better ohmic contact results.
[0042] The semiconductor epitaxial stack can be formed on the growth substrate 100 by physical vapor deposition (PVD), chemical vapor deposition (CVD), epitaxial growth technology (Epitaxy Growth Technology), atomic layer deposition (ALD), and other methods. The semiconductor epitaxial stack is made of a semiconductor material capable of providing conventional radiation such as ultraviolet, blue, green, yellow, red, and infrared light. Specifically, it can be a material with a wavelength of 200 to 950 nm, such as a common nitride, specifically a gallium nitride-based semiconductor epitaxial stack, which is commonly doped with elements such as aluminum and indium and primarily provides radiation in the 200 to 550 nm band; or a common aluminum gallium indium phosphide-based or aluminum gallium arsenide-based semiconductor epitaxial stack, which primarily provides radiation in the 550 to 950 nm band.
[0043] The semiconductor epitaxial stack has opposing first and second surfaces, and comprises a first-type semiconductor layer, an active layer, and a second-type semiconductor layer stacked sequentially from the first surface to the second surface. The first-type semiconductor layer and the second-type semiconductor layer can be n-type doped or p-type doped, respectively, to provide at least electrons or holes, respectively. The n-type semiconductor layer can be doped with an n-type dopant such as Si, Ge, or Sn, and the p-type semiconductor layer can be doped with a p-type dopant such as Mg, Zn, Ca, Sr, C, or Ba. When the first-type semiconductor layer is an n-type semiconductor, the second-type semiconductor layer is a p-type semiconductor layer; when the first-type semiconductor layer is a p-type semiconductor layer, the second-type semiconductor layer is an n-type semiconductor layer. The first-type semiconductor layer, the active layer, and the second-conductivity-type semiconductor layer can be made of materials such as aluminum gallium indium nitride, gallium nitride, aluminum gallium nitride, aluminum indium phosphide, aluminum gallium indium phosphide, gallium arsenide, or aluminum gallium arsenide. In this embodiment, the first-type semiconductor layer is preferably an n-type semiconductor layer, and the second-type semiconductor layer is preferably a p-type semiconductor layer.
[0044] The first-type semiconductor layer and the second-type semiconductor layer respectively include a first cover layer 105 and a second cover layer 109, such as aluminum gallium indium phosphide or aluminum indium phosphide or aluminum gallium arsenide, which provide electrons or holes to the active layer 107. More preferably, when the material of the active layer 107 is aluminum gallium indium phosphide, aluminum indium phosphide serves as the first cover layer 105 and the second cover layer 109 to provide electrons and holes. In order to improve the uniformity of current spreading, the first-type semiconductor layer and the second-type semiconductor layer further include a first current spreading layer 104 and a second current spreading layer 110. In order to prevent dopants in the first cover layer 105 and the second cover layer 109 from diffusing into the active layer 107 and affecting the crystal quality of the active layer 107, it is preferred that a first spacer layer 106 is provided between the first cover layer 105 and the active layer 107; and a second spacer layer 108 is provided between the second cover layer 109 and the active layer 107.
[0045] The first current spreading layer 104 plays the role of current spreading, and its spreading ability is related to its thickness. In this embodiment, the preferred material is Al y1 Ga 1-y1 InP, thickness is 2500~4000nm, and the n-type doping concentration is 4E17~8E17 / cm 3 The most common n-type doping is Si doping, but equivalent substitutions of other elements are not excluded.
[0046] The first spacer layer 106 is located between the first cover layer 105 and the active layer 107, and is preferably made of Al a1 Ga 1-a1InP, the thickness of the first spacer layer 106 is preferably less than 300nm, the Al component content a1 ranges from 0.3 to 1; the doping concentration is lower than 1E17 / cm 3 .
[0047] In this embodiment, the first cover layer 105 provides electrons for the active layer, and its preferred material is AlInP with a thickness of 300-1500 nm. Si doping is common for n-type doping, and other equivalent elements may be used as substitutes.
[0048] The active layer 107 provides a light radiation region for electron and hole recombination. Different materials can be selected depending on the emission wavelength. The active layer 107 can have a periodic structure of a single quantum well or multiple quantum wells. In this embodiment, the active layer 107 preferably has a periodic structure of multiple quantum wells. In this embodiment, the active layer 107 includes a first active layer 1071, a second active layer 1072, and a third active layer 1073. The first active layer 1071 includes a quantum well structure with n1 periods, the second active layer 1072 includes a quantum well structure with n2 periods, and the third active layer 1073 includes a quantum well structure with n3 periods. Each quantum well structure includes a well layer and a barrier layer deposited sequentially, wherein the barrier layer has a larger band gap than the well layer. Figure 2 is a schematic structural diagram of the active layer in this embodiment. As shown in Figure 2, the active layer 107 includes a first active layer 1071 formed by n1 periods of alternately stacked well layers 1071a and barrier layers 1071b, a second active layer 1072 formed by n2 periods of alternately stacked well layers 1072a and barrier layers 1072b, and a third active layer 1073 formed by n3 periods of alternately stacked well layers 1073a and barrier layers 1073b.
[0049] The target wavelength of light can be radiated by adjusting the composition ratio of the semiconductor materials in active layer 107. Active layer 107 is a layer of material that provides electroluminescent radiation, such as aluminum gallium indium phosphide (AlGaInP) or aluminum gallium arsenide (AlGaAs), more preferably AlGaInP, with AlGaInP forming a single quantum well or multiple quantum wells. In this embodiment, the semiconductor epitaxial stack is preferably composed of AlGaInP- or GaAs-based materials, and the active layer radiates light with a wavelength of 550 to 950 nm.
[0050] In some optional embodiments, the period number n2 of the second active layer 1072 is less than the period number n1 of the first active layer 1071 and the period number n3 of the third active layer 1073, i.e., n2 < n1, n2 < n3. In some optional embodiments, 12 ≤ n1 ≤ 30; 1 ≤ n2 ≤ 5; and 12 ≤ n1 ≤ 30. The barrier layer 1071b of the first active layer 1071 has a thickness of d1, the barrier layer 1072b of the second active layer 1072 has a thickness of d2, and the barrier layer 1073b of the third active layer 1073 has a thickness of d3, where d2 > d1 ≥ d3. In some optional embodiments, the ratio of d2 to d1 is preferably greater than 1.5, and more preferably greater than 2 or greater than 3.
[0051] In some optional embodiments, d1 ranges from 4 to 16 nm, more preferably from 5 to 10 nm; in some optional embodiments, d2 ranges from 20 to 100 nm, more preferably from 40 to 70 nm; and in some optional embodiments, d3 ranges from 2 to 16 nm, more preferably from 2 to 5 nm. The well layers of the first, second, and third active layers 1071, 1072, and 1073 preferably have the same thickness, preferably ranging from 2 to 6 nm, more preferably from 2 to 4 nm. This embodiment adjusts the structure of the active layer, with the barrier layer of the second active layer being thicker than the barrier layers of the first and third active layers. This reduces electron overflow, improves the uniform distribution of carriers in the active layer, and increases the recombination efficiency of carriers in the active layer, thereby improving the brightness and luminous efficiency of the light-emitting diode.
[0052] In some optional embodiments, the well layer is made of Al x Ga 1-x InP material; the barrier layer is made of Al y Ga 1-y InP material, where 0≤x≤y≤1. In some optional embodiments, the well layer is composed of InxGa1-xAs material, and the barrier layer is composed of AlyGa1-yAs material, where 0≤x≤1, 0≤y≤1. In some optional embodiments, the Al component content y of the barrier layer ranges from 0.75 to 1.0. By increasing the Al component content of the barrier layer, the barrier layer can enhance the carrier confinement effect, while increasing the intrinsic wavelength of the barrier layer and reducing the intrinsic absorption of the barrier layer, thereby improving the luminous brightness and luminous efficiency of the light-emitting diode.
[0053] Figures 3 through 5 are schematic diagrams of the bandgap of the epitaxial structure described in this embodiment. As shown in Figure 3, the Al content of the barrier layer of the first active layer is y1, the Al content of the barrier layer of the second active layer is y2, and the Al content of the barrier layer of the third active layer is y3, where y1 = y2 = y3. The same Al content in the first, second, and third active layers effectively reduces the potential barriers between the materials and lowers the resistance within the active layers. This can be applied to small-sized chips, reducing the voltage of the light-emitting diode.
[0054] In some optional embodiments, as shown in Figure 4, the Al composition content of the barrier layer of the first active layer is y1, the Al composition content of the barrier layer of the second active layer is y2, and the Al composition content of the barrier layer of the third active layer is y3, where y1>y2>y3. By having the Al composition content of the barrier layer of the first active layer be greater than the Al composition content of the second and third active layers, electron overflow can be reduced, the uniform distribution of carriers in the active layer can be improved, and the recombination efficiency of carriers in the active layer can be improved, thereby improving the brightness and luminous efficiency of the light-emitting diode.
[0055] In some optional embodiments, as shown in Figure 5, the Al composition content of the barrier layer of the first active layer is y1, the Al composition content of the barrier layer of the second active layer is y2, and the Al composition content of the barrier layer of the third active layer is y3, y2>y1, y2>y3. By increasing the Al composition content of the second active layer to be higher than the Al composition content of the first active layer and the third active layer, electron overflow can be reduced, electron aggregation on the second surface side of the active layer can be reduced, the recombination efficiency of electrons and holes can be improved, and the brightness of the light-emitting diode can be improved.
[0056] In this embodiment, by adjusting the relationship between the Al component contents of the barrier layers in the first active layer 1071, the second active layer 1072, and the third active layer 1073, the overflow of electrons can be further reduced, the uniformity of the distribution of carriers in the active layer can be improved, and the recombination efficiency of carriers in the active layer can be improved, thereby improving the luminous efficiency and brightness of the light-emitting diode.
[0057] This embodiment, by adjusting the Al composition and thickness of the active layer barrier, enhances carrier confinement, improves carrier recombination efficiency in the active layer, and reduces heat generation, thereby improving the aging and reliability of the LED. Furthermore, the number of active layer periods can be further reduced, reducing light absorption by the active layer, thereby improving the brightness and luminous efficiency of the LED.
[0058] The second spacer layer 108 is located on the active layer 107. The material of the second spacer layer 108 is preferably Al b2 Ga 1-b2InP, the thickness of the second spacer layer 108 is preferably less than 300nm, the Al component content b1 of the second spacer layer 108 is in the range of 0.3 to 1, preferably the Al component content b1 is greater than 0.5 and less than or equal to 1; the doping concentration is lower than 1E17 / cm 3 The second spacer layer 108 is a single-layer structure or a multi-layer structure, and its Al component content is constant or gradually increases from the first surface to the second surface.
[0059] The second type semiconductor layer includes a second covering layer 109, a second current spreading layer 110 and a second ohmic contact layer 111; wherein the second covering layer 109 is used to provide holes for the active layer 107, and the preferred material is AlInP with a thickness of 300-1500 nm; the common p-type doping is Mg doping, and other equivalent elements are not excluded.
[0060] The second current spreading layer 110 functions to spread the current. Its spreading capacity is related to its thickness. Therefore, in this embodiment, its thickness can be selected based on the specific device size, preferably between 300 nm and 12,000 nm. In this embodiment, the thickness of the second current spreading layer 110 is preferably between 500 nm and 10,000 nm. In this embodiment, the preferred material is GaP, with a p-type doping concentration of 6E17 / cm2 to 2E18 / cm3. 3 , magnesium doping is common for p-type doping, but equivalent substitutions of other elements are not excluded.
[0061] The second ohmic contact layer 111 forms an ohmic contact with the second electrode 204. The preferred material is GaP with a doping concentration of 1E19 / cm 3 , more preferably 5E19 / cm 3 The thickness of the second ohmic contact layer 111 is preferably greater than 40 nm and less than 150 nm. In this embodiment, the thickness of the second ohmic contact layer 110 is preferably 60 nm.
[0062] In this embodiment, by optimizing and adjusting the barrier layer thickness and composition of the quantum well structure in the active layer, the uniform distribution of carriers in the active layer can be improved, the aggregation of carriers on the second surface of the active layer can be reduced, the recombination efficiency of carriers in the active layer can be improved, and the luminous brightness and luminous efficiency of the light-emitting diode can be improved; at the same time, the heat generation can be reduced, and the aging performance and reliability of the light-emitting diode can be improved.
[0063] Figure 6 shows a schematic diagram of a light-emitting diode, which adopts the epitaxial structure in Figure 1. The light-emitting diode includes a substrate 200, and the semiconductor epitaxial stack is bonded to the substrate 200 via a bonding layer 201. The semiconductor epitaxial stack includes a second ohmic contact layer 111, a second current spreading layer 110, a second cover layer 109, a second spacer layer 108, an active layer 107, a first spacer layer 106, a first cover layer 105, a first current spreading layer 104 and a first ohmic contact layer 103 stacked in sequence on the substrate 200.
[0064] The substrate 200 is a conductive substrate. The conductive substrate can be silicon, silicon carbide, or a metal substrate. The metal substrate is preferably a copper, tungsten, or molybdenum substrate. To provide sufficient mechanical strength to support the semiconductor epitaxial stack, the thickness of the substrate 200 is preferably 50 μm or greater. In addition, to facilitate mechanical processing of the substrate 200 after bonding to the semiconductor epitaxial stack, the thickness of the substrate 200 is preferably no more than 300 μm. In this embodiment, the substrate 200 is preferably a silicon substrate.
[0065] A first electrode 203 is disposed on the first ohmic contact layer 103, forming an ohmic contact with the first ohmic contact layer 103 to facilitate current flow. Only the portion of the first ohmic contact layer 103 vertically below the first electrode 203 remains. The first current spreading layer 104 comprises two horizontal portions: a portion P1 located below the first electrode 203 and an exposed portion P2 not located below the first electrode 203, defining the light-emitting surface. The light-emitting surface of the first current spreading layer 104 can be formed surrounding the first electrode 203. The light-emitting surface can be further patterned or roughened by etching, where the patterned surface can be etched to form a pattern. The roughened surface can have a regular surface structure or any irregular micro- or nanostructure. A roughened or patterned surface, which is essentially a light-emitting layer, allows light to escape more easily, thereby improving light extraction efficiency. Preferably, the light-emitting surface is a roughened surface, and the height difference (or height difference) of the roughened surface structure is less than 1 micron, preferably 10 to 300 nm.
[0066] The first current spreading layer 104 includes a second surface portion P1 located only below the first electrode 203, which is protected from roughening by the first electrode 203. Due to the roughening process, the level of the roughened surface of the first current spreading layer 104 is substantially lower than the level of the second surface (interface) located below the first electrode 203.
[0067] Specifically, as shown in Figure 6, in this embodiment, the first current spreading layer 104 includes a portion P1 located below the first electrode 203 and a portion P2 located outside the first electrode 203. The first current spreading layer 104 has a first thickness t1 in the portion P1 covered by the electrode, and a second thickness t2 in the portion not covered by the first electrode. Preferably, the first thickness t1 is 1.5 to 2.5 microns, and the second thickness t2 is 0.5 to 1.5 μm. The thickness t1 of the portion P1 is greater than the thickness t2 of the portion P2. Preferably, the first thickness t1 is at least 0.3 μm greater than the second thickness t2.
[0068] A mirror layer 202 may be provided between the semiconductor epitaxial stack and the substrate 200. The mirror layer 202 includes a P-type ohmic contact metal layer 202a and a dielectric material layer 202b. The mirror layer 202a and the dielectric material layer 202b cooperate to form an ohmic contact with the second ohmic contact layer 110 on the one hand, and to reflect the light beam emitted by the active layer 106 to the light-emitting surface of the first current spreading layer 104 or the sidewall of the semiconductor epitaxial stack for light emission.
[0069] The light emitting diode further includes a second electrode 204. In some embodiments, the second electrode 204 is located on the back side of the substrate 200. Alternatively, the second electrode 204 is located on the substrate 200 on the same side as the semiconductor epitaxial stack.
[0070] The first electrode 203 and the second electrode 204 include a transparent conductive material and / or a metal material. The transparent conductive material includes a transparent conductive layer, such as ITO or IZO, and the metal material includes at least one of GeAuNi, AuGe, AuZn, Au, Al, Pt, and Ti.
[0071] In this embodiment, by optimizing and adjusting the barrier layer thickness and composition of the quantum well structure in the active layer, the uniform distribution of carriers in the active layer can be improved, the aggregation of carriers on the second surface of the active layer can be reduced, the recombination efficiency of carriers in the active layer can be improved, and the luminous brightness and luminous efficiency of the light-emitting diode can be improved; at the same time, the heat generation can be reduced, and the aging performance and reliability of the light-emitting diode can be improved.
[0072] After the photoelectric performance test of a single light-emitting diode chip (with a horizontal chip size of 14 mil*14 mil) of this embodiment was conducted, the brightness of this embodiment was improved by about 30%.
[0073] After packaging a single LED chip (14 mil*14 mil horizontal chip size) in this embodiment, a multi-point aging performance test was performed. Under a fixed test current, the luminous flux (Flux) attenuation was measured at different time points. During the multi-point aging performance test, the aging performance improved by approximately 30%. Example 2
[0074] 7 and 8 show schematic diagrams of the manufacturing process of the light emitting diode according to the first embodiment. The manufacturing method of the light emitting diode of the present embodiment will be described in detail below with reference to the schematic diagrams.
[0075] First, as shown in FIG1 , an epitaxial structure is provided, which specifically includes the following steps: providing a growth substrate 100, and epitaxially growing a semiconductor epitaxial stack by an epitaxial process such as MOCVD, wherein the semiconductor epitaxial stack includes a buffer layer 101 and an etching stop layer 102 sequentially stacked on the surface of the growth substrate 100, for removing the epitaxial growth substrate 100, and then growing a first ohmic contact layer 103, a first current spreading layer 104, a first covering layer 105, a first spacer layer 106, an active layer 107, a second spacer layer 108, a second covering layer 109, a second current spreading layer 110, and a second ohmic contact layer 111.
[0076] In this embodiment, the growth substrate 100 is a commonly used GaAs substrate, and the material of the buffer layer 101 is set according to the growth substrate 100. It should be noted that the growth substrate 100 is not limited to GaAs, and other materials, such as GaP, InP, etc., can also be used. The configuration and material of the corresponding buffer layer 101 can be selected according to the specific growth substrate 100. An etch stop layer 102, such as GaInP, is provided on the buffer layer 101. To facilitate subsequent removal of the growth substrate 100, a relatively thin etch stop layer 102 is preferably provided, with a thickness controlled within 500 nm, more preferably within 200 nm.
[0077] In this embodiment, the first current spreading layer 104 is preferably made of Al. x1 Ga 1-x1 InP, thickness is 2500~4000nm, and the n-type doping concentration is 4E17~8E17 / cm 3 The first cover layer 105 provides electrons for the active layer, and is preferably made of AlInP with a thickness of 300-1500 nm. Si doping is common for n-type doping, but other equivalent elements may be used.
[0078] The preferred material of the first spacer layer is Al a1 Ga 1-a1 InP, the thickness of the first spacer layer 106 is preferably less than 300nm, the Al component content a1 ranges from 0.3 to 1; the doping concentration is lower than 1E17 / cm 3 .
[0079] The active layer 106 is a multi-quantum well, made of Al x Ga 1-x InP / Al y Ga1-y InP (0≤x≤y≤1) has a structure of repeatedly stacked wells and barriers. In this embodiment, the active layer 107 preferably includes a first active layer 1071, a second active layer 1072, and a third active layer 1073. The thickness d2 of the barrier layer 1072b of the second active layer 1072 is greater than the thickness d1 of the barrier layer 1071b of the first active layer 1071 and the thickness d3 of the barrier layer 1073b of the third active layer 1073. Moreover, the thickness d1 of the barrier layer 1071b of the first active layer 1071 is greater than or equal to the thickness d3 of the barrier layer 1073b of the third active layer 1073. By adjusting the thickness of the active layer, electron overflow can be reduced, the uniform distribution of carriers in the active region can be improved, and the recombination efficiency of carriers in the active layer can be improved, thereby improving the luminous brightness and luminous efficiency of the light-emitting diode.
[0080] The Al component content of the barrier layer of the first active layer is y1, the Al component content of the barrier of the second active layer is y2, and the Al component content of the barrier of the third active layer is y3. In some optional embodiments, y1=y2=y3; in some optional embodiments, y1>y2>y3; in some optional embodiments, y2>y1, y2>y3.
[0081] The material of the second spacer layer 108 is preferably Al b2 Ga 1-b2 InP, the thickness of the second spacer layer 108 is preferably less than 300nm, the Al component content b1 of the second spacer layer 107 is in the range of 0.3 to 1; the doping concentration is lower than 1E17 / cm 3 .
[0082] The second capping layer 109 is used to provide holes for the quantum well. The preferred material is AlInP with a thickness of 300-1500 nm. P-type doping is commonly done with Mg, but other equivalent elements may also be used.
[0083] The second current spreading layer 110 plays a role in current spreading. Its spreading capacity is related to its thickness. In this embodiment, the thickness of the second current spreading layer 110 is preferably 500-10000 nm. In this embodiment, the preferred material is GaP, and the p-type doping concentration is 6E17-2E18 / cm 3 , magnesium doping is common for p-type doping, but equivalent substitutions of other elements are not excluded.
[0084] The second ohmic contact layer 110 forms an ohmic contact with the second electrode 204. The preferred material is GaP with a doping concentration of 1E19 / cm 3 , more preferably 5E19 / cm 3The thickness of the second ohmic contact layer 109 is preferably greater than 40 nm and less than 150 nm. In this embodiment, the thickness of the second ohmic contact layer 110 is preferably 60 nm.
[0085] Next, the semiconductor epitaxial stack is transferred to the substrate 200, and the growth substrate 100 is removed to obtain the structure shown in Figure 7, which specifically includes the following steps: forming a mirror layer 202 on the second ohmic contact layer 111, which includes an ohmic contact metal layer 202a and a dielectric material layer 202b. The two layers cooperate to form an ohmic contact with the second ohmic contact layer 111 on the one hand, and to reflect light emitted downward from the active layer on the other hand; providing a substrate 200, setting a metal bonding layer 201 on the substrate 200, bonding the substrate 201 to the mirror layer 202, and removing the growth substrate 100. When the growth substrate 100 is gallium arsenide, it can be removed by a wet etching process until the first ohmic contact layer 103 is exposed.
[0086] Next, as shown in FIG8 , a first electrode 203 is formed on the first ohmic contact layer 103 . The first electrode 203 forms a good ohmic contact with the first ohmic contact layer 103 . A second electrode 204 is formed on the back side of the substrate 200 . This allows current to flow between the first electrode 203 and the second electrode 204 and the semiconductor epitaxial stack. The substrate 200 has a certain thickness to support all layers thereon.
[0087] Next, a mask is formed to cover the first electrode 203, exposing the first ohmic contact layer 103 around the first electrode 203. An etching process is performed to remove the first ohmic contact layer 103 around the first electrode 203, completely removing the portion of the ohmic contact layer 103 not located below the first electrode 203 and exposing the first current spreading layer 104. The first current spreading layer 104 is then etched to form a patterned or roughened surface, resulting in the structure shown in FIG6 . The ohmic contact layer removal process and the roughening of the first current spreading layer 104 can be performed in the same or multiple wet etching steps. The wet etching solution can be an acidic solution, such as hydrochloric acid, sulfuric acid, hydrofluoric acid, citric acid, or any other preferred chemical reagent.
[0088] Finally, according to size requirements, unitized invisible light emitting diodes are obtained through etching, cleavage and other processes. Example 3
[0089] Figure 9 shows a schematic diagram of a light-emitting diode in another embodiment, which adopts the epitaxial structure shown in Figure 1. The light-emitting diode includes a substrate 200, and the semiconductor epitaxial stack is bonded to the substrate 200 via a bonding layer 201. The semiconductor epitaxial stack includes a first ohmic contact layer 103, a first current spreading layer 104, a first covering layer 105, a first spacer layer 106, an active layer 107, and a second spacer layer 108; a second covering layer 109, a second current spreading layer 110, and a second ohmic contact layer 111 stacked in sequence on the substrate 200.
[0090] The substrate 200 is a conductive substrate. The conductive substrate can be silicon, silicon carbide, or a metal substrate. The metal substrate is preferably a copper, tungsten, or molybdenum substrate. To provide sufficient mechanical strength to support the semiconductor epitaxial stack, the thickness of the substrate 200 is preferably greater than 50 μm. In addition, to facilitate mechanical processing of the substrate 200 after bonding to the semiconductor epitaxial stack, the thickness of the substrate 200 is preferably no more than 300 μm. In this embodiment, the substrate 200 is preferably a copper substrate.
[0091] A second electrode 204 is disposed on the second ohmic contact layer 111, forming an ohmic contact with the second ohmic contact layer 111 to facilitate current flow. Only the portion of the second ohmic contact layer 111 vertically below the second electrode 204 remains. The second current spreading layer 110 comprises two horizontal portions: a portion P3 located below the second electrode 204 and an exposed portion P4 not located below the second electrode 204, defining the light-emitting surface. The light-emitting surface of the second current spreading layer 110 can be formed around the second electrode 204. The light-emitting surface can be further patterned or roughened by etching, where the patterned surface can be etched to form a pattern. The roughened surface can have a regular surface structure or any irregular micro- or nanostructure. A roughened or patterned surface allows light from the light-emitting layer to escape more easily, improving light extraction efficiency. Preferably, the light-emitting surface is a roughened surface, and the height difference (or height difference) of the roughened surface structure is less than 1 micron, preferably 10 to 300 nm.
[0092] The second current spreading layer 110 includes a second surface portion P3 located only below the second electrode 204, which is protected from roughening by the second electrode 204. Due to the roughening process, the level of the roughened surface of the second current spreading layer 110 is substantially lower than the level of the second surface (interface) located below the second electrode 204.
[0093] Specifically, as shown in Figure 9, in this embodiment, the second current spreading layer 110 includes a portion P3 located below the second electrode 204 and a portion P4 located outside the second electrode 204. The second current spreading layer 110 has a first thickness t3 in the portion P3 covered by the electrode, and a second thickness t4 in the portion not covered by the second electrode. Preferably, the first thickness t3 is 1.5 to 2.5 microns, and the second thickness t4 is 0.5 to 1.5 μm. The thickness t3 of the portion P3 is greater than the thickness t4 of the portion P4. Preferably, the first thickness t3 is at least 0.3 μm greater than the second thickness t4.
[0094] A mirror layer 202 may be provided between the semiconductor epitaxial stack and the substrate 200. The mirror layer 202 includes an ohmic contact metal layer 202a and a dielectric material layer 202b. The mirror layer 202a and the dielectric material layer 202b cooperate to form an ohmic contact with the first ohmic contact layer 103 on the one hand, and to reflect the light beam emitted by the active layer 106 to the light-emitting surface of the second current spreading layer 110 or the sidewall of the semiconductor epitaxial stack for light emission.
[0095] The light emitting diode further includes a first electrode 203. In some embodiments, the first electrode 203 is located on the back side of the substrate 200. Alternatively, the first electrode 203 is located on the substrate 200 on the same side as the semiconductor epitaxial stack.
[0096] The first electrode 203 and the second electrode 204 include a transparent conductive material and / or a metal material. The transparent conductive material includes a transparent conductive layer, such as ITO or IZO, and the metal material includes at least one of GeAuNi, AuGe, AuZn, Au, Al, Pt, and Ti.
[0097] In order to improve the reliability of the light emitting diode, an insulating protective layer (not shown in the figure) is provided on the surface and sidewall of the light emitting diode. The insulating protective layer is a single layer or multilayer structure composed of SiO2, SiN x , Al2O3, Ti3O5 is formed by at least one material. Example 4
[0098] 10 to 12 show schematic diagrams of the manufacturing process of the light emitting diode in Example 3. The manufacturing method of the light emitting diode of this embodiment will be described in detail below with reference to the schematic diagrams.
[0099] First, as shown in FIG1 , an epitaxial structure is provided, which specifically includes the following steps: providing a growth substrate 100, and epitaxially growing a semiconductor epitaxial stack by an epitaxial process such as MOCVD, wherein the semiconductor epitaxial stack includes a buffer layer 101 and an etching stop layer 102 sequentially stacked on the surface of the growth substrate 100, for removing the epitaxial growth substrate 100, and then growing a first ohmic contact layer 103, a first current spreading layer 104, a first covering layer 105, a first spacer layer 106, an active layer 107, a second spacer layer 108, a second covering layer 109, a second current spreading layer 110, and a second ohmic contact layer 111.
[0100] Then, referring to FIG. 10 , a second electrode 204 is formed on the second ohmic contact layer 110 , and the semiconductor epitaxial stack is bonded to a temporary substrate 206 by a bonding adhesive 205 . The bonding adhesive 205 is preferably BCB adhesive, and the temporary substrate 206 is preferably a glass substrate.
[0101] Then, a wet etching method is used to remove the growth substrate 100, the buffer layer 101 and the etching stop layer 102 to expose the first ohmic contact layer 103. A mirror layer 202 is formed on the first ohmic contact layer 103, which includes an ohmic contact metal layer 202a and a dielectric material layer 202b. The two layers cooperate to form an ohmic contact with the first ohmic contact layer 103 on the one hand, and to reflect light emitted downward from the active layer on the other hand. A substrate 200 is provided, and a metal bonding layer 201 is set on the substrate 200. The substrate 201 and the mirror layer 202 are bonded to obtain the structure shown in Figure 11.
[0102] Next, the temporary substrate 206 is removed by wet etching, forming a mask covering the second electrode 204, exposing the second ohmic contact layer 111 around the second electrode 204. An etching process is then performed to remove the second ohmic contact layer 111 around the second electrode 204, completely removing the second ohmic contact layer 111 not located below the second electrode 204 and exposing the second current spreading layer 110. The second current spreading layer 110 is then etched to form a patterned or roughened surface, resulting in the structure shown in FIG12 . The removal of the second ohmic contact layer 111 and the roughening of the second current spreading layer 110 can be performed in the same or multiple wet etching steps. The wet etching solution can be an acidic solution, such as hydrochloric acid, sulfuric acid, hydrofluoric acid, citric acid, or any other preferred chemical reagent.
[0103] Finally, a first electrode 203 is formed on the back surface of the substrate 200 , and unitized light emitting diodes are obtained through etching, splitting and other processes according to size requirements, as shown in FIG9 . Example 5
[0104] This embodiment provides a light emitting device 300. Please refer to FIG13. The light emitting device 300 includes a plurality of light emitting diodes arranged in an array as in any of the aforementioned embodiments. FIG13 schematically shows a portion of the light emitting diodes 1 in an enlarged manner.
[0105] In this embodiment, the light emitting device 300 may be a plant lighting product, a military aircraft instrument panel, a stage light, a projector, or a display screen.
[0106] The light-emitting diode in the light-emitting device 300 adopts the light-emitting diode of the present invention. The light-emitting diode can improve the uniform distribution of carriers in the active layer, reduce the aggregation of carriers on the second surface of the active layer, improve the recombination efficiency of carriers in the active layer, and improve the luminous brightness and luminous efficiency of the light-emitting diode by optimizing and adjusting the thickness and composition of the barrier layer of the quantum well structure in the active layer; at the same time, it can reduce the generation of heat and improve the aging performance and reliability of the light-emitting diode.
[0107] It should be noted that the above embodiments are only used to illustrate the present invention, and are not used to limit the present invention. Those skilled in the art can make various modifications and changes to the present invention without departing from the spirit and scope of the present invention. Therefore, all equivalent technical solutions also fall within the scope of the present invention. The scope of patent protection of the present invention should be limited to the scope of the claims.
Claims
1. Light emitting diodes, including: A semiconductor epitaxial stack having a first surface and a second surface opposite to each other, and including a first type semiconductor layer, an active layer and a second type semiconductor layer stacked in sequence from the first surface to the second surface; The active layer includes a first active layer, a second active layer and a third active layer from the first surface to the second surface; The first active layer includes a quantum well structure with n1 periods, the second active layer includes a quantum well structure with n2 periods, and the third active layer includes a quantum well structure with n3 periods; The quantum well structure of each period includes a well layer and a barrier layer deposited in sequence, and the band gap of the barrier layer is larger than the band gap of the well layer; The invention is characterized in that: the thickness of the barrier layer of the first active layer is d1, the thickness of the barrier layer of the second active layer is d2, the thickness of the barrier layer of the third active layer is d3, and d2>d1≥d3.
2. The light emitting diode according to claim 1, characterized in that: n2<n1, n2<n3.
3. The light emitting diode according to claim 1, characterized in that: 12≤n1≤30;1≤n2≤5;12≤n1≤30.
4. The light emitting diode according to claim 1, characterized in that: The range of d1 is 4~16nm.
5. The light emitting diode according to claim 1, characterized in that: The range of d2 is 20~100nm.
6. The light emitting diode according to claim 1, characterized in that: The range of d3 is 2~16nm.
7. The light emitting diode according to claim 1, characterized in that: The ratio of d2 to d1 is greater than 1.
5.
8. The light emitting diode according to claim 1, characterized in that: The well layer is made of Al x Ga 1-x InP material; the barrier layer is composed of Al y Ga 1-y InP material composition, where 0≤x≤y≤1.
9. The light emitting diode according to claim 1, characterized in that: The well layer is composed of In x Ga 1‑x As material, the barrier layer is composed of Al y Ga 1‑y As material composition, where 0≤x≤1, 0≤y≤1.
10. The light emitting diode according to claim 8 or claim 9, characterized in that: The Al component content y of the barrier layer is in the range of 0.75-1.
0.
11. The light emitting diode according to claim 8 or claim 9, characterized in that: Assume that the Al component content of the barrier layer of the first active layer is y1, the Al component content of the barrier layer of the second active layer is y2, and the Al component content of the barrier layer of the third active layer is y3, y1>y2>y3.
12. The light emitting diode according to claim 8 or claim 9, characterized in that: Assume that the Al component content of the barrier layer of the first active layer is y1, the Al component content of the barrier layer of the second active layer is y2, and the Al component content of the barrier layer of the third active layer is y3, y2>y1, y2>y3.
13. The light emitting diode according to claim 8 or claim 9, characterized in that: Assuming that the Al component content of the barrier layer of the first active layer is y1, the Al component content of the barrier layer of the second active layer is y2, and the Al component content of the barrier layer of the third active layer is y3, y1=y2=y3.
14. The light emitting diode according to claim 1, characterized in that: The thickness of the well layer is 2-6 nm.
15. The light emitting diode according to claim 1, characterized in that: Assume that the total thickness of the active layer is d, and the range of d is 150-600 nm.
16. The light emitting diode according to claim 15, characterized in that: The range of d is 160~400nm.
17. The light emitting diode according to claim 1, characterized in that: The light emitting diode includes a first electrode and a second electrode, which are electrically connected to the first type semiconductor layer and the second type semiconductor layer respectively.
18. The light emitting diode according to claim 1, characterized in that: The light emitting diode comprises an insulating protection layer located on the surface and sidewall of the semiconductor epitaxial stack.
19. The light emitting diode according to claim 1, characterized in that: The active layer radiates light with a wavelength of 550-950nm.
20. A light emitting device, characterized in that: A light emitting diode comprising the light emitting diode according to any one of claims 1 to 19.