Electric field deflector, preparation method thereof and electric field deflection control system

Abstract

The invention discloses an electric field deflector, a preparation method thereof and an electric field deflection control system, relates to the field of semiconductors, and is used for realizing high-precision control of electron beams. The electric field deflector comprises a substrate, a dielectric layer arranged on one side of the substrate, a first signal interconnection lead connected with the ground electrode, a second signal interconnection lead connected with the signal electrode, a first deflection electrode and a second deflection electrode, wherein the first signal interconnection lead and the second signal interconnection lead are located in the dielectric layer and are connected with the ground electrode, and the first deflection electrode and the second deflection electrode are oppositely arranged. The first deflection electrode is electrically connected with the first signal interconnection lead, and the second deflection electrode is electrically connected with the second signal interconnection lead; the first shielding layer is connected with the first deflection electrode; the particle beam channel penetrates through the area between the first deflection electrode and the second deflection electrode, the part, located between the first signal interconnection lead and the second signal interconnection lead, of the dielectric layer, the first shielding layer and the substrate in the second direction; the second direction is vertical to the substrate; the electric field deflector is used for electric field deflection control of the charged particle beam.

Description

Technical Field

[0001] This application relates to the semiconductor field, specifically to an electric field deflector and its fabrication method, and an electric field deflection control system. Background Technology

[0002] In electron microscopy imaging and semiconductor manufacturing, multiple electron beams can significantly improve processing speed and throughput, thereby enhancing overall efficiency. Because the system uses multiple electron beams, the design of the electric field deflector is crucial; each electron beam needs to be independently controlled to achieve precise deflection and positioning.

[0003] For example, the deflection path of each electron beam can be controlled by applying different voltages, enabling them to reach specific target locations or scan along specific trajectories. Electric field deflectors typically consist of a series of precisely positioned electrodes to generate a precisely controlled electric field, controlling the deflection angle of each electron beam. Due to the complexity of operation, these deflectors require high design precision to ensure the uniformity of the electric field and independent control of each electron beam, while avoiding signal interference between adjacent beams. Therefore, designing a high-precision, high-density, highly integrated, and easily fabricated electric field deflector is a key technological challenge in the application of electron beam technologies. Summary of the Invention

[0004] This application discloses an electric field deflector and its fabrication method, as well as an electric field deflection control system, for achieving high-precision control and effective deflection of the electron beam, and the high density and high integration of the electric field deflection control system.

[0005] In a first aspect, this application provides an electric field deflector, comprising: a substrate, a dielectric layer, a signal interconnection lead group, a deflection electrode pair, a first shielding layer, and a particle beam channel. The dielectric layer is located on one side of the substrate; the signal interconnection lead group is located in the dielectric layer; the signal interconnection lead group includes a first signal interconnection lead and a second signal interconnection lead, the first signal interconnection lead being connected to a ground electrode, and the second signal interconnection lead being connected to a signal electrode; the deflection electrode pair is located on the side of the signal interconnection lead group away from the substrate, the signal interconnection lead group being located between the deflection electrode pair and the substrate, and the deflection electrode pair including a first direction. A first deflection electrode and a second deflection electrode are disposed opposite to each other. The first deflection electrode is electrically connected to the first signal interconnect lead, and the second deflection electrode is electrically connected to the second signal interconnect lead. The first direction is parallel to the substrate. A first shielding layer is located on the side of the deflection electrode pair away from the substrate and is electrically connected to the first deflection electrode. A particle beam channel penetrates the region between the first deflection electrode and the second deflection electrode, the portion of the dielectric layer located between the first signal interconnect lead and the second signal interconnect lead, the first shielding layer, and the substrate in a second direction. The second direction is perpendicular to the substrate.

[0006] The signal interconnection lead group, deflection electrode pair, first shielding layer, and particle beam channel of the electric field deflector provided in the embodiments of this application work closely together to ensure high-precision control and effective deflection of the electron beam. Furthermore, by sequentially arranging the signal interconnection lead group, deflection electrode pair, and first shielding layer of the electric field deflector along a direction away from the substrate, a more flexible fabrication process can be used to form the signal interconnection lead group, deflection electrode pair, and first shielding layer separately, providing the possibility of layered fabrication of the electric field deflector.

[0007] In one possible implementation, the first deflection electrode is a block electrode, and the second deflection electrode is a block electrode.

[0008] By configuring the first deflection electrode and the second deflection electrode as block electrodes, the first deflection electrode and the second deflection electrode do not have the risk of collapse compared with the deflection electrode formed by the interconnect metal layer.

[0009] In one possible implementation, the electric field deflector further includes: a second shielding layer electrically connected to the ground electrode; at least a portion of the sidewall of the particle beam channel covers the second shielding layer.

[0010] By covering the sidewalls of the particle beam channel with a second shielding layer, electric field shielding of the sidewalls of the particle beam channel is achieved to prevent signal interference between electron beams, thereby enabling high-precision and high-resolution electron beam control.

[0011] In one possible implementation, the second shielding layer also covers the surface of the substrate away from the dielectric layer.

[0012] The arrangement of covering the surface of the substrate away from the dielectric layer with a second shielding layer improves the performance of the electric field deflector in preventing signal interference between electron beams.

[0013] In one possible implementation, the dielectric layer does not cover the surface of the second signal interconnect lead away from the substrate, the surface of the second signal interconnect lead away from the substrate being used for electrical connection with the second deflection electrode; the second shielding layer also covers at least a portion of the surface of the dielectric layer away from the substrate, and the second shielding layer does not contact the surface of the second signal interconnect lead away from the substrate.

[0014] The arrangement of the second shielding layer covering at least a portion of the surface of the dielectric layer away from the substrate increases the coverage area of ​​the second shielding layer on the dielectric layer, thereby improving the performance of the electric field deflector in preventing signal interference between electron beams.

[0015] In one possible implementation, the electric field deflector further includes: a third shielding layer located on the side of the signal interconnect lead group near the substrate, the third shielding layer being electrically connected to the first signal interconnect lead, and the third shielding layer also being electrically connected to the ground electrode.

[0016] The third shielding layer enables electrical connection between the first signal interconnect lead, the first deflection electrode, the first shielding layer, the second shielding layer, and the ground electrode. Furthermore, the third shielding layer is located on the side of the signal interconnect lead group closest to the substrate, thus forming a shielding structure in the area near the substrate from the deflection electrode.

[0017] In one possible implementation, the signal interconnect lead group includes: a multilayer conductive layer and a plurality of first conductive supports, the multilayer conductive layers being spaced apart in the second direction, and the plurality of first conductive supports penetrating the multilayer conductive layers.

[0018] Multiple first conductive supports and multiple conductive layers are interconnected to form a signal interconnection lead group, so as to realize the signal transmission on the IC chip to the deflection electrode pair.

[0019] In one possible implementation, the size of the deflection electrode pair in the second direction is larger than the size of the first conductive layer in the second direction, wherein the first conductive layer is the conductive layer with the largest size in the second direction among the multilayer conductive layers.

[0020] By setting the size of the deflection electrode pair in the second direction to be larger than that of the first conductive layer in the second direction, the deflection electrode pair can provide a larger flux electric field to achieve stronger electron beam control.

[0021] In one possible implementation, the ratio of the size of the deflection electrode pair in the second direction to the size of the first conductive layer in the second direction is greater than 2.

[0022] By setting the ratio of the size of the deflection electrode pair in the second direction to the size of the first conductive layer in the second direction to be greater than 2, the size of the deflection electrode pair in the second direction is made larger than the size of the first conductive layer in the second direction.

[0023] In one possible implementation, in the longitudinal section of the deflection electrode pair and the signal interconnect lead group, the minimum dimension of the first deflection electrode in the first direction is greater than the maximum dimension of the first signal interconnect lead in the first direction, and the minimum dimension of the second deflection electrode in the first direction is greater than the maximum dimension of the second signal interconnect lead in the first direction; wherein, the longitudinal section is perpendicular to the surface of the substrate.

[0024] This configuration allows for a wider deflection electrode, which in turn provides a higher flux electric field, enabling stronger control of the electron beam.

[0025] In one possible implementation, both the first deflection electrode and the second deflection electrode include: a conductive core and a protective shell enclosing the conductive core; the conductivity of the material of the conductive core is greater than or equal to the conductivity of the material of the protective shell, and the oxidation resistance of the material of the protective shell is greater than the oxidation resistance of the material of the conductive core.

[0026] By configuring the deflection electrode, which includes a conductive core and a protective shell enclosing the conductive core, and ensuring that the conductivity of the conductive core material is greater than or equal to the conductivity of the protective shell material, and that the oxidation resistance of the protective shell material is greater than that of the conductive core material, the deflection electrode pair exhibits high conductivity and oxidation resistance. This is beneficial for maintaining the stability of the conductivity of the deflection electrode pair and improving its service life. Furthermore, it allows for the provision of a thicker deflection electrode pair to provide a larger flux electric field, thereby achieving stronger electron beam control.

[0027] In one possible implementation, the protective shell is made of a material containing at least one of molybdenum, ruthenium, iridium, titanium nitride, and tantalum nitride.

[0028] Molybdenum, ruthenium, iridium, titanium nitride, and tantalum nitride all exhibit strong oxidation resistance. Furthermore, the oxides formed after the protective shell material is oxidized have a conductivity of approximately 10.6 S / m, the material of the protective shell has high conductivity both before and after oxidation.

[0029] In one possible implementation, the portion of the particle beam channel that penetrates the first shielding layer has the smallest dimension in the first direction.

[0030] The portion of the particle beam channel penetrating the first shielding layer has the smallest dimension in the first direction. This dimension can be called the CD (Critical Dimension) of the particle beam channel, which is the electron beam confinement aperture. By setting the electron beam confinement aperture, the shape of the electron beam can be finely constrained, ensuring that the electron beam passes through the deflection electrode pair in a highly concentrated form. This not only helps reduce electron beam divergence but also reduces mutual interference between electron beams through physical confinement, thereby improving the resolution and accuracy of the semiconductor manufacturing process.

[0031] In one possible implementation, the electric field deflector further includes: an aperture constraint layer located on the side of the first shielding layer away from the substrate, wherein the particle beam channel also penetrates the aperture constraint layer in the second direction, wherein the portion of the particle beam channel penetrating the aperture constraint layer has the smallest size in the first direction.

[0032] The electric field deflector also includes an aperture constraint layer, which allows the arrangement of the first shielding layer, deflection electrode pairs, and signal interconnection lead group to be free from the limitations of the electron beam constraint aperture of the particle beam channel, making the fabrication of the electric field deflector more flexible.

[0033] In one possible implementation, the longitudinal cross-sections of the first deflection electrode and the second deflection electrode are inverted trapezoidal in shape.

[0034] The surface of the second signal interconnect lead away from the substrate is used for electrical connection with the second deflection electrode. The second shielding layer also covers at least a portion of the surface of the dielectric layer away from the substrate. The deflection electrode has an inverted trapezoidal cross-sectional shape, with the surface area of ​​the deflection electrode near the substrate being smaller than that of the surface away from the substrate. This smaller surface area effectively prevents short circuits between the second deflection electrode and the second shielding layer. Simultaneously, it allows the deflection electrode to have a larger volume, ensuring it can provide a higher flux electric field and achieve stronger electron beam control.

[0035] In one possible implementation, the first deflection electrode includes a first sub-electrode and a second sub-electrode, the first sub-electrode and the second sub-electrode are electrically connected, the first sub-electrode is electrically connected to the first signal interconnect lead, and the second sub-electrode is located on the side of the first sub-electrode away from the substrate; the second deflection electrode includes a third sub-electrode and a fourth sub-electrode that are electrically connected, the third sub-electrode is electrically connected to the second signal interconnect lead, and the fourth sub-electrode is located on the side of the third sub-electrode away from the substrate.

[0036] This setup allows for the provision of thicker deflection electrode pairs, resulting in a higher flux electric field and enhanced electron beam control.

[0037] In one possible implementation, the longitudinal cross-sections of the first sub-electrode, the second sub-electrode, the third sub-electrode, and the fourth sub-electrode are inverted trapezoidal in shape.

[0038] By arranging the longitudinal sections of the first, second, third, and fourth sub-electrodes in an inverted trapezoidal shape, short-circuiting between the third sub-electrode and the second shielding layer can be effectively prevented. At the same time, it can also allow the deflection electrode to have a larger volume, so as to ensure that the deflection electrode can provide a larger flux electric field and achieve a stronger electron beam control function.

[0039] The second sub-electrode has an inverted trapezoidal longitudinal cross-section. Given that the longitudinal cross-sectional structures of the first and second sub-electrodes are identical, this facilitates the second sub-electrode's connection to the first sub-electrode, promoting electrical connection between them. Similarly, the fourth sub-electrode also has an inverted trapezoidal longitudinal cross-section. Given that the longitudinal cross-sectional structures of the third and fourth sub-electrodes are identical, this facilitates the fourth sub-electrode's connection to the third sub-electrode, promoting electrical connection between them.

[0040] In one possible implementation, the materials of the first sub-electrode and the second sub-electrode are different, and the materials of the third sub-electrode and the fourth sub-electrode are different.

[0041] By using different materials for the first and second sub-electrodes, they can be formed using different processes. This makes the fabrication of the first and second sub-electrodes more flexible. Furthermore, conductive materials with different properties can be used to form the deflection electrode. The combination of multiple materials increases the flexibility of the deflection electrode materials and facilitates the control of the electric field. The design effect of using different materials for the third and fourth sub-electrodes is the same as above, and will not be repeated here.

[0042] In one possible implementation, one or more second conductive supports are disposed between the first deflection electrode and the first signal interconnect lead, and one or more third conductive supports are disposed between the second deflection electrode and the second signal interconnect lead; in a positive projection onto the substrate, the first deflection electrode covers the one or more second conductive supports, the first signal interconnect lead covers the one or more second conductive supports, the second deflection electrode covers the one or more third conductive supports, and the second signal interconnect lead covers the one or more third conductive supports.

[0043] The second deflection electrode and the second signal interconnection lead are electrically connected by the third conductive support, so that the size of the second deflection electrode in the first direction is not limited by the size of the opening. When the size of the opening in the first direction is small, the size of the second deflection electrode in the first direction can be larger than the size of the opening in the first direction, so as to achieve a larger second deflection electrode and ensure that the deflection electrode can provide a larger flux electric field and achieve a stronger electron beam control function.

[0044] In one possible implementation, the dielectric layer and the signal interconnect lead group are formed using a complementary metal-oxide-semiconductor (CMOS) fabrication process; and / or the deflection electrode pair is formed using a micro / nano fabrication process.

[0045] By employing complementary metal-oxide-semiconductor (CMOS) manufacturing processes to form internal signal interconnection structures within IC chips, the minimum size can be designed according to the design rules of each metal layer in the IC chip. This maximizes the usable area for adding signal interconnection lead groups and shielded interconnection leads while providing flexibility for more routing schemes, all while achieving basic signal interconnection functionality. In semiconductor manufacturing scenarios, due to the large number of electron beams and the expectation that future updates will further increase electron beam density, it is necessary to fully utilize each metal layer to connect conductive leads, thereby ensuring that all deflection electrode pairs can be successfully led out as signal lines.

[0046] Because only metal layers are used for signal interconnect lead groups in the area of ​​the electric field deflector, and these metal layers are not used to form deflection electrode pairs, the freedom of routing design is greatly increased. At the same time, the signal interconnect lead groups can be fabricated using the smallest linewidth in the IC chip, enabling high-density routing. Furthermore, shielded interconnect leads can be added between adjacent signal interconnect lead groups of adjacent electric field deflectors to effectively prevent signal crosstalk between signal interconnect lead groups, thus providing room for future evolution to further increase the number of electron beams.

[0047] By forming deflection electrode pairs through micro-nano fabrication processes, the deflection electrode pairs are no longer limited by the size of the metal layer in the IC chip. The structural dimensions of the deflection electrode pairs, such as the thickness of the deflection electrode pairs, the distance between the first and second deflection electrodes, and the diameters of the first and second deflection electrodes, can be adjusted according to the performance requirements of the deflection electrode pairs.

[0048] Secondly, this application provides a method for fabricating an electric field deflector, the method comprising: forming a dielectric layer and a signal interconnection lead group on one side of a substrate, the signal interconnection lead group being located in the dielectric layer, the signal interconnection lead group including a first signal interconnection lead and a second signal interconnection lead, the first signal interconnection lead being connected to a ground electrode, and the second signal interconnection lead being connected to a signal electrode; forming a first segment of a particle beam channel, the first segment of the particle beam channel penetrating in a third direction through a portion of the dielectric layer located between the first signal interconnection lead and the second signal interconnection lead, and the substrate, the third direction being perpendicular to the substrate.

[0049] The method further includes: forming the deflection electrode pair on the side of the dielectric layer away from the substrate, the deflection electrode pair including a first deflection electrode and a second deflection electrode disposed opposite each other in a fourth direction, the first deflection electrode being electrically connected to a first signal interconnect lead, the second deflection electrode being electrically connected to a second signal interconnect lead, the fourth direction being parallel to the substrate; forming a first shielding layer on the side of the deflection electrode pair away from the substrate, the first shielding layer being electrically connected to the first deflection electrode; forming a second segment of the particle beam channel to obtain a particle beam channel for forming the electric field deflector, wherein the second segment of the particle beam channel penetrates the first shielding layer and the region between the first deflection electrode and the second deflection electrode in the third direction.

[0050] The electric field deflector formed by the above steps can ensure high-precision control and effective deflection of the electron beam. Moreover, by sequentially arranging the signal interconnection lead group, deflection electrode pair, and first shielding layer of the electric field deflector along the direction away from the substrate, the signal interconnection lead group, deflection electrode pair, and first shielding layer can be formed separately using a more flexible fabrication process.

[0051] In one possible implementation, the dielectric layer and the signal interconnect lead group are formed using a complementary metal-oxide-semiconductor (CMOS) fabrication process.

[0052] In one possible implementation, the deflection electrode pair is formed using micro / nano fabrication processes.

[0053] In one possible implementation, before forming the deflection electrode pair on the side of the dielectric layer away from the substrate, the method further includes: forming a second shielding layer electrically connected to the ground electrode; at least a portion of the sidewall of the particle beam channel covering the second shielding layer.

[0054] By covering the sidewalls of the particle beam channel with a second shielding layer, electric field shielding of the sidewalls of the particle beam channel is achieved to prevent signal interference between electron beams, thereby enabling high-precision and high-resolution electron beam control.

[0055] In one possible implementation, forming the deflection electrode pair on the side of the dielectric layer away from the substrate and forming a first shielding layer on the side of the deflection electrode pair away from the substrate includes: forming a first shielding layer on one side of a first auxiliary substrate; forming the deflection electrode pair on the side of the first shielding layer away from the first auxiliary substrate; aligning the deflection electrode pair with the dielectric layer; and removing the first auxiliary substrate to form the electric field deflector.

[0056] The electric field deflector formed through the above steps can further decouple the signal interconnection lead group, deflection electrode pair and the first shielding layer, reducing the manufacturing process difficulty of each component.

[0057] In one possible implementation, after forming the second segment of the particle beam channel, the method further includes: forming an aperture constraint layer, forming a third segment of the particle beam channel on the aperture constraint layer, the third segment of the particle beam channel penetrating the aperture constraint layer; and aligning the aperture constraint layer with the first shielding layer to form the particle beam channel, wherein the third segment of the particle beam channel has the smallest dimension in the fourth direction.

[0058] By fabricating individual chips containing different components and then combining them to form an electric field deflector, the components can be decoupled, reducing the manufacturing difficulty of each component.

[0059] Thirdly, this application provides an electric field deflection control system, which includes: a plurality of electric field deflectors arranged in an array, at least one of the plurality of electric field deflectors being an electric field deflector as described in any of the above embodiments, the electric field deflector including a second signal interconnection lead; and a power supply signal line electrically connected to the second signal interconnection lead and connected to a control circuit.

[0060] The electric field deflection control system formed by the electric field deflector array configuration provided in the above embodiments achieves high density and high integration of the electric field deflection control system. The configuration of the power supply signal line enables the electrical connection between the control circuit and the second signal interconnection lead, so as to transmit the command signal of the control circuit to the deflection electrode pair to drive the deflection electrode pair.

[0061] In one possible implementation, the electric field deflector further includes a first signal interconnect lead; the electric field deflection control system further includes a shielding functional layer electrically connected to the first signal interconnect lead and electrically connected to the ground electrode; the electric field deflection control system further includes a plurality of shielded interconnect leads electrically connected to the shielding functional layer, each shielded interconnect lead being located between signal interconnect lead groups of two adjacent electric field deflectors, wherein the signal interconnect lead group includes the first signal interconnect lead and the second signal interconnect lead.

[0062] By setting shielded interconnecting leads between the signal interconnecting lead groups of two adjacent electric field deflectors, the shielding of signals between the electron beams of the electric field deflectors can be improved. Attached Figure Description

[0063] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0064] Figure 1 This is a three-dimensional structural diagram of the electric field deflector according to an embodiment of this application; Figure 2 This is a side view of the electric field deflector according to an embodiment of this application; Figure 3 This is a cross-sectional structural diagram of an electric field deflector according to an embodiment of this application; Figure 4 This is a cross-sectional structural diagram of an electric field deflection control system according to an embodiment of this application; Figure 5 This is another cross-sectional view of the electric field deflector according to an embodiment of this application; Figure 6 This is another cross-sectional view of the electric field deflector according to an embodiment of this application; Figure 7 This is another cross-sectional view of the electric field deflector according to an embodiment of this application; Figure 8 This is a cross-sectional structural diagram of an electric field deflection control system according to an embodiment of this application; Figure 9This is a structural diagram showing the arrangement of power supply signal lines and shielded signal lines in an electric field deflection control system according to an embodiment of this application. Figure 10 This is a cross-sectional view of the electric field deflector and shielded interconnection lead arrangement structure of an electric field deflection control system according to an embodiment of this application; Figure 11 This is a structural diagram of the shielding functional layer and the ground electrode according to an embodiment of this application; Figure 12 This is a cross-sectional structural diagram of another electric field deflection control system according to an embodiment of this application; Figure 13 This is a diagram showing the arrangement of power supply signal lines for another electric field deflection control system according to an embodiment of this application. Figure 14 This is a cross-sectional view of the electric field deflector arrangement structure of another electric field deflection control system according to an embodiment of this application; Figure 15 This is a flowchart illustrating the fabrication method of the electric field deflector according to an embodiment of this application; Figure 16 and Figure 17 A structural diagram corresponding to each step of the method for fabricating the electric field deflector in an embodiment of this application; Figure 18 This is another structural diagram of the method for fabricating the electric field deflector according to an embodiment of this application; Figure 19 This is another structural diagram of the method for fabricating the electric field deflector according to an embodiment of this application; Figure 20 This is another structural diagram of the method for fabricating an electric field deflector according to an embodiment of this application.

[0065] Explanation of reference numerals in the attached figures: 1000 - Electric field deflection control system; 100 - Electric field deflector; 100a - Electric field deflector; 100b - Electric field deflector; 100c - Electric field deflector; 10-Substrate; 101 - Sidewall; 102 - Surface; 20 - Dielectric layer; 201 - Sidewall; 202 - Surface; 203 - Metal layer; 30-Signal interconnect lead group; 301 - First signal interconnect lead; 302 - Second signal interconnect lead; 302a - Surface; 303 - Conductive layer; 3031 - First conductive layer; 304 - First conductive support; 40-Deflection electrode pair; 401-First deflection electrode; 402-Second deflection electrode; 403-Conductive core; 404-Protective shell; 4041-First part; 4042-Second part; 405-First sub-electrode; 406-Second sub-electrode; 407-Third sub-electrode; 408-Fourth sub-electrode; 51 - First shielding layer; 52 - Second shielding layer; 53 - Third shielding layer; 60-Particle beam channel; 61 - First paragraph; 62 - Second paragraph; 63 - Third paragraph; 70-Aperture confinement layer; 801 - Second conductive support; 802 - Third conductive support; 81 - Power supply signal line; 82-Ground electrode; 83-Shielding functional layer; 84-Shielded interconnect leads; 85-Shielded signal cable; 91 - First auxiliary substrate; 92 - First dielectric layer; 93 - Second dielectric layer; 94 - Third dielectric layer. Detailed Implementation

[0066] like Figure 1 As shown, this application provides an electric field deflector 100 for achieving precise and stable control of a single electron beam or multiple electron beams. The electric field deflector 100 can be applied to scientific research, industrial production, and medical technology. For example, it includes, but is not limited to, semiconductor manufacturing, particle accelerators, electron microscopy, medical radiotherapy, and precision materials processing.

[0067] For example, semiconductor manufacturing is a primary application scenario for this application. The electric field deflector 100 of this application can achieve precise control of the electron beam, enabling the drawing of intricate circuit patterns on a silicon wafer. The high-density deflector array structure proposed in this application can be used in multi-beam electron beam systems, simultaneously achieving large-scale electron beam control and significantly improving production efficiency.

[0068] For example, a particle accelerator can be used to guide and focus a particle beam for transport between different parts of the accelerator, and in some low-energy accelerators or ion sources, an electric field deflector 100 can be used to deflect the particle beam to a specific experimental site.

[0069] For example, electron microscopes can be used in transmission electron microscopes and scanning electron microscopes to position and focus an electron beam to image or analyze a sample.

[0070] For example, in forms of radiotherapy such as proton therapy, the electric field deflector 100 can be used to control the charged particle beam used for treatment, ensuring that the particle beam accurately hits tumor cells while minimizing the impact on surrounding healthy tissues.

[0071] For example, in precision material processing, the electric field deflector 100 can be used in material processing technologies such as electron beam welding, electron beam melting, and surface treatment to control the direction of the electron beam in order to achieve precise material processing.

[0072] Especially in semiconductor manufacturing, the electric field deflector 100 is a crucial component. Its function is to control the direction and position of the electron beam, generating an electric field through electrical signals to deflect the electron beam and achieve precise sample processing. The aperture array structure design of the electric field deflector 100 is critical to the feasibility of electron beam control and precise processing.

[0073] In some embodiments, such as Figures 1-3 As shown, Figure 1 This is a three-dimensional structural diagram of the electric field deflector 100 according to an embodiment of this application. Figure 2 This is a side view of the electric field deflector 100 according to an embodiment of this application. Figure 3 This is a cross-sectional view of an electric field deflector 100 according to an embodiment of this application. The electric field deflector 100 includes a substrate 10 and a dielectric layer 20, with the dielectric layer 20 located on one side of the substrate 10.

[0074] For example, the substrate 10 is made of silicon, doped silicon, or silicon located on the insulator side. The dielectric layer 20 may be made of SiO2.

[0075] For example, a particle source is provided on the side of the electric field deflector 100 away from the dielectric layer 20. The particle source is used to emit an electron beam into the electric field deflector 100. That is, the electron beam enters the electric field deflector 100 from the side of the substrate 10 away from the dielectric layer 20.

[0076] The electric field deflector 100 also includes: a signal interconnection lead group 30, a deflection electrode pair 40, a first shielding layer 51, and a particle beam channel 60.

[0077] It should be noted that, in order to see the signal interconnect lead group 30 more clearly, Figure 1 and Figure 2 Medium layer 20 is omitted. Figure 1 and Figure 2 This is an illustrative description of the relative positions of the signal interconnect lead group 30, the deflection electrode pair 40, the first shielding layer 51, and the particle beam channel 60, and is not intended to limit the structure of the signal interconnect lead group 30, the deflection electrode pair 40, the first shielding layer 51, and the particle beam channel 60. Figure 3This can be understood as a cross-sectional view of the electric field deflector 100 on a vertical plane perpendicular to the substrate 10.

[0078] Signal interconnect lead group 30 is located in dielectric layer 20; signal interconnect lead group 30 includes: a first signal interconnect lead 301 and a second signal interconnect lead 302, the first signal interconnect lead 301 being connected to ground electrode 82 (e.g., Figure 11 As shown in the figure, the second signal interconnect lead 302 is connected to the signal electrode (not shown in the figure).

[0079] The signal interconnect lead group 30 serves as the neural link of the electric field deflector 100, responsible for receiving and transmitting command signals from the control system on the IC (Integrated Circuit) chip. These command signals, such as voltage or current, are used to drive the deflection electrode pairs 40. This transmission link not only needs to utilize the available area to create sufficient wiring to connect to each deflection electrode pair 40 to control the deflection of each electron beam, but also needs to balance the requirements of high transmission speed, low latency, and low crosstalk between signal lines. This ensures that the response time of the electric field deflector 100 meets requirements while accurately transmitting each signal.

[0080] For example, ground electrode 82 (e.g.) Figure 11 (As shown) is used to transmit grounding signals. For example, the voltage transmitted by the ground electrode 82 is 0V. The signal electrode is used to transmit command signals. For example, the voltage transmitted by the signal electrode is an alternating voltage, which can be 1V, 2V or 3V. The voltage transmitted by the signal electrode is a fixed voltage, which can be 5V.

[0081] For example, the deflection electrode pair 40 is located on the side of the signal interconnect lead group 30 away from the substrate 10. The deflection electrode pair 40 includes a first deflection electrode 401 and a second deflection electrode 402 disposed opposite to each other in a first direction X. The first deflection electrode 401 is electrically connected to the first signal interconnect lead 301, and the second deflection electrode 402 is electrically connected to the second signal interconnect lead 302. The first direction X is parallel to the substrate 10. Both the first deflection electrode 401 and the second deflection electrode 402 can be referred to as deflection electrodes.

[0082] For example, the substrate 10, the signal interconnect lead group 30, and the deflection electrode pair 40 are stacked sequentially. This sequential stacking arrangement of the substrate 10, the signal interconnect lead group 30, and the deflection electrode pair 40 provides the possibility of layering and fabricating the electric field deflector 100 using a more flexible fabrication process.

[0083] For example, the first deflection electrode 401 and the second deflection electrode 402 are both block electrodes. That is, the first deflection electrode 401 and the second deflection electrode 402 can be a single, integral structure, rather than a structure formed by interconnecting metal layers. By configuring the first deflection electrode 401 and the second deflection electrode 402 as block electrodes, compared to first deflection electrodes 401 and 402 formed by interconnecting metal layers, the first deflection electrode 401 and the second deflection electrode 402 do not have the risk of collapse.

[0084] Moreover, the signal interconnect lead group 30 is located in the dielectric layer 20, and the first deflection electrode 401 is a block electrode, the second deflection electrode 402 is a block electrode, and the substrate 10, the signal interconnect lead group 30 and the deflection electrode pair 40 are stacked in sequence. Compared with the electric field deflector 100 fabricated by CMOS (Complementary Metal Oxide Semiconductor) manufacturing process, the electric field deflector 100 provided by the embodiments of this application does not have the risk of collapse.

[0085] The deflection electrode pair 40 is the direct actuator for deflecting the electron beam. Multiple pairs of first deflection electrodes 401 and second deflection electrodes 402 can be precisely arranged, and the electric field formed between each pair of electrodes is used to change the direction of the electron beam. Based on the voltage provided by the signal interconnection lead group 30, the intensity and direction of the electric field generated by the electrodes will change accordingly, thereby precisely controlling the deflection angle and path of each electron beam.

[0086] For example, such as Figure 3 and Figure 4 As shown, Figure 4 This is a cross-sectional structural diagram of an electric field deflection control system 1000 according to an embodiment of this application. The deflection electrode pair 40 can be a pair of electrodes controlling a single electron beam, or it can be a capacitor array electrode controlling multiple electron beams. The capacitor array electrode can form a high-density deflector array structure. The high-density deflector array structure can be referred to as an electric field deflection control system 1000 that controls the deflection of multiple electron beams. Each electron beam is equipped with a corresponding deflection electrode pair 40 to achieve independent control of the electron beam.

[0087] For example, the first shielding layer 51 is located on the side of the deflection electrode pair 40 away from the substrate 10 and is electrically connected to the first deflection electrode 401.

[0088] The first shielding layer 51 is a shielding structure located above the electric field, preventing signal interference between electron beams in the electric field deflection control system 1000. In the electric field deflection control system 1000, due to the large number of electrons, electric field and electromagnetic interference between electron beams become a significant factor affecting system performance. The design of the signal shielding structure between electron beams aims to reduce this interference and ensure that the deflection signal of each electron beam is not affected by the operation of other beams.

[0089] For example, the particle beam channel 60 extends in the second direction Y through the region between the first deflection electrode 401 and the second deflection electrode 402, the portion of the dielectric layer 20 located between the first signal interconnect lead 301 and the second signal interconnect lead 302, the first shielding layer 51, and the substrate 10. The second direction Y is perpendicular to the substrate 10.

[0090] The particle beam channel 60 forms an aperture structure that confines the electron beam. The function of this aperture structure is to precisely constrain the shape of the electron beam, ensuring that it passes through the deflection electrode pair 40 in a highly concentrated manner. For example, the aperture structure can consist of finely fabricated micro / nano-fabricated aperture slits. For example, the aperture structure can be set before the electron beam deflection; or, for example, the aperture structure can be implemented using the structure of the deflection electrode pair 40; or, for example, the aperture structure can be positioned near the deflection electrode pair 40. The aperture structure not only helps reduce electron beam divergence but also reduces mutual interference between electron beams through physical confinement, improving the resolution and accuracy of the semiconductor manufacturing process.

[0091] The signal interconnection lead group 30, deflection electrode pair 40, first shielding layer 51 and particle beam channel 60 of the electric field deflector 100 provided in the embodiments of this application work closely together to ensure high-precision control and effective deflection of the electron beam.

[0092] Furthermore, since the signal interconnection lead group 30, the deflection electrode pair 40 and the first shielding layer 51 of the electric field deflector 100 are arranged sequentially in a direction away from the substrate 10, the signal interconnection lead group 30, the deflection electrode pair 40 and the first shielding layer 51 can be formed respectively by a more flexible fabrication process.

[0093] For example, the dielectric layer 20 and the signal interconnection lead group 30 are formed using CMOS manufacturing processes, while the deflection electrode pair 40 and the first shielding layer 51 are formed using MEMS (Microelectromechanical systems, a general term for microstructure fabrication processes ranging from nanometer to millimeter scales, also known as micro-nano fabrication) manufacturing processes. A description of the fabrication method for the electric field deflector will be provided later; it will not be elaborated here.

[0094] For example, the size of the electric field deflector 100 in the second direction Y ranges from 300µm to 400µm. For instance, the size of the electric field deflector 100 in the second direction Y is 300µm, 330µm, 350µm, or 400µm, etc., and there is no limitation here.

[0095] It should be noted that, while ensuring that the deflection electrode pair 40 can provide a large flux electric field, the smaller the size of the electric field deflector 100 in the second direction Y, the better.

[0096] In some embodiments, such as Figure 3 and Figure 4 As shown, the electric field deflector 100 further includes: a second shielding layer 52, which is electrically connected to the ground electrode 82; at least a portion of the sidewall of the particle beam channel 60 covers the second shielding layer 52.

[0097] For example, the second shielding layer 52 may cover the sidewall 201 of the dielectric layer 20 facing the particle beam channel 60; and / or, the second shielding layer 52 may cover the sidewall 101 of the substrate 10 facing the particle beam channel 60.

[0098] The sidewall 201 of the dielectric layer 20 facing the particle beam channel 60 and the sidewall 101 of the substrate 10 facing the particle beam channel 60 can be understood as the sidewalls of the particle beam channel 60. That is, at least a portion of the sidewalls of the particle beam channel 60 is covered by the second shielding layer 52. To achieve a better electric field shielding effect, the sidewalls of the particle beam channel 60 can be entirely covered by the second shielding layer 52. By covering at least a portion of the sidewalls of the particle beam channel 60 with the second shielding layer 52, electric field shielding of the sidewalls of the particle beam channel 60 can be achieved to prevent signal interference between electron beams, thereby achieving high-precision and high-resolution electron beam control.

[0099] In some embodiments, such as Figure 3 and Figure 4 As shown, the second shielding layer 52 also covers the surface 102 of the substrate 10 away from the dielectric layer 20.

[0100] In the electric field deflector 100, the dielectric layer material surrounding the deflection electrode 40 is non-conductive, which will cause charge accumulation. These accumulated charges will gradually form an unwanted deflection electric field, resulting in a decrease in the control accuracy of the electron beam.

[0101] By covering the surface 102 of the substrate 10 away from the dielectric layer 20 with the second shielding layer 52, charge accumulation can be reduced, thereby improving the performance of the electric field deflector 100 in preventing signal interference between electron beams.

[0102] In some embodiments, such as Figure 3 and Figure 4As shown, the dielectric layer 20 does not cover the surface 302a of the second signal interconnect lead 302 on the side away from the substrate 10, which is used for electrical connection with the second deflection electrode 402. The second shielding layer 52 also covers at least a portion of the surface 202 of the dielectric layer 20 on the side away from the substrate 10, and the second shielding layer 52 does not contact the surface of the second signal interconnect lead 302 on the side away from the substrate 10.

[0103] For example, in a projection onto the substrate 10, the boundary of the portion of the second shielding layer 52 covering the surface 202 of the dielectric layer 20 away from the substrate 10 is spaced with the boundary of the surface 302a of the second signal interconnect lead 302 away from the substrate 10 to prevent short circuit between the second shielding layer 52 and the second signal interconnect lead 302. It can be understood that the portion of the second shielding layer 52 on the dielectric layer 20 away from the substrate 10 has an opening K, which exposes the surface 302a of the second signal interconnect lead 302 away from the substrate 10, and the boundary of the opening K is spaced with the boundary of the surface 302a of the second signal interconnect lead 302 away from the substrate 10.

[0104] By further covering at least a portion of the surface 202 of the dielectric layer 20 on the side away from the substrate 10 by the second shielding layer 52, the coverage area of ​​the dielectric layer 20 by the second shielding layer 52 can be increased, thereby improving the performance of the electric field deflector 100 in preventing signal interference between electron beams.

[0105] For example, such as Figure 3 As shown, the second shielding layer 52 covers the sidewall 201 of the dielectric layer 20 facing the particle beam channel 60, the sidewall 101 of the substrate 10 facing the particle beam channel 60, and the surface 102 of the substrate 10 away from the dielectric layer 20. In order to avoid short-circuiting between the second shielding layer 52 and the second signal interconnection lead 302, the second shielding layer 52 also covers a portion of the surface 202 of the dielectric layer 20 away from the substrate 10, so as to realize the wrapping of the dielectric layer 20 by the second shielding layer 52. The second shielding layer 52 is connected to the ground electrode signal, thereby effectively solving the problem of charge accumulation around the dielectric layer 20, which can improve the stability and reliability of the electric field deflection control system 1000, and at the same time ensure high-precision and high-resolution electron beam control.

[0106] In some embodiments, such as Figure 3 and Figure 4 As shown, the electric field deflector 100 further includes: a third shielding layer 53, which is located on the side of the signal interconnect lead group 30 near the substrate 10. The third shielding layer 53 is electrically connected to the first signal interconnect lead 301, and is also connected to the ground electrode 82 (e.g., Figure 11 (As shown) Electrical connection.

[0107] For example, in the dielectric layer 20, multiple metal layers 203 are stacked and spaced apart along the second direction Y, and each pair of adjacent metal layers 203 is filled with dielectric. The metal layer 203 closest to the substrate 10 in the multiple metal layers 203 of the first signal interconnect lead 301 serves as the third shielding layer 53.

[0108] For example, the material of the metal layer 203 is copper (Cu) or aluminum (Al).

[0109] By setting the third shielding layer 53, the first signal interconnection lead 301, the first deflection electrode 401, and the first shielding layer 51 are connected to the ground electrode 82 (e.g., ...). Figure 11 The electrical connection is shown. Moreover, the third shielding layer 53 is located on the side of the signal interconnect lead group 30 near the substrate 10, and a shielding structure can be formed in the region of the deflection electrode pair 40 near the substrate 10.

[0110] In some embodiments, such as Figure 3 and Figure 4 As shown, the signal interconnect lead group 30 includes: a multilayer conductive layer 303 and a plurality of first conductive supports 304. The multilayer conductive layer 303 is arranged at intervals in the second direction Y, and the plurality of first conductive supports 304 penetrate the multilayer conductive layer 303.

[0111] For example, in the dielectric layer 20, there are multiple metal layers 203 stacked and spaced apart along the second direction Y. Except for the metal layer 203 closest to the substrate 10, the other metal layers 203 are multiple conductive layers 303 of the signal interconnect lead group 30.

[0112] Multiple first conductive supports 304 and multiple conductive layers 303 are interconnected to form a signal interconnection lead group 30, so as to realize the signal transmission on the IC chip to the deflection electrode pair 40.

[0113] In some embodiments, such as Figure 3 and Figure 4 As shown, the dimension d2 of the deflection electrode pair 40 in the second direction Y is greater than the dimension d1 of the first conductive layer 3031 in the second direction Y, i.e., d2>d1. The first conductive layer 3031 is the conductive layer 303 with the largest dimension d1 in the second direction Y among the multilayer conductive layers 303.

[0114] For example, the dimension d2 of the deflection electrode pair 40 in the second direction Y is the thickness of the deflection electrode pair 40, and the dimension d1 of the first conductive layer 3031 in the second direction Y is the thickness of the first conductive layer 3031. Among the multilayer conductive layers 303, the conductive layer 303 furthest from the substrate 10 has the thickest thickness, and the conductive layer 303 furthest from the substrate 10 is the first conductive layer 3031.

[0115] For example, the ratio of the dimension d2 of the deflection electrode pair 40 in the second direction Y to the dimension d1 of the first conductive layer 3031 in the second direction Y is greater than 2.

[0116] For example, the ratio of the dimension d2 of the deflection electrode pair 40 in the second direction Y to the dimension d1 of the first conductive layer 3031 in the second direction Y is 2.1, 2.3, 2.5, 2.7, 3, 3.1 or 4, etc., and there is no limitation here.

[0117] In some comparative examples, the deflection electrode pair 40 and the signal interconnect lead group 30 are formed using a CMOS manufacturing process. That is, the deflection electrode pair 40 is fabricated using an interconnect metal layer in the CMOS manufacturing process, and the morphology and thickness of the deflection electrode pair 40 are limited by the interconnect metal layer. In the embodiments of this application, since the deflection electrode pair 40 is located on the side of the signal interconnect lead group 30 away from the substrate 10, different fabrication processes can be used to form the deflection electrode pair 40 and the signal interconnect lead group 30. The dimension d2 of the deflection electrode pair 40 in the second direction Y is not affected by the interconnect metal layer in the CMOS manufacturing process. Therefore, it is possible to achieve the goal that the dimension d2 of the deflection electrode pair 40 in the second direction Y is greater than the dimension d1 of the first conductive layer 3031 in the second direction Y.

[0118] By setting the size d2 of the deflection electrode pair 40 in the second direction Y to be greater than the size d1 of the first conductive layer 3031 in the second direction Y, the deflection electrode pair 40 can provide an electric field with a larger flux, thereby achieving a stronger control function for the electron beam.

[0119] In some embodiments, such as Figure 3 As shown, in the longitudinal section of the deflection electrode pair 40 and the signal interconnect lead group 30, the minimum dimension d3 of the first deflection electrode 401 in the first direction X is greater than the maximum dimension d4 of the first signal interconnect lead 301 in the first direction X, i.e., d3>d4; the minimum dimension of the second deflection electrode 402 in the first direction X is greater than the maximum dimension of the second signal interconnect lead 302 in the first direction X; the longitudinal section is perpendicular to the surface where the substrate 10 is located.

[0120] For example, in the orthographic projection onto the substrate 10, the first deflection electrode 401, the second deflection electrode 402, the first signal interconnect lead 301, and the second signal interconnect lead 302 are all square in shape. In the longitudinal section of the deflection electrode pair 40 and the signal interconnect lead group 30, the minimum dimension d3 of the first deflection electrode 401 in the first direction X can be the minimum width of the first deflection electrode 401, and the maximum dimension d4 of the first signal interconnect lead 301 in the first direction X can be the maximum width of the first signal interconnect lead 301. Similarly, the minimum dimension of the second deflection electrode 402 in the first direction X can be the minimum width of the second deflection electrode 402, and the maximum dimension of the second signal interconnect lead 302 in the first direction X can be the maximum width of the second signal interconnect lead 302.

[0121] With the above settings, the widths of the first deflection electrode 401 and the second deflection electrode 402 are relatively large, so that the deflection electrode pair 40 can provide a large flux electric field to achieve stronger electron beam control.

[0122] In some embodiments, such as Figure 3 As shown, both the first deflection electrode 401 and the second deflection electrode 402 include: a conductive core 403 and a protective shell 404 enclosing the conductive core 403. The conductivity of the material of the conductive core 403 is greater than or equal to the conductivity of the material of the protective shell 404, and the oxidation resistance of the material of the protective shell 404 is greater than the oxidation resistance of the material of the conductive core 403.

[0123] For example, the conductivity of the material of the conductive core 403 is in the range of 10. 6 S / m~10 7 S / m.

[0124] For example, the material of the conductive core 403 is tungsten (W). W is beneficial for forming a thicker deflection electrode pair 40. For a description of the preparation method of the conductive core 403, please refer to the subsequent description of the preparation method of the electric field deflector, which will not be described in detail here.

[0125] For example, the material of the protective shell 404 contains at least one of molybdenum, ruthenium, iridium, titanium nitride and tantalum nitride.

[0126] For example, the protective shell 404 may be made of molybdenum, ruthenium, iridium, titanium nitride, or tantalum nitride. Alternatively, the protective shell 404 may be made of a target compound containing at least one of molybdenum, ruthenium, iridium, titanium nitride, and tantalum nitride. For example, the target compound may contain any one, two, three, four, or all of molybdenum, ruthenium, iridium, titanium nitride, and tantalum nitride; this is not an exhaustive list. It should be understood that when the target compound contains at least one of molybdenum, ruthenium, iridium, titanium nitride, and tantalum nitride, the target compound may also include other elements or compounds besides that one.

[0127] Molybdenum, ruthenium, iridium, titanium nitride, tantalum nitride, and the target compound all exhibit strong oxidation resistance. Furthermore, the oxide formed after oxidation of the protective shell material 404 has a conductivity of approximately 10⁻⁶. 6 Compared with the anti-oxidation films in some comparative examples, the material of the protective shell 404 has relatively high conductivity before and after oxidation. After the protective shell 404 is at risk of being oxidized, the setting of the protective shell 404 has little impact on the conductivity of the deflection electrode pair 40.

[0128] By including a conductive core 403 and a protective shell 404 enclosing the conductive core 403 in both the first deflection electrode 401 and the second deflection electrode 402, and setting the conductivity of the material of the conductive core 403 to be greater than or equal to the conductivity of the material of the protective shell 404, and the oxidation resistance of the material of the protective shell 404 to be greater than the oxidation resistance of the material of the conductive core 403, the deflection electrode pair 40 has high conductivity and oxidation resistance. This is beneficial for maintaining the stability of the conductivity of the deflection electrode pair 40 and improving its service life. It also helps to provide a thicker deflection electrode pair 40 to provide a larger flux electric field and achieve stronger electron beam control.

[0129] In some embodiments, such as Figure 3 As shown, the portion of the particle beam channel 60 that penetrates the first shielding layer 51 has the smallest dimension d5 in the first direction X.

[0130] For example, the particle beam channel 60 is cylindrical, and the size of the particle beam channel 60 in the first direction X is the diameter of the particle beam channel 60.

[0131] The portion of the particle beam channel 60 that penetrates the first shielding layer 51 has the smallest dimension d5 in the first direction X. This dimension can be referred to as the CD (Critical Dimension) of the particle beam channel 60, which is the electron beam constraint aperture. By setting the electron beam constraint aperture, the shape of the electron beam can be finely constrained, ensuring that the electron beam passes through the deflection electrode pair 40 in a highly concentrated form. This not only helps to reduce electron beam divergence but also reduces mutual interference between electron beams through physical confinement, thereby improving the resolution and accuracy of the semiconductor manufacturing process.

[0132] In some embodiments, such as Figure 5 As shown, Figure 5 This is another cross-sectional view of the electric field deflector 100 according to an embodiment of this application. The electric field deflector 100 further includes: an aperture constraint layer 70, which is located on the side of the first shielding layer 51 away from the substrate 10. The particle beam channel 60 also penetrates the aperture constraint layer 70 in the second direction Y. The portion of the particle beam channel 60 that penetrates the aperture constraint layer 70 has the smallest dimension d6 in the first direction X.

[0133] In other words, the electron beam confinement aperture of the particle beam channel 60 is the portion of the particle beam channel 60 that penetrates the aperture confinement layer 70.

[0134] For example, the aperture constraint layer 70 is a silicon wafer or a glass sheet.

[0135] The electric field deflector 100 also includes an aperture constraint layer 70, which allows the arrangement of the first shielding layer 51, the deflection electrode pair 40 and the signal interconnection lead group 30 to be unrestricted by the electron beam constraint aperture of the particle beam channel 60, making the fabrication of the electric field deflector 100 more flexible.

[0136] In some embodiments, such as Figure 3 and Figure 5 As shown, the longitudinal cross-sections of the first deflection electrode 401 and the second deflection electrode 402 are inverted trapezoidal.

[0137] For example, when forming the deflection electrode pair 40 using MEMS manufacturing processes, the dielectric layer is filled by thin film deposition, and then the deflection electrode pair 40 is formed by thin film patterning. The longitudinal cross-sectional shape of the first deflection electrode 401 and the second deflection electrode 402 formed in this way can be an inverted trapezoid. For details, please refer to the content on the fabrication method of the electric field deflector, which will not be described in detail here.

[0138] The surface 302a of the second signal interconnect lead 302 away from the substrate 10 is used for electrical connection with the second deflection electrode 402. The second shielding layer 52 also covers at least a portion of the surface 202 of the dielectric layer 20 away from the substrate 10. The cross-sectional shape of the second deflection electrode 402 is an inverted trapezoid. The surface area of ​​the surface of the second deflection electrode 402 near the substrate 10 is smaller than the surface area of ​​the surface of the second deflection electrode 402 away from the substrate 10. The smaller surface area of ​​the surface of the second deflection electrode 402 near the substrate 10 can effectively prevent the second deflection electrode 402 from short-circuiting with the second shielding layer 52. At the same time, it can also make the first deflection electrode 401 and the second deflection electrode 402 have a larger volume to ensure that the deflection electrode pair 40 can provide a larger flux electric field and realize a stronger electron beam control function.

[0139] In other embodiments, the shape of the longitudinal section of the first deflection electrode 401 and the second deflection electrode 402 can be square or trapezoidal. For example, the shape of the longitudinal section of the first deflection electrode 401 and the second deflection electrode 402 can be square or rectangular, etc. There is no limitation here.

[0140] In some embodiments, such as Figure 6 and Figure 7 As shown, Figure 6This is another cross-sectional view of the electric field deflector according to an embodiment of this application. Figure 7 This is another cross-sectional view of the electric field deflector according to an embodiment of the present application. The first deflection electrode 401 includes a first sub-electrode 405 and a second sub-electrode 406, which are electrically connected. The first sub-electrode 405 is electrically connected to the first signal interconnection lead 301, and the second sub-electrode 406 is located on the side of the first sub-electrode 405 away from the substrate 10. The second deflection electrode 402 includes a third sub-electrode 407 and a fourth sub-electrode 408, which are electrically connected. The third sub-electrode 407 is electrically connected to the second signal interconnection lead 302, and the fourth sub-electrode 408 is located on the side of the third sub-electrode 407 away from the substrate 10.

[0141] For example, the first deflection electrode 401 further includes a sub-electrode located on the side of the second sub-electrode 406 away from the substrate 10, and the second deflection electrode 402 further includes a sub-electrode located on the side of the fourth sub-electrode 408 away from the substrate 10, that is, the deflection electrodes can be two or more layers.

[0142] By setting the first deflection electrode 401 to include the first sub-electrode 405 and the second sub-electrode 406, and the second deflection electrode 402 to include the third sub-electrode 407 and the fourth sub-electrode 408, it is advantageous to provide a thicker deflection electrode to provide a larger flux electric field and achieve stronger electron beam control.

[0143] In some embodiments, such as Figure 6 As shown, the longitudinal cross-sections of the first sub-electrode 405, the second sub-electrode 406, the third sub-electrode 407, and the fourth sub-electrode 408 are inverted trapezoidal in shape.

[0144] For example, when forming the first sub-electrode 405, the second sub-electrode 406, the third sub-electrode 407, or the fourth sub-electrode 408 using MEMS manufacturing processes, the dielectric layer is filled by thin film deposition, and then the first sub-electrode 405, the second sub-electrode 406, the third sub-electrode 407, or the fourth sub-electrode 408 are formed by thin film patterning. The shape of the longitudinal section of the first sub-electrode 405, the second sub-electrode 406, the third sub-electrode 407, and the fourth sub-electrode 408 formed in this way can be an inverted trapezoid.

[0145] For example, a thin film is formed by a deposition process, and then the thin film is etched by an etching process, leaving a portion of the pre-formed deflection electrode pair 40. The longitudinal cross-section of the first sub-electrode 405, the second sub-electrode 406, the third sub-electrode 407, and the fourth sub-electrode 408 formed in this way can be in the shape of an inverted trapezoid.

[0146] The surface 302a of the second signal interconnect lead 302 away from the substrate 10 is used for electrical connection with the second deflection electrode 402. The second shielding layer 52 also covers at least a portion of the surface 202 of the dielectric layer 20 away from the substrate 10. The cross-sectional shape of the third sub-electrode 407 is an inverted trapezoid. The surface area of ​​the surface of the third sub-electrode 407 near the substrate 10 is smaller than the surface area of ​​the surface of the third sub-electrode 407 away from the substrate 10. The smaller surface area of ​​the surface of the third sub-electrode 407 near the substrate 10 can effectively prevent the third sub-electrode 407 from short-circuiting with the second shielding layer 52. At the same time, it can also make the third sub-electrode 407 have a larger volume to ensure that the deflection electrode pair 40 can provide a larger flux electric field and realize a stronger electron beam control function.

[0147] The longitudinal section of the second sub-electrode 406 is arranged in an inverted trapezoidal shape. The surface area of ​​the surface of the second sub-electrode 406 near the substrate 10 is smaller than the surface area of ​​the surface of the second sub-electrode 406 away from the substrate 10. When the longitudinal section structure of the first sub-electrode 405 and the longitudinal section structure of the second sub-electrode 406 are the same, it is convenient for the second sub-electrode 406 to overlap the first sub-electrode 405, which is beneficial to the electrical connection between the second sub-electrode 406 and the first sub-electrode 405.

[0148] The fourth sub-electrode 408 has an inverted trapezoidal cross-section. The surface area of ​​the side of the fourth sub-electrode 408 closest to the substrate 10 is smaller than the surface area of ​​the side of the fourth sub-electrode 408 furthest from the substrate 10. When the cross-sectional structures of the third sub-electrode 407 and the fourth sub-electrode 408 are the same, it is convenient for the fourth sub-electrode 408 to overlap with the third sub-electrode 407, which is beneficial for the electrical connection between the third sub-electrode 407 and the fourth sub-electrode 408.

[0149] In other examples, the longitudinal cross-sections of the first sub-electrode 405, the second sub-electrode 406, the third sub-electrode 407, and the fourth sub-electrode 408 are square, rectangular, or trapezoidal, etc., and there are no restrictions here.

[0150] In some embodiments, such as Figure 7 As shown, the materials of the first sub-electrode 405 and the second sub-electrode 406 are different, and the materials of the third sub-electrode 407 and the fourth sub-electrode 408 are different.

[0151] For example, the resistivity of the materials of the first sub-electrode 405 and the second sub-electrode 406 are different. For instance, the material of the first sub-electrode 405 is Cu, and the material of the second sub-electrode 406 is W or Al.

[0152] For example, the resistivity of the materials of the third sub-electrode 407 and the fourth sub-electrode 408 is different. For instance, the material of the third sub-electrode 407 is the same as the material of the first sub-electrode 405, and the material of the fourth sub-electrode 408 is different from the material of the second sub-electrode 406.

[0153] By using different materials for the first sub-electrode 405 and the second sub-electrode 406, different processes can be used to form the first sub-electrode 405 and the second sub-electrode 406. This makes the fabrication of the first sub-electrode 405 and the second sub-electrode 406 more flexible. Furthermore, conductive materials with different properties can be used to form the deflection electrode pair 40. The combination of multiple materials increases the flexibility of the deflection electrode pair 40 and facilitates the control of the electric field. The design of using different materials for the third sub-electrode 407 and the fourth sub-electrode 408 has the same effect, and will not be repeated here.

[0154] In other examples, such as Figure 6 The materials of the first sub-electrode 405 and the second sub-electrode 406 are the same. This facilitates the fabrication of the deflection electrode pair 40.

[0155] In some embodiments, such as Figure 3 and Figure 7 As shown, one or more second conductive supports 801 are disposed between the first deflection electrode 401 and the first signal interconnect lead 301, and one or more third conductive supports 802 are disposed between the second deflection electrode 402 and the second signal interconnect lead 302; in the orthographic projection onto the substrate 10, the first deflection electrode 401 covers one or more second conductive supports 801, and the first signal interconnect lead 301 covers one or more second conductive supports 801, and the second deflection electrode 402 covers one or more third conductive supports 802, and the second signal interconnect lead 302 covers one or more third conductive supports 802.

[0156] That is, the first deflection electrode 401 and the first signal interconnection lead 301 are not in direct contact, but are electrically connected through the second conductive support 801. Furthermore, compared to the first deflection electrode 401 and the first signal interconnection lead 301, the second conductive support 801 can have a smaller dimension in the first direction X.

[0157] The second deflection electrode 402 and the second signal interconnection lead 302 are not in direct contact, but are electrically connected through the third conductive support 802. Furthermore, the third conductive support 802 can have a smaller dimension in the first direction X compared to the second deflection electrode 402 and the second signal interconnection lead 302.

[0158] As described above, the second shielding layer 52 has an opening K on the side of the dielectric layer 20 away from the substrate 10. This opening K exposes the surface 302a of the second signal interconnect lead 302 on the side away from the substrate 10. There is a gap between the boundary of the opening K and the boundary of the surface 302a of the second signal interconnect lead 302 on the side away from the substrate 10. The second deflection electrode 402 and the second signal interconnect lead 302 are electrically connected through the third conductive support 802. This allows the size of the second deflection electrode 402 in the first direction X to be unrestricted by the size of the opening K. When the size of the opening K in the first direction X is small, the size of the second deflection electrode 402 in the first direction X can be larger than the size of the opening K in the first direction X, so as to achieve a larger second deflection electrode 402. This ensures that the deflection electrode pair 40 can provide a larger flux electric field and achieve stronger electron beam control.

[0159] Moreover, the aperture K is smaller in the first direction X, which increases the coverage area of ​​the second shielding layer 52 over the dielectric layer 20, thereby improving the performance of the electric field deflector 100 in preventing signal interference between electron beams.

[0160] like Figure 8 and Figure 9 As shown, Figure 8 This is a cross-sectional structural diagram of an electric field deflection control system 1000 according to an embodiment of this application. Figure 9 This diagram illustrates the arrangement of the power supply signal line 81 and shielding signal line 85 in an electric field deflection control system 1000 according to an embodiment of this application. The embodiment also provides an electric field deflection control system 1000, which includes an array of multiple electric field deflectors 100. At least one of the multiple electric field deflectors 100 is the electric field deflector 100 provided in any of the above embodiments. The electric field deflection control system 1000 further includes a power supply signal line 81, which is electrically connected to the second signal interconnection lead 302 of the electric field deflector 100 and connected to a control circuit (not shown in the figure).

[0161] For example, the material of the power supply signal line 81 is the same as that of the signal interconnect lead group 30. For example, the material of the power supply signal line 81 is Al or Cu.

[0162] The electric field deflection control system 1000 formed by the electric field deflector 100 array provided in the above embodiments achieves high density and high integration. The control circuit is electrically connected to the second signal interconnection lead 302 through the power supply signal line 81, so as to transmit the command signal of the control circuit to the deflection electrode pair 40 to drive the deflection electrode pair 40.

[0163] In some embodiments, such as Figures 8-11 As shown, Figure 10 This is a cross-sectional view of the electric field deflector 100 and the arrangement of shielded interconnecting leads 84 in an electric field deflection control system 1000 according to an embodiment of this application. Figure 11 The diagram shows the structure of the shielding functional layer 83 and the ground electrode 82 in this embodiment. The electric field deflector 100 further includes a shielding functional layer 83, which is electrically connected to the first signal interconnection lead 301 of the electric field deflector 100 and to the ground electrode 82.

[0164] For example, in the dielectric layer 20, multiple metal layers 203 are stacked and spaced apart along the second direction Y, and a dielectric is provided between each pair of adjacent metal layers 203. The metal layer 203 closest to the substrate 10 in the multiple metal layers 203 of the first signal interconnect lead 301 serves as the third shielding layer 53, and the third shielding layer 53 is electrically connected to the shielding functional layer 83.

[0165] For example, the third shielding layer 53 and the shielding functional layer 83 are an integral structure. The metal layer 203 closest to the substrate 10 among the multilayer metal layers 203 of the first signal interconnect lead 301 is a single, continuous metal layer. The portion of this metal layer covered by the signal interconnect lead group 30 can be referred to as the third shielding layer 53, and the remaining portion can be referred to as the shielding functional layer 83. Figure 11 The top view of the metal layer is shown in the middle. The shielding functional layer 83 has an array of holes, which are channels through which the ion beam passes.

[0166] The electric field deflection control system 1000 also includes a plurality of shielded interconnect leads 84 electrically connected to the shielding functional layer 83, each shielded interconnect lead 84 being located between signal interconnect lead groups 30 of two adjacent electric field deflectors 100.

[0167] For example, such as Figure 8 and Figure 10 As shown, the electric field deflection control system 1000 includes electric field deflectors 100a, 100b, and 100c arranged along a first direction X. A shielded interconnection lead 84 is provided between the second signal interconnection lead 302 of electric field deflector 100a and the first signal interconnection lead 301 of electric field deflector 100b, and another shielded interconnection lead 84 is provided between the second signal interconnection lead 302 of electric field deflector 100b and the second signal interconnection lead 302 of electric field deflector 100c.

[0168] For example, such as Figure 8 and Figure 9 As shown, multiple shielded interconnecting leads 84 of the electric field deflection control system 1000 are connected to the shielding functional layer 83. Figure 9In the structural diagram shown, the multiple shielded interconnect leads 84 connected together can be equivalent to a single shielded signal line 85. Therefore, Figure 9 The structure is used to illustrate the arrangement of the power supply signal line 81 and the shielded signal line 85.

[0169] In some comparative examples, such as Figure 12 , Figure 13 and Figure 14 As shown, Figure 12 This is a cross-sectional structural diagram of another electric field deflection control system 1000 according to an embodiment of this application. Figure 13 This is a diagram showing the arrangement of the power supply signal line 81 in another embodiment of the electric field deflection control system 1000 according to this application. Figure 14 This is a cross-sectional view of the electric field deflector 100 arrangement structure of another electric field deflection control system 1000 according to an embodiment of this application. No shielded interconnecting leads 84 are provided between the signal interconnecting lead groups 30 of two adjacent electric field deflectors 100. This can easily cause signal interference between adjacent signal interconnecting lead groups 30.

[0170] Therefore, this application improves the shielding of signals between electron beams of adjacent electric field deflectors 100 by providing shielded interconnection leads 84 between signal interconnection lead groups 30 of two adjacent electric field deflectors 100. Since this application does not use the metal layer 203 of an IC circuit to design the deflection electrode pair 40 (e.g., Figure 3 As shown in the diagram, this increases the freedom of routing design. Interconnects can be fabricated using the smallest available linewidth from the IC circuit design rules. This enables high-density routing and allows for the addition of shielded interconnects 84 between adjacent signal lines. This further addresses signal crosstalk between signal interconnect groups 30 while increasing the high speed and density of the electric field deflector 100, thus providing room for future increases in the number of electron beams.

[0171] like Figure 3 and Figure 15 As shown, Figure 15 This is a flowchart of a method for fabricating an electric field deflector according to an embodiment of this application. This application also provides a method for fabricating an electric field deflector, which includes steps R1 to R5.

[0172] R1, such as Figure 16 As shown, a dielectric layer 20 and a signal interconnection lead group 30 are formed on one side of the substrate 10. The signal interconnection lead group 30 is located in the dielectric layer 20 and includes a first signal interconnection lead 301 and a second signal interconnection lead 302. The first signal interconnection lead 301 is connected to a ground electrode 82 (e.g., ...). Figure 11 As shown in the figure, the second signal interconnect lead 302 connects to the signal electrode.

[0173] The structure of the first signal interconnect lead 301 and the second signal interconnect lead 302 is described above and will not be repeated here.

[0174] For example, a dielectric layer 20 and a signal interconnect lead group 30 are formed using a CMOS manufacturing process. For instance, a metal layer and a dielectric layer 20 are formed by a deposition process, and the metal layer is patterned to form the signal interconnect lead group 30. That is, the metal layer in the IC chip is used solely as the signal interconnect lead group 30 to connect control circuitry and provide signals.

[0175] By employing CMOS manufacturing processes to form internal signal interconnection structures within IC chips, the smallest possible size can be designed according to the design rules of each metal layer in the IC chip. This maximizes the usable area for adding signal interconnection lead groups 30 and shielded interconnection leads 84 (e.g., ...). Figure 8 (As shown) This allows for a greater number of electron beams while providing flexibility for more routing options. In semiconductor manufacturing scenarios, due to the large number of electron beams and the fact that future updates will further increase the electron beam density, it is necessary to fully utilize the metal layers of each layer to connect conductive leads, thereby ensuring that all deflection electrode pairs 40 can be successfully led out as signal lines.

[0176] Since only metal layers are used for signal interconnect lead groups 30 in the region where the electric field deflector 100 is located, and these metal layers are not used to form deflection electrode pairs 40, the freedom of routing design is increased. At the same time, the signal interconnect lead groups 30 can be fabricated using the smallest linewidth in the IC chip, thus achieving high-density routing. Furthermore, shielded interconnect leads 84 (such as...) can be added between adjacent signal interconnect lead groups 30 of adjacent electric field deflectors 100. Figure 8 As shown in the figure, this effectively prevents signal crosstalk between signal interconnection lead groups 30, thereby providing room for evolution to further increase the number of electron beams in the future.

[0177] R2, such as Figure 16 As shown, a first segment 61 of a particle beam channel 60 is formed. The first segment 61 of the particle beam channel 60 penetrates the portion of the dielectric layer 20 located between the first signal interconnect lead 301 and the second signal interconnect lead 302, and the substrate 10 in the third direction Y1. The third direction Y1 is perpendicular to the substrate 10.

[0178] For example, the third-party direction Y1 is the same as the second direction Y mentioned above.

[0179] For example, the first segment 61 of the particle beam channel 60 is formed by a dry etching process.

[0180] For example, such as Figure 16 and Figure 17As shown, before forming the deflection electrode pair 40 on the side of the dielectric layer 20 away from the substrate 10, step R20 is also included.

[0181] R20 forms a second shielding layer 52, which is electrically connected to the first signal interconnection lead 301; at least a portion of the sidewall of the particle beam channel 60 covers the second shielding layer 52.

[0182] For example, the second shielding layer 52 may cover the sidewall of the dielectric layer 20 facing the particle beam channel 60; and / or, the second shielding layer 52 may cover the sidewall of the substrate 10 facing the particle beam channel 60.

[0183] For example, the second shielding layer 52 covers the sidewall 201 of the dielectric layer 20 facing the particle beam channel 60, the sidewall 101 of the substrate 10 facing the particle beam channel 60, and the surface 102 of the substrate 10 away from the dielectric layer 20. The second shielding layer 52 also covers at least a portion of the surface 202 of the dielectric layer 20 away from the substrate 10 to achieve encapsulation of the dielectric layer 20.

[0184] For example, the second shielding layer 52 has an opening K on the portion of the dielectric layer 20 away from the substrate 10. This opening K exposes the surface 302a of the second signal interconnect lead 302 on the side away from the substrate 10, and there is a gap between the boundary of the opening K and the boundary of the surface 302a of the second signal interconnect lead 302 on the side away from the substrate 10. In other words, the opening K is provided on the surface 202 of the dielectric layer 20 on the side away from the substrate 10.

[0185] For example, during the process of forming the dielectric layer 20 and the signal interconnect lead group 30 using the CMOS manufacturing process, the metal layer closest to the substrate 10 in the IC chip is used as the third shielding layer 53.

[0186] like Figure 16 and Figure 17 As shown, by using the metal layer closest to the substrate 10 in the IC chip to form a third shielding layer 53, a second shielding layer 52 enclosing the dielectric layer 20, and a subsequently formed first shielding layer 51 as the signal shielding structure between the electron beams of the electric field deflector 100, signal shielding between the electron beams can be achieved, and the problem of charge accumulation can be effectively solved. The electric field signal of the electric field deflector 100 is only confined around its deflection electrode pair 40.

[0187] However, in some comparative examples, the electric field deflector 100 is formed using an IC chip, that is, signal interconnect lead group 30, deflection electrode pair 40, and shielding layer are formed in the IC chip, and the dielectric layer in the IC chip needs to be completely or partially removed. When the dielectric layer in the IC chip is completely removed, there is a risk of collapse of the deflection electrode pair 40 and the signal interconnect lead group 30. Therefore, the embodiments of this application, by using a CMOS manufacturing process to form the signal interconnect lead group 30 in the IC chip, can effectively solve the risk of collapse of the deflection electrode pair 40 and the signal interconnect lead group 30.

[0188] R3, such as Figure 17 As shown, a deflection electrode pair 40 is formed on the side of the dielectric layer 20 away from the substrate 10. The deflection electrode pair 40 includes a first deflection electrode 401 and a second deflection electrode 402 disposed opposite to each other in the fourth direction X1. The first deflection electrode 401 is electrically connected to the first signal interconnection lead 301, and the second deflection electrode 402 is electrically connected to the second signal interconnection lead 302. The fourth direction X1 is parallel to the substrate 10.

[0189] For example, the fourth direction X1 is the same as the first direction X mentioned above.

[0190] For example, the deflection electrode pair 40 is formed using MEMS manufacturing processes.

[0191] For example, forming the deflection electrode pair 40 using a MEMS manufacturing process includes step R30: forming a first dielectric layer 92, forming a through hole H1 on the first dielectric layer 92; forming a first metal layer, the first metal layer being disposed entirely and filling the through hole H1; patterning the first metal layer by an etching process, the portion of the first metal layer filling the through hole H1 being retained to form a second conductive support 801.

[0192] A second dielectric layer 93 is formed on the side of the first dielectric layer 92 away from the substrate 10, and a through hole H2 is formed on the second dielectric layer 93.

[0193] A first portion 4041 is formed of the protective shell 404, which covers the sidewall and bottom of the through hole H2.

[0194] A second metal layer is formed, which is integrally disposed and fills the remaining portion of the through-hole H2. The second metal layer is patterned by an etching process, and the portion of the second metal layer filling the through-hole H2 forms the conductive core 403 of the deflection electrode pair 40. For example, the material of the second metal layer is W, which can fill the through-hole H2, thus facilitating the fabrication of a thicker deflection electrode pair 40.

[0195] A second portion 4042 of the protective shell 404 is formed, which covers the surface of the conductive core 403 away from the substrate 10. For example, the first portion 4041 and the second portion 4042 of the protective shell 404 can be formed by a deposition process.

[0196] The deflection electrode pair 40 is no longer limited by the size of the metal layer in the IC chip. The structural dimensions of the deflection electrode pair 40 can be adjusted according to the performance requirements of the deflection electrode pair 40, such as the thickness of the deflection electrode pair 40, the spacing between the first deflection electrode 401 and the second deflection electrode 402, and the diameter of the first deflection electrode 401 and the second deflection electrode 402.

[0197] In this step, the deflection electrode pair 40 is formed on the already fabricated IC chip through subsequent MEMS processes, completely releasing the design freedom of the deflection electrode pair 40. The design of the deflection electrode pair 40 is no longer limited by the structure of the IC chip, and the fabrication of highly defined deflection electrode pairs 40 effectively reduces development costs and accelerates the iteration speed of the electric field deflector 100.

[0198] R4. A first shielding layer 51 is formed on the side of the deflection electrode pair 40 away from the substrate 10. The first shielding layer 51 is electrically connected to the first deflection electrode 401.

[0199] For example, the first shielding layer 51 is formed using a MEMS manufacturing process.

[0200] For example, a third dielectric layer 94 is formed on the side of the second dielectric layer 93 away from the substrate 10, and a through-hole H3 is formed on the third dielectric layer 94; a third metal layer is formed, which is integrally disposed and fills the through-hole H3; the third metal layer is patterned by an etching process, and the portion of the third metal layer filling the through-hole H3 is retained. A first shielding layer 51 is formed on the side of the third dielectric layer 94 away from the substrate 10, and the portion of the third metal layer filling the through-hole H3 is used to connect the first deflection electrode 401 and the first shielding layer 51.

[0201] For example, the signal interconnection lead group 30, the deflection electrode pair 40 and the first shielding layer 51 can be sequentially stacked to form the electric field deflector 100.

[0202] In other examples, such as Figure 3 and Figure 18 As shown, forming a deflection electrode pair 40 on the side of the dielectric layer 20 away from the substrate 10 and forming a first shielding layer 51 on the side of the deflection electrode pair 40 away from the substrate 10 includes steps R41 to R44.

[0203] R41, a first shielding layer 51 is formed on one side of the first auxiliary substrate 91.

[0204] R42, a deflection electrode pair 40 is formed on the side of the first shielding layer 51 away from the first auxiliary substrate 91.

[0205] R43. Align the deflection electrode pair 40 with the dielectric layer 20.

[0206] R44. Remove the first auxiliary substrate 91 to form an electric field deflector 100.

[0207] The electric field deflector 100 formed by steps R41 to R44 can further decouple the signal interconnection lead group 30, the deflection electrode pair 40 and the first shielding layer 51, reducing the manufacturing process difficulty of each component.

[0208] For example, the first shielding layer 51 can be used as the electron beam confinement aperture structure. Since the first shielding layer 51 is a single-layer thin film with a thickness that can be controlled to a few micrometers or even submicrometers, and is located at the top layer of the electric field deflector 100, this process is easy to implement, and the size and uniformity of the first shielding layer 51 can be better controlled.

[0209] R5, such as Figure 3 and Figure 17 As shown, the second segment 62 of the particle beam channel 60 is formed, thus obtaining the particle beam channel 60 and forming the electric field deflector 100; the second segment 62 of the particle beam channel 60 penetrates the region between the first shielding layer 51 and the first deflecting electrode 401 and the second deflecting electrode 402 in the third direction Y1.

[0210] For example, a first shielding layer 51 is formed using a dry etching process, and the first shielding layer 51 serves as the constraint aperture structure of the electric field deflector 100. Then, a wet process is used to completely remove the first dielectric layer 92, the second dielectric layer 93, and the third dielectric layer 94 in the electric field deflector 100, that is, to remove the dielectric around the deflection electrode pair 40, in order to form the electric field deflector 100.

[0211] The deflection electrode pair 40 is formed using MEMS manufacturing process, and all the dielectric material around the deflection electrode pair 40 is removed. The dielectric layer 20 on the IC chip is wrapped by the second shielding layer 52. There is no exposed dielectric material in the electron beam path, which effectively solves the charge accumulation effect. This structure can simplify the manufacturing process of the electric field deflector 100 and reduce the design complexity of the electric field deflector 100.

[0212] The electric field deflector 100 can be formed through steps R1 to R5. This electric field deflector 100 has high resolution and smaller physical size of electrons. In the field of semiconductor manufacturing, the electric field deflector 100 of this embodiment helps to form very fine patterns by precisely controlling the deflection of the electron beam, typically achieving a resolution of several nanometers or even sub-nanometers. The electric field deflector 100 has good stability and can effectively solve the electron beam accumulation effect and the interference problem between signals under high-speed, high-frequency switching control signals, thereby ensuring the stability of the electron beam.

[0213] The electric field deflector 100 of this application embodiment can also have a dynamic correction function. Since the electron beam may be distorted in its path, the electric field deflector 100 of this application embodiment can be combined with a data link feedback module to achieve dynamic correction and optimization of the beam spot shape and position, thereby ensuring imaging quality. The electric field deflector 100 of this application embodiment also has high flexibility. Using this electric field deflector 100, the electron beam path can be easily programmed and controlled by software.

[0214] The electric field deflection control system 1000 formed by the electric field deflector 100 in this application embodiment can process multiple electron beams in parallel. In the semiconductor manufacturing scenario, the electric field deflector 100 array can control high-density electron beams, realize parallel processing, and greatly improve work efficiency.

[0215] In some embodiments, such as Figure 19 and Figure 20 As shown, after forming the second segment 62 of the particle beam channel 60, the method for fabricating the electric field deflector further includes: forming an aperture constraint layer 70; forming a third segment 63 of the particle beam channel 60 on the aperture constraint layer 70, wherein the third segment 63 of the particle beam channel 60 penetrates the aperture constraint layer 70; aligning the aperture constraint layer 70 with the first shielding layer 51 to form the particle beam channel 60; wherein the third segment 63 of the particle beam channel 60 has the smallest size in the fourth direction X1.

[0216] For example, such as Figure 19 As shown, a dielectric layer 20 and a signal interconnection lead group 30 are formed using a CMOS manufacturing process. A deflection electrode pair 40 and a first shielding layer 51 are formed on the side of the signal interconnection lead group 30 away from the substrate 10 using a MEMS manufacturing process. An aperture constraint layer 70 is fabricated separately. The aperture constraint layer 70 is then joined with the first shielding layer 51 to form a particle beam channel 60, resulting in an electric field deflector 100. That is, the dielectric layer 20, the signal interconnection lead group 30, the deflection electrode pair 40, and the first shielding layer 51 are located in one chip, while the aperture constraint layer 70 is located in another chip. The two chips are joined together to form the electric field deflector 100.

[0217] For example, a dielectric layer 20 and a signal interconnection lead group 30 are formed using a CMOS manufacturing process, and a deflection electrode pair 40 and a first shielding layer 51 are formed using a MEMS manufacturing process. An aperture constraint layer 70 is formed on the side of the first shielding layer 51 away from the deflection electrode pair 40. The signal interconnection lead group 30 and the deflection electrode pair 40 are then joined together to form a particle beam channel 60, resulting in an electric field deflector 100. That is, the dielectric layer 20 and the signal interconnection lead group 30 are located in one chip, while the deflection electrode pair 40, the first shielding layer 51, and the aperture constraint layer 70 are located in another chip. The two chips are joined together to form the electric field deflector 100.

[0218] For example, such as Figure 20 As shown, a dielectric layer 20 and a signal interconnection lead group 30 are formed using CMOS manufacturing processes, a deflection electrode pair 40 and a first shielding layer 51 are formed using MEMS manufacturing processes, and an aperture constraint layer 70 is fabricated separately. The signal interconnection lead group 30 and the deflection electrode pair 40 are joined together, and the first shielding layer 51 and the aperture constraint layer 70 are joined together to form a particle beam channel 60, resulting in an electric field deflector 100. That is, the dielectric layer 20 and the signal interconnection lead group 30 are located in one chip, the deflection electrode pair 40 and the first shielding layer 51 are located in another chip, and the aperture constraint layer 70 is located in yet another chip. The three chips are joined together to form the electric field deflector 100.

[0219] By fabricating individual chips containing different components and then combining them to form an electric field deflector 100, the components can be decoupled, reducing the manufacturing difficulty of each component.

[0220] The foregoing preferred embodiments have further illustrated the objectives, technical solutions, and advantages of the present invention. It should be understood that the above descriptions are merely preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. An electric field deflector, characterized in that, include: Substrate; A dielectric layer is located on one side of the substrate; A signal interconnect lead group, located in the dielectric layer, includes a first signal interconnect lead and a second signal interconnect lead, wherein the first signal interconnect lead is connected to a ground electrode and the second signal interconnect lead is connected to a signal electrode; A deflection electrode pair is located on the side of the signal interconnect lead group away from the substrate. The signal interconnect lead group is between the deflection electrode pair and the substrate. The deflection electrode pair includes a first deflection electrode and a second deflection electrode disposed opposite to each other in a first direction. The first deflection electrode is electrically connected to the first signal interconnect lead, and the second deflection electrode is electrically connected to the second signal interconnect lead. The first direction is parallel to the substrate. A first shielding layer is located on the side of the deflection electrode pair away from the substrate and is electrically connected to the first deflection electrode. The particle beam channel extends in a second direction through the region between the first deflection electrode and the second deflection electrode, the portion of the dielectric layer located between the first signal interconnect lead and the second signal interconnect lead, the first shielding layer, and the substrate, wherein the second direction is perpendicular to the substrate.

2. The electric field deflector according to claim 1, characterized in that, The first deflection electrode is a block electrode, and the second deflection electrode is a block electrode.

3. The electric field deflector according to claim 1 or 2, characterized in that, Also includes: A second shielding layer is electrically connected to the ground electrode; At least a portion of the sidewall of the particle beam channel is covered by the second shielding layer.

4. The electric field deflector according to claim 3, characterized in that, The second shielding layer also covers the surface of the substrate away from the dielectric layer.

5. The electric field deflector according to claim 3 or 4, characterized in that, The dielectric layer does not cover the surface of the second signal interconnect lead away from the substrate, and the surface of the second signal interconnect lead away from the substrate is used for electrical connection with the second deflection electrode; The second shielding layer also covers at least a portion of the surface of the dielectric layer on the side away from the substrate, and the second shielding layer does not contact the surface of the second signal interconnect lead on the side away from the substrate.

6. The electric field deflector according to any one of claims 1 to 5, characterized in that, Also includes: The third shielding layer is located on the side of the signal interconnect lead group closer to the substrate. The third shielding layer is electrically connected to the first signal interconnect lead and is also electrically connected to the ground electrode.

7. The electric field deflector according to any one of claims 1 to 6, characterized in that, The signal interconnection lead group includes: The system comprises a multilayer conductive layer and a plurality of first conductive supports, wherein the multilayer conductive layer is spaced apart in the second direction and the plurality of first conductive supports penetrate the multilayer conductive layer.

8. The electric field deflector according to claim 7, characterized in that, The size of the deflection electrode pair in the second direction is greater than the size of the first conductive layer in the second direction, wherein the first conductive layer is the conductive layer with the largest size in the second direction among the multilayer conductive layers.

9. The electric field deflector according to claim 8, characterized in that, The ratio of the size of the deflection electrode pair in the second direction to the size of the first conductive layer in the second direction is greater than 2.

10. The electric field deflector according to any one of claims 1 to 9, characterized in that, In the longitudinal section of the deflection electrode pair and the signal interconnect lead group, the minimum dimension of the first deflection electrode in the first direction is greater than the maximum dimension of the first signal interconnect lead in the first direction, and the minimum dimension of the second deflection electrode in the first direction is greater than the maximum dimension of the second signal interconnect lead in the first direction; wherein, the longitudinal section is perpendicular to the surface of the substrate.

11. The electric field deflector according to any one of claims 1 to 10, characterized in that, Both the first deflection electrode and the second deflection electrode include: A conductive core and a protective shell enclosing the conductive core; The conductivity of the material of the conductive core is greater than or equal to the conductivity of the material of the protective shell, and the oxidation resistance of the material of the protective shell is greater than that of the material of the conductive core.

12. The electric field deflector according to claim 11, characterized in that, The protective shell is made of a material containing at least one of molybdenum, ruthenium, iridium, titanium nitride, and tantalum nitride.

13. The electric field deflector according to any one of claims 1 to 12, characterized in that, The portion of the particle beam channel that penetrates the first shielding layer has the smallest dimension in the first direction.

14. The electric field deflector according to any one of claims 1 to 13, characterized in that, Also includes: An aperture constraint layer is located on the side of the first shielding layer away from the substrate, and the particle beam channel also penetrates the aperture constraint layer in the second direction, wherein the portion of the particle beam channel penetrating the aperture constraint layer has the smallest size in the first direction.

15. The electric field deflector according to any one of claims 1 to 14, characterized in that, The longitudinal cross-sections of the first deflection electrode and the second deflection electrode are inverted trapezoidal.

16. The electric field deflector according to any one of claims 1 to 14, characterized in that: The first deflection electrode includes a first sub-electrode and a second sub-electrode, the first sub-electrode and the second sub-electrode are electrically connected, the first sub-electrode is electrically connected to the first signal interconnect lead, and the second sub-electrode is located on the side of the first sub-electrode away from the substrate; The second deflection electrode includes a third sub-electrode and a fourth sub-electrode that are electrically connected. The third sub-electrode is electrically connected to the second signal interconnect lead, and the fourth sub-electrode is located on the side of the third sub-electrode away from the substrate.

17. The electric field deflector according to claim 16, characterized in that, The longitudinal cross-sections of the first sub-electrode, the second sub-electrode, the third sub-electrode, and the fourth sub-electrode are inverted trapezoidal in shape.

18. The electric field deflector according to claim 16 or 17, characterized in that, The materials of the first sub-electrode and the second sub-electrode are different, and the materials of the third sub-electrode and the fourth sub-electrode are different.

19. The electric field deflector according to any one of claims 1 to 18, characterized in that, One or more second conductive supports are disposed between the first deflection electrode and the first signal interconnect lead, and one or more third conductive supports are disposed between the second deflection electrode and the second signal interconnect lead; in a positive projection onto the substrate, the first deflection electrode covers the one or more second conductive supports, the first signal interconnect lead covers the one or more second conductive supports, the second deflection electrode covers the one or more third conductive supports, and the second signal interconnect lead covers the one or more third conductive supports.

20. The electric field deflector according to any one of claims 1 to 19, characterized in that, The dielectric layer and the signal interconnect lead group are formed using a complementary metal-oxide-semiconductor (CMOS) manufacturing process; and / or the deflection electrode pair are formed using a micro / nano fabrication process.

21. A method for fabricating an electric field deflector, characterized in that, include: A dielectric layer and a signal interconnection lead group are formed on one side of the substrate. The signal interconnection lead group is located in the dielectric layer. The signal interconnection lead group includes a first signal interconnection lead and a second signal interconnection lead. The first signal interconnection lead is connected to a ground electrode, and the second signal interconnection lead is connected to a signal electrode. A first segment of a particle beam channel is formed, wherein the first segment of the particle beam channel penetrates the portion of the dielectric layer located between the first signal interconnect lead and the second signal interconnect lead in a third direction, and the substrate, wherein the third direction is perpendicular to the substrate; The deflection electrode pair is formed on the side of the dielectric layer away from the substrate. The deflection electrode pair includes a first deflection electrode and a second deflection electrode disposed opposite each other in a fourth direction. The first deflection electrode is electrically connected to the first signal interconnect lead, and the second deflection electrode is electrically connected to the second signal interconnect lead. The fourth direction is parallel to the substrate. A first shielding layer is formed on the side of the deflection electrode pair away from the substrate, and the first shielding layer is electrically connected to the first deflection electrode. A second segment of the particle beam channel is formed to obtain the particle beam channel, thereby forming the electric field deflector, wherein the second segment of the particle beam channel penetrates the first shielding layer and the region between the first deflecting electrode and the second deflecting electrode in the third direction.

22. The method for preparing the electric field deflector according to claim 21, characterized in that, The dielectric layer and the signal interconnect lead group are formed using a complementary metal-oxide-semiconductor (CMOS) manufacturing process.

23. The method for preparing the electric field deflector according to claim 21 or 22, characterized in that, The deflection electrode pair is formed using micro-nano fabrication processes.

24. The method for preparing the electric field deflector according to any one of claims 21 to 23, characterized in that, Before forming the deflection electrode pair on the side of the dielectric layer away from the substrate, the method further includes: A second shielding layer is formed, which is electrically connected to the ground electrode; at least a portion of the sidewall of the particle beam channel covers the second shielding layer.

25. The method for preparing the electric field deflector according to any one of claims 21 to 24, characterized in that, The formation of the deflection electrode pair on the side of the dielectric layer away from the substrate, and the formation of the first shielding layer on the side of the deflection electrode pair away from the substrate, include: A first shielding layer is formed on one side of the first auxiliary substrate; The deflection electrode pair is formed on the side of the first shielding layer away from the first auxiliary substrate; The deflection electrode pair is aligned with the dielectric layer; The first auxiliary substrate is removed to form the electric field deflector.

26. The method for preparing the electric field deflector according to any one of claims 21 to 25, characterized in that, Following the formation of the second segment of the particle beam channel, the following is also included: An aperture constraint layer is formed, and a third segment of the particle beam channel is formed on the aperture constraint layer, the third segment of the particle beam channel penetrating the aperture constraint layer; The aperture constraint layer is aligned with the first shielding layer to form the particle beam channel, wherein the third segment of the particle beam channel has the smallest dimension in the fourth direction.

27. An electric field deflection control system, characterized in that, include: The array comprises multiple electric field deflectors, at least one of which is an electric field deflector as described in any one of claims 1 to 20, the electric field deflector including a second signal interconnect lead; The power supply signal line is electrically connected to the second signal interconnection lead and to the control circuit.

28. The electric field deflection control system according to claim 27, characterized in that, The electric field deflector also includes a first signal interconnection lead; The electric field deflection control system further includes a shielding functional layer, which is electrically connected to the first signal interconnection lead and to the ground electrode; The electric field deflection control system further includes a plurality of shielded interconnect leads electrically connected to the shielding functional layer. Each shielded interconnect lead is located between signal interconnect lead groups of two adjacent electric field deflectors, wherein the signal interconnect lead group includes the first signal interconnect lead and the second signal interconnect lead.

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