Trimming control circuit, battery protection chip, battery protection system and trimming method

Abstract

The invention discloses a trimming control circuit, a battery protection chip, a battery protection system and a trimming method, the trimming control circuit comprises a voltage detection circuit, a mode selection circuit and a forced starting circuit, the voltage detection circuit is used for connecting a power supply connection end, receiving a first voltage signal output by the power supply connection end, and outputting a voltage detection signal; the mode selection circuit is used for outputting a mode control signal according to the voltage detection signal output; the forced starting circuit is used for controlling the charging and discharging switching circuit to conduct the battery module and the charging and discharging connecting end when the mode control signal is forced trimming, and detecting a first voltage signal applied to the power supply connecting end by multiplexing the power supply connecting end, thereby avoiding increasing the cost and complexity of a special test pin, and improving the test accuracy. Through cooperative work of the voltage detection circuit, the mode selection circuit and the forced starting circuit, the problem that multiple stages of battery protection chips cannot be tested independently due to mutual clamping is solved, and a basis is provided for realizing system-level post-trimming.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and in particular to a tuning control circuit, a battery protection chip, a battery protection system, and a tuning method. Background Technology

[0002] In multi-level lithium battery protection systems, multiple protection chips are typically connected in series to provide multiple protections against overcharge, over-discharge, and overcurrent. In existing technologies, parameter tuning of the protection chips is usually completed during the wafer testing or packaging testing phase. However, stress and temperature changes during packaging can cause drift in the chip's internal parameters, and pre-packaging tuning cannot effectively compensate for this drift, affecting the accuracy and consistency of the final product.

[0003] Furthermore, in multi-level protection system-level testing, when overcharge protection threshold testing and adjustment are performed on a certain level of protection chip, the applied test voltage will first reach the protection threshold of the previous level protection chip, causing it to activate prematurely and shut down its output. This blocks the test voltage from being applied to subsequent chips, making it impossible for subsequent chips to be accurately tested and adjusted. As a result, the multi-level circuits are mutually constrained, making it impossible to achieve true system-level post-adjustment.

[0004] Although there are existing technologies that use dedicated test pins to achieve post-tuning, this approach consumes chip pin resources, increases chip packaging costs, and adds complexity to the test circuit. Summary of the Invention

[0005] This invention provides a trimming control circuit, a battery protection chip, a battery protection system, and a trimming method to solve the problems in the prior art, such as the inability to compensate for battery protection chip package drift, mutual interference between system-level trimming of multi-level battery protection chips, and the resource occupation of battery protection chip test pins.

[0006] An adjustment control circuit includes a voltage detection circuit, a mode selection circuit, and a forced-on circuit; The voltage detection circuit is used to connect to the power supply connection terminal, receive the first voltage signal output by the power supply connection terminal, and output a voltage detection signal. The mode selection circuit is connected to the voltage detection circuit and is used to output a mode control signal according to the voltage detection signal; The forced start circuit is connected to either of the two charge / discharge switch circuits connected in series. When the mode control signal is in the forced start mode, it controls the charge / discharge switch circuit connected to the forced start circuit to turn on, so that the battery protection chip used to control the other charge / discharge switch circuit can perform parameter testing and / or parameter adjustment normally.

[0007] Furthermore, the voltage detection circuit includes a first voltage divider circuit, a first comparator, and a second comparator; The input terminal of the first voltage divider circuit is connected to the power supply connection terminal, and the output terminal of the first voltage divider circuit is grounded. The first input terminal of the first comparator is connected to the first voltage divider node of the first voltage divider circuit, the first input terminal of the second comparator is connected to the second voltage divider node of the first voltage divider circuit, and the second input terminals of the first comparator and the second comparator are connected together and connected to the reference voltage terminal. The output of the first comparator is used to output a first detection signal, and the output of the second comparator is used to output a second detection signal.

[0008] Furthermore, the first voltage divider circuit includes a first resistor circuit, a second resistor circuit, and a third resistor circuit; The first resistor circuit, the second resistor circuit, and the third resistor circuit are connected in series between the power supply terminal and ground. The connection node between the first resistor circuit and the second resistor circuit is the first voltage divider node; the connection node between the second resistor circuit and the third resistor circuit is the second voltage divider node.

[0009] Furthermore, the mode selection circuit includes a timing decoding circuit, a function locking circuit, and a function selection circuit; The timing decoding circuit is connected to the output of the first comparator and is used to output a mode selection signal according to the first detection signal. The function lock circuit is connected to the output of the second comparator and is used to output a function lock signal according to the second detection signal; The function selection circuit is connected to the timing decoding circuit, the function locking circuit, and the forced activation circuit, and is used to output the mode control signal to the forced activation circuit according to the mode selection signal and the function locking signal.

[0010] Furthermore, the mode selection circuit also includes a comparator signal filtering circuit; the comparator signal filtering circuit is connected to the output terminal of the first comparator and the timing decoding circuit, and is used to suppress interference signals output from the output terminal of the first comparator.

[0011] Furthermore, the forced-on circuit includes a first selector, a second selector, a first CMOS inverter, and a second CMOS inverter; The first input terminal of the first selector is used to connect to the first power supply terminal, the second input terminal of the first selector is used to receive the overcurrent protection signal, the control terminal of the first selector is connected to the mode selection circuit, and the output terminal of the first selector is connected to the input terminal of the first CMOS inverter. The first input terminal of the second selector is used to connect to the first power supply terminal, the second input terminal of the second selector is used to receive an overvoltage protection signal, the control terminal of the second selector is connected to the mode selection circuit, and the output terminal of the second selector is connected to the input terminal of the second CMOS inverter. The output terminal of the first CMOS inverter is connected to the discharge switch transistor of the charge / discharge switch circuit; The output terminal of the second CMOS inverter is connected to the charging switch transistor of the charge / discharge switch circuit.

[0012] A battery protection chip includes the aforementioned adjustment control circuit.

[0013] A battery protection system includes a battery module, at least two charge / discharge switch circuits, and at least two of the above-mentioned battery protection chips; At least two of the charge / discharge switch circuits are connected in series between the battery module and the charge / discharge connection terminal; Each of the charge / discharge switch circuits is connected to one of the battery protection chips.

[0014] Furthermore, each of the battery protection chips has a different overvoltage protection threshold.

[0015] A method for adjusting multi-level battery protection chips, applied to the aforementioned battery protection system, is used to adjust at least two of the battery protection chips in the system. The at least two battery protection chips include a cascaded first-level battery protection chip and a second-level battery protection chip. The method for adjusting the multi-level battery protection chips includes: A first voltage signal is input to the power connection terminal of the second-stage battery protection chip to indicate the forced start mode, so that the second-stage battery protection chip enters the forced start mode and the charge and discharge switch circuit controlled by the second-stage battery protection chip remains on. When the second-level battery protection chip is in the forced-on mode, the first-level battery protection chip is subjected to parameter testing and parameter adjustment. After parameter testing and parameter adjustment of the first-level battery protection chip, the first voltage signal for indicating the forced start mode is input to the power connection terminal of the first-level battery protection chip, so that the first-level battery protection chip enters the forced start mode and the charging and discharging switch circuit controlled by the first-level battery protection chip remains on. When the first-level battery protection chip is in the forced-on mode, the parameters of the second-level battery protection chip are tested and adjusted. After adjusting the parameters of the first-level battery protection chip and the second-level battery protection chip, disable the forced-on mode of the first-level battery protection chip and the forced-on mode of the second-level battery protection chip.

[0016] This invention provides a tuning control circuit, a battery protection chip, a battery protection system, and a tuning method. The tuning control circuit includes a voltage detection circuit, a mode selection circuit, and a forced-on circuit. The voltage detection circuit is connected to a power supply terminal, receives a first voltage signal output from the power supply terminal, and outputs a voltage detection signal. The mode selection circuit is connected to the voltage detection circuit and outputs a mode control signal based on the voltage detection signal. The forced-on circuit is connected to either of two series-connected charge / discharge switch circuits. When the mode control signal is a forced-on signal, it controls the charge / discharge switch circuit connected to the forced-on circuit to conduct, so that the battery protection chip controlling the other charge / discharge switch circuit can perform parameter testing and / or parameter tuning normally. By reusing the power supply terminal, the first voltage signal applied to the power supply terminal is detected, thereby avoiding the cost and complexity of adding dedicated test pins. Through the coordinated work of the voltage detection circuit, the mode selection circuit, and the forced-on circuit, the problem of multi-level battery protection chips being unable to be tested independently due to mutual clamping is solved, providing a foundation for system-level post-tuning. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of a battery protection system in one embodiment of the present invention; Figure 2 This is a schematic diagram of a trimming control circuit in one embodiment of the present invention; Figure 3 This is a flowchart of a method for adjusting a multi-level battery protection chip in one embodiment of the present invention.

[0019] In the diagram: 1. Battery module; 2. At least two charge / discharge switch circuits; 3. At least two battery protection chips; 31. Adjustment control circuit; 311. Voltage detection circuit; 3111. First voltage divider circuit; 3112. First comparator; 3113. Second comparator; 312. Mode selection circuit; 3121. Timing decoding circuit; 3122. Function lockout circuit; 3123. Function selection circuit; 3124. Comparator signal filtering circuit; 313. Forced enable circuit; 3131. First selector; 3132. Second selector; 3133. First CMOS inverter; 3134. Second CMOS inverter. Detailed Implementation

[0020] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] It should be understood that the invention can be embodied in various forms and should not be construed as being limited to the embodiments set forth herein. Rather, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

[0022] To fully understand this invention, detailed structures and steps will be presented in the following description to illustrate the technical solution proposed by this invention. Preferred embodiments of the invention are described in detail below; however, in addition to these detailed descriptions, the invention may have other embodiments.

[0023] This embodiment provides a trimming control circuit 31, such as Figure 2 As shown, the circuit includes a voltage detection circuit 311, a mode selection circuit 312, and a forced-on circuit 313. The voltage detection circuit 311 is connected to the power supply terminal, receives the first voltage signal output from the power supply terminal VDD, and outputs a voltage detection signal. The mode selection circuit 312 is connected to the voltage detection circuit 311 and outputs a mode control signal based on the voltage detection signal. The forced-on circuit 313 is connected to either of the two charge / discharge switch circuits connected in series. When the mode control signal is in the forced-on mode, it controls the charge / discharge switch circuit connected to the forced-on circuit 313 to conduct, so that the battery protection chip used to control the other charge / discharge switch circuit can perform parameter testing and / or parameter adjustment normally.

[0024] As an example, the first voltage signal can be configured according to actual needs to form a square wave signal of a specific voltage sequence to indicate the chip tuning mode.

[0025] As an example, the adjustment control circuit 31 is integrated inside the battery protection chip. The voltage detection circuit 311 continuously monitors the first voltage signal on the power connection terminal VDD of the battery protection chip. The mode selection circuit 312 is connected to the voltage detection circuit 311 and is used to analyze the voltage sequence corresponding to the first voltage signal. When the correct command sequence is identified, the mode selection circuit 312 sends a forced start signal to the forced start circuit 313. After receiving the forced start signal, the forced start circuit 313 overrides the normal protection logic of the battery protection chip and forcibly controls the charge / discharge switch circuit to remain in the conducting state.

[0026] For example, the forced-on circuit 313 is specifically used to connect either of the two charge / discharge switch circuits connected in series. When the forced-on circuit 313 is activated, it controls the charge / discharge switch circuit connected to it to conduct, thereby enabling the battery protection chip controlling the other charge / discharge switch circuit to perform parameter testing and adjustment independently, solving the problem that multi-level battery protection chips cannot be tested independently due to mutual clamping.

[0027] In this embodiment, the adjustment control circuit 31 includes a voltage detection circuit 311, a mode selection circuit 312, and a forced-on circuit 313. The voltage detection circuit 311 is connected to the power connection terminal VDD, receives the first voltage signal output from the power connection terminal VDD, and outputs a voltage detection signal. The mode selection circuit 312 is connected to the voltage detection circuit 311 and outputs a mode control signal based on the voltage detection signal. The forced-on circuit 313 is connected to the charge / discharge switch circuit and controls the charge / discharge switch circuit to turn on the battery module 1 and the charge / discharge connection terminal when the mode control signal is a forced-on signal. By multiplexing the power connection terminal VDD, the first voltage signal applied to the power connection terminal VDD is detected, thereby avoiding the cost and complexity of increasing the cost of dedicated test pins. Through the coordinated work of the voltage detection circuit 311, the mode selection circuit 312, and the forced-on circuit 313, the problem of multi-level battery protection chips being unable to be tested independently due to mutual clamping is solved, providing a foundation for realizing system-level post-adjustment.

[0028] In one embodiment, the voltage detection circuit 311 includes a first voltage divider circuit 3111, a first comparator 3112, and a second comparator 3113. The input terminal of the first voltage divider circuit 3111 is connected to the power supply connection terminal VDD, and the output terminal of the first voltage divider circuit 3111 is grounded. The first input terminal of the first comparator 3112 is connected to the first voltage divider node of the first voltage divider circuit 3111, and the first input terminal of the second comparator 3113 is connected to the second voltage divider node of the first voltage divider circuit 3111. The second input terminals of the first comparator 3112 and the second input terminal of the second comparator 3113 are connected together and connected to the reference voltage terminal VREF1. The output terminal of the first comparator 3112 is used to output a first detection signal, and the output terminal of the second comparator 3113 is used to output a second detection signal.

[0029] As an example, the first voltage divider circuit 3111 includes a first resistor circuit, a second resistor circuit, and a third resistor circuit; the first resistor circuit, the second resistor circuit, and the third resistor circuit are connected in series between the power supply terminal VDD and ground; the connection node between the first resistor circuit and the second resistor circuit is the first voltage divider node; the connection node between the second resistor circuit and the third resistor circuit is the second voltage divider node. Exemplarily, the first resistor circuit includes resistor R11, the second resistor circuit includes resistor R21, and the third resistor circuit includes resistor R31.

[0030] As an example, the non-inverting input of the first comparator 3112 is connected to the first voltage divider node, and the non-inverting input of the second comparator 3113 is connected to the second voltage divider node. The inverting inputs of the first comparator 3112 and the second comparator 3113 are connected to the same reference voltage source. By designing the resistance ratio between the first resistor circuit, the second resistor circuit, and the third resistor circuit, when the first voltage signal is in different voltage ranges, the voltages of the two voltage divider nodes will be compared with the reference voltage provided by the reference voltage terminal VREF1, thereby allowing the first comparator 3112 and the second comparator 3113 to output different logic combinations to characterize the voltage window in which the first voltage signal is located.

[0031] In this embodiment, the second input terminal of the first comparator 3112 and the second input terminal of the second comparator 3113 are connected together and connected to the reference voltage terminal VREF1; the output terminal of the first comparator 3112 is used to output the first detection signal, and the output terminal of the second comparator 3113 is used to output the second detection signal, thereby eliminating the inherent deviation caused by using multiple reference sources, maintaining relative stability, and improving the reliability and robustness of voltage sequence decoding.

[0032] In one embodiment, the mode selection circuit 312 includes a timing decoding circuit 3121, a function locking circuit 3122, and a function selection circuit 3123. The timing decoding circuit 3121 is connected to the output of the first comparator 3112 and is used to output a mode selection signal according to a first detection signal. The function locking circuit 3122 is connected to the output of the second comparator 3113 and is used to output a function locking signal according to a second detection signal. The function selection circuit 3123 is connected to the timing decoding circuit 3121, the function locking circuit 3122, and the forced-on circuit 313 and is used to output a mode control signal to the forced-on circuit 313 according to the mode selection signal and the function locking signal.

[0033] For example, the input of the timing decoding circuit 3121 is connected to the output of the first comparator 3112, used to monitor changes in the first detection signal, to identify the communication start bit and decode the subsequent instruction sequence, for example, changing the communication start bit to a long period of high level. The input of the function lockout circuit 3122 is connected to the output of the second comparator 3113, used to generate a lockout enable based on the state of the second detection signal. The function selection circuit 3123 is connected to both the timing decoding circuit 3121 and the function lockout circuit 3122, combining their output signals to generate a mode control signal and sending it to the forced-on circuit 313.

[0034] As an example, the first comparator 3112 and the second comparator 3113 work together to convert the first voltage signal on the power connection terminal VDD into digital logic. When the first voltage signal is greater than the first threshold VTEST, both the first comparator 3112 and the second comparator 3113 output 1; when the first voltage signal is between the second threshold VOC and the first threshold VTEST, the first comparator 3112 outputs 0 and the second comparator 3113 outputs 1; when the first voltage signal is less than the second threshold VOC, both the first comparator 3112 and the second comparator 3113 output 0.

[0035] The timing decoding circuit 3121 listens to the first detection signal output by the first comparator 3112 to identify the start signal of communication, which is a long period of high level or a cluster of high-frequency clock pulses. After confirming the start, it reads the subsequent 0s and 1s of the first detection signal bit by bit according to the preset timing sequence and combines them into a complete instruction code. That is, the timing decoding circuit 3121 parses the combination of 0s and 1s in the first detection signal into different operation instructions, such as forced start, parameter reading, or writing, according to the preset protocol.

[0036] The function lock circuit 3122 listens to the second detection signal output by the second comparator 3113. The state of the function lock circuit 3122 is determined by the second detection signal: when the second detection signal is 1, the function lock circuit 3122 is in the unlocked state; when the second detection signal changes from 1 to 0, this falling edge will serve as a trigger condition to cause the function lock circuit 3122 to enter and remain in the locked state.

[0037] The function selection circuit 3123 receives instruction codes from the timing decoding circuit 3121 and lock status from the function locking circuit 3122. If the instruction code is for writing or reading trimming parameters, the function selection circuit 3123 directly initiates the corresponding read / write logic. If the instruction code is forcibly enabled, the function selection circuit 3123, after receiving the lock confirmation signal from the function locking circuit 3122, outputs and maintains a forced-enabled signal, i.e., a mode control signal, to ensure that the mode remains stable and undisturbed during subsequent testing until the chip is powered off and reset. Through this division of labor, complex multi-instruction communication and reliable state control are achieved through a single power supply connection terminal VDD.

[0038] In one embodiment, the mode selection circuit 312 further includes a comparator signal filtering circuit 3124; the comparator signal filtering circuit 3124 is connected to the output terminal of the first comparator 3112 and the timing decoding circuit 3121, and is used to suppress interference signals output from the output terminal of the first comparator 3112. In this embodiment, the comparator signal filtering circuit 3124 is connected to the output terminal of the first comparator 3112 and the timing decoding circuit 3121, and is used to suppress interference signals output from the output terminal of the first comparator 3112, so as to ensure the accuracy and reliability of the first detection signal.

[0039] In one embodiment, the forced-on circuit 313 includes a first selector 3131, a second selector 3132, a first CMOS inverter, and a second CMOS inverter. The first input terminal of the first selector 3131 is connected to a first power supply terminal, the second input terminal of the first selector 3131 is used to receive an overcurrent protection signal OCP, the control terminal of the first selector 3131 is connected to a mode selection circuit 312, and the output terminal of the first selector 3131 is connected to the input terminal of the first CMOS inverter. The first input terminal of the second selector 3132 is connected to the first power supply terminal, the second input terminal of the second selector 3132 is used to receive an overvoltage protection signal ODP, the control terminal of the second selector 3132 is connected to the mode selection circuit 312, and the output terminal of the second selector 3132 is connected to the input terminal of the second CMOS inverter. The output terminal of the first CMOS inverter is connected to the discharge switch transistor of the charge / discharge switch circuit, and the output terminal of the second CMOS inverter is connected to the charge switch transistor of the charge / discharge switch circuit.

[0040] In this embodiment, the two input terminals of the first selector 3131 are respectively connected to a fixed high level and the overcurrent protection signal OCP inside the battery protection chip. The control terminal of the first selector 3131 is connected to the mode selection circuit 312. The output terminal of the first selector 3131 drives the discharge switch transistor after passing through the first CMOS inverter. The two input terminals of the second selector 3132 are respectively connected to a fixed high level and the overvoltage protection signal ODP inside the battery protection chip. The control terminal of the second selector 3132 is connected to the mode selection circuit 312. The output terminal of the second selector 3132 drives the charging switch transistor after passing through the second CMOS inverter. When the mode selection circuit 312 outputs a forced start signal, the first selector 3131 and the second selector 3132 select the fixed high level of the first power supply terminal. After passing through the first CMOS inverter and the second CMOS inverter, a complete turn-on voltage is provided for the gate of the external discharge switch transistor and the gate of the charging switch transistor, forcibly opening the charging and discharging path. Seamless and fast switching between normal protection mode and forced turn-on mode is achieved by using a gating device, and sufficient drive capability is provided by a CMOS inverter to ensure that the external high-power switching transistor can be fully turned on.

[0041] This embodiment provides a battery protection chip, including the adjustment control circuit 31 described above. In this embodiment, in addition to conventional overvoltage, undervoltage, and overcurrent detection comparators, a logic control unit, and a reference voltage source, the battery protection chip also integrates the adjustment control circuit 31 described above. The voltage detection module of the adjustment control circuit 31 is connected to the power supply terminal VDD of the battery protection chip, and the output of its forced-on circuit 313 is directly connected to the drive circuit that controls the charging and discharging circuit.

[0042] like Figure 1 As shown, this embodiment provides a battery protection system including a battery module 1, at least two charge / discharge switch circuits 2, and at least two battery protection chips 3; the at least two charge / discharge switch circuits 2 are connected in series between the battery module 1 and the charge / discharge connection terminal; each charge / discharge switch circuit is connected to a battery protection chip.

[0043] For example, two charge / discharge switch circuits are connected in series between the negative terminal of battery module 1 and the charge / discharge connection terminal, which is used to connect a load or charger. Each charge / discharge switch circuit includes a charging switch transistor and a discharging switch transistor. The first-stage battery protection chip monitors the battery voltage and current, and its output controls the charge / discharge switch circuit near the side of battery module 1. The second-stage battery protection chip also monitors the battery, and its output controls the charge / discharge switch circuit near the side of the charge / discharge connection terminal. Both the first-stage and second-stage battery protection chips have built-in adjustment control circuits 31 as described in the above embodiment, and their forced-on circuits 313 are respectively connected to the charge / discharge switch circuits they control. This battery protection system sets different protection thresholds on the battery protection chips at different levels, for example, the overcharge point of the first-stage battery protection chip is 4.30V and that of the second-stage battery protection chip is 4.35V, and uses the adjustment control circuits 31 as described in the above embodiment to independently calibrate each stage, ensuring that each level of protection can operate at a precise and designed voltage point, avoiding false protection or protection failure, and greatly improving the safety and performance of the entire battery module 1. During system-level tuning, the corresponding battery protection chip can be forced into the on-state mode by inputting the corresponding first voltage signal to the VCH1 and VCH2 ports respectively.

[0044] In one embodiment, each battery protection chip has a different overvoltage protection threshold. This achieves a gradient in protection action, with the first level acting as the primary protection and the second level as a redundant backup, operating at higher and more dangerous voltage points, ensuring the accuracy of the two threshold levels after system-level testing.

[0045] As an example, battery module 1 includes a lithium-ion battery or a sodium-ion battery.

[0046] This embodiment provides a method for adjusting a multi-level battery protection chip, applicable to, for example... Figure 1 In the battery protection system shown in the embodiment, at least two battery protection chips in the battery protection system are used for adjustment. These at least two battery protection chips include a cascaded first-stage battery protection chip and a second-stage battery protection chip, such as... Figure 3 As shown, the adjustment method for a multi-level battery protection chip includes the following steps: Step S1: Input a first voltage signal to the power connection terminal of the second-stage battery protection chip to indicate the forced-on mode, so that the second-stage battery protection chip enters the forced-on mode, and the charge / discharge switch circuit controlled by the second-stage battery protection chip remains on. At this time, the forced-on circuit within the second-stage battery protection chip operates, forcibly keeping the charge / discharge switch circuit controlled by the second-stage battery protection chip in a conducting state.

[0047] Among them, the power connection terminal of the second-level battery protection chip is, for example... Figure 1The VCH2 port is shown. The first voltage signal is a square wave signal of a specific voltage sequence to indicate the chip's tuning mode, which can be configured according to actual needs.

[0048] Step S2: When the second-level battery protection chip is in forced-on mode, perform parameter testing and parameter adjustment on the first-level battery protection chip.

[0049] The parameter tests include, but are not limited to: overcharge protection voltage threshold (VOC), over-discharge protection voltage threshold (VOD), discharge overcurrent protection threshold (VDI), charge overcurrent protection threshold (VCI), and internal oscillator frequency (OSC) tests. Based on the deviation between the test results and the target values, a corresponding trimming code is calculated. Subsequently, the trimming code is written into the non-volatile memory (such as eFUSE or OTP) of the first-level battery protection chip via the communication interface, completing the parameter trimming.

[0050] Step S3: After testing and adjusting the parameters of the first-stage battery protection chip, input a first voltage signal to the power connection terminal of the first-stage battery protection chip to indicate the forced-on mode, so that the first-stage battery protection chip enters the forced-on mode, and the charge / discharge switch circuit controlled by the first-stage battery protection chip remains on. The power connection terminal of the first-stage battery protection chip is, for example... Figure 1 The VCH1 port is shown.

[0051] Step S4: When the first-level battery protection chip is in forced-on mode, perform parameter testing and adjustment on the second-level battery protection chip. This process is the same as step S2, including testing, adjusting code calculation, and writing of parameters such as VOC, VOD, VDI, VCI, and OSC.

[0052] Step S5: After adjusting the parameters of the first-level and second-level battery protection chips, disable the forced-on mode of both chips to restore their normal protection functions. This operation can be achieved by powering off and resetting the system, or by applying a specific exit command sequence.

[0053] In this embodiment, by using the above method, the control functions of adjacent chips are disabled by forcibly enabling the system-level test, thereby achieving independent and precise post-adjustment of various key protection parameters of the series multi-level battery protection chip, effectively compensating for packaging drift.

[0054] This embodiment provides an electronic device, including the battery protection system described above.

[0055] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A trimming control circuit, characterized in that, Includes voltage detection circuit, mode selection circuit, and forced-on circuit; The voltage detection circuit is used to connect to the power supply connection terminal, receive the first voltage signal output by the power supply connection terminal, and output a voltage detection signal. The mode selection circuit is connected to the voltage detection circuit and is used to output a mode control signal according to the voltage detection signal; The forced start circuit is connected to either of the two charge / discharge switch circuits connected in series. When the mode control signal is a forced adjustment signal, it controls the charge / discharge switch circuit connected to the forced start circuit to conduct, so that the battery protection chip used to control the other charge / discharge switch circuit can perform parameter testing and / or parameter adjustment normally.

2. The adjustment control circuit according to claim 1, characterized in that, The voltage detection circuit includes a first voltage divider circuit, a first comparator, and a second comparator; The input terminal of the first voltage divider circuit is connected to the power supply connection terminal, and the output terminal of the first voltage divider circuit is grounded. The first input terminal of the first comparator is connected to the first voltage divider node of the first voltage divider circuit, the first input terminal of the second comparator is connected to the second voltage divider node of the first voltage divider circuit, and the second input terminals of the first comparator and the second comparator are connected together and connected to the reference voltage terminal. The output of the first comparator is used to output a first detection signal, and the output of the second comparator is used to output a second detection signal.

3. The adjustment control circuit according to claim 2, characterized in that, The first voltage divider circuit includes a first resistor circuit, a second resistor circuit, and a third resistor circuit; The first resistor circuit, the second resistor circuit, and the third resistor circuit are connected in series between the power supply terminal and ground. The connection node between the first resistor circuit and the second resistor circuit is the first voltage divider node; the connection node between the second resistor circuit and the third resistor circuit is the second voltage divider node.

4. The adjustment control circuit according to claim 2, characterized in that, The mode selection circuit includes a timing decoding circuit, a function locking circuit, and a function selection circuit. The timing decoding circuit is connected to the output of the first comparator and is used to output a mode selection signal according to the first detection signal. The function lock circuit is connected to the output of the second comparator and is used to output a function lock signal according to the second detection signal; The function selection circuit is connected to the timing decoding circuit, the function locking circuit, and the forced activation circuit, and is used to output the mode control signal to the forced activation circuit according to the mode selection signal and the function locking signal.

5. The adjustment control circuit according to claim 4, characterized in that, The mode selection circuit further includes a comparator signal filtering circuit; the comparator signal filtering circuit is connected to the output of the first comparator and the timing decoding circuit, and is used to suppress interference signals output from the output of the first comparator.

6. The adjustment control circuit according to claim 1, characterized in that, The forced-on circuit includes a first selector, a second selector, a first CMOS inverter, and a second CMOS inverter; The first input terminal of the first selector is used to connect to the first power supply terminal, the second input terminal of the first selector is used to receive the overcurrent protection signal, the control terminal of the first selector is connected to the mode selection circuit, and the output terminal of the first selector is connected to the input terminal of the first CMOS inverter. The first input terminal of the second selector is used to connect to the first power supply terminal, the second input terminal of the second selector is used to receive an overvoltage protection signal, the control terminal of the second selector is connected to the mode selection circuit, and the output terminal of the second selector is connected to the input terminal of the second CMOS inverter. The output terminal of the first CMOS inverter is connected to the discharge switch transistor of the charge / discharge switch circuit; The output terminal of the second CMOS inverter is connected to the charging switch transistor of the charge / discharge switch circuit.

7. A battery protection chip, characterized in that, Includes the adjustment control circuit as described in any one of claims 1 to 6.

8. A battery protection system, characterized in that, Includes a battery module, at least two charge / discharge switch circuits, and at least two battery protection chips as described in claim 7; At least two of the charge / discharge switch circuits are connected in series between the battery module and the charge / discharge connection terminal; Each of the charge / discharge switch circuits is connected to one of the battery protection chips.

9. The battery protection system according to claim 8, characterized in that, Each of the battery protection chips has a different overvoltage protection threshold.

10. A method for adjusting a multi-level battery protection chip, characterized in that, Applied to the battery protection system of claim 8 or 9, for adjusting at least two of the battery protection chips in the battery protection system, wherein the at least two battery protection chips include a cascaded first-stage battery protection chip and a second-stage battery protection chip, and the adjustment method of the multi-stage battery protection chips includes: A first voltage signal is input to the power connection terminal of the second-stage battery protection chip to indicate the forced start mode, so that the second-stage battery protection chip enters the forced start mode and the charge and discharge switch circuit controlled by the second-stage battery protection chip remains on. When the second-level battery protection chip is in the forced-on mode, the first-level battery protection chip is subjected to parameter testing and parameter adjustment. After parameter testing and parameter adjustment of the first-level battery protection chip, the first voltage signal for indicating the forced start mode is input to the power connection terminal of the first-level battery protection chip, so that the first-level battery protection chip enters the forced start mode and the charging and discharging switch circuit controlled by the first-level battery protection chip remains on. When the first-level battery protection chip is in the forced-on mode, the parameters of the second-level battery protection chip are tested and adjusted. After adjusting the parameters of the first-level battery protection chip and the second-level battery protection chip, disable the forced-on mode of the first-level battery protection chip and the forced-on mode of the second-level battery protection chip.

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