System and method for non-contact measurement of energy barriers during device fabrication

Abstract

Systems and methods for measuring an energy barrier of a transistor during fabrication of the transistor, including: determining a photocurrent of the transistor for each of a plurality of photon energies; determining an energy barrier based on a photocurrent of each of a plurality of landing energies of the charged particle beam; and determining an energy barrier of the transistor, wherein the energy barrier is a zero voltage energy barrier or a substantially near zero voltage energy barrier. The method includes irradiating the gate with a charged particle beam; irradiating the lower part of the grid electrode by using a photon beam; determining a secondary electron (SE) yield at each of the plurality of photon energies; and determining an energy barrier of the transistor.

Description

Cross-reference to related applications

[0001] This application claims priority to U.S. Application 63 / 585,083, filed September 25, 2023, and U.S. Application 63 / 600,634, filed November 17, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This article describes a method for non-contact measurement of energy barriers during the fabrication of devices in charged particle systems. Background Technology

[0003] In the manufacturing process of integrated circuits (ICs), incomplete or completed circuit components are inspected to ensure they are manufactured according to the design and free of defects. Inspection systems using optical microscopes typically have a resolution as low as a few hundred nanometers; and this resolution is limited by the wavelength of light. As the physical dimensions of IC components continue to shrink to sub-100 nanometers or even sub-10 nanometers, inspection systems with higher resolution than those using optical microscopes are needed.

[0004] Charged particle (electron) beam microscopy (such as scanning electron microscopy (SEM) or transmission electron microscopy (TEM)) with resolutions as low as less than 1 nanometer serves as a practical tool for inspecting IC components with feature sizes in the sub-100 nanometer range. Using SEM, electrons from a single primary electron beam or multiple primary electron beams can be focused onto a location of interest on the wafer being inspected. The primary electrons interact with the wafer and can be backscattered or cause the wafer to emit secondary electrons. The intensity of the electron beam, including backscattered and secondary electrons, can vary based on the properties of the wafer's internal and external structure, thus indicating whether the wafer has defects. Summary of the Invention

[0005] Embodiments of this disclosure provide systems and methods for non-contact measurement of energy barriers during device fabrication. In some embodiments, the system, method, and non-transient computer-readable medium may include irradiating a gate of a transistor with a beam of charged particles; irradiating material beneath the gate with a beam of photons; determining a photocurrent of the transistor for each of a plurality of photon energies; determining an energy barrier based on the determined photocurrent; determining a plurality of energy barriers based on the photocurrent of each of a plurality of landing energies of the determined charged particle beam; plotting the plurality of energy barriers against a plurality of oxide electric fields; and determining the energy barrier of the transistor based at least in part on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier.

[0006] The embodiment includes irradiating the gate of a transistor with a charged particle beam at a first landing energy; irradiating the material below the gate with a photon beam; determining a first plurality of photocurrents of the transistor across a first plurality of photon energies; determining a first energy barrier based on the determined first plurality of photocurrents; irradiating the gate of the transistor with a charged particle beam at a second landing energy; irradiating the material below the gate with a photon beam; determining a second plurality of photocurrents of the transistor across a second plurality of photon energies; determining a second energy barrier based on the determined second plurality of photocurrents; drawing the first and second energy barriers relative to a plurality of oxide electric fields; and determining the energy barrier of the transistor at least in part based on the drawing, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier.

[0007] The embodiments include irradiating the gate of a transistor with a beam of charged particles; irradiating the material beneath the gate with a beam of photons; determining the secondary electron (SE) yield at each of a plurality of photon energies; plotting the SE yield relative to the plurality of photon energies; and determining the energy barrier of the transistor at least in part based on the plotting, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier.

[0008] The embodiments include providing a plurality of charged particles to the gate of a transistor; providing a plurality of photon particles to a material below the gate; generating a grayscale value at each of the plurality of photon energies using a charged particle beam tool; determining the secondary electron (SE) yield at each of the plurality of photon energies; and determining the energy barrier of the transistor based at least in part on the determined SE yield and the plurality of photon energies, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier. Attached Figure Description

[0009] Figure 1 This is a schematic diagram illustrating an exemplary electron beam inspection (EBI) system consistent with embodiments of the present disclosure.

[0010] Figure 2A The illustration shows a schematic diagram of an exemplary multi-beam system consistent with embodiments of the present disclosure. Figure 1 This is part of an exemplary charged particle beam inspection system.

[0011] Figure 2B This is a schematic diagram illustrating an exemplary single-beam system consistent with embodiments of the present disclosure. Figure 1 This is part of an exemplary charged particle beam inspection system.

[0012] Figure 3 An exemplary graph illustrating the yield of total electrons (secondary electrons and backscattered electrons) relative to the landing energy of the primary electron beam is shown, consistent with embodiments of this disclosure.

[0013] Figure 4 A schematic diagram illustrating an exemplary voltage contrast response of a wafer consistent with embodiments of the present disclosure is shown.

[0014] Figure 5 A schematic diagram of an exemplary electron beam system consistent with embodiments of the present disclosure is shown.

[0015] Figure 6 The illustration shows an energy band diagram of a barrier height consistent with embodiments of the present disclosure for a metal-oxide-semiconductor (MOS) structure.

[0016] Figure 7 A typical IPE spectral setting is shown.

[0017] Figure 8 A sample of a charged particle system consistent with embodiments of this disclosure is shown.

[0018] Figure 9 An exemplary graph of photocurrent as a function of photon energy for a particular gate bias, consistent with embodiments of this disclosure, is shown.

[0019] Figure 10 An exemplary graph of the energy barrier as a function of the oxide electric field, consistent with embodiments of this disclosure, is shown.

[0020] Figure 11 An exemplary graph of normalized photocurrent as a function of photon energy for different gate biases, consistent with embodiments of this disclosure, is shown.

[0021] Figure 12 An exemplary graph of normalized SE yield as a function of photon energy at laser power, consistent with embodiments of this disclosure, is shown.

[0022] Figure 13 An exemplary process for measuring the energy barrier of a transistor during its fabrication, consistent with embodiments of this disclosure, is shown.

[0023] Figure 14 An exemplary process for measuring the energy barrier of a transistor during its fabrication, consistent with embodiments of this disclosure, is shown. Detailed Implementation

[0024] Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings, wherein, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The implementations set forth in the following description of the exemplary embodiments do not represent all implementations consistent with this disclosure. Rather, these implementations are merely examples of apparatuses and methods consistent with various aspects of the subject matter as set forth in the appended claims. For example, although some embodiments are described in the context of the use of electron beams, this disclosure is not limited thereto. Other types of charged particle beams can be applied similarly. Furthermore, other imaging systems, such as optical imaging, photoelectric detection, X-ray detection, extreme ultraviolet inspection, deep ultraviolet inspection, etc., can be used, where they generate images of the corresponding type.

[0025] Electronic devices consist of circuits formed on a silicon wafer (or other material such as GaAs) called a substrate. Many circuits can be formed together on the same silicon wafer and are called integrated circuits or ICs. The size of these circuits has drastically decreased, allowing more circuits to be mounted on the substrate. For example, the IC chip in a smartphone can be as small as a fingernail but can include more than 2 billion transistors, each less than 1 / 1000th the size of a human hair.

[0026] Manufacturing these tiny ICs is a complex, time-consuming, and expensive process, typically involving hundreds of individual steps. Even an error in a single step can render a completed IC defective and unusable. Therefore, one goal of the manufacturing process is to avoid such defects in order to maximize the number of functional ICs manufactured in the process, i.e., to increase the overall yield of the process.

[0027] A key component of increasing productivity is monitoring the chip manufacturing process to ensure a sufficient number of functional ICs are produced. One way to monitor this process is to inspect it at each stage of chip circuit structure formation. This inspection can be performed using a scanning electron microscope (SEM). SEMs are used to image these extremely small structures, essentially taking "photographs" of the wafer structure. This image can be used to determine if the structure is formed correctly and in the correct location. If a defect is found, the process can be adjusted to make it less likely to recur. Defects can be generated during various stages of semiconductor processing. For the reasons explained above, it is crucial to detect defects early, accurately, and efficiently.

[0028] A Sequencing Electron Microscope (SEM) works similarly to a camera. A camera takes a picture by receiving and recording the brightness and color of light reflected or emitted from a person or object. A Sequencing Electron Microscope (SEM) takes a "picture" by receiving and recording the energy or number of electrons reflected or emitted from a structure. Before taking this "picture," an electron beam can be projected onto the structure, and as electrons are reflected or emitted ("leaving") from the structure, the SEM's detector can receive and record the energy or number of these electrons to generate an image. To take this "picture," some SEMs use a single electron beam (called a "single-beam SEM"), while others use multiple electron beams (called a "multi-beam SEM") to take multiple "pictures" of the wafer. By using multiple electron beams, the SEM can project more electron beams onto the structure to obtain these multiple "pictures," thus allowing more electrons to leave the structure. Therefore, the detector can receive more leaving electrons simultaneously and generate images of the wafer structure with greater efficiency and faster speed. SEMs can be used to image ICs after manufacturing.

[0029] One difference between SEM and a camera is that in a camera, the entire area being observed is illuminated, and the sample is imaged using lenses on a sensor with many pixels. An image is obtained by reading out all the pixels. In an SEM, the detector does not need to have pixels because the electron beam is focused onto tiny (e.g., nanometer-scale) spots scanned on the sample. The "photograph" made with an SEM is an xy plot of the signal as a function of beam position. In an SEM, no lens focuses the signal from the sample onto the detector.

[0030] As explained above, an IC is made up of a large number of transistors. One of the parameters used to select the material for the metal gate of a transistor is the band offset at the gate / dielectric layer / semiconductor structure interface, which greatly affects the electrical performance of the device. The gate work function is related to the barrier height or band offset at the interface of the device structure.

[0031] One of the key metrics of transistors is their threshold voltage. The threshold voltage is set by the work function of the metal used as the gate metal. The threshold voltage of a transistor can be fine-tuned by adjusting the work function of the metal gate. Therefore, the energy barriers of the transistor's metal / oxide / semiconductor structure are crucial for the proper functioning of the manufactured circuit. These barriers are set once the gate metal is deposited, when the transistor is essentially complete.

[0032] However, typical transistor manufacturing methods are constrained. The band alignment of these structures is not checked during the manufacturing process. Instead, the transistor threshold voltage is checked by probe cards in scribe lines after several metallization steps, which can continue for days or weeks after transistor formation. Actual products are only tested at the end of the manufacturing process, and the work function of the metal cannot be changed further. Therefore, typical transistors may be manufactured with suboptimal threshold voltages and electrical performance. The delay in testing actual products at the end of the manufacturing process is also problematic, as it prolongs the feedback loop of the optimization process, and by the time problems are discovered, more wafers with suboptimal parameters will have been manufactured.

[0033] In addition, the physical contact between the probe card and the chip is a source of stress and particles that can negatively impact the device manufacturing process.

[0034] Therefore, a method is needed to measure the band alignment of metals / oxides / semiconductors on the product structure during the manufacturing process.

[0035] The disclosed embodiments provide systems and methods for addressing some or all of these drawbacks by providing non-contact measurements of the energy barrier during device fabrication in charged particle systems.

[0036] The disclosed embodiments may include, for each of a plurality of landing energies of a charged particle beam: irradiating the gate of a transistor with the charged particle beam; irradiating the material beneath the gate with a photon beam; determining the photocurrent of the transistor for each of the plurality of photon energies; determining an energy barrier based on the determined photocurrent; determining a plurality of energy barriers based on the photocurrent of each of the plurality of landing energies of the charged particle beam; drawing the plurality of energy barriers relative to a plurality of oxide electric fields; and determining the energy barrier of the transistor at least in part based on the drawing, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier.

[0037] The disclosed embodiments may include irradiating the gate of a transistor with a beam of charged particles; irradiating the material beneath the gate with a beam of photons; determining the secondary electron (SE) yield at each of a plurality of photon energies; plotting the SE yield relative to the plurality of photon energies; and determining the energy barrier of the transistor at least in part based on the plotting, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier.

[0038] For clarity, the relative dimensions of the components in the accompanying drawings may be exaggerated. Throughout the following description of the drawings, the same or similar reference numerals refer to the same or similar components or entities, and only differences relative to the various embodiments are described.

[0039] As used herein, unless otherwise specified, the term "or" covers all possible combinations except those that are not feasible. For example, if a descriptive component may include A or B, then unless otherwise specified or not feasible, the component may include A or B or A and B. As a second example, if a descriptive component may include A, B, or C, then unless otherwise specified or not feasible, the component may include A or B or C, or A and B, or A and C, or B and C, or A and B and C.

[0040] Some embodiments can be described in the context of providing detectors and detection methods in systems utilizing electron beams without limiting the scope of this disclosure. However, this disclosure is not limited thereto. Other types of charged particle beams can be applied similarly. Furthermore, the systems and methods used for detection can be used in other imaging systems, such as optical imaging, photon detection, X-ray detection, ion detection, etc.

[0041] Figure 1 An exemplary electron beam inspection (EBI) system 100 consistent with embodiments of this disclosure is illustrated. The EBI system 100 can be used for imaging. Figure 1 As shown, the EBI system 100 includes a main chamber 101, a loading / locking chamber 102, an electron beam tool 104, and an equipment front-end module (EFEM) 106. The electron beam tool 104 is located within the main chamber 101. The EFEM 106 includes a first loading port 106a and a second loading port 106b. The EFEM 106 may include (multiple) additional loading ports. The first loading port 106a and the second loading port 106b receive wafer front-opening transfer cassettes (FOUPs) containing wafers to be inspected (e.g., one or more semiconductor wafers made of (one or more) other materials) or samples (wafers and samples are interchangeable). A “batch” is a plurality of wafers that can be processed as a batch load.

[0042] One or more robotic arms (not shown) in EFEM 106 can transport the wafer to loading / locking chamber 102. Loading / locking chamber 102 is connected to a loading / locking vacuum pump system (not shown), which removes gas molecules from loading / locking chamber 102 to achieve a first pressure below atmospheric pressure. After reaching the first pressure, one or more robotic arms (not shown) can transport the wafer from loading / locking chamber 102 to main chamber 101. Main chamber 101 is connected to a main chamber vacuum pump system (not shown), which removes gas molecules from main chamber 101 to achieve a second pressure below the first pressure. After reaching the second pressure, the wafer is inspected by electron beam tool 104. Electron beam tool 104 can be a single-beam system or a multi-beam system.

[0043] The controller 109 is electronically connected to the electron beam tool 104. The controller 109 may be a computer configured to perform various controls of the EBI system 100. Although in Figure 1 The controller 109 is shown outside the structure including the main chamber 101, the loading / locking chamber 102 and the EFEM 106, but it should be understood that the controller 109 may be part of the structure.

[0044] In some embodiments, controller 109 may include one or more processors (not shown). A processor may be a general-purpose or specific electronic device capable of manipulating or processing information. For example, a processor may include any number of central processing units (or “CPU”), graphics processing units (or “GPU”), optical processors, programmable logic controllers, microcontrollers, microprocessors, digital signal processors, intellectual property (IP) cores, programmable logic arrays (PLAs), programmable array logic (PALs), general-purpose array logic (GALs), complex programmable logic devices (CPLDs), field-programmable gate arrays (FPGAs), system-on-a-chip (SoCs), application-specific integrated circuits (ASICs), and any combination of any type of circuitry capable of data processing. A processor may also be a virtual processor, comprising one or more processors distributed across multiple machines or devices coupled via a network.

[0045] In some embodiments, controller 109 may also include one or more memories (not shown). Memory can be a general-purpose or specific electronic device capable of storing processor-accessible (e.g., via a bus) code and data. For example, memory can include any number of random access memory (RAM), read-only memory (ROM), optical disc, magnetic disk, hard disk, solid-state drive, flash drive, secure digital (SD) card, memory stick, compact flash (CF) card, or any combination of any type of storage device. Code can include an operating system (OS) and one or more applications (or "applications") for a specific task. Memory can also be virtual memory, comprising one or more memories distributed across multiple machines or devices coupled via a network.

[0046] Embodiments of this disclosure can provide a single charged particle beam imaging system (“single-beam system”). Compared to a single-beam system, a multi-charged particle beam imaging system (“multi-beam system”) can be designed to optimize throughput for different scanning modes. Embodiments of this disclosure provide a multi-beam system with the ability to optimize throughput for different scanning modes by using beam arrays with different geometries and adapting to different throughput and resolution requirements.

[0047] Now for reference Figure 2A , Figure 2AThis is a schematic diagram illustrating an exemplary electron beam tool 104 consistent with embodiments of the present disclosure, the electron beam tool 104 including as... Figure 1 The electron beam tool 104 is a multi-beam inspection tool that is part of the EBI system 100. In some embodiments, the electron beam tool 104 can operate as a single-beam inspection tool. Figure 1 This is part of the EBI system 100. The multi-beam electron beam tool 104 (also referred to herein as device 104) includes an electron source 201, a coulomb aperture plate (or “gun-hole plate”) 271, a condenser lens 210, a source conversion unit 220, a primary projection system 230, a stage 209, and a sample holder 207 supported by the stage 209 to hold a sample 208 (e.g., a wafer or photomask) to be inspected. The multi-beam electron beam tool 104 may also include a secondary projection system 250 and an electronic inspection device 240. The primary projection system 230 may include an objective lens 231. The electronic inspection device 240 may include multiple inspection elements 241, 242, and 243. A beam splitter 233 and a deflection scanning unit 232 may be positioned within the primary projection system 230.

[0048] The electronic source 201, coulomb aperture plate 271, condenser lens 210, source conversion unit 220, beam splitter 233, deflection scanning unit 232, and primary projection system 230 can be aligned with the primary optical axis 204 of device 104. The secondary projection system 250 and electronic detection device 240 can be aligned with the secondary optical axis 251 of device 104.

[0049] The electron source 201 may include a cathode (not shown) and an extractor or anode (not shown), wherein, during operation, the electron source 201 is configured to emit primary electrons from the cathode, and the primary electrons are extracted or accelerated by the extractor and / or the anode to form a primary electron beam 202, which forms a primary beam cross (virtual or real) 203. The primary electron beam 202 can be visualized as being emitted from the primary beam cross 203.

[0050] Source conversion unit 220 may include an image forming element array (not shown), an aberration compensator array (not shown), a beam-limiting aperture array (not shown), and a pre-bent micro-polarizer array (not shown). In some embodiments, the pre-bent micro-polarizer array deflects multiple primary beam waves 211, 212, 213 of the primary electron beam 202 so that they enter the beam-limiting aperture array, the image forming element array, and the aberration compensator array normally. In some embodiments, device 104 may operate as a single-beam system, thereby generating a single primary beam wave. In some embodiments, condenser lens 210 is designed to focus the primary electron beam 202 to become a parallel beam and to be normally incident on source conversion unit 220. The image forming element array may include multiple micro-polarizers or microlenses to influence the multiple primary beam waves 211, 212, 213 of the primary electron beam 202 and form multiple parallel images (virtual or real) of the primary beam cross 203, one parallel image for each of the primary beam waves 211, 212, and 213. In some embodiments, the aberration compensator array may include a field curvature compensator array (not shown) and an astigmatism compensator array (not shown). The field curvature compensator array may include a plurality of microlenses to compensate for field curvature aberrations of primary beams 211, 212, and 213. The astigmatism compensator array may include a plurality of micro-astigmatism reducers to compensate for astigmatic aberrations of primary beams 211, 212, and 213. A beam-limiting aperture array may be configured to limit the diameter of each primary beam 211, 212, and 213. Figure 2A Three primary beams 211, 212, and 213 are shown as examples, and it should be understood that the source conversion unit 220 can be configured to form any number of primary beams. The controller 109 can be connected to... Figure 1 Various components of the EBI system 100, such as the source conversion unit 220, the electronic detection device 240, the primary projection system 230, or the motorized stage 209. In some embodiments, as explained in further detail below, the controller 109 can perform various image and signal processing functions. The controller 109 can also generate various control signals to manage the operation of the charged particle beam inspection system.

[0051] Condenser lens 210 is configured to focus primary electron beam 202. Condenser lens 210 can also be configured to adjust the current of primary beams 211, 212, and 213 downstream of source conversion unit 220 by changing the focusing capability of condenser lens 210. Alternatively, the current can be changed by altering the radial dimensions of the apertures within the aperture array corresponding to each primary beam. The current can be changed by altering the radial dimensions of the apertures and the focusing capability of condenser lens 210. Condenser lens 210 can be an adjustable condenser lens, configured such that the position of its first principal plane is movable. The adjustable condenser lens can be configured to be magnetic, which can cause off-axis beams 212 and 213 to irradiate source conversion unit 220 at a rotational angle. The rotational angle varies with the focusing capability or the position of the first principal plane of the adjustable condenser lens. Condenser lens 210 can be an anti-rotation condenser lens, configured to maintain a constant rotational angle while the focusing capability of condenser lens 210 is changed. In some embodiments, the condenser lens 210 may be an adjustable anti-rotation condenser lens, wherein the rotation angle remains constant as its focusing capability and the position of the first principal plane change.

[0052] Objective lens 231 can be configured to focus beams 211, 212, and 213 onto sample 208 for inspection, and in the current embodiment, three probe spots 221, 222, and 223 can be formed on the surface of sample 208. Coulomb aperture plate 271 is configured in operation to block peripheral electrons of the primary electron beam 202 to reduce the Coulomb effect. The Coulomb effect can increase the size of each of the probe spots 221, 222, and 223 of the primary beams 211, 212, and 213, thus reducing the inspection resolution.

[0053] Beam splitter 233 can be, for example, a Wien filter, including an electrostatic deflector that generates electrostatic dipole fields and magnetic dipole fields. Figure 2A (Not shown in the diagram). In operation, beam splitter 233 can be configured to apply electrostatic forces to the individual electrons of primary beams 211, 212, and 213 via an electrostatic dipole field. The electrostatic forces are equal in magnitude but opposite in direction to the magnetic forces applied to the individual electrons by the magnetic dipole field of beam splitter 233. Primary beams 211, 212, and 213 can therefore pass through beam splitter 233 at least substantially straight with a deflection angle of at least substantially zero.

[0054] Deflection scanning unit 232 is configured in operation to deflect primary beams 211, 212, and 213 to scan probe spots 221, 222, and 223 in various scanning regions within segments of the surface of sample 208. In response to primary beams 211, 212, and 213 or probe spots 221, 222, and 223 incident on sample 208, electrons emerge from sample 208 and generate three secondary electron beams 261, 262, and 263. Each of the secondary electron beams 261, 262, and 263 typically comprises secondary electrons (electron energy ≤ 50 eV) and backscattered electrons (electron energy between 50 eV and the landing energy of primary beams 211, 212, and 213). Beam splitter 233 is configured to deflect the secondary electron beams 261, 262, and 263 toward secondary projection system 250. The secondary projection system 250 then focuses the secondary electron beams 261, 262, and 263 onto the detection elements 241, 242, and 243 of the electron detection device 240. The detection elements 241, 242, and 243 are arranged to detect the corresponding secondary electron beams 261, 262, and 263 and generate corresponding signals, which are sent to the controller 109 or a signal processing system (not shown), for example, to construct an image of the corresponding scan area of ​​the sample 208.

[0055] In some embodiments, detection elements 241, 242, and 243 detect corresponding secondary electron beams 261, 262, and 263, respectively, and generate corresponding intensity signal outputs (not shown) to an image processing system (e.g., controller 109). In some embodiments, each detection element 241, 242, and 243 may include one or more pixels. The intensity signal output of the detection element may be the sum of signals generated by all pixels within the detection element.

[0056] In some embodiments, controller 109 may include an image processing system comprising an image acquirer (not shown) and a storage device (not shown). The image acquirer may include one or more processors. For example, the image acquirer may include a computer, server, mainframe, terminal, personal computer, any kind of mobile computing device, or a combination thereof. The image acquirer may be communicatively coupled to the electronic detection device 240 of device 104 via a medium such as an electrical conductor, fiber optic cable, portable storage medium, IR, Bluetooth, Internet, wireless network, radio, or a combination thereof. In some embodiments, the image acquirer may receive signals from the electronic detection device 240 and may construct an image. The image acquirer may thus acquire an image of sample 208. The image acquirer may also perform various post-processing functions, such as generating contours, overlaying indicators on the acquired image, etc. The image acquirer may be configured to perform adjustments such as brightness and contrast of the acquired image. In some embodiments, the storage device may be a storage medium such as a hard disk, flash drive, cloud storage device, random access memory (RAM), or other types of computer-readable storage. The storage device may be coupled to the image acquirer and may be used to store original image data scanned as the original image and post-processed images.

[0057] In some embodiments, the image acquirer may acquire one or more images of a sample based on an imaging signal received from the electron detection device 240. The imaging signal may correspond to a scanning operation for imaging charged particles. The acquired image may be a single image comprising multiple imaging regions. The single image may be stored in a storage device. The single image may be an original image that can be divided into multiple regions. Each region may include an imaging region containing features of sample 208. The acquired images may include multiple images of a single imaging region of sample 208 sampled multiple times over a time series. The multiple images may be stored in a storage device. In some embodiments, the controller 109 may be configured to perform image processing steps using multiple images of the same location of sample 208.

[0058] In some embodiments, controller 109 may include a measurement circuitry (e.g., an analog-to-digital converter) to obtain the distribution of detected secondary electrons. The electron distribution data collected during the detection time window can be combined with corresponding scan path data of each of the primary beams 211, 212, and 213 incident on the wafer surface to reconstruct an image of the wafer structure to be inspected. The reconstructed image can be used to reveal various features of the internal or external structure of sample 208, and thus can be used to reveal any defects that may exist in the wafer.

[0059] In some embodiments, the controller 109 may control the stage 209 to move the sample 208 during examination. In some embodiments, the controller 109 may enable the stage 209 to continuously move the sample 208 in one direction at a constant speed. In other embodiments, the controller 109 may enable the stage 209 to change the speed of movement of the sample 208 over time depending on the steps of the scanning process.

[0060] although Figure 2A The apparatus 104 is shown using three primary electron beams, but it is to be understood that the apparatus 104 may use one, two, or more primary electron beams. This disclosure does not limit the number of primary electron beams used in the apparatus 104. In some embodiments, the apparatus 104 may be a SEM for photolithography. In some embodiments, the electron beam tool 104 may be a single-beam system or a multi-beam system.

[0061] For example, such as Figure 2B As shown, consistent with embodiments of this disclosure, the electron beam tool 100B (also referred to herein as device 100B) can be a single-beam inspection tool used in the EBI system 100. Device 100B includes a wafer holder 136 supported by a motorized stage 134 for holding a wafer 150 to be inspected. The electron beam tool 100B includes an electron emitter that may include a cathode 103, an anode 121, and a gun aperture 122. The electron beam tool 100B also includes a beam-limiting aperture 125, a condenser lens 126, a post aperture 135, an objective lens assembly 132, and a detector 144. In some embodiments, the objective lens assembly 132 may be a modified SORIL lens, including a pole piece 132a, a control electrode 132b, a deflector 132c, and an excitation coil 132d. During imaging, an electron beam 161 emitted from the tip of cathode 103 can be accelerated by the voltage of anode 121, pass through gun hole 122, beam-limiting aperture 125, and condenser lens 126, and is focused into probe spot 170 by a modified SORIL lens and impacts the surface of wafer 150. Probe spot 170 can be scanned on the surface of wafer 150 by deflectors (such as deflector 132c or other deflectors in the SORIL lens). Detector 144 can collect secondary or scattered primary particles emitted from the wafer surface, such as secondary electrons or scattered primary electrons, to determine the beam intensity and enable the reconstruction of an image of the region of interest on wafer 150.

[0062] An image processing system 199 may also be provided, including an image acquirer 120, a storage device 130, and a controller 109. The image acquirer 120 may include one or more processors. For example, the image acquirer 120 may include a computer, server, mainframe, terminal, personal computer, any kind of mobile computing device, or a combination thereof. The image acquirer 120 can be connected to the detector 144 of the electron beam tool 100B via a medium such as an electrical conductor, fiber optic cable, portable storage medium, IR, Bluetooth, Internet, wireless network, radio, or a combination thereof. The image acquirer 120 can receive signals from the detector 144 and can construct an image. The image acquirer 120 can thus acquire an image of the wafer 150. The image acquirer 120 can also perform various post-processing functions, such as generating contours, overlaying indicators on the acquired image, etc. The image acquirer 120 can be configured to perform adjustments such as brightness and contrast of the acquired image. The storage device 130 may be a storage medium such as a hard disk, random access memory (RAM), cloud storage device, or other types of computer-readable storage. Storage device 130 may be coupled to image acquirer 120 and may be used to store scanned original image data as the original image and post-processed images. Image acquirer 120 and storage device 130 may be connected to controller 109. In some embodiments, image acquirer 120, storage device 130 and controller 109 may be integrated into a single electronic control unit.

[0063] In some embodiments, the image acquirer 120 may acquire one or more images of a sample based on an imaging signal received from the detector 144. The imaging signal may correspond to a scanning operation for imaging charged particles. The acquired image may be a single image comprising multiple imaging regions, which may contain various features of the wafer 150. The single image may be stored in the storage device 130. Imaging may be performed based on imaging frames.

[0064] The concentrator and illumination optics of an electron beam tool may include or be supplemented by an electromagnetic quadrupole electron lens. For example, such as Figure 2B As shown, the electron beam tool 100B may include a first quadrupole lens 148 and a second quadrupole lens 158. In some embodiments, the quadrupole lenses are used to control the electron beam. For example, the first quadrupole lens 148 may be controlled to adjust the beam current, and the second quadrupole lens 158 may be controlled to adjust the beam spot size and beam shape.

[0065] Figure 2B The illustration depicts a charged particle beam device in which the inspection system can use a single primary beam, which can be configured to generate secondary electrons by interacting with a wafer 150. A detector 144 can be positioned along an optical axis 105, as shown. Figure 2BAs in the illustrated embodiment. The primary electron beam can be configured to propagate along the optical axis 105. Therefore, the detector 144 can include a hole at its center, allowing the primary electron beam to pass through and reach the wafer 150.

[0066] Figure 3 An exemplary graph illustrating the yield rate of total electrons (secondary electrons (SE) and backscattered electrons) relative to the landing energy of the primary electron beam wave, consistent with embodiments of this disclosure, is shown. This graph illustrates multiple beam waves of the primary electron beam (e.g., ... Figure 2A The landing energy of the primary electron beam 202 (multiple beams 211, 212, or 213) and the secondary electron beam (e.g., Figure 2A The relationship between the yield of the secondary electron beams (261, 262, or 263) and the yield. The yield indicates the number of secondary electrons generated in response to the impact of primary electrons. For example, a yield greater than 1.0 indicates that more secondary electrons can be generated than the number of primary electrons landing on the wafer. Similarly, a yield less than 1.0 indicates that fewer secondary electrons can be generated in response to the impact of primary electrons.

[0067] like Figure 3 As shown in the graph, when the landing energy of primary electrons is in the range of E1 to E2, more electrons may leave the wafer surface than land on it, which may result in a positive potential at the wafer surface. In some embodiments, defect inspection can be performed within the aforementioned landing energy range, which is referred to as "positive mode". Electron beam tools (e.g., electron beam tool 104 of Figure 2) can generate darker voltage contrast images of the device structure with a more positive surface potential because the detection device (e.g., detection device 240 of Figure 2) can receive fewer secondary electrons (see Figure 2). Figure 4 ).

[0068] In addition to secondary electrons, backscattered electrons (BSE) are also emitted under the impact of the primary beam. Positive charging may occur when the sum of the SE yield and BSE exceeds 1, and when the SE yield is less than 1. The range of positive modes is wider when E1 and E2 refer to the energies where the SE yield (not the total yield) is 1.

[0069] When the landing energy is below E1 or above E2, fewer electrons may leave the wafer surface, resulting in a negative potential at the wafer surface. In some embodiments, defect inspection can be performed within this landing energy range, which is referred to as "negative mode." Electron beam tools (e.g., electron beam tool 104 of FIG. 2) can generate brighter voltage contrast images of device structures with a more negative surface potential because the detection device (e.g., detection device 240 of FIG. 2) can receive more secondary electrons (see...). Figure 4 ).

[0070] In some embodiments, the landing energy of the primary electron beam can be controlled by the total bias between the electron source and the wafer.

[0071] Figure 4 The illustration shows a schematic diagram of the voltage contrast response of a wafer consistent with embodiments of the present disclosure. In some embodiments, physical and electrical defects in the wafer (e.g., resistive short circuits and open circuits, defects in deep trench capacitors, back-end process (BEOL) defects, etc.) can be detected using a voltage contrast method of a charged particle inspection system. Defect detection using voltage contrast images can be performed using a pre-scanning process (i.e., charging, overflow, neutralization, or preparation process) in which charged particles are applied to the wafer area to be inspected (e.g., sample 208 of FIG. 2) before inspection.

[0072] In some embodiments, an electron beam tool (e.g., electron beam tool 104 of FIG. 2) can be used to detect defects in the internal or external structure of a wafer by irradiating the wafer with multiple beam waves of a primary electron beam (e.g., multiple beam waves 211, 212, or 213 of primary electron beam 202 of FIG. 2) and measuring the wafer's voltage contrast response to the irradiation. In some embodiments, the wafer may include a test device region 420 developed on a substrate 410. In some embodiments, the test device region 420 may include multiple device structures 430 and 440 separated by an insulating material 450. For example, device structure 430 is attached to the substrate 410. In contrast, device structure 440 is separated from the substrate 410 by the insulating material 450, such that a thin insulating structure 470 (e.g., a thin oxide) exists between device structure 440 and substrate 410.

[0073] An electron beam tool can generate secondary electrons from the surface of the test apparatus region 420 by scanning the surface of the test apparatus region 420 with multiple beam waves of a primary electron beam (e.g., secondary electron beams 261, 262, or 263 of FIG. 2). As explained above, when the landing energy of the primary electrons is between E1 and E2 (i.e., Figure 3 (If the yield is greater than 1.0), more electrons may leave the wafer surface than land on it, thus generating a positive potential at the wafer surface.

[0074] like Figure 4As shown, a positive potential may accumulate at the wafer surface. For example, after an electron beam tool scans the test device region 420 (e.g., during a pre-scan process), device structure 440 may retain more positive charge because it is not connected to an electrical ground in substrate 410, thus generating a positive potential at the surface of device structure 440. In contrast, primary electrons with the same landing energy (i.e., the same yield) applied to device structure 430 may result in less positive charge remaining in device structure 430 because the positive charge may be neutralized by electrons supplied through connection to substrate 410.

[0075] An image processing system for an electron beam tool (e.g., controller 109 of FIG. 2) can generate voltage contrast images 435 and 445 corresponding to device structures 430 and 440, respectively. For example, device structure 430 is short-circuited to ground and may not retain accumulated positive charge. Therefore, when the primary electron beam wave lands on the wafer surface during inspection, device structure 430 may repel more secondary electrons, resulting in a brighter voltage contrast image. In contrast, because device structure 440 is not connected to substrate 410 or any other ground, device structure 440 may retain the accumulation of positive charge. This accumulation of positive charge may cause device structure 440 to repel fewer secondary electrons during inspection, resulting in a darker voltage contrast image.

[0076] An electron beam tool (e.g., the multi-beam electron beam tool 104 of Figure 2) pre-scans the wafer surface by supplying electrons to build up a potential on the wafer surface. After pre-scanning the wafer, the electron beam tool can obtain images of multiple dies within the wafer. In some embodiments, defects can be detected by comparing the differences in voltage contrast images from the multiple dies. For example, if a non-uniform charge is applied to the wafer and the voltage contrast level of an image associated with a first node is the same as the voltage contrast level of an image associated with a second node, the die corresponding to the two voltage contrast levels may have an electrical short-circuit defect. The pre-scan is applied to the wafer under the assumption that the surface potential built up on the wafer surface during pre-scanning will be retained during inspection and will remain above the detection threshold of the electron beam tool.

[0077] However, during inspection, the accumulated surface potential level may change due to electrical breakdown or tunneling effects, making defects undetectable. For example, when a high voltage is applied to a high-resistivity thin device structure (such as a thin oxide layer, like insulator structure 470), leakage current can flow through the high-resistivity structure, preventing it from acting as a perfect insulator. This can affect circuit functionality and lead to device defects. Similar effects of leakage current can also occur in structures with improperly formed materials or high-resistivity metal layers, such as tungsten plugs and cobalt silicide (e.g., CoSi, CoSi2, Co2Si, Co3Si, etc.) layers between the source or drain regions of a field-effect transistor (FET).

[0078] A defective etching process can leave a thin oxide layer, resulting in unwanted electrical blockage (e.g., an open circuit) between two structures intended for electrical connection (e.g., device structure 440 and substrate 410). For example, device structures 430 and 440 may be designed to contact substrate 410 and function identically, but due to manufacturing errors, an insulator structure 470 may be present in device structure 440. In this case, the insulator structure 470 can represent a defect susceptible to breakdown effects.

[0079] Figure 5 An electron beam system 500 consistent with an embodiment of this disclosure is illustrated. (As shown) Figure 5 As shown, the electron beam system 500 includes an electron beam tool 510 (e.g., Figure 1 Electron beam tool 104 Figure 2A Electron beam tool 104 Figure 2B Electron beam tool 100B), advanced charge control (ACC) module 520 and wafer holder 530 (e.g., Figure 2A The mobile platform 209 Figure 2B The moving stage 134), and the wafer holder 530 have a sample to be inspected (e.g., Figure 2A Sample 208 Figure 2B The chip 150 (e.g., chip 540). The electron beam tool 510 can deliver a primary electron beam 512 (e.g., a primary electron beam 512). Figure 2A Multiple beam waves 211, 212 or 213 of the primary electron beam 202; Figure 2BAn electron beam 161 is emitted onto a region of interest on wafer 540 and secondary electrons emitted from the wafer surface are collected to form an image of the region of interest on wafer 540. ACC module 520 may include an ACC beam source that emits a beam 522 (e.g., a laser beam) onto wafer 540 during inspection and forms a beam spot 542 of beam 522 on the wafer surface. Beam 522 may be emitted onto wafer 540 at an incident angle θ. When the primary electron beam 512 irradiates the region of interest on wafer 540, charge may accumulate due to the large electron beam current. Beam 522 emitted from ACC module 520 may be configured to regulate the accumulated charge due to photoconductivity or photoelectric effect, or a combination of photoconductivity and photoelectric effect.

[0080] In some embodiments, the wafer 540 may include transistors (such as metal-oxide-semiconductor field-effect transistors (MOSFETs), fin field-effect transistors (FinFETs), gate all-around (GAA), etc.), PN junction diodes, or bulk semiconductor materials. In some embodiments, the ACC beam source may be a light source.

[0081] In some embodiments, the electron beam tool 510 can generate multiple primary electron beam waves to simultaneously scan multiple locations on the wafer 540. In some embodiments, the beam projected by the ACC module 520 can charge a sufficiently large location on the wafer 540 so that the multiple primary electron beam waves can scan corresponding portions on the wafer 540.

[0082] Figure 6 An energy band diagram 600 is illustrated, showing a schematic diagram of the barrier height of a metal-oxide-semiconductor (MOS) structure consistent with embodiments of the present disclosure. While energy band diagram 600 shows a schematic diagram of a MOS structure, it should be understood that similar energy band diagrams can be applied to other types of transistors, such as fin field-effect transistors (FinFETs), gate all-around (GAA), etc.

[0083] Internal photoemission (IPE) is defined as a process in which photons excite charge carriers (electrons or holes) to jump from one part of a heterostructure to another at a potential barrier height at its interface. IPE is a technique for characterizing the electronic properties of solid-solid interfaces, particularly insulator / semiconductor and metal / insulator interfaces. For example, IPE can be used to characterize the energy barrier height at heterojunction interfaces. IPE involves the photoexcitation of electrons or holes at the interface barrier. For example, IPE involves photon-induced charge carriers jumping from a semiconductor to a metal at the barrier height, such as... Figure 6 As described.

[0084] The conductivity of these photoemitted charge carriers under an electric field initially determines the barrier height and electronic properties at the interface. Because the bottom of the semiconductor valence band is much higher than the bottom of the insulator valence band, the photon energy required for this escape across the barrier is less than that of the insulator band gap. In practice, wavelengths between approximately 300 nm and 1000 nm can be used.

[0085] It is the electron from the metal Fermi level E F The potential barrier height for the transition to the bottom conduction band of the insulator, and Electrons escape from the top valence band E of the semiconductor. v The barrier height for transitions to the bottom conduction band of the insulator. For hole carriers, From the metal Fermi level E F The barrier height to the top conduction band of the insulator, and It is the barrier height from the bottom conduction band of the semiconductor to the top conduction band of the insulator. IPE can provide band offset and alignment, which are parameters that determine the performance of the corresponding device.

[0086] Figure 7 A typical IPE spectral setup 700 is illustrated. In this setup, physical contacts on a sample 702 (comprising a metal 704, an insulator 712, and a semiconductor 706) are used to supply a voltage 714 to the sample 702 (applying an external bias between the metal electrode 704 and the semiconductor substrate 706). The sample 702 can be irradiated with a tunable laser source to induce electron / hole pairs in the semiconductor substrate 706. The tunable laser can be adjusted to vary the energy of photons 708 striking the sample 702. The physical contacts on the sample 702 can be used to measure the photocurrent 710 passing through the sample 702.

[0087] The energy barrier is extracted from the plot of photocurrent 710 versus photon energy. Photocurrent 710 depends on photon energy, as shown in the following example equation: (Equation 1), Where A is a constant, P is the laser power, hυ is the photon energy (where h is Planck's constant and υ is the frequency), Φ is the energy barrier, and p is the power depending on the junction type. The energy barrier can be identified by the photon energy when the photocurrent begins to flow through sample 702. Therefore, IPE spectroscopy is typically performed by measuring the photocurrent through the structure as a function of the incident photon energy under a certain applied voltage bias and repeating these steps under a wide range of voltage biases. A positive (negative) bias applied to the semiconductor substrate 706 is used for the metal / insulator (insulator / semiconductor) barrier. Since the energy barrier depends on the electric field in the insulator, measurements are repeated for multiple applied biases. All energy barrier values ​​collected in this way are then extrapolated to an energy barrier at zero voltage or substantially close to zero voltage.

[0088] Although a metal-insulator-semiconductor structure is shown, it should be understood that the IPE method can be applied to metal-insulator-metal structures or other structures.

[0089] Figure 8 A charged particle system consistent with embodiments of this disclosure is shown (e.g., Figure 1 EBI system 100, Figure 2A Electron beam tool 104 Figure 2B Electron beam tool 100B, Figure 5 Sample 800 in the electron beam tool 510.

[0090] In some embodiments, SEM and wavelength-tunable lasers (e.g.) Figure 5 The ACC module 520 can be used to determine the barrier height (e.g., the barrier height of a metal / oxide interface) of the interface between the gate 802 (e.g., including a metal layer) and the insulating layer 804 (e.g., an oxide). In some embodiments, SEM and a laser can be used to determine the barrier height of the interface between the insulating layer 804 and the substrate 812 (e.g., silicon).

[0091] In some embodiments, electron beam 806 (e.g. Figure 2A Multiple beam waves 211, 212, or 213 of the primary electron beam 202 Figure 2B Electron beam 161, Figure 5 The primary electron beam 512 can irradiate the gate 802 of the transistor 810, while a laser (e.g., a photon beam 808) irradiates the gate 802 and the silicon substrate 812 beneath the insulating layer 804.

[0092] In some embodiments, the irradiation and voltage comparison of the charged particle beam (e.g., electron beam) of the metal gate 802 (see example) Figures 3 to 4 It can be used to apply and monitor voltages on junctions (such as metal oxides or silicon oxides) under optical illumination.

[0093] The SEM electron beam 806 can be used to apply a voltage to the gate 802 to generate an electric field in the insulating layer 804 while sweeping the photon energy of the laser (e.g., within the photon energy range).

[0094] The disclosed embodiments describe two example methods for non-contact measurement of the energy barrier of a metal / oxide interface or oxide / semiconductor interface of a device (e.g., a MOSFET, transistor 810) during device fabrication.

[0095] In some embodiments, the example method may include the following general steps: 1. Generate photocurrent versus photon energy curves at a given voltage (see...) Figure 9 ); 2. Repeat to find the energy barrier for multiple bias voltages; and 3. Plot the energy barrier and the oxide electric field, and extrapolate the fitted curve to zero to determine the zero-voltage energy barrier (see [reference]). Figure 10 ).

[0096] Figure 9 An exemplary graph 900 is shown, consistent with embodiments of the present disclosure, showing photocurrent 902 as a function of photon energy 904 for a particular gate bias.

[0097] In some embodiments, charged particle systems (e.g.) Figure 8 The charged particle system 800 can irradiate transistors (e.g., transistors) with a beam of charged particles. Figure 8 The gate of transistor 810 (e.g.) Figure 8 (gate 802), using a photon beam (e.g.) Figure 8 Photon beam 808) irradiates the material beneath the grid (e.g. Figure 8 The photocurrent of the transistor (e.g., photocurrent 902) is determined for each of a plurality of photon energies (e.g., photon energy 904), and an energy barrier 906 is determined based on the determined photocurrent 902.

[0098] In some embodiments, determining the energy barrier 906 may include plotting the photocurrent 902 relative to a plurality of photon energies 904 and determining the inflection point of the plot (e.g., the energy barrier 906), which corresponds to the photon energy at the inflection point. That is, the energy barrier indicates the point at which current begins to flow through the device (caused by photon energy).

[0099] In some embodiments, charged particle beams (e.g.) can be targeted. Figure 8The above steps are repeated for each of the multiple landing energies of the electron beam 806. That is, for each landing energy of the charged particle beam, a separate graph 900 can be generated, so that multiple energy barriers 906 can be determined based on the photocurrent 902 of each of the multiple landing energies 904 of the determined charged particle beam.

[0100] In some embodiments, charged particle beam tools (e.g.) Figure 1 EBI system 100, Figure 2A Electron beam tool 104 Figure 2B Electron beam tool 100B, Figure 5 The electron beam tool 510 can be configured to provide each of a plurality of landing energies of a charged particle beam. In some embodiments, each of the plurality of landing energies of the charged particle beam may correspond to a voltage applied to a transistor. That is, the charged particle beam tool can adjust or change the voltage applied to the transistor by adjusting the landing energy of the charged particle beam on the transistor.

[0101] Figure 10 An energy barrier 1002 (e.g., consistent with embodiments of this disclosure) is shown as a function of an oxide electric field 1004. Figure 9 An exemplary curve 1000 of the energy barrier 906.

[0102] In some embodiments, multiple energy barriers 1002 can be plotted relative to multiple oxide electric fields 1004 (e.g. Figure 9 The energy barrier 906). In some embodiments, the zero-voltage or substantially near-zero-voltage energy barrier of the transistor (e.g., zero-voltage energy barrier 1006 at the metal-oxide interface or zero-voltage energy barrier 1008 at the silicon oxide interface) can be determined at least in part based on the plotting of graph 1000. In some embodiments, the energy barrier at any voltage can be determined at least in part based on the plotting of graph 1000. For example, points on the plot can be fitted, the fit can be extrapolated to zero or substantially zero oxide electric field values, and the energy barrier values ​​1006 or 1008 can be determined as the extrapolated fitted energy barrier values ​​when the oxide electric field value is zero or substantially zero.

[0103] In some embodiments, the zero-voltage or substantially near-zero-voltage energy barrier of the transistor can be connected to the metal layer of the transistor (e.g., Figure 8 The metal gate 802) and the insulating layer (e.g. Figure 8 The interface between the insulating layer 804 and the insulating layer is associated.

[0104] In some embodiments, the zero-voltage or substantially near-zero-voltage energy barrier of the transistor can be related to the semiconductor layer of the transistor (e.g., Figure 8The interface between the silicon substrate (812) and the insulating layer is associated.

[0105] In some embodiments, the steps described above can be performed during transistor fabrication (e.g., before depositing one or more metal layers for the gate), allowing one or more metal layers to be adjusted or modified based on a determined energy barrier of zero voltage or substantially near-zero voltage for the transistor. In some embodiments, adjusting or modifying the gate's metal layers may result in an adjustment or modification of the gate's work function, thereby improving the performance of the final transistor.

[0106] In some embodiments, the above steps (e.g., relative to) Figures 8 to 10 This can be performed by following non-contact steps: 1. Measure the photocurrent passing through the device; 2. Measure the applied voltage; and 3. Change the applied voltage.

[0107] In contrast to measuring photocurrent, the gate signal can be represented by grayscale values ​​(GLV) in the SEM. Electron detector current I d Related to GLV. Detector current I d It consists of secondary electron (SE) current and backscattered electron (BSE) current, as described by the following equation: (Equation 2) in It is the output of SE (BSE) electronics, and It is a BSE detector (e.g.) Figure 2A Detection elements 241, 242, and 243; Figure 2B The collection efficiency of detector 144). p This is the primary beam electron current. The BSE yield can be assumed because it is unaffected by the charging that occurs when the gate is irradiated. Assuming the BSE current component, and using Equation 2, the SE current component can be determined by measuring the detector current.

[0108] The charging that occurs at the gate follows charge conservation, where the device current I device It is the IPE photocurrent and is related to the primary beam current, SE electron yield, and BSE electron yield. Device current I device It can be determined based on its relationship with the primary beam current, SE electron yield, and BSE electron yield. From this, a plot of the photocurrent 902 as a function of photon energy 904 can be generated.

[0109] In some embodiments, when measuring the applied voltage, a metal-contact SE yield emission model can be added and used to convert the measured SE current into a gate voltage. In the case of positive charging, this model can be described by the following equation: (Equation 3) in It is the SE production of metals when not charged. It is its work function, and V S It is the surface voltage generated. Assume... It is known that the measured SE current can be used to determine the surface voltage V. S .

[0110] Changing the applied voltage may involve altering the landing energy of the SEM, and will change the SE yield of the irradiated metal. By changing the landing energy of the SEM, the voltage distribution can be altered with the sweep of the laser photon energy (e.g., within the photon energy range).

[0111] Figure 11 An exemplary graph 1100 is shown, consistent with embodiments of the present disclosure, showing the normalized photocurrent 1102 as a function of photon energy 1104 with different gate biases.

[0112] Graph 1100 shows curves 1112, 1114, 1116, and 1118, which correspond to photocurrent 1102 as a function of photon energy 1104 at different landing energies (represented by different SE yields). The energy barrier 1106 for different landing energies can be represented as above relative to... Figure 9 As discussed above. In some embodiments, similar to the above... Figures 9 to 10 The energy barrier value can be plotted against the voltage determined by Equation 5 and extrapolated to a zero-voltage energy barrier. In some embodiments, the SE yield can be adjusted to generate different potentials at the junction of the transistor (e.g., the interface of a MOSFET and transistor 810). That is, changing the landing energy is one way to change the voltage across the transistor junction. Other methods exist to change the voltage (e.g., changing the extraction field).

[0113] In some cases where the energy barrier difference at different applied voltages may be much less than 1 eV, the above method may include aiming to measure the work function fluctuations between different devices by evaluating the barrier at non-zero voltages. In these cases, the small change in energy barrier across the applied voltage is an advantage because the work function measurement will not be distorted by yield variations between different metal gates.

[0114] Advantageously, the above method can provide a non-contact (e.g., without physical contact with the device to apply voltage or measure photocurrent) method for measuring the band alignment of metal / oxide / semiconductor on the product structure during the device manufacturing process prior to the formation of the final device.

[0115] The disclosed embodiments describe another example method for non-contact measurement of the energy barrier at a metal / oxide interface or oxide / semiconductor interface of a device (e.g., a MOSFET, transistor 810) during device fabrication. For example, Figure 12 An exemplary graph 1200 is shown, consistent with embodiments of the present disclosure, as a function of the photon energy 1204 at laser power corresponding to curves 1212, 1214, and 1216, representing the normalized SE yield 1202.

[0116] In some embodiments, the normalized SE yield 1202 can be obtained from the SEM detector signal obtained from photon energy sweep. The normalized SE yield 1202 is associated with grayscale values.

[0117] Graph 1200 shows the generation of a zero-voltage or essentially zero-voltage energy barrier at 3 eV. For low (e.g., below 3 eV) photon energies, the accumulated voltage causes the barrier to decrease (as in...). Figure 10 (As seen in [Equation 1]), this leads to an increase in photocurrent and SE yield, slightly below 3 eV. At certain lower photon energies, no charge carriers can cross the semiconductor / insulator (e.g., silicon / oxide) barrier of the transistor, resulting in no photocurrent being generated in the transistor. As a result, the transistor gate behaves like an open contact, and voltage accumulates on the gate, generating a dark voltage contrast signal. When the photon energy increases to greater than 3 eV, a photocurrent is generated through the transistor oxide (see the relationship in Equation 1). The charge carried by this current reduces the charge on the metal gate. Therefore, the SEM signal increases. The higher the photon energy, the higher the photocurrent in the oxide. The neutralization of the metal charge caused by the electron beam can be fully compensated at a certain point, and the SEM signal saturates to the bright voltage contrast. This behavior is illustrated by curve 1212.

[0118] The steepness of the SE yield slope is related to the intensity of the photocurrent. This intensity depends on the photon energy and the source power. As shown in graph 1200, the steepness of the SE yield slope increases with increasing laser power. That is, the higher the laser power, the lower the photon energy at which the SE yield jumps to saturation (e.g., converges to the energy barrier). When the normalized SE yield 1202 is 1, this indicates that the gate is not charged. At certain laser powers, as the laser wavelength sweeps (e.g., within the photon energy range), the SEM signal will jump from dark voltage contrast to bright voltage contrast. The photon energy 1218 at which the jump occurs is the energy barrier.

[0119] In some embodiments, the photon energy 1218 at the start of the normalized SE yield 1202 jump corresponds to the energy barrier at voltage. The end of the normalized SE yield jump (e.g., point 1222 of curve 1212, point 1224 of curve 1214, point 1226 of curve 1216) can correspond to the zero voltage energy barrier.

[0120] Advantageously, this other exemplary method can provide a non-contact (e.g., no physical contact with the device required to obtain measurements) approach for measuring the band alignment of a metal / oxide / semiconductor on a product structure during the device manufacturing process prior to the formation of the final device. In some embodiments, the only parameter that can be adjusted in this other example method is the laser power.

[0121] Figure 13 Examples of methods for measuring transistors during transistor fabrication, consistent with embodiments of this disclosure, are shown. Figure 8 The energy barrier of transistor 810 (e.g., such as...) Figure 10 An exemplary process 1300 is described, which includes a zero-voltage or substantially near-zero-voltage energy barrier in a metal oxide interface (1006) or a zero-voltage energy barrier 1008 at a silicon oxide interface.

[0122] In step 1302, for a beam of charged particles (e.g. Figure 8 Each of the multiple landing energies of the electron beam 806, charged particle system (e.g., Figure 8 The charged particle system 800 can irradiate transistors (e.g., transistors) with a beam of charged particles. Figure 8 The gate of transistor 810 (e.g.) Figure 8 (gate 802), using a photon beam (e.g.) Figure 8 Photon beam 808) irradiates the material beneath the grid (e.g. Figure 8 (silicon substrate 812), for each photon energy in a plurality of photon energies (e.g.) Figure 9 The photon energy 904) determines the photocurrent of the transistor (e.g., Figure 9 The photocurrent 902), and the energy barrier (e.g., based on the determined photocurrent) is determined. Figure 9 The energy barrier is 906.

[0123] In some embodiments, determining the photocurrent of the transistor includes obtaining a grayscale value generated by a charged particle beam tool that provides a charged particle beam, and determining the detector current of the charged particle beam tool.

[0124] In some embodiments, determining the detector current of a charged particle beam tool may include determining the backscattered electron yield of the charged particle beam tool; determining the collection efficiency of the detector of the charged particle beam tool; and determining the primary beam electron current of the charged particle beam tool.

[0125] In some embodiments, determining the energy barrier may include plotting the photocurrent relative to multiple photon energies and determining the inflection point of the plot (e.g. Figure 9 The energy barrier (906) corresponds to the photon energy at the inflection point. That is, the energy barrier indicates the point at which current begins to flow through the device (caused by photon energy).

[0126] In some embodiments, charged particle beam tools (e.g.) Figure 1 EBI system 100, Figure 2A Electron beam tool 104 Figure 2B Electron beam tool 100B, Figure 5 The electron beam tool 510 can be configured to provide each of a plurality of landing energies of a charged particle beam. In some embodiments, each of the plurality of landing energies of the charged particle beam may correspond to a voltage applied to a transistor. That is, the charged particle beam tool can adjust or change the voltage applied to the transistor by adjusting the landing energy of the charged particle beam on the transistor.

[0127] In step 1304, the charged particle system can be relative to multiple oxide electric fields (e.g. Figure 10 The oxide electric field 1004) plots multiple energy barriers (e.g. Figure 9 Energy barrier 906 Figure 10 The energy barrier 1002). In some embodiments, the energy barrier of the transistor is zero voltage or substantially close to zero voltage (e.g., in the energy barrier at which the transistor is zero voltage or close to zero voltage). Figure 10 The zero-voltage energy barrier 1006 at the metal oxide interface or 1008 at the silicon oxide interface can be at least partially based on drawing (e.g., Figure 10 The curve (1000) is used to determine this. For example, points on the plot can be fitted, and the fit can be extrapolated to the value of the oxide electric field, which is zero or essentially zero.

[0128] In step 1306, using this plotting method, the charged particle system can determine the energy barrier value (e.g., Figure 10 The energy barrier value (1006 or 1008) is determined as the extrapolated energy barrier value when the oxide electric field value is zero or essentially zero.

[0129] In some embodiments, the zero-voltage or substantially near-zero-voltage energy barrier of the transistor can be connected to the metal layer of the transistor (e.g., Figure 8 The metal gate 802) and the insulating layer (e.g. Figure 8 The interface between the insulating layer 804 and the insulating layer is associated.

[0130] In some embodiments, the zero-voltage or substantially near-zero-voltage energy barrier of the transistor can be related to the semiconductor layer of the transistor (e.g., Figure 8 The interface between the silicon substrate (812) and the insulating layer is associated.

[0131] In some embodiments, the steps described above can be performed during transistor fabrication (e.g., before depositing one or more metal layers for the gate), allowing one or more metal layers to be adjusted or modified based on a determined energy barrier of zero voltage or substantially near-zero voltage for the transistor. In some embodiments, adjusting or modifying the gate's metal layers may result in an adjustment or modification of the gate's work function, thereby improving the performance of the final transistor.

[0132] Figure 14 Examples of methods for measuring transistors during transistor fabrication, consistent with embodiments of this disclosure, are shown. Figure 8 The energy barrier of the transistor 810 (e.g., a zero-voltage or nearly zero-voltage energy barrier, such as...) Figure 12 Example process 1400 (points 1222, 1224, 1226).

[0133] In step 1402, the charged particle system (e.g. Figure 8 A charged particle system 800 can irradiate a transistor (e.g., multiple charged particles) with a beam of charged particles. Figure 8 The gate of transistor 810 (e.g.) Figure 8 (Gate 802).

[0134] In step 1404, the system can use a photon beam (e.g., Figure 8 A photon beam 808 (e.g., multiple photon particles) irradiates the material below the gate (e.g., ... Figure 8 The silicon substrate 812). In some embodiments, the laser source (e.g., a silicon substrate 812). Figure 5 The ACC module 520 can provide a photon beam at the first laser power (e.g., corresponding to...). Figure 12 (Curve 1212).

[0135] In step 1406, the system can determine each photon energy among a plurality of photon energies (e.g., Figure 12 SE yield (e.g., photon energy 1204) Figure 12(Normalized SE yield 1202). In some embodiments, determining the SE yield at each photon energy among the plurality of photon energies may include obtaining grayscale values ​​from a charged particle beam tool. For example, the charged particle beam tool may generate grayscale values ​​at each photon energy among the plurality of photon energies to determine the SE yield at each photon energy among the plurality of photon energies.

[0136] In step 1408, the system can plot the SE yield relative to multiple photon energies.

[0137] In step 1410, the system can determine the zero voltage or substantially near-zero voltage energy barrier of the transistor (e.g., based on plotting (e.g., based on a determined SE yield and multiple photon energies)) at least in part. Figure 12 Points 1222, 1224, and 1226). In some embodiments, determining the zero-voltage energy barrier of a transistor may include determining points where the plot remains stable (e.g., points 1222, 1224, and 1226). Figure 12 Points 1222, 1224, and 1226). In some embodiments, the photon energy at points where the plot remains stable corresponds to the zero-voltage energy barrier of the determined transistor.

[0138] In some embodiments, the laser source may be configured to irradiate the material below the gate with a photon beam at a second laser power (e.g., corresponding to...). Figure 12 (Curve 1214). In some embodiments, the above steps can be repeated for any number of laser powers (e.g., including curve 1214). Figure 12 (Curve 1216). For example, at the second laser power, a charged particle system can determine the SE yield at each of the multiple photon energies; plot the SE yield relative to the multiple photon energies; and determine the zero-voltage or substantially near-zero-voltage energy barrier of a transistor based at least in part on the plot.

[0139] In some embodiments, the first laser power may be less than the second laser power, wherein the energy barrier of the transistor at zero voltage or substantially near zero voltage when the first laser power is greater than the energy barrier of the transistor at zero voltage or substantially near zero voltage when the second laser power is used.

[0140] In some embodiments, the zero-voltage or substantially near-zero-voltage energy barrier of the transistor can be connected to the metal layer of the transistor (e.g., Figure 8 The metal gate 802) and the insulating layer (e.g. Figure 8 The interface between the insulating layer 804 and the insulating layer is associated.

[0141] In some embodiments, the zero-voltage or substantially near-zero-voltage energy barrier of the transistor can be related to the semiconductor layer of the transistor (e.g., Figure 8The interface between the silicon substrate (812) and the insulating layer is associated.

[0142] In some embodiments, the steps described above can be performed during transistor fabrication (e.g., before depositing one or more metal layers for the gate), allowing one or more metal layers to be adjusted or modified based on a determined energy barrier of zero voltage or substantially near-zero voltage for the transistor. In some embodiments, adjusting or modifying the gate's metal layers may result in an adjustment or modification of the gate's work function, thereby improving the performance of the final transistor.

[0143] Consistent with the embodiments in this disclosure, a non-transitory computer-readable medium may be provided for storing data for a controller (e.g., Figure 1 The controller 109) contains instructions for its processor to control the electron beam tool, ACC module, or other systems and servers, or components thereof. These instructions may allow one or more processors to perform image processing, data processing, beam scanning, graphic display, operation of the charged particle beam device or another imaging apparatus, operation of the ACC module, etc., to provide the above-mentioned functions. Figures 8 to 14 The operation is consistent with the description. In some embodiments, a non-transitory computer-readable medium may be provided storing instructions for a processor to perform the steps of process 1300 or process 1400. Common forms of non-transitory media include, for example, floppy disks, flexible disks, hard disks, solid-state drives, magnetic tape or any other magnetic data storage media, compact disc read-only memory (CD-ROM), any other optical data storage media, any physical media with a perforated pattern, random access memory (RAM), programmable read-only memory (PROM) and erasable programmable read-only memory (EPROM), flash memory EPROM or any other flash memory, non-volatile random access memory (NVRAM), cache, registers, any other memory chips or cassette tapes and their networking versions.

[0144] The embodiments may be further described using the following terms: 1. A method for measuring the energy barrier of a transistor during its fabrication, comprising: For each of the multiple landing energies of the charged particle beam: The gate of the transistor is irradiated with the charged particle beam; Irradiate the material beneath the gate with a photon beam; The photocurrent of the transistor is determined for each photon energy among a plurality of photon energies; and The energy barrier is determined based on the determined photocurrent; Multiple energy barriers are determined based on the photocurrent of each of the multiple landing energies of the determined charged particle beam. The multiple energy barriers are plotted relative to multiple oxide electric fields; and The energy barrier of the transistor is determined at least in part based on a drawing, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier. 2. The method according to Clause 1, wherein determining the photocurrent of the transistor comprises: Obtain the grayscale value generated by the charged particle beam tool that provides the charged particle beam; and Determine the detector current of the charged particle beam tool. 3. The method according to Clause 2, wherein determining the detector current of the charged particle beam tool comprises: Determine the backscattered electron yield of the charged particle beam tool; Determine the collection efficiency of the detector of the charged particle beam tool; and Determine the primary beam electron current of the charged particle beam tool. 4. The method according to any one of clauses 1 to 3, wherein determining the energy barrier comprises: The photocurrent is plotted relative to the plurality of photon energies; and The inflection point of the plot is determined, and the energy barrier corresponds to the photon energy at the inflection point. 5. The method according to any one of clauses 1 to 4, wherein determining the energy barrier of the transistor comprises: Fit the plot of the plurality of energy barriers; Extrapolate the fitting to a zero oxide electric field value; and An extrapolated energy barrier value is determined when the electric field value of the oxide is zero, wherein the zero-voltage energy barrier or the energy barrier that is substantially close to zero voltage corresponds to the determined energy barrier value. 6. The method according to any one of Clauses 1 to 5, wherein the transistor comprises a metal-oxide-semiconductor field-effect transistor (MOSFET). 7. The method according to any one of clauses 1 to 6, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with the interface between the metal layer and the insulating layer of the transistor. 8. The method according to Clause 7, wherein the insulating layer comprises an oxide. 9. The method according to any one of clauses 1 to 6, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with the interface between the semiconductor layer and the insulating layer of the transistor. 10. The method according to Clause 9, wherein the semiconductor layer comprises a silicon substrate. 11. The method according to any one of clauses 9 to 10, wherein the insulating layer comprises an oxide. 12. The method according to any one of Clauses 1 to 11, wherein the charged particle beam tool is configured to provide each of the plurality of landing energies of the charged particle beam. 13. The method according to any one of clauses 1 to 12, wherein each of the plurality of landing energies of the charged particle beam corresponds to a voltage applied to the transistor. 14. The method according to any one of clauses 1 to 13 further includes adjusting the metal layer of the gate based on the determined zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor. 15. The method according to Clause 14, wherein the metal layer of the gate is adjusted such that the work function of the gate is adjusted. 16. A method for measuring the energy barrier of a transistor during its fabrication, comprising: The gate of the transistor is irradiated with a beam of charged particles using the first landing energy; Irradiate the material beneath the gate with a photon beam; The first plurality of photocurrents of the transistor are determined by the energy of the first plurality of photons; The first energy barrier is determined based on the determined first plurality of photocurrents; The gate of the transistor is irradiated with the charged particle beam using a second landing energy; The material beneath the gate is irradiated with the photon beam; The second plurality of photocurrents of the transistor are determined by the energy of the second plurality of photons; The second energy barrier is determined based on the determined second plurality of photocurrents; Plot the first energy barrier and the second energy barrier relative to multiple oxide electric fields; and The energy barrier of the transistor is determined at least in part based on a drawing, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier. 17. The method according to Clause 16, wherein determining the first plurality of photocurrents and the second plurality of photocurrents of the transistor comprises: Obtain the grayscale value generated by the charged particle beam tool that provides the charged particle beam; and Determine the detector current of the charged particle beam tool. 18. The method according to Clause 17, wherein determining the detector current of the charged particle beam tool comprises: Determine the backscattered electron yield of the charged particle beam tool; Determine the collection efficiency of the detector of the charged particle beam tool; and Determine the primary beam electron current of the charged particle beam tool. 19. The method according to any one of Clauses 16 to 18, wherein determining the first energy barrier and the second energy barrier comprises: The first plurality of photocurrents are plotted relative to the first plurality of photon energies; The second plurality of photocurrents are plotted relative to the second plurality of photon energies; Determine the first inflection point of the plot of the first plurality of photocurrents, wherein the first energy barrier corresponds to the photon energy of the first inflection point; and Determine the second inflection point of the plot of the second plurality of photocurrents, wherein the second energy barrier corresponds to the photon energy of the second inflection point. 20. The method according to any one of clauses 16 to 19, wherein determining the energy barrier of the transistor comprises: The plots are fitted to the first energy barrier and the second energy barrier; Extrapolate the fitting to a zero oxide electric field value; and An extrapolated energy barrier value is determined when the electric field value of the oxide is zero, wherein the zero-voltage energy barrier or the energy barrier that is substantially close to zero voltage corresponds to the determined energy barrier value. 21. The method according to any one of Clauses 16 to 20, wherein the transistor comprises a metal-oxide-semiconductor field-effect transistor (MOSFET). 22. The method according to any one of clauses 16 to 21, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with the interface between the metal layer and the insulating layer of the transistor. 23. The method according to Clause 22, wherein the insulating layer comprises an oxide. 24. The method according to any one of clauses 16 to 21, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with the interface between the semiconductor layer and the insulating layer of the transistor. 25. The method according to Clause 24, wherein the semiconductor layer comprises a silicon substrate. 26. The method according to any one of clauses 24 to 25, wherein the insulating layer comprises an oxide. 27. The method according to any one of Clauses 16 to 26, wherein the charged particle beam tool is configured to provide each of the plurality of landing energies of the charged particle beam. 28. The method according to any one of clauses 16 to 27, wherein each of the plurality of landing energies of the charged particle beam corresponds to a voltage applied to the transistor. 29. The method according to any one of Clauses 16 to 28 further includes adjusting the metal layer of the gate based on the determined zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor. 30. The method according to Clause 29, wherein the metal layer of the gate is adjusted such that the work function of the gate is adjusted. 31. A method for measuring the energy barrier of a transistor during its fabrication, comprising: Irradiate the gate of the transistor with a beam of charged particles; Irradiate the material beneath the gate with a photon beam; Determine the secondary electron (SE) yield at each photon energy in a plurality of photon energies; The SE yield is plotted relative to the plurality of photon energies; and The energy barrier of the transistor is determined at least in part based on a drawing, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier. 32. The method according to Clause 31, wherein the charged particle beam tool provides the charged particle beam to the gate of the transistor. 33. The method according to Clause 32, wherein determining the SE yield at each of the plurality of photon energies includes obtaining a grayscale value from the charged particle beam tool. 34. The method according to any one of clauses 31 to 33, wherein the SE output is a normalized SE output. 35. The method according to any one of clauses 31 to 34, wherein determining the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor includes determining a point where the plot remains stable. 36. The method according to Clause 35, wherein the photon energy at the point where the drawing remains stable corresponds to the zero-voltage energy barrier or substantially near-zero voltage energy barrier of the determined transistor. 37. The method according to any one of clauses 31 to 36, wherein the laser source provides the photon beam at a first laser power. 38. The method according to Clause 37, wherein the laser source is configured to irradiate the material below the gate with the photon beam at a second laser power. 39. The method according to clause 38 further includes, when the laser is at the second laser power: Determine the SE yield at each of the plurality of photon energies; The SE yield is plotted relative to the plurality of photon energies; and The energy barrier of the transistor is determined at least in part based on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier. 40. The method according to any one of clauses 38 to 39, wherein the first laser power is less than the second laser power. 41. The method according to any one of clauses 39 to 40, wherein the zero-voltage energy barrier or substantially near-zero voltage energy barrier of the transistor at the first laser power is greater than the zero-voltage energy barrier or substantially near-zero voltage energy barrier of the transistor at the second laser power. 42. The method according to any one of clauses 31 to 31, wherein the transistor comprises a metal-oxide-semiconductor field-effect transistor (MOSFET). 43. The method according to any one of clauses 31 to 42, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with the interface between the metal layer and the insulating layer of the transistor. 44. The method according to clause 43, wherein the insulating layer comprises an oxide. 45. The method according to any one of clauses 31 to 42, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with the interface between the semiconductor layer and the insulating layer of the transistor. 46. ​​The method according to Clause 45, wherein the semiconductor layer comprises a silicon substrate. 47. The method according to any one of clauses 45 to 46, wherein the insulating layer comprises an oxide. 48. The method according to any one of clauses 31 to 47 further includes adjusting the metal layer of the gate based on the determined zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor. 49. The method according to Clause 48, wherein the metal layer of the gate is adjusted such that the work function of the gate is adjusted. 50. A method for measuring the energy barrier of a transistor during its fabrication, comprising: Multiple charged particles are supplied to the gate of the transistor; Multiple photon particles are supplied to the material beneath the gate; The grayscale value is generated at each photon energy among multiple photon energies using a charged particle beam tool; Determine the secondary electron (SE) yield at each photon energy among the plurality of photon energies; and The energy barrier of the transistor is determined at least in part based on the determined SE yield and the plurality of photon energies, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier. 51. The method according to Clause 50, wherein the charged particle beam tool provides the plurality of charged particles to the gate of the transistor. 52. The method according to Clause 51, wherein determining the SE yield at each of the plurality of photon energies comprises obtaining the grayscale value from the charged particle beam tool. 53. The method according to any one of clauses 50 to 52, wherein the SE output is a normalized SE output. 54. The method according to any one of clauses 50 to 53, wherein determining the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor comprises determining a point where the plot of the determined SE yield remains stable. 55. The method according to Clause 54, wherein the photon energy at the point where the drawing remains stable corresponds to the zero-voltage energy barrier or substantially near-zero voltage energy barrier of the determined transistor. 56. The method according to any one of clauses 50 to 55, wherein the laser source provides the plurality of photon particles at a first laser power. 57. The method according to Clause 56, wherein the laser source is configured to irradiate the material below the gate with the plurality of photon particles at a second laser power. 58. The method according to Clause 57 further includes, when at the second laser power: Determine the SE yield at each of the plurality of photon energies; The SE yield is plotted relative to the plurality of photon energies; and The energy barrier of the transistor is determined at least in part based on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier. 59. The method according to any one of clauses 57 to 58, wherein the first laser power is less than the second laser power. 60. The method according to any one of clauses 58 to 59, wherein the zero-voltage energy barrier or substantially near-zero voltage energy barrier of the transistor at the first laser power is greater than the zero-voltage energy barrier or substantially near-zero voltage energy barrier of the transistor at the second laser power. 61. The method according to any one of clauses 50 to 60, wherein the transistor comprises a metal-oxide-semiconductor field-effect transistor (MOSFET). 62. The method according to any one of clauses 50 to 61, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with the interface between the metal layer and the insulating layer of the transistor. 63. The method according to Clause 62, wherein the insulating layer comprises an oxide. 64. The method according to any one of clauses 50 to 61, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with the interface between the semiconductor layer and the insulating layer of the transistor. 65. The method according to Clause 64, wherein the semiconductor layer comprises a silicon substrate. 66. The method according to any one of clauses 64 to 65, wherein the insulating layer comprises an oxide. 67. The method according to any one of clauses 50 to 66 further includes adjusting the metal layer of the gate based on the determined zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor. 68. The method according to Clause 67, wherein the metal layer of the gate is adjusted such that the work function of the gate is adjusted. 69. A non-transitory computer-readable medium storing an instruction set executable by at least one processor of a computing device to cause the computing device to perform a method of measuring the energy barrier of a transistor during its fabrication, the method comprising: For each of the multiple landing energies of the charged particle beam: The gate of the transistor is irradiated with the charged particle beam; Irradiate the material beneath the gate with a photon beam; The photocurrent of the transistor is determined for each photon energy among a plurality of photon energies; and The energy barrier is determined based on the determined photocurrent; Multiple energy barriers are determined based on the photocurrent of each of the multiple landing energies of the determined charged particle beam. The multiple energy barriers are plotted relative to multiple oxide electric fields; and The energy barrier of the transistor is determined at least in part based on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier. 70. The non-transitory computer-readable medium according to Clause 69, wherein determining the photocurrent of the transistor comprises: Obtain the grayscale value generated by the charged particle beam tool that provides the charged particle beam; and Determine the detector current of the charged particle beam tool. 71. The non-transitory computer-readable medium according to Clause 70, wherein determining the detector current of the charged particle beam tool comprises: Determine the backscattered electron yield of the charged particle beam tool; Determine the collection efficiency of the detector of the charged particle beam tool; and Determine the primary beam electron current of the charged particle beam tool. 72. The non-transitory computer-readable medium according to any one of clauses 69 to 71, wherein determining the energy barrier comprises: The photocurrent is plotted relative to the plurality of photon energies; and The inflection point of the plot is determined, and the energy barrier corresponds to the photon energy at the inflection point. 73. The non-transitory computer-readable medium according to any one of clauses 69 to 72, wherein determining the energy barrier of the transistor comprises: Fit the plot of the plurality of energy barriers; Extrapolate the fitting to a zero oxide electric field value; and An extrapolated energy barrier value is determined when the electric field value of the oxide is zero, wherein the zero-voltage energy barrier or the energy barrier that is substantially close to zero voltage corresponds to the determined energy barrier value. 74. The non-transitory computer-readable medium according to any one of clauses 69 to 73, wherein the transistor comprises a metal-oxide-semiconductor field-effect transistor (MOSFET). 75. A non-transitory computer-readable medium according to any one of clauses 69 to 74, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with an interface between the metal layer and the insulating layer of the transistor. 76. The non-transitory computer-readable medium according to Clause 75, wherein the insulating layer comprises an oxide. 77. A non-transitory computer-readable medium according to any one of clauses 69 to 74, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with an interface between the semiconductor layer and the insulating layer of the transistor. 78. The non-transitory computer-readable medium according to Clause 77, wherein the semiconductor layer comprises a silicon substrate. 79. The non-transitory computer-readable medium according to any one of Clauses 77 to 78, wherein the insulating layer comprises an oxide. 80. A non-transitory computer-readable medium according to any one of clauses 69 to 79, wherein the charged particle beam tool is configured to provide each of the plurality of landing energies of the charged particle beam. 81. A non-transitory computer-readable medium according to any one of clauses 69 to 80, wherein each of the plurality of landing energies of the charged particle beam corresponds to a voltage applied to the transistor. 82. The non-transitory computer-readable medium according to any one of clauses 69 to 81 further includes a metal layer of the gate adjusted based on the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the determined transistor. 83. The non-transitory computer-readable medium according to Clause 82, wherein adjusting the metal layer of the gate causes the work function of the gate to be adjusted. 84. A non-transitory computer-readable medium storing an instruction set executable by at least one processor of a computing device to cause the computing device to perform a method of measuring the energy barrier of a transistor during its fabrication, the method comprising: The gate of the transistor is irradiated with a beam of charged particles using the first landing energy; Irradiate the material beneath the gate with a photon beam; The first plurality of photocurrents of the transistor are determined by the energy of the first plurality of photons; The first energy barrier is determined based on the determined first plurality of photocurrents; The gate of the transistor is irradiated with the charged particle beam using a second landing energy; The material beneath the gate is irradiated with the photon beam; The second plurality of photocurrents of the transistor are determined by the energy of the second plurality of photons; The second energy barrier is determined based on the determined second plurality of photocurrents; Plot the first energy barrier and the second energy barrier relative to multiple oxide electric fields; and The energy barrier of the transistor is determined at least in part based on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier. 85. The non-transitory computer-readable medium according to Clause 84, wherein determining the first plurality of photocurrents and the second plurality of photocurrents of the transistor comprises: Obtain the grayscale value generated by the charged particle beam tool that provides the charged particle beam; and Determine the detector current of the charged particle beam tool. 86. The non-transitory computer-readable medium according to Clause 85, wherein determining the detector current of the charged particle beam tool comprises: Determine the backscattered electron yield of the charged particle beam tool; Determine the collection efficiency of the detector of the charged particle beam tool; and Determine the primary beam electron current of the charged particle beam tool. 87. The non-transitory computer-readable medium according to any one of clauses 84 to 86, wherein determining the first energy barrier and the second energy barrier comprises: The first plurality of photocurrents are plotted relative to the first plurality of photon energies; The second plurality of photocurrents are plotted relative to the second plurality of photon energies; Determine the first inflection point of the plot of the first plurality of photocurrents, wherein the first energy barrier corresponds to the photon energy of the first inflection point; and Determine the second inflection point of the plot of the second plurality of photocurrents, wherein the second energy barrier corresponds to the photon energy of the second inflection point. 88. A non-transitory computer-readable medium according to any one of clauses 84 to 87, wherein determining the energy barrier of the transistor comprises: The plots are fitted to the first energy barrier and the second energy barrier; Extrapolate the fitting to a zero oxide electric field value; and An extrapolated energy barrier value is determined when the electric field value of the oxide is zero, wherein the zero-voltage energy barrier or the energy barrier that is substantially close to zero voltage corresponds to the determined energy barrier value. 89. The non-transitory computer-readable medium according to any one of clauses 84 to 88, wherein the transistor comprises a metal-oxide-semiconductor field-effect transistor (MOSFET). 90. A non-transitory computer-readable medium according to any one of clauses 84 to 89, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with an interface between the metal layer and the insulating layer of the transistor. 91. The non-transitory computer-readable medium according to Clause 90, wherein the insulating layer comprises an oxide. 92. A non-transitory computer-readable medium according to any one of clauses 84 to 89, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with an interface between the semiconductor layer and the insulating layer of the transistor. 93. The non-transitory computer-readable medium according to Clause 92, wherein the semiconductor layer comprises a silicon substrate. 94. The non-transitory computer-readable medium according to any one of clauses 92 to 93, wherein the insulating layer comprises an oxide. 95. A non-transitory computer-readable medium according to any one of clauses 84 to 94, wherein the charged particle beam tool is configured to provide each of the plurality of landing energies of the charged particle beam. 96. A non-transitory computer-readable medium according to any one of clauses 84 to 95, wherein each of the plurality of landing energies of the charged particle beam corresponds to a voltage applied to the transistor. 97. The non-transitory computer-readable medium according to any one of clauses 84 to 96 further includes a metal layer of the gate that is adjusted based on the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the determined transistor. 98. The non-transitory computer-readable medium according to Clause 97, wherein adjusting the metal layer of the gate causes the work function of the gate to be adjusted. 99. A non-transitory computer-readable medium storing an instruction set executable by at least one processor of a computing device to cause the computing device to perform a method of measuring the energy barrier of a transistor during its fabrication, the method comprising: Irradiate the gate of the transistor with a beam of charged particles; Irradiate the material beneath the gate with a photon beam; Determine the secondary electron (SE) yield at each photon energy in a plurality of photon energies; The SE yield is plotted relative to the plurality of photon energies; and The energy barrier of the transistor is determined at least in part based on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier. 100. The non-transitory computer-readable medium according to Clause 99, wherein a charged particle beam tool provides the charged particle beam to the gate of the transistor. 101. The non-transitory computer-readable medium according to Clause 100, wherein determining the SE yield at each of the plurality of photon energies includes obtaining grayscale values ​​from the charged particle beam tool. 102. The non-transitory computer-readable medium according to any one of clauses 99 to 101, wherein the SE yield is a normalized SE yield. 103. The non-transitory computer-readable medium according to any one of clauses 99 to 102, wherein determining the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor includes determining a point where the plot remains stable. 104. The non-transitory computer-readable medium according to Clause 103, wherein the photon energy at the point where the drawing remains stable corresponds to the zero-voltage energy barrier or substantially near-zero voltage energy barrier of the determined transistor. 105. The non-transitory computer-readable medium according to any one of clauses 99 to 104, wherein the laser source provides the photon beam at a first laser power. 106. The non-transitory computer-readable medium according to Clause 105, wherein the laser source is configured to irradiate the material beneath the gate with the photon beam at a second laser power. 107. The non-transitory computer-readable medium according to Clause 106 further includes, when the second laser power is applied: Determine the SE yield at each of the plurality of photon energies; The SE yield is plotted relative to the plurality of photon energies; and The energy barrier of the transistor is determined at least in part based on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier. 108. The non-transitory computer-readable medium according to any one of clauses 106 to 107, wherein the first laser power is less than the second laser power. 109. The non-transitory computer-readable medium according to any one of Clauses 107 to 108, wherein the zero-voltage energy barrier or substantially near-zero voltage energy barrier of the transistor at the first laser power is greater than the zero-voltage energy barrier or substantially near-zero voltage energy barrier of the transistor at the second laser power. 110. The non-transitory computer-readable medium according to any one of clauses 99 to 109, wherein the transistor comprises a metal-oxide-semiconductor field-effect transistor (MOSFET). 111. A non-transitory computer-readable medium according to any one of clauses 99 to 110, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with an interface between the metal layer and the insulating layer of the transistor. 112. The non-transitory computer-readable medium as described in Clause 111, wherein the insulating layer comprises an oxide. 113. A non-transitory computer-readable medium according to any one of clauses 99 to 101, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with an interface between the semiconductor layer and the insulating layer of the transistor. 114. The non-transitory computer-readable medium according to Clause 113, wherein the semiconductor layer comprises a silicon substrate. 115. The non-transitory computer-readable medium according to any one of clauses 113 to 114, wherein the insulating layer comprises an oxide. 116. The non-transitory computer-readable medium according to any one of clauses 99 to 115 further includes a metal layer of the gate that is adjusted based on the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the determined transistor. 117. The non-transitory computer-readable medium according to Clause 116, wherein adjusting the metal layer of the gate causes the work function of the gate to be adjusted. 118. A non-transitory computer-readable medium storing an instruction set executable by at least one processor of a computing device to cause the computing device to perform a method of measuring the energy barrier of a transistor during its fabrication, the method comprising: Multiple charged particles are supplied to the gate of the transistor; Multiple photon particles are supplied to the material beneath the gate; The grayscale value is generated at each photon energy among multiple photon energies using a charged particle beam tool; Determine the secondary electron (SE) yield at each photon energy among the plurality of photon energies; and The energy barrier of the transistor is determined at least in part based on the determined SE yield and the plurality of photon energies, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier. 119. The non-transitory computer-readable medium according to Clause 118, wherein a charged particle beam tool provides the plurality of charged particles to the gate of the transistor. 120. The non-transitory computer-readable medium according to Clause 119, wherein determining the SE yield at each of the plurality of photon energies includes obtaining the grayscale value from the charged particle beam tool. 121. A non-transitory computer-readable medium according to any one of clauses 118 to 120, wherein the SE yield is a normalized SE yield. 122. A non-transitory computer-readable medium according to any one of clauses 118 to 121, wherein determining the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor comprises determining a point where the plot of the determined SE yield remains stable. 123. The non-transitory computer-readable medium according to Clause 122, wherein the photon energy at the point where the drawing remains stable corresponds to the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the determined transistor. 124. A non-transitory computer-readable medium according to any one of clauses 118 to 123, wherein the laser source provides the plurality of photon particles at a first laser power. 125. The non-transitory computer-readable medium according to Clause 124, wherein the laser source is configured to irradiate the material beneath the gate with the plurality of photon particles at a second laser power. 126. The non-transitory computer-readable medium according to Clause 125 further includes, when the second laser power is applied: Determine the SE yield at each of the plurality of photon energies; The SE yield is plotted relative to the plurality of photon energies; and The energy barrier of the transistor is determined at least in part based on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier. 127. The non-transitory computer-readable medium according to any one of clauses 125 to 126, wherein the first laser power is less than the second laser power. 128. A non-transitory computer-readable medium according to any one of clauses 126 to 127, wherein the zero-voltage energy barrier or substantially near-zero voltage energy barrier of the transistor at the first laser power is greater than the zero-voltage energy barrier or substantially near-zero voltage energy barrier of the transistor at the second laser power. 129. The non-transitory computer-readable medium according to any one of clauses 118 to 128, wherein the transistor comprises a metal-oxide-semiconductor field-effect transistor (MOSFET). 130. A non-transitory computer-readable medium according to any one of clauses 118 to 129, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with an interface between the metal layer and the insulating layer of the transistor. 131. The non-transitory computer-readable medium according to Clause 130, wherein the insulating layer comprises an oxide. 132. A non-transitory computer-readable medium according to any one of clauses 118 to 129, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with an interface between the semiconductor layer and the insulating layer of the transistor. 133. The non-transitory computer-readable medium according to Clause 132, wherein the semiconductor layer comprises a silicon substrate. 134. The non-transitory computer-readable medium according to any one of clauses 132 to 133, wherein the insulating layer comprises an oxide. 135. The non-transitory computer-readable medium according to any one of clauses 118 to 134 further includes a metal layer of the gate adjusted based on the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the determined transistor. 136. The non-transitory computer-readable medium according to Clause 135, wherein adjusting the metal layer of the gate causes the work function of the gate to be adjusted. 137. A system for measuring the energy barrier of a transistor during its fabrication, comprising: Memory, storing instruction sets; and One or more processors are configured to execute the instruction set to cause the system to perform operations, including: For each of the multiple landing energies of the charged particle beam: The gate of the transistor is irradiated with the charged particle beam; Irradiate the material beneath the gate with a photon beam; The photocurrent of the transistor is determined for each photon energy among a plurality of photon energies; and The energy barrier is determined based on the determined photocurrent; Multiple energy barriers are determined based on the photocurrent of each of the multiple landing energies of the determined charged particle beam. The multiple energy barriers are plotted relative to multiple oxide electric fields; and The energy barrier of the transistor is determined at least in part based on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier. 138. The system according to Clause 137, wherein determining the photocurrent of the transistor comprises: Obtain the grayscale value generated by the charged particle beam tool that provides the charged particle beam; and Determine the detector current of the charged particle beam tool. 139. The system according to Clause 138, wherein determining the detector current of the charged particle beam tool comprises: Determine the backscattered electron yield of the charged particle beam tool; Determine the collection efficiency of the detector of the charged particle beam tool; and Determine the primary beam electron current of the charged particle beam tool. 140. The system according to any one of clauses 137 to 139, wherein determining the energy barrier comprises: The photocurrent is plotted relative to the plurality of photon energies; and The inflection point of the plot is determined, and the energy barrier corresponds to the photon energy at the inflection point. 141. The system according to any one of clauses 137 to 140, wherein determining the energy barrier of the transistor comprises: Fit the plot of the plurality of energy barriers; Extrapolate the fitting to a value of zero for the oxide electric field; and An extrapolated energy barrier value is determined when the electric field value of the oxide is zero, wherein the zero-voltage energy barrier or the energy barrier that is substantially close to zero voltage corresponds to the determined energy barrier value. 142. The system according to any one of clauses 137 to 141, wherein the transistor comprises a metal-oxide-semiconductor field-effect transistor (MOSFET). 143. The system according to any one of clauses 137 to 142, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with the interface between the metal layer and the insulating layer of the transistor. 144. The system according to Clause 143, wherein the insulating layer comprises an oxide. 145. The system according to any one of clauses 137 to 142, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with the interface between the semiconductor layer and the insulating layer of the transistor. 146. The system according to Clause 145, wherein the semiconductor layer comprises a silicon substrate. 147. The system according to any one of clauses 145 to 146, wherein the insulating layer comprises an oxide. 148. The system according to any one of clauses 137 to 147, wherein the charged particle beam tool is configured to provide each of the plurality of landing energies of the charged particle beam. 149. The system according to any one of clauses 137 to 148, wherein each of the plurality of landing energies of the charged particle beam corresponds to a voltage applied to the transistor. 150. The system according to any one of clauses 137 to 149 further includes adjusting the metal layer of the gate based on the determined zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor. 151. The system according to Clause 150, wherein adjusting the metal layer of the gate causes the work function of the gate to be adjusted. 152. A system for measuring the energy barrier of a transistor during its fabrication, comprising: Memory, storing instruction sets; and One or more processors are configured to execute the instruction set to cause the system to perform operations, including: The gate of the transistor is irradiated with a beam of charged particles using the first landing energy; Irradiate the material beneath the gate with a photon beam; The first plurality of photocurrents of the transistor are determined by the energy of the first plurality of photons; The first energy barrier is determined based on the determined first plurality of photocurrents; The gate of the transistor is irradiated with the charged particle beam using a second landing energy; The material beneath the gate is irradiated with the photon beam; The second plurality of photocurrents of the transistor are determined by the energy of the second plurality of photons; The second energy barrier is determined based on the determined second plurality of photocurrents; Plot the first energy barrier and the second energy barrier relative to multiple oxide electric fields; and The energy barrier of the transistor is determined at least in part based on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier. 153. The system according to Clause 152, wherein determining the first plurality of photocurrents and the second plurality of photocurrents of the transistor comprises: Obtain the grayscale value generated by the charged particle beam tool that provides the charged particle beam; and Determine the detector current of the charged particle beam tool. 154. The system according to Clause 153, wherein determining the detector current of the charged particle beam tool comprises: Determine the backscattered electron yield of the charged particle beam tool; Determine the collection efficiency of the detector of the charged particle beam tool; and Determine the primary beam electron current of the charged particle beam tool. 155. The system according to any one of clauses 152 to 154, wherein determining the first energy barrier and the second energy barrier comprises: The first plurality of photocurrents are plotted relative to the first plurality of photon energies; The second plurality of photocurrents are plotted relative to the second plurality of photon energies; Determine the first inflection point of the plot of the first plurality of photocurrents, wherein the first energy barrier corresponds to the photon energy of the first inflection point; and Determine the second inflection point of the plot of the second plurality of photocurrents, wherein the second energy barrier corresponds to the photon energy of the second inflection point. 156. The system according to any one of clauses 152 to 155, wherein determining the energy barrier of the transistor comprises: The plots are fitted to the first energy barrier and the second energy barrier; Extrapolate the fitting to a value of zero for the oxide electric field; and An extrapolated energy barrier value is determined when the electric field value of the oxide is zero, wherein the zero-voltage energy barrier or the energy barrier that is substantially close to zero voltage corresponds to the determined energy barrier value. 157. The system according to any one of clauses 152 to 156, wherein the transistor comprises a metal-oxide-semiconductor field-effect transistor (MOSFET). 158. The system according to any one of clauses 152 to 157, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with the interface between the metal layer and the insulating layer of the transistor. 159. The system according to Clause 158, wherein the insulating layer comprises an oxide. 160. The system according to any one of clauses 152 to 157, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with the interface between the semiconductor layer and the insulating layer of the transistor. 161. The system according to Clause 160, wherein the semiconductor layer comprises a silicon substrate. 162. The system according to any one of clauses 160 to 161, wherein the insulating layer comprises an oxide. 163. The system according to any one of clauses 152 to 162, wherein the charged particle beam tool is configured to provide each of the plurality of landing energies of the charged particle beam. 164. The system according to any one of clauses 152 to 163, wherein each of the plurality of landing energies of the charged particle beam corresponds to a voltage applied to the transistor. 165. The system according to any one of clauses 152 to 164 further includes adjusting the metal layer of the gate based on the determined zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor. 166. The system according to Clause 165, wherein adjusting the metal layer of the gate causes the work function of the gate to be adjusted. 167. A system for measuring the energy barrier of a transistor during its fabrication, comprising: Memory, storing instruction sets; and One or more processors are configured to execute the instruction set to cause the system to perform operations, including: Irradiate the gate of the transistor with a beam of charged particles; Irradiate the material beneath the gate with a photon beam; Determine the secondary electron (SE) yield at each photon energy in a plurality of photon energies; The SE yield is plotted relative to the plurality of photon energies; and The energy barrier of the transistor is determined at least in part based on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier. 168. The system according to Clause 167, wherein a charged particle beam tool provides the charged particle beam to the gate of the transistor. 169. The system according to Clause 168, wherein determining the SE yield at each of the plurality of photon energies includes obtaining a grayscale value from the charged particle beam tool. 170. The system according to any one of Clauses 167 to 168, wherein the SE output is a normalized SE output. 171. The system according to any one of clauses 167 to 170, wherein determining the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor includes determining a point where the plot remains stable. 172. The system according to Clause 171, wherein the photon energy at the point where the drawing remains stable corresponds to the zero-voltage energy barrier or substantially near-zero voltage energy barrier of the determined transistor. 173. The system according to any one of clauses 167 to 172, wherein the laser source provides the photon beam at a first laser power. 174. The system according to Clause 173, wherein the laser source is configured to irradiate the material beneath the gate with the photon beam at a second laser power. 175. The system according to Clause 174 further includes, when the second laser power is applied: Determine the SE yield at each of the plurality of photon energies; The SE yield is plotted relative to the plurality of photon energies; and The energy barrier of the transistor is determined at least in part based on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier. 176. The system according to any one of clauses 174 to 175, wherein the first laser power is less than the second laser power. 177. The system according to any one of clauses 175 to 176, wherein the zero-voltage energy barrier or substantially near-zero voltage energy barrier of the transistor at the first laser power is greater than the zero-voltage energy barrier or substantially near-zero voltage energy barrier of the transistor at the second laser power. 178. The system according to any one of clauses 167 to 177, wherein the transistor comprises a metal-oxide-semiconductor field-effect transistor (MOSFET). 179. The system according to any one of clauses 167 to 178, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with the interface between the metal layer and the insulating layer of the transistor. 180. The system according to Clause 179, wherein the insulating layer comprises an oxide. 181. The system according to any one of clauses 167 to 178, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with the interface between the semiconductor layer and the insulating layer of the transistor. 182. The system according to Clause 181, wherein the semiconductor layer comprises a silicon substrate. 183. The system according to any one of clauses 181 to 182, wherein the insulating layer comprises an oxide. 184. The system according to any one of clauses 167 to 183 further includes adjusting the metal layer of the gate based on the determined zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor. 185. The system according to Clause 184, wherein adjusting the metal layer of the gate causes the work function of the gate to be adjusted. 186. A system for measuring the energy barrier of a transistor during its fabrication, comprising: Memory, storing instruction sets; and One or more processors are configured to execute the instruction set to cause the system to perform operations, including: Multiple charged particles are supplied to the gate of the transistor; Multiple photon particles are supplied to the material beneath the gate; The grayscale value is generated at each photon energy among multiple photon energies using a charged particle beam tool; Determine the secondary electron (SE) yield at each photon energy among the plurality of photon energies; and The energy barrier of the transistor is determined at least in part based on the determined SE yield and the plurality of photon energies, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier. 187. The system according to Clause 186, wherein a charged particle beam tool provides the plurality of charged particles to the gate of the transistor. 188. The system according to Clause 187, wherein determining the SE yield at each of the plurality of photon energies includes obtaining the grayscale value from the charged particle beam tool. 189. The system according to any one of Clauses 186 to 188, wherein the SE output is a normalized SE output. 190. The system according to any one of clauses 186 to 189, wherein determining the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor comprises determining a point where the plot of the determined SE yield remains stable. 191. The system according to Clause 190, wherein the photon energy at the point where the drawing remains stable corresponds to the zero-voltage energy barrier or substantially near-zero voltage energy barrier of the determined transistor. 192. The system according to any one of clauses 186 to 191, wherein the laser source provides the plurality of photon particles at a first laser power. 193. The system according to Clause 192, wherein the laser source is configured to irradiate the material beneath the gate with the plurality of photon particles at a second laser power. 194. The system according to Clause 193 further includes, when the second laser power is applied: Determine the SE yield at each of the plurality of photon energies; The SE yield is plotted relative to the plurality of photon energies; and The energy barrier of the transistor is determined at least in part based on the plot, wherein the energy barrier is a zero-voltage energy barrier or a substantially near-zero-voltage energy barrier. 195. The system according to any one of clauses 193 to 194, wherein the first laser power is less than the second laser power. 196. The system according to any one of clauses 194 to 195, wherein the zero-voltage energy barrier or substantially near-zero voltage energy barrier of the transistor at the first laser power is greater than the zero-voltage energy barrier or substantially near-zero voltage energy barrier of the transistor at the second laser power. 197. The system according to any one of clauses 186 to 196, wherein the transistor comprises a metal-oxide-semiconductor field-effect transistor (MOSFET). 198. The system according to any one of clauses 186 to 197, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with the interface between the metal layer and the insulating layer of the transistor. 199. The system according to Clause 198, wherein the insulating layer comprises an oxide. 200. The system according to any one of clauses 186 to 197, wherein the zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor is associated with the interface between the semiconductor layer and the insulating layer of the transistor. 201. The system according to Clause 200, wherein the semiconductor layer comprises a silicon substrate. 202. The system according to any one of clauses 200 to 201, wherein the insulating layer comprises an oxide. 203. The system according to any one of clauses 200 to 202 further includes adjusting the metal layer of the gate based on the determined zero-voltage energy barrier or substantially near-zero-voltage energy barrier of the transistor. 204. The system according to clause 203, wherein adjusting the metal layer of the gate causes the work function of the gate to be adjusted.

[0145] It should be understood that the embodiments of this disclosure are not limited to the precise constructions described above and illustrated in the accompanying drawings, and various modifications and changes may be made without departing from its scope.

Claims

1. A system for measuring the energy barrier of a transistor during its fabrication, comprising: Memory stores instruction sets; as well as One or more processors are configured to execute the instruction set to cause the system to perform operations, including: The grayscale value is generated at each photon energy among multiple photon energies using a charged particle beam tool; Determine the secondary electron (SE) yield at each photon energy among the multiple photon energies; and The energy barrier of the transistor is determined at least in part based on the determined SE yield and the plurality of photon energies.

2. The system according to claim 1, further comprising: Multiple charged particles are supplied to the gate of the transistor; as well as Multiple photon particles are supplied to the material beneath the gate.

3. The system of claim 2, wherein the charged particle beam tool provides the plurality of charged particles to the gate of the transistor.

4. The system of claim 3, wherein determining the SE yield at each photon energy among the plurality of photon energies comprises obtaining a grayscale value from the charged particle beam tool.

5. The system of claim 1, wherein determining the energy barrier of the transistor comprises determining a point where the plot of the determined SE yield remains stable.

6. The system of claim 5, wherein the photon energy at the point where the plot remains stable corresponds to the energy barrier of the determined transistor.

7. The system of claim 2, wherein the laser source provides the plurality of photon particles at a first laser power.

8. The system of claim 7, wherein the laser source is configured to irradiate the material beneath the gate with a plurality of photon particles at a second laser power.

9. The system of claim 8, further comprising, when the second laser power is applied: Determine the SE yield at each photon energy among multiple photon energies; The SE yield is plotted relative to the plurality of photon energies; and The energy barrier of the transistor is determined at least in part based on the drawing.

10. The system of claim 9, wherein the energy barrier of the transistor at the first laser power is greater than the energy barrier of the transistor at the second laser power.

11. A non-transitory computer-readable medium storing an instruction set executable by at least one processor of a computing device to cause the computing device to perform a method of measuring the energy barrier of a transistor during its fabrication, the method comprising: The grayscale value is generated at each photon energy among multiple photon energies using a charged particle beam tool; Determine the secondary electron (SE) yield at each photon energy among the multiple photon energies; and The energy barrier of the transistor is determined at least in part based on the determined SE yield and the plurality of photon energies.

12. The non-transitory computer-readable medium of claim 11, wherein the set of instructions executable by at least one processor of a computing device causes the computing device to further perform: Providing multiple charged particles to the gate of the transistor; and Multiple photon particles are supplied to the material beneath the gate.

13. The non-transitory computer-readable medium of claim 12, wherein the charged particle beam tool provides the plurality of charged particles to the gate of the transistor.

14. The non-transitory computer-readable medium of claim 13, wherein determining the SE yield at each photon energy among the plurality of photon energies comprises obtaining a grayscale value from the charged particle beam tool.

15. A method for measuring the energy barrier of a transistor during its fabrication, comprising: The grayscale value is generated at each photon energy among multiple photon energies using a charged particle beam tool; Determine the secondary electron (SE) yield at each photon energy among the multiple photon energies; and The energy barrier of the transistor is determined at least in part based on the determined SE yield and the plurality of photon energies.

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