Output voltage calibration method and power supply

Abstract

The invention relates to the technical field of power supplies, in particular to an output voltage calibration method and a power supply. Comprises: obtaining a target voltage; based on the output calibration coefficient and the target voltage, the current PWM duty ratio is calculated through the master controller according to a PWM duty ratio calibration formula; adjusting the output voltage based on the current PWM duty ratio through a hardware control loop; sampling the adjusted output voltage through a sampling module to obtain a sampling voltage; judging whether the error between the sampling voltage and the target voltage is within an allowable error range or not through the main controller; if yes, the calibration is successful; if not, updating the output calibration coefficient according to an output calibration coefficient updating formula, and then recalculating the current PWM duty ratio; by introducing the output calibration coefficient and dynamically updating the output calibration coefficient, the inherent error of an actual electronic element is accurately offset, so that the output voltage error is stabilized in an allowable range, the requirement of a high-precision voltage output scene is met, special working conditions do not need to be identified, and the software development difficulty is reduced.

Description

Technical Field

[0001] This invention relates to the field of power supply technology, and in particular to an output voltage calibration method and a power supply. Background Technology

[0002] The core of power supply products is the accurate output of the target voltage. The key lies in the real-time adjustment of the current voltage based on the target voltage. This adjustment method mainly includes hardware loop adjustment and software loop adjustment. Hardware loop adjustment lacks flexibility, while software loop adjustment has weak real-time performance. To combine the advantages of both, a hybrid solution of software control and hardware loop has emerged on the market. In this solution, the MCU obtains the target voltage through an APP and calculates the duty cycle of the MCU output based on the target voltage. Finally, it outputs a PWM wave according to the calculated duty cycle. The PWM is filtered by a hardware capacitor to obtain a reference voltage, and the hardware loop is adjusted based on this reference voltage. When calculating the duty cycle, this solution is usually based on the circuit under ideal conditions. However, the electronic components used in actual production all have a certain error range, which makes the output voltage accuracy insufficient under this method and difficult to meet the high-precision requirements.

[0003] Therefore, designing an output voltage calibration method and power supply that can improve the accuracy of output voltage is of great importance to those skilled in the art. Summary of the Invention

[0004] This invention provides an output voltage calibration method and power supply that can improve output voltage accuracy, thereby solving the problem of insufficient voltage accuracy in the prior art, which makes it difficult to meet high-precision requirements.

[0005] This invention discloses an output voltage calibration method applied to a software-controlled hardware loop output system. The system comprises a main controller, a hardware control loop, a voltage output terminal, and a sampling module. The input terminal of the sampling module and the output terminal of the hardware control loop are both connected to the voltage output terminal. The output terminal of the sampling module is connected to the input terminal of the main controller, and the output terminal of the main controller is connected to the input terminal of the hardware control loop. The main controller has a pre-set hardware circuit formula for calculating the PWM duty cycle and an output calibration coefficient. The output voltage calibration method includes the following steps: Obtain the target voltage; Based on the output calibration coefficient and the target voltage, the main controller calculates the current PWM duty cycle according to the PWM duty cycle calibration formula; The output voltage is adjusted based on the current PWM duty cycle through a hardware control loop; The regulated output voltage is sampled by the sampling module to obtain the sampled voltage; The main controller determines whether the error between the sampled voltage and the target voltage is within the allowable error range. If yes, the calibration is successful; otherwise, the output calibration coefficient is updated according to the output calibration coefficient update formula, and the current PWM duty cycle is recalculated. The formula for updating the output calibration coefficients is as follows: , For the updated output calibration coefficients, The output calibration coefficients before the update. For the target voltage, The sampling voltage is used; the PWM duty cycle calibration formula is: , This represents the current PWM duty cycle. This is the calculated value of the hardware circuit formula.

[0006] Optionally, the following steps are also included: When burning the program, set the initial output calibration coefficient to 1.

[0007] Optionally, the following steps are also included: Preset sampling wait time; After the hardware control loop adjusts the output voltage, the output voltage is acquired after a preset sampling wait time.

[0008] Optionally, the following steps are also included: The maximum number of times the output calibration coefficients can be updated is preset. When the error between the sampled voltage and the target voltage is not within the allowable error range, determine whether the current number of times the output calibration coefficient is updated is less than the upper limit of the number of updates; If yes, then update the output calibration coefficient according to the output calibration coefficient update formula; otherwise, the calibration fails.

[0009] Optionally, the following steps are also included: Within the allowable error range between the preset sampling voltage and the target voltage.

[0010] Optionally, the following steps are also included: The sampling accuracy of the calibration voltage output terminal is adjusted.

[0011] Optionally, the main controller also has preset measurement calibration coefficients. "Calibration of sampling accuracy at the voltage output terminal" includes the following steps: The sampling voltage value acquired by the sampling module is calibrated based on the measurement calibration coefficient. Obtain the actual voltage value at the voltage output terminal; Determine whether the error between the calibrated sampled voltage value and the actual voltage value is within the allowable error range; If yes, the calibration is successful; otherwise, the measurement calibration coefficients are updated, and the sampled voltage value is recalibrated.

[0012] Optionally, the update formula for "updating the measurement calibration coefficients" is: , For the updated measurement calibration coefficients, The measurement calibration coefficients before the update. This is the actual voltage value. This is the sampled voltage value.

[0013] Optionally, the initial measurement calibration factor is 1.

[0014] To address the problems existing in the prior art, the present invention also provides a power supply, wherein the power supply is equipped with a software-controlled hardware loop output system, and the software-controlled hardware loop output system is configured to perform the aforementioned output voltage calibration method.

[0015] The beneficial effects of the output voltage calibration method provided in this embodiment of the invention are as follows: 1. By introducing and dynamically updating the output calibration coefficient, the inherent errors of actual electronic components (resistors, capacitors, etc.) are accurately offset, solving the core problem of "insufficient accuracy caused by the deviation between the ideal circuit formula and the actual components" in the traditional software control hardware loop scheme, so that the output voltage error is stabilized within the preset allowable range, meeting the requirements of high-precision voltage output scenarios.

[0016] 2. It eliminates the need to identify special operating conditions such as "insufficient input power, excessive load" and "hardware full power limit". The calibration logic is triggered only by the "error between the sampled voltage and the target voltage". On the one hand, it eliminates the erroneous operation of "forcibly exceeding hardware limits" in traditional software correction schemes, avoids safety hazards such as component burnout and violent voltage fluctuations caused by overload operation of the power supply, and ensures the stable operation of the power supply under complex operating conditions. On the other hand, there is no need to add additional operating condition identification algorithms at the software level. The calibration is achieved through a simple logic of "coefficient update - duty cycle correction - sampling judgment", which reduces the computing burden of the main controller and the difficulty of software development.

[0017] 3. Voltage regulation still relies on the hardware control loop, giving full play to its fast regulation response speed; at the same time, it retains the flexibility of software control, and through software-level calibration coefficient correction, it achieves synergy between real-time hardware regulation and precise software calibration, which neither sacrifices the core advantages of the original hybrid scheme, nor makes up for the accuracy shortcomings. Attached Figure Description

[0018] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. In the accompanying drawings: Figure 1 This is a system block diagram of the software-controlled hardware loop output system in an embodiment of the present invention; Figure 2This is a flowchart of the output voltage calibration method in an embodiment of the present invention. Figure 1 ; Figure 3 This is a flowchart of the output voltage calibration method in an embodiment of the present invention. Figure 2 ; Figure 4 This is a flowchart of the output voltage calibration method in an embodiment of the present invention. Figure 3 ; Figure 5 This is a flowchart of the output voltage calibration method in an embodiment of the present invention. Figure 4 .

[0019] The labels for the attached figures are as follows: 10. Main controller; 20. Hardware control loop; 30. Voltage output terminal; 40. Sampling module; 50. Filtering module. Detailed Implementation

[0020] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0021] like Figures 1 to 5 As shown, the present invention provides a specific embodiment of an output voltage calibration method.

[0022] An output voltage calibration method, applied to a software-controlled hardware loop output system, referenced. Figure 1 The software-controlled hardware loop output system includes a main controller 10, a hardware control loop 20, a voltage output terminal 30, and a sampling module 40. The input terminal of the sampling module 40 and the output terminal of the hardware control loop 20 are both connected to the voltage output terminal 30. The output terminal of the sampling module 40 is connected to the input terminal of the main controller 10, and the output terminal of the main controller 10 is connected to the input terminal of the hardware control loop 20. The main controller 10 has a preset hardware circuit formula for calculating the PWM duty cycle and an output calibration coefficient.

[0023] Specifically, the software-controlled hardware loop output system is applied to the power supply system. It is a hybrid hardware loop and software loop scheme. The main controller 10 is the core control unit, which undertakes the functions of information processing, logic operation and instruction output. It has a built-in storage unit, which can be used to receive the target voltage sent by the host computer. The host computer refers to the parameter input terminal, such as APP. The main controller 10 can also be used to call the hardware circuit formula, calculate the PWM duty cycle in combination with the output calibration coefficient, and output the PWM wave with the corresponding duty cycle to drive the hardware control loop 20 to output the corresponding output voltage. The main controller 10 can also receive the voltage data of the sampling module 40, and perform error judgment and calibration coefficient update logic, and store the output calibration coefficient after successful calibration.

[0024] The hardware control loop 20 is responsible for real-time voltage regulation and stable output. As the system's execution unit, it receives the reference voltage after the PWM wave output by the main controller 10 is filtered by the filter module 50. Through the hardware negative feedback circuit, it dynamically adjusts the output of the power devices, making the voltage at the voltage output terminal 30 approach the target voltage. Relying on the characteristics of the hardware circuit, it achieves faster real-time voltage regulation than a pure software loop. The voltage output terminal 30 serves as the connection interface between the system and the external load. It is used to output the voltage regulated by the hardware control loop 20 and to supply power to the load. It also serves as the sampling object of the sampling module 40, providing the physical signal of the actual output voltage. The sampling module 40 is responsible for collecting the output voltage and feeding it back to the main controller 10. It collects the voltage signal at the voltage output terminal 30, converts the analog voltage signal into a digital signal, and transmits it to the main controller 10 as the basis for error judgment and calibration coefficient update.

[0025] The main controller 10 has a preset calibration coefficient to correct the PWM duty cycle parameter. Its initial default value is 1, and it is continuously updated and calibrated according to the target voltage and the sampled voltage. By increasing the calibration coefficient, on the one hand, it can offset the error of hardware components. Due to the inherent error of electronic components (such as resistors and capacitors) in actual production, the PWM duty cycle calculated by the ideal hardware circuit formula cannot make the output voltage accurately match the target value. The calibration coefficient corrects the duty cycle calculation result through the dynamic update of "target voltage / sampled voltage" and offsets the deviation caused by component error. On the other hand, it can simplify the calibration logic. There is no need to perform complex parameter compensation on the hardware circuit. The output voltage can be accurately calibrated by simply updating a single coefficient, which reduces the computational burden of the main controller 10 and facilitates the batch execution of the calibration process on the production line. More importantly, it can ensure long-term accuracy stability. The calibration coefficient after successful calibration is stored in the non-volatile memory unit of the main controller 10. The coefficient can be directly called when the power supply is started later without repeating the calibration, ensuring the accuracy and stability of the output voltage during long-term operation.

[0026] refer to Figure 2 The output voltage calibration method includes the following steps: S1. Obtain the target voltage; S2. Based on the output calibration coefficient and the target voltage, the main controller calculates the current PWM duty cycle according to the PWM duty cycle calibration formula; S3. Adjust the output voltage based on the current PWM duty cycle through a hardware control loop; S4. The regulated output voltage is sampled through the sampling module to obtain the sampled voltage; S5. The main controller determines whether the error between the sampled voltage and the target voltage is within the allowable error range. S61. If yes, then the calibration is successful; S62. If not, update the output calibration coefficient according to the output calibration coefficient update formula and then recalculate the current PWM duty cycle; The formula for updating the output calibration coefficients is as follows: , For the updated output calibration coefficients, The output calibration coefficients before the update. For the target voltage, The sampling voltage is used; the PWM duty cycle calibration formula is: , This represents the current PWM duty cycle. This is the calculated value of the hardware circuit formula.

[0027] Step 1 In a software-controlled hardware loop system, users can set the required output voltage as the target voltage via a host computer (such as computer-based control software, APP, etc.). The host computer then sends this voltage parameter to the main controller via a communication interface (such as serial port, Bluetooth, etc.). After receiving the target voltage, the main controller stores it in its built-in storage module as the core reference value for this calibration. Relying on the architecture of software-controlled hardware loop, both the flexibility of software adjustment and the real-time performance of hardware loop execution are satisfied.

[0028] Step Two The main controller first calls the pre-stored hardware circuit formula to calculate the theoretical PWM duty cycle of the target voltage. After the main controller calculates the theoretical PWM duty cycle based on the existing hardware circuit formula, it combines the current output calibration coefficient to calculate the actual output PWM duty cycle, i.e., through the formula... , This represents the current PWM duty cycle. The calculated value is the formula for the hardware circuit. This refers to the updated output calibration coefficients; where the theoretical PWM duty cycle is the PWM parameter required for the hardware loop to reach the target voltage under ideal circuit conditions. The pre-stored hardware circuit formula is an existing calculation formula, derived based on the topology of the hardware loop. By establishing a mathematical relationship between the target output voltage and the PWM duty cycle output by the main controller; taking the Buck step-down circuit as an example, under ideal circuit conditions, the parasitic parameters of inductors and capacitors are ignored, and the switching transistors and diodes are also ideal devices. The frequency of the PWM wave is much higher than the cutoff frequency of the hardware loop, and the circuit operates in continuous conduction mode. The theoretical PWM duty cycle is equal to the switching transistor conduction time divided by the PWM period. The relationship between the output voltage, input voltage, and duty cycle of the Buck step-down circuit is: the user-set target output voltage is equal to the theoretical PWM duty cycle multiplied by the DC input voltage of the power supply.

[0029] This step calibrates the PWM duty cycle calculation by introducing an output calibration coefficient. It eliminates the need to identify low output voltage caused by insufficient input power, excessive load power, or hardware limitations. Low voltage caused by insufficient input power, excessive load power, or inherent hardware limitations essentially indicates that the power supply's actual output capacity has reached its physical limit; this is an objective limitation, not a parameter error in the hardware loop. Traditional software solutions would forcibly increase the PWM duty cycle... Correcting power supplies using methods like duty cycle adjustments can force them to operate under overload conditions. For example, it can cause power transistors to operate in an overcurrent state for extended periods, leading to severe component overheating and even burning out core components such as switching transistors and inductors. Alternatively, it can cause the power supply to enter a critical state of undervoltage protection, resulting in frequent restarts and severe voltage fluctuations. This solution, however, eliminates the need to identify these operating conditions, fundamentally preventing "software-forced hardware limit-breaking" operations. This avoids the power supply entering dangerous operating ranges due to erroneous corrections, significantly improving product safety. Furthermore, identifying conditions such as insufficient input power or hardware full-power limitations requires additional modules for current sampling, input power calculation, and hardware limit parameter comparison. This not only consumes the main controller's computing resources but also requires setting numerous hardware parameter thresholds, leading to complex software logic and increased development difficulty. Therefore, direct calibration using output calibration coefficients is used. This logic is independent of hardware limit parameters and requires no additional calibration steps, simplifying the production line process and reducing subsequent maintenance costs.

[0030] Step 3 The main controller outputs a corresponding PWM wave based on the calculated current PWM duty cycle. After the PWM wave enters the hardware capacitor filter circuit, it is converted into an analog reference voltage. The hardware control loop receives the reference voltage in real time and dynamically adjusts the output voltage at the voltage output terminal through a voltage negative feedback mechanism, so that the output voltage approaches the target value.

[0031] Step Four After the hardware control loop adjusts the voltage, the sampling module delays and collects the voltage signal at the voltage output terminal, converts it into a digital signal, namely the sampled voltage, and transmits it to the main controller.

[0032] Step 5 The main controller calculates the difference between the target voltage and the sampled voltage and compares it with the preset "allowable error voltage" (such as ±0.1V required by the product). If the condition is met that "the difference between the target voltage and the allowable error is less than or equal to the sampled voltage, and the sampled voltage is less than or equal to the sum of the target voltage and the allowable error", then the current output voltage is determined to meet the accuracy requirements and the calibration is successful. If the error range is not met, the calibration coefficient update process is entered.

[0033] Step Six The main controller updates the formula based on the output calibration coefficient. The updated output calibration coefficient is calculated. This coefficient is dynamically corrected based on the deviation between the sampled voltage and the target voltage. It can be used to offset the actual error of the hardware components. The main controller replaces the original output calibration coefficient with the new output calibration coefficient and returns to step two. The PWM duty cycle is recalculated based on the new output calibration coefficient, and the subsequent steps are repeated until the current output voltage meets the accuracy requirements. When the calibration is successful, the main controller stores the final output calibration coefficient in a non-volatile memory unit. The coefficient can be directly called when the power is started in the future without repeating the calibration.

[0034] In one embodiment, during the power supply product's programming stage, the output voltage calibration method uses a programming tool to set the initial value of the "output calibration coefficient" in the main controller to 1 and stores it in the main controller's default storage address. This initial value is a reference coefficient under ideal circuit conditions. Assuming that the electronic components in the hardware loop are error-free, the PWM duty cycle calculated according to the hardware circuit formula can directly achieve the target voltage output, providing a unified starting reference for subsequent calibration processes. This step, by presetting the initial coefficient to 1, not only conforms to the calculation logic of the ideal circuit model but also provides a clear starting point for subsequent dynamic calibration of error correction, ensuring the repeatability of the calibration process.

[0035] In one embodiment, reference Figure 3 The output voltage calibration method also includes the following steps: S41, Preset sampling waiting time; S42. After the hardware control loop adjusts the output voltage, the output voltage is acquired after a preset sampling waiting time.

[0036] Specifically, a fixed sampling wait time threshold (e.g., 200ms) is pre-stored in the main controller. This time is calibrated based on the voltage stability characteristics of the hardware control loop and needs to cover the full response time of the hardware loop from receiving the PWM wave, adjusting the reference voltage, to the stable output voltage. The preset value of the sampling wait time can be flexibly adjusted according to the characteristics of different power supply hardware topologies (e.g., Buck and Boost circuits) to ensure compatibility with different types of hardware control loops.

[0037] In one embodiment, reference Figure 4 The output voltage calibration method also includes the following steps: S621, Preset the upper limit of the number of times the output calibration coefficient can be updated; S622. When the error between the sampled voltage and the target voltage is not within the allowable error range, determine whether the current number of updates of the output calibration coefficient is less than the upper limit of the number of updates. S623. If so, update the output calibration coefficient according to the output calibration coefficient update formula.

[0038] S624. If not, calibration fails.

[0039] Specifically, by setting an upper limit on the number of times the output calibration coefficient can be updated, the output calibration coefficient can be updated within a limited number of times, which can prevent the calibration process from falling into an infinite loop and ensure the stability of software operation. If the power supply has hardware failures (such as damage to the sampling module or failure of hardware loop components) or serious parameter deviations (such as component errors exceeding the correction capability of the calibration coefficient), even if the calibration coefficient is updated repeatedly, the sampling voltage cannot enter the allowable error range. The preset upper limit on the number of updates can forcibly terminate meaningless cyclic calibration, avoid the main controller from continuously occupying computing resources to execute repetitive logic, prevent software freezing and system crashes, and ensure the stable operation of the overall power supply control program.

[0040] Furthermore, in the scenario of factory calibration on the production line, setting a maximum limit on the number of updates can clearly define the upper limit of calibration time for a single product, avoiding excessively long calibration processes due to extreme deviations in the hardware parameters of individual products, which would affect the overall production line cycle time. At the same time, it ensures that the calibration process of all products is completed within a controllable time, improving calibration efficiency and batch consistency in the mass production stage. Moreover, each calibration coefficient update is accompanied by an adjustment of the PWM duty cycle and a readjustment of the hardware loop. Frequent voltage fluctuations will increase the switching losses and thermal stress of power devices (such as switching transistors and inductors). Setting a maximum limit on the number of updates can reduce unnecessary adjustment actions, reduce hardware losses, and extend the life of the power supply.

[0041] In one embodiment, reference Figure 5 The output voltage calibration method also includes calibrating the sampling accuracy of the output voltage, specifically including the following steps: S71. Based on the measurement calibration coefficient, calibrate the sampled voltage value obtained by the sampling module; S72. Obtain the actual voltage value at the voltage output terminal; S73. Determine whether the error between the calibrated sampled voltage value and the actual voltage value is within the allowable error range; S74. If yes, then the calibration was successful; S75. If not, update the measurement calibration coefficients and recalibrate the sampled voltage values.

[0042] In one embodiment, the update formula for "updating the measurement calibration coefficients" is: , For the updated measurement calibration coefficients, The measurement calibration coefficients before the update. This is the actual voltage value. This is the sampled voltage value.

[0043] Specifically, steps S71 to S72 are prerequisites for accurate output voltage calibration. By correcting the errors of the sampling module itself, it ensures that the sampled voltage value can truly reflect the actual sampled voltage at the voltage output terminal, laying a data foundation for the accurate update of the subsequent output calibration coefficients. The sampling module itself has inherent errors. If the uncalibrated sampled voltage is used directly for judgment, it will lead to "distorted sampled value". Even if the actual voltage at the voltage output terminal accurately matches the target voltage, it will be misjudged as "not up to standard" due to sampling errors, which will lead to incorrect updates of the output calibration coefficients.

[0044] Since the sampling module's error is a separate source from the hardware loop, skipping sampling accuracy calibration will cause the sampling error to overlap with the hardware loop error, resulting in the output calibration coefficient's update direction or magnitude deviating from the actual requirements. For example, if the sampling module's sampling values ​​are generally too low, the main controller may misjudge that the hardware loop's output voltage is insufficient, leading to a meaningless increase in the output calibration coefficient, ultimately failing to achieve the desired accuracy. Sampling accuracy calibration is equivalent to "correcting the measurement tool's error first, and then using a precise tool to measure the target," avoiding the superposition of double errors and significantly improving the overall output voltage calibration accuracy limit.

[0045] The initial measurement calibration coefficient is 1. The initial measurement calibration coefficient is 1, which corresponds to the ideal state of "no error in the sampling module". That is, the voltage value collected by the sampling module is completely consistent with the actual voltage value at the voltage output terminal. This initial setting fits the theoretical working model of the sampling module, allowing the calibration process to start from the "no error assumption". Subsequently, the coefficient is dynamically updated by the deviation between the actual voltage and the sampling voltage, which conforms to the calibration logic of "ideal value → comparison with actual value → error correction".

[0046] It should be understood that the above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit them. Those skilled in the art can modify the technical solutions described in the above embodiments, or make equivalent substitutions for some of the technical features; and all such modifications and substitutions should fall within the protection scope of the appended claims of the present invention.

Claims

1. An output voltage calibration method, applied to a software-controlled hardware loop output system, characterized in that, The software-controlled hardware loop output system includes a main controller, a hardware control loop, a voltage output terminal, and a sampling module. The input terminal of the sampling module and the output terminal of the hardware control loop are both connected to the voltage output terminal. The output terminal of the sampling module is connected to the input terminal of the main controller, and the output terminal of the main controller is connected to the input terminal of the hardware control loop. The main controller has a pre-set hardware circuit formula for calculating the PWM duty cycle and an output calibration coefficient. The output voltage calibration method includes the following steps: Obtain the target voltage; Based on the output calibration coefficient and the target voltage, the main controller calculates the current PWM duty cycle according to the PWM duty cycle calibration formula; The output voltage is adjusted based on the current PWM duty cycle through a hardware control loop; The regulated output voltage is sampled by the sampling module to obtain the sampled voltage; The main controller determines whether the error between the sampled voltage and the target voltage is within the allowable error range. If yes, the calibration is successful; otherwise, the output calibration coefficient is updated according to the output calibration coefficient update formula, and the current PWM duty cycle is recalculated. The formula for updating the output calibration coefficients is as follows: , For the updated output calibration coefficients, The output calibration coefficients before the update. For the target voltage, The sampling voltage is used; the PWM duty cycle calibration formula is: , This represents the current PWM duty cycle. This is the calculated value of the hardware circuit formula.

2. The output voltage calibration method according to claim 1, characterized in that, It also includes the following steps: When burning the program, set the initial output calibration coefficient to 1.

3. The output voltage calibration method according to claim 1, characterized in that, It also includes the following steps: Preset sampling wait time; After the hardware control loop adjusts the output voltage, the output voltage is acquired after a preset sampling wait time.

4. The output voltage calibration method according to claim 1, characterized in that, It also includes the following steps: The maximum number of times the output calibration coefficients can be updated is preset. When the error between the sampled voltage and the target voltage is not within the allowable error range, determine whether the current number of times the output calibration coefficient is updated is less than the upper limit of the number of updates; If yes, then update the output calibration coefficient according to the output calibration coefficient update formula; otherwise, the calibration fails.

5. The output voltage calibration method according to claim 1, characterized in that, It also includes the following steps: Within the allowable error range between the preset sampling voltage and the target voltage.

6. The output voltage calibration method according to claim 1, characterized in that, It also includes the following steps: The sampling accuracy of the calibration voltage output terminal is adjusted.

7. The output voltage calibration method according to claim 6, characterized in that, The main controller also has preset measurement calibration coefficients, and the "sampling accuracy of the calibration voltage output terminal" includes the following steps: The sampling voltage value acquired by the sampling module is calibrated based on the measurement calibration coefficient. Obtain the actual voltage value at the voltage output terminal; Determine whether the error between the calibrated sampled voltage value and the actual voltage value is within the allowable error range; If yes, the calibration is successful; otherwise, the measurement calibration coefficients are updated, and the sampled voltage value is recalibrated.

8. The output voltage calibration method according to claim 7, characterized in that, The update formula for "updating the measurement calibration coefficients" is as follows: , For the updated measurement calibration coefficients, The measurement calibration coefficients before the update. This is the actual voltage value. This is the sampled voltage value.

9. The output voltage calibration method according to claim 1, characterized in that: The initial measurement calibration coefficient is 1.

10. A power supply, characterized in that, The power supply is equipped with a software-controlled hardware loop output system, which is used to implement the output voltage calibration method as described in any one of claims 1-9.

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