Clock control method and device, electronic equipment and storage medium

Abstract

The invention relates to the technical field of computers, and provides a clock control method and device, electronic equipment and a storage medium, and the method responds to the power-on of a clock system, reads reference time from a second real-time clock circuit, and synchronizes the reference time to a first real-time clock circuit; under the condition that the clock system is powered on to run and network timing is not available, time information of the first real-time clock circuit is read, the time information is calibrated based on temperature data of the clock system, and calibrated system time is output; and writing the current calibrated system time into the second real-time clock circuit under the condition that the clock system is detected to be powered off, and keeping the second real-time clock circuit to continue timing in a power-off state by the energy storage unit. According to the invention, by constructing a double-RTC collaborative architecture, clock frequency offset caused by high-temperature heating during operation of the centralized controller is effectively eliminated, reference time maintenance after power failure is guaranteed through the low-power-consumption RTC, and time accuracy and system reliability of equipment under all working conditions are improved.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to clock control methods, apparatus, electronic devices and storage media. Background Technology

[0002] In TFT (Thin-Film Transistor) controllers, especially in applications with large screens, the entire unit generates significant heat, leading to an increase in internal ambient temperature. This affects the operating frequency of the crystal oscillator in the real-time clock circuit, causing temperature drift and resulting in a significant deviation between the system's time readings and Beijing time, thus impacting timing accuracy. Conventional RTC (Real-Time Clock) circuit designs are calibrated at room temperature, which cannot overcome the timing accuracy issues caused by actual high-temperature operating environments. Summary of the Invention

[0003] This application aims to address at least one of the technical problems existing in the prior art. To this end, this application proposes a clock control method that effectively eliminates clock frequency deviation caused by high-temperature heating during the operation of the central controller by constructing a dual-RTC collaborative architecture, and ensures the maintenance of the reference time after power failure through a low-power RTC, thereby improving the time accuracy and system reliability of the device under all operating conditions.

[0004] This application also proposes a clock control device, an electronic device, and a non-transitory computer-readable storage medium.

[0005] The clock control method according to the first aspect of this application is applied to a clock system, the clock system including a first real-time clock circuit integrated inside a power management integrated circuit (PMIC) and an external second real-time clock circuit independently powered by an energy storage unit, the clock control method including: In response to the power-on of the clock system, a reference time is read from the second real-time clock circuit and the reference time is synchronized to the first real-time clock circuit; When the clock system is powered on and running without network time synchronization, the time information of the first real-time clock circuit is read, and the time information is calibrated based on the temperature data of the clock system, and the calibrated system time is output. If a power failure is detected in the clock system, the current calibrated system time is written into the second real-time clock circuit, and the energy storage unit maintains the second real-time clock circuit to continue timing in the power failure state.

[0006] According to one embodiment of this application, calibrating the time information based on the temperature data of the clock system includes: Based on the temperature data of the clock system, the real-time operating temperature of the crystal oscillator associated with the first real-time clock circuit is determined. Based on the pre-stored relationship between the temperature and frequency offset of the crystal oscillator, the frequency offset value corresponding to the real-time operating temperature is determined. The time information is calibrated based on the frequency offset value.

[0007] According to one embodiment of this application, the clock system further includes a main controller; determining the real-time operating temperature of the crystal oscillator associated with the first real-time clock circuit based on the temperature data of the clock system includes: The temperature data of the main controller is collected by the temperature sensor integrated inside the main controller; Based on the proximity layout and thermal coupling relationship between the main controller and the PMIC on the printed circuit board, the temperature data is mapped to the real-time operating temperature of the crystal oscillator using pre-stored thermal mapping parameters. The thermal coupling relationship is established by the main controller and the PMIC being connected to the same heat sink through a thermally conductive medium.

[0008] According to one embodiment of this application, calibrating the time information based on the frequency offset value includes: Record the cumulative runtime since the last calibration operation was performed; Calculate the product of the frequency offset value and the cumulative runtime as the clock drift amount generated in the current calibration cycle; The clock drift is then reversed and compensated for in the time information read from the first real-time clock circuit.

[0009] According to one embodiment of this application, after detecting a power outage in the clock system, writing the currently calibrated system time into the second real-time clock circuit, and having the energy storage unit maintain the second real-time clock circuit's timing in the power-off state, the method further includes: In response to the clock system being powered on again, the current timing time of the second real-time clock circuit is read, and the network connection status is detected; If a network connection is detected, the system time is updated by obtaining the real-time network time. If no network connection is detected, the duration of the power outage operation of the clock system is determined. Based on the duration of the power outage and the frequency deviation coefficient of the second real-time clock circuit at room temperature, the cumulative time error is calculated. Based on the accumulated time error, the current timing time is corrected, and the corrected time is synchronized to the first real-time clock circuit as the system time.

[0010] According to one embodiment of this application, calibrating the time information based on the temperature data of the clock system further includes: The temperature data collected from multiple consecutive calibration cycles are filtered to obtain the average temperature value of the current calibration cycle. Determine the difference between the average temperature value and the reference temperature value used in the previous calibration cycle; If the difference is greater than a preset temperature hysteresis threshold, the time information is calibrated based on the average temperature value.

[0011] According to one embodiment of this application, the PMIC is electrically connected to the main controller and is used to supply power to the main controller; The main controller is connected to the second real-time clock circuit via a communication bus; The energy storage unit is connected to the power input terminal of the second real-time clock circuit and is used to supply power to the second real-time clock circuit when the clock system is powered off.

[0012] A clock control device according to a second aspect embodiment of this application includes: A reference time reading module is used to read the reference time from the second real-time clock circuit in response to the power-on of the clock system, and synchronize the reference time to the first real-time clock circuit; The first clock control module is used to read the time information of the first real-time clock circuit when the clock system is powered on and there is no network time synchronization, and to calibrate the time information based on the temperature data of the clock system, and output the calibrated system time. The second clock control module is used to write the currently calibrated system time into the second real-time clock circuit when the clock system is detected to be powered off, and the energy storage unit is used to maintain the second real-time clock circuit to continue timing in the power-off state.

[0013] An electronic device according to a third aspect of this application includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement any of the clock control methods described above.

[0014] A non-transitory computer-readable storage medium according to a fourth aspect of this application stores a computer program thereon, which, when executed by a processor, implements the clock control method as described above.

[0015] The above-described one or more technical solutions in the embodiments of this application have at least one of the following technical effects: By constructing a dual-RTC collaborative architecture, dynamic thermal compensation is performed on the PMIC RTC affected by the high heat generation of the central controller during operation using system temperature data, eliminating the crystal oscillator frequency offset error under high temperature environment; at the same time, the low power consumption characteristics of the external RTC are utilized to maintain the reference time in the power-off state, thereby effectively solving the problem of inconsistent timing accuracy of the central controller under two different thermal environments of high temperature operation and normal temperature power-off without increasing the hardware cost of the temperature-compensated crystal oscillator, and improving the time accuracy and system reliability of the equipment under all operating conditions.

[0016] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is one of the flowcharts illustrating the clock control method provided in the embodiments of this application.

[0019] Figure 2 This is a circuit diagram of the PMIC provided in the embodiments of this application.

[0020] Figure 3 This is a circuit diagram of the second real-time clock provided in an embodiment of this application.

[0021] Figure 4 This is a circuit diagram of the supercapacitor provided in an embodiment of this application.

[0022] Figure 5 This is the second flowchart of the clock control method provided in the embodiments of this application.

[0023] Figure 6 This is a schematic diagram of the clock control device provided in the embodiments of this application.

[0024] Figure 7 This is a schematic diagram of the structure of the electronic device provided in the embodiments of this application. Detailed Implementation

[0025] The embodiments of this application will be described in further detail below with reference to the accompanying drawings and examples. The following examples are used to illustrate this application, but should not be used to limit the scope of this application.

[0026] In the development of the 10.1-inch TFT central controller, it was discovered that the overall temperature of the central controller was relatively high during operation. The RTC chip crystal oscillator calibration was performed at room temperature, without considering the impact of the overall machine temperature rise. This caused the system clock to be faster than the actual Beijing time when the main control platform read the RTC clock. Simultaneously, when the product is powered off and the RTC is at room temperature, its operation is within the error range. The reasons for this error are as follows: The overall temperature rise of the machine causes frequency deviation caused by the crystal oscillator in the peripheral circuit of the clock chip RTC, resulting in excessive frequency deviation of the crystal oscillator; Parasitic capacitance in the PCB layout of the clock chip RTC causes inaccurate crystal oscillator matching, resulting in errors. The system lacks corresponding temperature acquisition, and after the temperature rises, the system cannot effectively compensate for the acquisition time using algorithms.

[0027] To address the aforementioned issues, this application proposes a clock control method. This method effectively suppresses the impact of temperature drift by configuring optimal clock sources for high-temperature (power-on) and normal-temperature (power-off) states, supplemented by software compensation. By correcting the first real-time clock circuit and using a second real-time clock circuit in a stable environment, the impact of this error is reduced. In the power-on state, the system clearly possesses compensation capability (reading the temperature rise of the RK3566); in the power-off state, the system requires no compensation (because the environment is stable).

[0028] It should be noted that the clock control method provided in this application is executed by a clock system, such as a dual RTC clock system.

[0029] Figure 1 This is one of the flowcharts illustrating the clock control method provided in this application. (Refer to...) Figure 1 This application provides a clock control method, including: Step 101: In response to the clock system power-on, read the reference time from the second real-time clock circuit and synchronize the reference time to the first real-time clock circuit.

[0030] The clock system is used in the TFT controller and mainly includes the main controller, power management integrated circuit (PMIC), first real-time clock circuit, second real-time clock circuit, temperature sensor and energy storage unit.

[0031] The main controller, as the core of the system's computing and control, can be selected from MCUs (Microcontroller Units), SoCs (System on Chips), and FPGAs (Field-Programmable Gate Arrays). In one embodiment, the main controller is a Rockchip RK3566 SoC, which integrates a high-performance ARM Cortex-A55 CPU core and a Mali-G52 GPU, and has a built-in temperature sensor. The main controller is configured to: during the system power-on initialization phase, read the reference time from the second real-time clock circuit and use the reference time to synchronize the first real-time clock circuit; upon system power-on, prioritize reading the time information from the first real-time clock circuit from the PMIC, and perform dynamic temperature compensation based on the temperature data acquired by the main controller to output the calibrated system time; when the system is powered off, the second real-time clock circuit maintains the timing with the support of the energy storage unit.

[0032] The PMIC is electrically connected to the main controller and is used to supply power to the main controller when the clock system is powered on. Specifically, the PMIC provides stable, multi-channel operating voltages to the main controller and other units within the system. In one embodiment, reference... Figure 2 The power management integrated circuit (PMIC) is the Rockchip RK809-5A, a multi-channel power management chip designed to work with the RK3566 main controller. It integrates a first real-time clock circuit and is equipped with a dedicated crystal oscillator pin. Upon system power-up, the first real-time clock circuit integrated within the PMIC acts as the main timing unit, accessed by the main controller via the IIC communication bus. Furthermore, this PMIC monitors the system power status, and changes in its power status can serve as trigger conditions for the main controller to detect system power-down events.

[0033] The second real-time clock circuit is an external chip independent of the PMIC and the main controller. In one embodiment, reference... Figure 3 The second real-time clock circuit can be a dedicated Aip8563 RTC chip. This chip has low power consumption; in the power-off standby state powered by an energy storage unit (such as a supercapacitor), its operating current is less than 1 microamp. This chip communicates with the main controller via the IIC communication bus and has a built-in independent crystal oscillator circuit. The main functions of the second real-time clock circuit are: during system power-off, it is responsible for maintaining continuous timing of the reference time under normal temperature and low power consumption conditions; during the initial power-on phase, it provides the main controller with the high-precision reference time accumulated during this standby period to synchronize with the first real-time clock circuit.

[0034] The energy storage unit is connected to the power input terminal of the second real-time clock circuit to supply power to the second real-time clock circuit when the clock system is powered off. In one embodiment, reference... Figure 4 The energy storage unit can use a C83 supercapacitor. The core characteristics of this supercapacitor are its high power density and rapid charge / discharge capability. Its capacitance is specifically configured to provide a trickle current for a predetermined timekeeping duration (e.g., ≥5 days) to the second real-time clock circuit at a minimum voltage required for normal operation after a complete system power outage. The selection and configuration of this component is the energy foundation for ensuring that the second real-time clock circuit can function as an independent and reliable timekeeping clock during system power outages and provide an effective reference time upon power-up.

[0035] A temperature sensor, located inside or near the main controller, is used to collect temperature data during clock system operation. The main controller periodically reads this temperature data via its internal analog-to-digital converter interface or digital bus. This temperature data provides direct input parameters for the dynamic temperature compensation algorithm executed by the main controller. By establishing a thermal mapping relationship, the real-time operating temperature of the crystal oscillator associated with the first real-time clock circuit is estimated, thereby eliminating crystal oscillator frequency deviation caused by the overall temperature rise of the central controller. The temperature sensor can be an NTC (Negative Temperature Coefficient) thermistor or a digital temperature sensor, etc.

[0036] In response to the clock system powering on, the main controller reads the reference time from the second real-time clock circuit and synchronizes it to the first real-time clock circuit. For example, the main controller detects the PMIC power reset signal or determines that the current boot process is a cold boot during the initial stage of its bootloader, thereby triggering the operation of reading the reference time from the second real-time clock circuit. Early in the operating system initialization phase, the main controller sends a preset device address and register read instruction to the second real-time clock circuit via the IIC communication bus and receives the returned time and date data, combining them into the reference time. The main controller first sets the reference time to the kernel clock of the clock system as the reference for the current system operation, and then reads the updated system kernel clock and writes this time into the time register of the first real-time clock circuit to complete the synchronization.

[0037] In one embodiment, the main controller checks whether the read reference time is an invalid reset value (such as an incorrect year), or checks whether the status register of the second real-time clock circuit is marked with a "power loss" bit; clock synchronization is only performed when the reference time passes the validity check. If the reference time is determined to be invalid during the time validity check step, the following exception handling procedure is executed: the main controller abandons the current synchronization operation from the second real-time clock circuit and sets the first real-time clock circuit and the system kernel clock to a predefined factory default time; or, after successfully connecting to the network, the main controller prioritizes obtaining the network time through the network time protocol to calibrate the system.

[0038] Step 102: With the clock system powered on and running and without network time synchronization, read the time information of the first real-time clock circuit, calibrate the time information based on the temperature data of the clock system, and output the calibrated system time.

[0039] It should be understood that "power-on operation" of the clock system refers to the stage where the system has completed initialization, the operating system has been loaded normally, and is in an active working state. "No network time synchronization" refers to the state where the system is not connected to an external network that can provide Network Time Protocol (NTP) services, or where attempts to obtain network time have failed.

[0040] When the clock system is powered on and running without network time synchronization, time information is read from the register of the first real-time clock circuit and verified. If the verification passes, the time information is used for subsequent calibration. The main controller periodically reads the temperature data from its internally integrated temperature sensor and calibrates the time information based on the temperature data, outputting the calibrated system time.

[0041] In one embodiment, before reading the time information of the first real-time clock circuit, it is also necessary to determine the operating status of the clock system. Specifically, the main controller determines whether the system is under high load, for example, the TFT screen backlight is on and the brightness is higher than a preset threshold, or the CPU utilization rate is continuously higher than a preset threshold; when the system is under high load for a period of time, the subsequent temperature acquisition and dynamic compensation process is triggered to avoid overcompensation before the system temperature reaches thermal equilibrium.

[0042] Step 103: When a power failure is detected in the clock system, the current calibrated system time is written into the second real-time clock circuit, and the energy storage unit maintains the second real-time clock circuit to continue timing in the power failure state.

[0043] Clock system power outages include both unexpected power outages and deliberate shutdowns. For example, a clock system power outage can be detected in the following ways: 1) The main controller detects the drop in external input power supply voltage through a dedicated GPIO pin. When the voltage is lower than the preset power-down threshold, a high-priority power-down interrupt is triggered. In the interrupt service routine that responds to the power-down interrupt, the main controller executes the operation of writing the currently calibrated system time into the second real-time clock circuit.

[0044] 2) In response to the user's shutdown command, at the end of the shutdown process executed by the operating system, that is, after the file system is unloaded and the main services are shut down, but before the power supply to the main controller is cut off, a shutdown script is called, in which the operation of writing the currently calibrated system time into the second real-time clock circuit is performed.

[0045] Before performing the write operation, the main controller reads time data from the kernel clock of its operating system. This kernel clock is the time that has been continuously corrected during system operation through network time synchronization or a temperature-based dynamic compensation algorithm. The main controller sends a preset device address and register write command to the second real-time clock circuit via the IIC communication bus, writing the year, month, day, hour, minute, and second data read from the kernel clock into the corresponding registers of the second real-time clock circuit. The second real-time clock circuit continues to keep time even when powered off, and the energy storage unit is a supercapacitor or backup battery that has been fully charged during system operation. When the main power supply is cut off, a reverse current protection diode or power switching switch automatically isolates the main power supply path, allowing the power supply to the second real-time clock circuit to seamlessly switch to the energy storage unit, and this switching process does not cause the second real-time clock circuit to reset.

[0046] In one embodiment, before performing a write operation, the main controller first sends an instruction to the second real-time clock circuit to disable the write protection function of its time register; after the write operation is successfully completed, the main controller sends an instruction to the second real-time clock circuit again to re-enable the write protection function of its time register to prevent data from being accidentally tampered with.

[0047] The clock control method provided in this application reads a reference time from a second real-time clock circuit in response to the clock system power-on and synchronizes the reference time to a first real-time clock circuit. When the clock system is powered on and running without network time synchronization, the method reads the time information from the first real-time clock circuit and calibrates the time information based on the clock system's temperature data, outputting the calibrated system time. When a power outage is detected, the calibrated system time is written to the second real-time clock circuit, and the energy storage unit maintains the second real-time clock circuit's timing even when powered off. This application constructs a dual-RTC collaborative architecture, using system temperature data to dynamically compensate the PMIC RTC, which is affected by the high heat generated by the central controller during operation, thus eliminating crystal oscillator frequency offset errors under high-temperature environments. Simultaneously, it utilizes the low-power characteristics of the external RTC to maintain the reference time during power-off states. Therefore, without increasing the hardware cost of the temperature-compensated crystal oscillator, it effectively solves the problem of inconsistent timing accuracy of the central controller under different thermal environments—high-temperature operation and normal-temperature power-off—improving the time accuracy and system reliability of the device under all operating conditions.

[0048] Based on the above embodiments, time information is calibrated based on temperature data from the clock system, including: Based on the temperature data of the clock system, the real-time operating temperature of the crystal oscillator associated with the first real-time clock circuit is determined. Based on the pre-stored relationship between temperature and frequency offset of the crystal oscillator, the frequency offset value corresponding to the real-time operating temperature is determined. The time information is calibrated based on the frequency offset value.

[0049] It should be understood that a crystal oscillator refers to a quartz crystal element that is physically directly associated with the first real-time clock circuit and serves as its external clock source.

[0050] The frequency offset value refers to the specific correction value calculated by the main controller based on the real-time temperature and a pre-stored temperature-frequency offset relationship to compensate for the current clock error. For example, the frequency offset value is a signed integer value that is configured to be directly written into the first real-time clock circuit or the digital clock calibration register within the main controller; a positive value indicates an increase in clock pulses to correct for a slow error, while a negative value indicates a decrease in clock pulses to correct for a fast error.

[0051] The system reads the temperature value collected by the temperature sensor integrated inside the main controller and uses this value directly as the real-time operating temperature of the crystal oscillator. Alternatively, a temperature lookup table can be pre-stored in the system's non-volatile memory. This lookup table establishes a direct mapping relationship from the main controller temperature to the crystal oscillator's operating temperature. When it is necessary to determine the real-time operating temperature of the crystal oscillator, the currently collected temperature data of the main controller is used as the input index to query the temperature lookup table and directly output the corresponding pre-calibrated real-time operating temperature of the crystal oscillator.

[0052] The temperature-frequency offset relationship of a crystal oscillator can be stored in the device's non-volatile memory in at least one of the following forms: a mathematical formula describing the functional relationship between frequency offset and temperature, such as a polynomial function; or a lookup table indexed by temperature and containing frequency offset values.

[0053] In one embodiment, the temperature-frequency deviation relationship of the crystal oscillator can be obtained during the calibration phase of product manufacturing by: placing the device or its core circuit board in a high-low temperature chamber, measuring and recording the deviation between the actual output frequency and the nominal frequency of the crystal oscillator associated with the first real-time clock circuit at multiple different stable temperature points; and finally generating a mathematical formula or lookup table by performing curve fitting or tabulation on the collected multiple sets of "temperature-frequency deviation" data.

[0054] The frequency offset at the current temperature is calculated by substituting the real-time operating temperature into a polynomial function. Alternatively, a lookup table can be used, with the discrete real-time operating temperature as the input address or index, to output the corresponding pre-calibrated frequency offset value. If the real-time operating temperature is not in the table, the frequency offset value is obtained through linear interpolation or the nearest neighbor method.

[0055] The main controller reads time information (i.e., the raw time count) from the first real-time clock circuit. At the application or operating system layer, it uses the frequency offset value to calculate and correct the raw time count, and directly outputs the calibrated system time. Alternatively, it converts the calculated frequency offset value into a configuration value for the RTC calibration register, writes the configuration value into the RTC calibration register, and allows the first real-time clock circuit to adjust its timing frequency automatically.

[0056] The main controller is configured to automatically perform a calibration process at a preset time interval (e.g., every minute, every ten minutes, or every hour) to ensure that the accuracy of the time information is maintained within a predetermined range. When the system detects that the cumulative total error caused by prolonged lack of calibration or drastic temperature changes exceeds a preset threshold, the main controller will perform a one-time time setting operation, directly forcing the time of the core clock or the first real-time clock circuit to a fully corrected and accurate time.

[0057] This application embodiment utilizes a temperature sensor inside the main control chip to achieve real-time, indirect monitoring of the RTC crystal oscillator's operating temperature without increasing hardware costs. Simultaneously, software algorithms dynamically compensate for clock frequency drift caused by the device's own temperature rise, effectively offsetting crystal oscillator temperature drift caused by the central controller's heat generation. This improves the long-term timing accuracy and stability of the clock system under high-temperature conditions without increasing hardware complexity or cost.

[0058] Based on the above embodiments, the clock system further includes a main controller; determining the real-time operating temperature of the crystal oscillator associated with the first real-time clock circuit based on the temperature data of the clock system includes: Temperature data of the main controller is collected through the temperature sensor integrated inside the main controller; Based on the proximity layout and thermal coupling relationship between the main controller and PMIC on the printed circuit board, the temperature data is mapped to the real-time operating temperature of the crystal oscillator using pre-stored thermal mapping parameters.

[0059] It should be understood that thermal coupling refers to the physical state between the main controller and the PMIC, where an effective heat transfer channel is formed through one or more defined physical paths, resulting in a strong correlation between their temperature changes. Thermal coupling can be determined in the following ways: 1) The thermal coupling relationship is established by the main controller and PMIC being connected to the same heatsink through a thermally conductive medium. Specifically, the main controller and PMIC are mechanically fixed and thermally connected to the same metal heatsink through a thermally conductive medium (such as thermal grease or thermal pads). It should be understood that this method establishes a low thermal resistance path from the main controller to the heatsink, and then from the heatsink to the PMIC. When the main controller generates heat, the heat is not only dissipated to the environment through the heatsink, but also quickly transferred to the PMIC through this path, ensuring that the temperature of both can respond quickly and be maintained within a small temperature difference range.

[0060] 2) The thermal coupling relationship is determined based on the proximity layout of the main controller and PMIC on the printed circuit board and / or their shared heat dissipation structure. Specifically, the main controller and PMIC are arranged adjacently on the printed circuit board, exchanging heat through the copper foil power / ground plane inside the PCB and a small amount of spatial radiation and convection. The main controller and PMIC are jointly mounted on a system metal housing or structural component, forming a thermal path through this component.

[0061] The temperature sensor integrated within the main controller can be a thermistor or an analog sensor based on the PN junction voltage-temperature characteristic. The main controller also integrates a dedicated analog-to-digital converter (ADC) to convert the analog voltage signal output from the temperature sensor into a digital raw temperature value. In one embodiment, when the main controller is a Rockchip RK3566 model, the integrated temperature sensor is its internal thermal sensing ADC module.

[0062] Acquiring temperature data from the main controller can be triggered by a specific event, which may include at least one of the following: system startup or wake-up from hibernation; initialization or execution of a calibration process; or detection of a step change in system power consumption or the main controller's core load. For example, during system initialization, the device driver for accessing the internal temperature sensor is loaded and configured. The main controller triggers a temperature sampling and conversion by writing specific instructions to the temperature sensor's control register. After conversion, an uncalibrated raw digital value is read from the temperature sensor's data register. After acquiring the temperature data, it is smoothed and filtered before being used to determine the real-time operating temperature. The smoothing and filtering process can be a moving average filter or a median filter.

[0063] The pre-stored thermal mapping parameters are obtained through experimental calibration on a hardware platform where the main controller and PMIC are in a close proximity and thermally coupled relationship. This experimental calibration involves simultaneously measuring the temperature of the main controller and the actual temperature of the crystal oscillator in a temperature chamber at different ambient temperatures, and then fitting the measured temperature data. For example, during the product manufacturing or R&D phase, the following calibration process can be used: placing the printed circuit board or the entire device in a precisely temperature-controlled chamber, ensuring stable operation of the equipment at multiple different ambient temperature setpoints, and simultaneously using a non-contact thermal imager or contact thermocouple to measure the actual surface temperature of the crystal oscillator, while recording the readings of the internal temperature sensor of the main controller; and then generating a mathematical function or lookup table by curve fitting or tabulating the collected multiple sets of "main controller temperature - actual crystal oscillator temperature" data.

[0064] In one embodiment, the pre-stored thermal mapping parameters can be a mathematical function describing the relationship between the main controller temperature and the crystal oscillator temperature. The collected temperature data of the main controller is substituted into this mathematical function as the independent variable to calculate the real-time operating temperature of the crystal oscillator.

[0065] In one embodiment, the pre-stored heat mapping parameters can be a lookup table stored in non-volatile memory. The lookup table contains multiple pairs of data, each pair including a main controller temperature value and a corresponding crystal oscillator temperature value. The acquired main controller temperature data is used to query this lookup table to obtain the real-time operating temperature of the crystal oscillator.

[0066] This embodiment utilizes the inherent proximity and thermal coupling between the main controller and the PMIC, combined with pre-stored thermal mapping parameters, to map the temperature data of the main controller to the real-time operating temperature of the crystal oscillator. This design eliminates the need for a separate external temperature sensor for the RTC, achieving critical data acquisition of the timing element's temperature without increasing hardware costs or PCB layout complexity.

[0067] Based on the above embodiments, time information is calibrated based on the frequency offset value, including: Record the cumulative runtime since the last calibration operation was performed; Calculate the product of the frequency offset and the cumulative runtime as the clock drift amount generated in the current calibration cycle; The clock drift is reversed and compensated for in the time information read from the first real-time clock circuit.

[0068] During the last calibration, the time value of the first real-time clock circuit was recorded as the starting timestamp. When calibration is required again, the current time value of the first real-time clock circuit is read, and the time difference between the current time value and the starting timestamp is used as the cumulative runtime. After calculating the cumulative runtime, this runtime is corrected based on the frequency offset value to eliminate timing errors caused by the frequency deviation of the first real-time clock circuit itself.

[0069] When the cumulative runtime exceeds a preset minimum calculation threshold, the operation of multiplying the frequency offset value by the cumulative runtime is performed. For example, the product of the frequency offset value and the cumulative runtime is calculated as the amount of clock drift generated within the current calibration cycle.

[0070] If the frequency offset value is positive, it indicates that the first real-time clock circuit is running too fast, and the clock drift is subtracted from the read time information; if the frequency offset value is negative, it indicates that the first real-time clock circuit is running too slow, and the clock drift is added to the read time information. For example, the main controller reads the original timestamp from the first real-time clock circuit; in the application layer program, the clock drift is directly added to or subtracted from the original timestamp, and the result is used as the calibrated system time output.

[0071] This application embodiment accumulates the running time since the last calibration using a high-precision timer, multiplies it by the frequency offset value that characterizes the instantaneous deviation of the crystal oscillator, quantifies the absolute time drift generated within that period, and subtracts or supplements this drift from the original RTC time through reverse calculation. This achieves the correction of the accumulated error of the crystal oscillator during long-term continuous operation at the software level, and improves the long-term timekeeping accuracy and stability of the clock system in a network-free environment.

[0072] Based on the above embodiments, after detecting a power failure in the clock system, writing the currently calibrated system time into the second real-time clock circuit, and having the energy storage unit maintain the second real-time clock circuit's timing during the power failure state, the method further includes: In response to the clock system being powered on again, the current timing of the second real-time clock circuit is read, and the network connection status is detected; If a network connection is detected, the system time is updated by obtaining the real-time network time. If no network connection is detected, determine the duration of the power outage operation of the clock system; The cumulative time error is calculated based on the duration of power outage operation and the frequency deviation coefficient of the second real-time clock circuit at room temperature. Based on the accumulated time error, the current timing time is corrected, and the corrected time is synchronized to the first real-time clock circuit as the system time.

[0073] Clock system power-on refers to the cold start process of restoring power to the system from a completely power-off state. During the system's bootloader phase or the early stages of operating system kernel initialization, read and check operations are performed. For example, via the IIC communication bus, a register read instruction is sent to the preset device address of the second real-time clock circuit, and time data is sequentially retrieved from its year, month, day, hour, minute, and second registers, finally combining this data to form the current timing time. Simultaneously, the physical layer connection status can be checked in the following ways: 1) Query the link status register of the Ethernet physical layer chip to determine if the physical link has been successfully established; 2) Query the status of the network interface to determine if the interface has successfully obtained a valid IP address; 3) Actively attempt to send request packets to one or more preset external servers, and based on whether a valid response is received within a preset timeout period, ultimately determine whether the network is connected and has external network access capability.

[0074] If a network connection is detected, the system time is updated by acquiring the network's real-time time. For example, the main controller sends an NTP request message to a preset NTP (Network Time Protocol) server address; upon receiving an NTP response message from the NTP server, it parses the timestamp information contained in the message; combining the request's sending time and the response's receiving time, it calculates the network latency and the deviation between the local clock and the server time; based on the calculated time deviation, it generates a calibrated network real-time time. The main controller writes the latest system time, which has been calibrated via the network, into the first and second real-time clock circuits respectively, to ensure that the clocks of the two hardware RTCs are also synchronized with the network time, preparing for the next power outage and restart.

[0075] To improve the reliability of the network time source, the system pre-stores an NTP server address pool. When communication with the primary NTP server fails or times out, the system will automatically attempt to communicate with a backup NTP server in the address pool until it successfully obtains the real-time network time.

[0076] After the system is powered on again, the current timing time is read from the second real-time clock circuit as the power-on timestamp; the power-off timestamp saved before the last power failure is read from the non-volatile memory area, and the time difference between the power-on timestamp and the power-off timestamp is calculated. This difference is the duration of the power-off operation.

[0077] It should be understood that the frequency deviation coefficient of the second real-time clock circuit at room temperature is a fixed parameter pre-stored in the device's non-volatile memory, representing how fast the clock runs. For example, the frequency deviation coefficient is expressed in parts per million and is a signed value, where a positive value indicates that the second real-time clock circuit runs faster than the nominal frequency at room temperature, and a negative value indicates that it runs slower.

[0078] In one embodiment, the frequency deviation coefficient is obtained during the product manufacturing or R&D stage through the following calibration process: the second real-time clock circuit or its circuit board is placed in a constant temperature environment at room temperature. In this environment, the actual output frequency of the crystal oscillator associated with the second real-time clock circuit is measured by a high-precision frequency counter. The measured actual frequency is compared with the nominal frequency, the frequency deviation rate is calculated, and it is used as the frequency deviation coefficient.

[0079] The cumulative time error is calculated based on the duration of power outage operation and the frequency deviation coefficient of the second real-time clock circuit at room temperature. For example, cumulative time error = duration of power outage operation × frequency deviation coefficient.

[0080] The current timing is corrected based on the accumulated time error. For example, if the accumulated time error indicates that the clock is running fast, the error value is subtracted from the current timing; if the accumulated time error indicates that the clock is running slow, the error value is added to the current timing, thus obtaining a corrected and accurate time. The corrected time is synchronized to the first real-time clock circuit as the system time.

[0081] This application embodiment achieves high-precision synchronization by prioritizing the acquisition of time via the network when powered on. In the absence of a network, it calculates the timekeeping error of the second real-time clock during the power outage and compensates and corrects the read time. This ensures the accuracy of time under network conditions and improves the accuracy of system time recovery based on the local clock in offline scenarios, realizing the device's ability to quickly restore accurate system time under various operating conditions.

[0082] Based on the above embodiments, calibrating time information based on temperature data from the clock system further includes: The temperature data collected from multiple consecutive calibration cycles are filtered to obtain the average temperature value of the current calibration cycle. Determine the difference between the average temperature value and the reference temperature value used in the previous calibration cycle; If the difference is greater than the preset temperature hysteresis threshold, the time information is calibrated based on the average temperature value.

[0083] It should be understood that multiple calibration cycles of continuous acquisition refer to a large cycle used to calculate the average temperature value, which includes multiple smaller cycles used to acquire raw temperature data. Within the large cycle, raw temperature data is continuously acquired at a shorter cycle frequency, and the acquired data is stored in a first-in, first-out (FIFO) queue or circular buffer. When the large cycle ends, all raw temperature data stored in the queue or buffer is filtered.

[0084] Filtering can be performed using a moving average filtering algorithm, which calculates the arithmetic mean of all data points in the FIFO queue or circular buffer as the average temperature value for the current calibration period. Alternatively, a median filtering algorithm can be used. For example, all data points in the FIFO queue or circular buffer are sorted, and the value in the middle position is selected as the average temperature value for the current calibration period to effectively filter out occasional, large-amplitude pulse interference. A weighted average filtering algorithm can also be used. For example, each data point in the FIFO queue or circular buffer is assigned a different weight, with data points closer to the current time point receiving a higher weight. Calculating the weighted arithmetic mean of these data points makes the final result better reflect recent temperature trends.

[0085] It should be understood that the reference temperature value used in the previous calibration cycle is a state variable stored in volatile or non-volatile memory. For example, the initialization and update mechanism of the reference temperature value includes: when the system performs a calibration operation for the first time, the average temperature value calculated for the first time is directly used as the initial reference temperature value; in any subsequent calibration cycle, if the calibration operation of that cycle is successfully triggered and executed, the reference temperature value is updated using the average temperature value used in that cycle after the calibration operation is completed, for comparison in the next calibration cycle.

[0086] Calculate the difference between the average temperature value and the reference temperature value used in the previous calibration cycle. For example, the difference = average temperature value - reference temperature value. This difference is a signed numerical value; a positive value indicates that the current temperature has increased compared to the last calibration, and a negative value indicates that the current temperature has decreased. In one embodiment, the difference = |average temperature value - reference temperature value|, where || represents the absolute value operation to ensure that the resulting difference is a non-negative number representing the magnitude of the temperature change.

[0087] It should be understood that the temperature hysteresis threshold is a fixed positive value representing the minimum effective temperature change. The temperature hysteresis threshold can include two different values: a heating hysteresis threshold and a cooling hysteresis threshold. Calibration is triggered when the difference is positive (representing heating) and its absolute value is greater than the heating hysteresis threshold; calibration is triggered when the difference is negative (representing cooling) and its absolute value is greater than the cooling hysteresis threshold.

[0088] If the difference exceeds a preset temperature hysteresis threshold, the time information is calibrated based on the average temperature value. For example, based on the average temperature value, a pre-stored temperature-frequency offset relationship model (such as a lookup table or mathematical formula) is queried to determine the frequency offset value corresponding to the average temperature value; this frequency offset value is converted into a hardware calibration code or a software correction value; the hardware calibration code is used to update the RTC calibration register, or the software correction value is used to adjust the running rate of the system kernel clock.

[0089] If the difference is less than or equal to the preset temperature hysteresis threshold, skip the current dynamic calibration operation and keep the current calibration parameters unchanged until the next calibration cycle.

[0090] This application embodiment eliminates instantaneous fluctuations by filtering continuous temperature data and ignores minute temperature changes through a hysteresis threshold comparison mechanism. This effectively avoids frequent calibration operations caused by minute fluctuations in ambient temperature or sensor noise, solves the problem of frequent clock jitter in temperature-sensitive RTC systems, and enables the system to achieve industrial-grade stability while maintaining high accuracy.

[0091] To further explain the clock control method proposed in this application, please refer to the following embodiments.

[0092] The embodiments of this application have made improvements to the hardware design and PCB (Printed Circuit Board) layout to address this problem, thereby improving the RTC accuracy and resolving the system clock skew issue.

[0093] 1. In terms of hardware design, the system implements dual RTC reading.

[0094] 1.1) Power-on reading of PMIC (RK809-5A) clock information: The hardware circuit design employs a dual-channel RTC circuit. Utilizing the RK3566 minimum system and the built-in RTC1 of the PMIC (RK809-5A), and by calibrating the crystal matching capacitors surrounding RTC1, the RK3566 reads and displays the clock information from the PMIC (RK809-5A) upon power-on. At this time, the RK3566 does not read the clock information from the external RTC2. Calibration can also be performed by reading the temperature rise of the RK3566 itself. For example, the temperature of the internal temperature sensor of the RK3566 can be read in real time via software. Since the PMIC and RK3566 are very close in the overall PCB layout and mounted on the same heatsink, their temperatures are very similar. Typically, a crystal oscillator's frequency offset is + / -20PPM@25 degrees Celsius, with the minimum offset occurring at 25 degrees Celsius. The error increases at temperatures above or below 25 degrees Celsius. During long-term operation (without WiFi network updates), the increased frequency offset error causes a significant increase in the real-time clock deviation of the RTC. The solution is to use a software algorithm to periodically collect the RK3566's real-time temperature data and combine it with the crystal oscillator's frequency offset curve to compensate for the RTC's timing. This can keep the entire system within + / -4PPM. By adding a sampling algorithm to sample system runtime and temperature, the RTC's real-time accuracy can be improved to within 2PPM. This approach also saves on the system's AD sampling interface and complex external PCB layout.

[0095] 1.2) Reading the backup Aip8563's RTC2 during system power failure: When the entire system is powered down, the PMIC is inactive. Since the PMIC provides multiple power supplies to the RK3566 and has relatively high power consumption, the Aip8563 is read via IIC during power failure. In this situation, the Aip8563 is powered by the supercapacitor C83 on the PCB. The power consumption of the Aip8563 during power failure is very low, less than 800uA. C83 provides trickle current to U1 after power failure. This ensures that the system time can still be accurately kept even after a power outage of less than 5 days, guaranteeing accuracy and preventing deviation.

[0096] 2. Software control strategy: Refer to Figure 5 The software control strategy mainly includes the following: 2.1) With WiFi connection: The main control platform RK3566 obtains real-time clock information through the WiFi module and updates the clock information in real time.

[0097] 2.2) Without WiFi connection: During the power-on phase, the main control platform RK3566 reads the real-time clock information of the PMIC chip RK809-5A via communication. Under normal power supply, RK3566 does not read the clock information of Aip8563. At this time, C83 stores electrical energy through VCC3V3. RK3566 periodically reads and corrects the PMIC clock and outputs it to the user interface.

[0098] 2.3) System Power-Off State: When the system is powered off, the RK3566 needs to quickly read and save the current real-time clock before the power is completely cut off, record the clock at this time, and use this clock as the reference point to perform RTC2 (Aip8563) timing after the power is cut off. After the next power-on, the current time is read, and depending on whether there is a WiFi connection, if there is WiFi, the latest real-time time is obtained by connecting to WiFi; if there is no WiFi, the time of Aip8563 is read (when the power-off time is relatively long, the software needs to correct the read time to eliminate errors) and provide it to the system. After the system is updated, the RTC information is provided by PMIC.

[0099] This application embodiment utilizes a hardware design to read two-channel RTCs, fully leveraging the system's built-in RTC1. It achieves time-division real-time time reading under both high-temperature and normal-temperature power-off conditions, improving the system's RTC error accuracy and enhancing user experience. The TFT screen controller utilizes the system's built-in RTC1 and a low-cost external RTC2 circuit design. Through software switching and correction algorithms, it reduces the impact of crystal oscillator frequency deviation at high temperatures on the test error of a single external RTC, improving the system's real-time clock accuracy and enhancing the overall user experience.

[0100] The clock control device provided in this application is described below. The clock control device described below can be referred to in correspondence with the clock control method described above.

[0101] refer to Figure 6 The clock control device provided in this application includes a reference time reading module 601, a first clock control module 602, and a second clock control module 603.

[0102] The reference time reading module 601 is used to read the reference time from the second real-time clock circuit in response to the power-on of the clock system, and synchronize the reference time to the first real-time clock circuit. The first clock control module 602 is used to read the time information of the first real-time clock circuit when the clock system is powered on and there is no network time synchronization, and to calibrate the time information based on the temperature data of the clock system, and output the calibrated system time. The second clock control module 603 is used to write the currently calibrated system time into the second real-time clock circuit when the clock system is detected to be powered off, and the energy storage unit maintains the second real-time clock circuit to continue timing in the power-off state.

[0103] The clock control device provided in this application reads the reference time from the second real-time clock circuit in response to the clock system power-on and synchronizes the reference time to the first real-time clock circuit. When the clock system is powered on and running without network time synchronization, it reads the time information from the first real-time clock circuit and calibrates the time information based on the clock system's temperature data, outputting the calibrated system time. When a power failure is detected in the clock system, the currently calibrated system time is written to the second real-time clock circuit, and the energy storage unit maintains the second real-time clock circuit's timing even when powered off. This application constructs a dual-RTC collaborative architecture, using system temperature data to dynamically compensate the PMIC RTC affected by the high heat generated by the central controller during operation, eliminating crystal oscillator frequency offset errors under high-temperature environments. Simultaneously, it utilizes the low-power characteristics of the external RTC to maintain the reference time during power failure. Therefore, without increasing the hardware cost of the temperature-compensated crystal oscillator, it effectively solves the problem of inconsistent timing accuracy of the central controller under different thermal environments—high-temperature operation and normal-temperature power failure—improving the time accuracy and system reliability of the device under all operating conditions.

[0104] In one embodiment, the first clock control module 602 is further configured to: Based on the temperature data of the clock system, the real-time operating temperature of the crystal oscillator associated with the first real-time clock circuit is determined. Based on the pre-stored relationship between the temperature and frequency offset of the crystal oscillator, the frequency offset value corresponding to the real-time operating temperature is determined. The time information is calibrated based on the frequency offset value.

[0105] In one embodiment, the clock system further includes a main controller, and a first clock control module 602 is further configured to: The temperature data of the main controller is collected by the temperature sensor integrated inside the main controller; Based on the proximity layout and thermal coupling relationship between the main controller and the PMIC on the printed circuit board, the temperature data is mapped to the real-time operating temperature of the crystal oscillator using pre-stored thermal mapping parameters. The thermal coupling relationship is established by the main controller and the PMIC being connected to the same heat sink through a thermally conductive medium.

[0106] In one embodiment, the first clock control module 602 is further configured to: Record the cumulative runtime since the last calibration operation was performed; Calculate the product of the frequency offset value and the cumulative runtime as the clock drift amount generated in the current calibration cycle; The clock drift is then reversed and compensated for in the time information read from the first real-time clock circuit.

[0107] In one embodiment, the second clock control module 603 is further configured to: In response to the clock system being powered on again, the current timing time of the second real-time clock circuit is read, and the network connection status is detected; If a network connection is detected, the system time is updated by obtaining the real-time network time. If no network connection is detected, the duration of the power outage operation of the clock system is determined. Based on the duration of the power outage and the frequency deviation coefficient of the second real-time clock circuit at room temperature, the cumulative time error is calculated. Based on the accumulated time error, the current timing time is corrected, and the corrected time is synchronized to the first real-time clock circuit as the system time.

[0108] In one embodiment, the first clock control module 602 is further configured to: The temperature data collected from multiple consecutive calibration cycles are filtered to obtain the average temperature value of the current calibration cycle. Determine the difference between the average temperature value and the reference temperature value used in the previous calibration cycle; If the difference is greater than a preset temperature hysteresis threshold, the time information is calibrated based on the average temperature value.

[0109] In one embodiment, the PMIC is electrically connected to the main controller and is used to supply power to the main controller; The main controller is connected to the second real-time clock circuit via a communication bus; The energy storage unit is connected to the power input terminal of the second real-time clock circuit and is used to supply power to the second real-time clock circuit when the clock system is powered off.

[0110] Figure 7 An example is a schematic diagram of the physical structure of an electronic device, such as... Figure 7As shown, the electronic device may include a processor 710, a communications interface 720, a memory 730, and a communication bus 740. The processor 710, communications interface 720, and memory 730 communicate with each other via the communication bus 740. The processor 710 can call logic instructions in the memory 730 to execute the following methods: in response to the clock system powering on, it reads a reference time from the second real-time clock circuit and synchronizes the reference time to the first real-time clock circuit; when the clock system is powered on and running without network time synchronization, it reads the time information from the first real-time clock circuit, calibrates the time information based on the clock system's temperature data, and outputs the calibrated system time; when a power failure is detected in the clock system, it writes the currently calibrated system time into the second real-time clock circuit, and the energy storage unit maintains the second real-time clock circuit's timing even when powered off.

[0111] Furthermore, the logical instructions in the aforementioned memory 730 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0112] In another aspect, embodiments of this application also provide a non-transitory computer-readable storage medium storing a computer program thereon. When the computer program is executed by a processor, it implements the clock control method provided in the above embodiments, which includes, for example, reading a reference time from a second real-time clock circuit and synchronizing the reference time to a first real-time clock circuit in response to the clock system being powered on; reading the time information of the first real-time clock circuit and calibrating the time information based on the temperature data of the clock system when the clock system is powered on and running without network time synchronization, and outputting the calibrated system time; and writing the currently calibrated system time into the second real-time clock circuit when a power failure is detected, and having the energy storage unit maintain the second real-time clock circuit to continue timing in the power failure state.

[0113] On the other hand, this application also provides a computer program product, which includes a computer program that can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the clock control method provided by the above methods. The method includes: in response to the clock system being powered on, reading a reference time from a second real-time clock circuit and synchronizing the reference time to a first real-time clock circuit; when the clock system is powered on and running without network time synchronization, reading the time information of the first real-time clock circuit and calibrating the time information based on the temperature data of the clock system, and outputting the calibrated system time; when a power failure is detected in the clock system, writing the currently calibrated system time into the second real-time clock circuit, and having the energy storage unit maintain the second real-time clock circuit to continue timing in the power failure state.

[0114] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0115] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0116] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

[0117] The above embodiments are for illustrative purposes only and are not intended to limit the scope of this application. Although this application has been described in detail with reference to the embodiments, those skilled in the art should understand that various combinations, modifications, or equivalent substitutions of the technical solutions of this application do not depart from the spirit and scope of the technical solutions of this application and should be covered within the scope of the claims of this application.

Claims

1. A clock control method, characterized in that, The clock system, which includes a first real-time clock circuit integrated within a power management integrated circuit (PMIC) and an external second real-time clock circuit independently powered by an energy storage unit, is applied to a clock system. The clock control method includes: In response to the power-on of the clock system, a reference time is read from the second real-time clock circuit and the reference time is synchronized to the first real-time clock circuit; When the clock system is powered on and running without network time synchronization, the time information of the first real-time clock circuit is read, and the time information is calibrated based on the temperature data of the clock system, and the calibrated system time is output. If a power failure is detected in the clock system, the current calibrated system time is written into the second real-time clock circuit, and the energy storage unit maintains the second real-time clock circuit to continue timing in the power failure state.

2. The clock control method according to claim 1, characterized in that, The calibration of the time information based on the temperature data of the clock system includes: Based on the temperature data of the clock system, the real-time operating temperature of the crystal oscillator associated with the first real-time clock circuit is determined. Based on the pre-stored relationship between the temperature and frequency offset of the crystal oscillator, the frequency offset value corresponding to the real-time operating temperature is determined. The time information is calibrated based on the frequency offset value.

3. The clock control method according to claim 2, characterized in that, The clock system further includes a main controller; determining the real-time operating temperature of the crystal oscillator associated with the first real-time clock circuit based on the temperature data of the clock system includes: The temperature data of the main controller is collected by the temperature sensor integrated inside the main controller; Based on the proximity layout and thermal coupling relationship between the main controller and the PMIC on the printed circuit board, the temperature data is mapped to the real-time operating temperature of the crystal oscillator using pre-stored thermal mapping parameters. The thermal coupling relationship is established by the main controller and the PMIC being connected to the same heat sink through a thermally conductive medium.

4. The clock control method according to claim 2, characterized in that, The calibration of the time information based on the frequency offset value includes: Record the cumulative runtime since the last calibration operation was performed; Calculate the product of the frequency offset value and the cumulative runtime as the clock drift amount generated in the current calibration cycle; The clock drift is then reversed and compensated for in the time information read from the first real-time clock circuit.

5. The clock control method according to claim 1, characterized in that, After the step of writing the currently calibrated system time into the second real-time clock circuit and having the energy storage unit maintain the second real-time clock circuit's timing during a power outage when a power failure is detected, the method further includes: In response to the clock system being powered on again, the current timing time of the second real-time clock circuit is read, and the network connection status is detected; If a network connection is detected, the system time is updated by obtaining the real-time network time. If no network connection is detected, the duration of the power outage operation of the clock system is determined. Based on the duration of the power outage and the frequency deviation coefficient of the second real-time clock circuit at room temperature, the cumulative time error is calculated. Based on the accumulated time error, the current timing time is corrected, and the corrected time is synchronized to the first real-time clock circuit as the system time.

6. The clock control method according to claim 1, characterized in that, The calibration of the time information based on the temperature data of the clock system further includes: The temperature data collected from multiple consecutive calibration cycles are filtered to obtain the average temperature value of the current calibration cycle. Determine the difference between the average temperature value and the reference temperature value used in the previous calibration cycle; If the difference is greater than a preset temperature hysteresis threshold, the time information is calibrated based on the average temperature value.

7. The clock control method according to claim 1, characterized in that, The PMIC is electrically connected to the main controller and is used to supply power to the main controller; The main controller is connected to the second real-time clock circuit via a communication bus; The energy storage unit is connected to the power input terminal of the second real-time clock circuit and is used to supply power to the second real-time clock circuit when the clock system is powered off.

8. A clock control device, characterized in that, include: A reference time reading module is used to read the reference time from the second real-time clock circuit in response to the power-on of the clock system, and synchronize the reference time to the first real-time clock circuit; The first clock control module is used to read the time information of the first real-time clock circuit when the clock system is powered on and there is no network time synchronization, and to calibrate the time information based on the temperature data of the clock system, and output the calibrated system time. The second clock control module is used to write the currently calibrated system time into the second real-time clock circuit when the clock system is detected to be powered off, and the energy storage unit is used to maintain the second real-time clock circuit to continue timing in the power-off state.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the clock control method as described in any one of claims 1 to 7.

10. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the clock control method as described in any one of claims 1 to 7.

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