PCB (Printed Circuit Board) routing profile finishing method, device, equipment and medium

Abstract

The invention relates to the technical field of PCBs, in particular to a method, a device, equipment and a medium for arranging the routing profile of a PCB. Comprising the steps that received original PCB shape data are preprocessed, preprocessed PCB shape data are obtained, and preprocessing comprises working layer verification, unit unification and basic line segment cleaning; identifying and classifying line segments and arcs in the preprocessed PCB shape data to obtain a source data identification result; based on the source data identification result, performing intersection point segmentation, zero-length line segment filtering and heavy line removal processing on line segments in the source data identification result, and performing opening direction correction, intersection point processing and small-radius arc processing on arcs in the source data identification result to obtain optimized processing data; and redrawing the optimized data and outputting the data as PCB gong path appearance data. Dependence on professional skills of operators is reduced, and the efficiency of automatic arrangement of the PCB routing profile is improved.

Description

Technical Field

[0001] This invention relates to the field of PCB technology, specifically to a method, apparatus, equipment, and medium for PCB routing shape arrangement. Background Technology

[0002] PCB (Printed Circuit Board) routing shape finishing refers to the key process in PCB manufacturing where the shape contours in the design data are optimized to meet the processing requirements of the routing machine. In the PCB production process, routing is a crucial step where a high-speed rotating cutter cuts the PCB board along a preset path to form the final product shape. The accuracy and rationality of the routing shape data directly determine the PCB product's shape precision, edge quality, and production efficiency.

[0003] PCB outlines are typically composed of geometric elements such as lines and arcs. When these elements are created in design software, the actual machining constraints of the routing process are often not fully considered, such as tool diameter limitations, minimum turning radii, and requirements for machining path continuity. Therefore, before the design data is transferred to production, the routing outline must be processed to ensure that the data conforms to the technical specifications of the manufacturing equipment, thus avoiding problems such as machining anomalies, increased tool wear, and higher product defect rates.

[0004] Currently, PCB routing and shaping mainly rely on manual operation or traditional CAM (Computer Aided Manufacturing) software tools (Genesis, InCAMPro), which has the following significant disadvantages:

[0005] 1. High dependence on manual operation: It requires manual adjustment of line arc parameters, deletion of duplicate lines, and repair of broken lines, which can easily lead to deviations in processing accuracy due to human error (such as small chamfer radius error, misalignment of line arc connection).

[0006] 2. Low efficiency: Traditional tools lack batch processing capabilities, and the processing time for a single PCB can be more than 30 minutes, which cannot meet the needs of quickly processing multiple models and complex shapes.

[0007] 3. Complex parameter configuration: There is no visual interface, and parameter adjustment requires modification of code or configuration files. Ordinary operators need professional training to get started.

[0008] 4. Limited functionality: Most tools only support a single function (such as line arc splitting or overlapping line removal), requiring multiple tools to be used in conjunction, resulting in fragmented processes, numerous operations, and high learning costs.

[0009] 5. Poor compatibility: It cannot adapt to PCB files output by different customers and design engineers, and there is no fault tolerance mechanism (such as zero-length lines, non-true arcs, mismatched rounded corners, and unfiltered ultra-short line segments). Summary of the Invention

[0010] The purpose of this invention is to provide a method, apparatus, equipment, and medium for PCB routing shape shaping, which solves the problems in the prior art.

[0011] This invention is achieved through the following technical solution:

[0012] In a first aspect, embodiments of the present invention provide a method for PCB routing outline finishing, including:

[0013] The received raw PCB outline data is preprocessed to obtain preprocessed PCB outline data. The preprocessing includes working layer verification, unified units, and basic line segment cleaning.

[0014] The line segments and arcs in the preprocessed PCB outline data are identified and classified to obtain the source data identification results;

[0015] Based on the source data identification results, the line segments in the source data identification results are processed by intersection segmentation, zero-length line segment filtering and double line removal, and the arcs in the source data identification results are processed by opening direction correction, intersection processing and small radius arc processing to obtain optimized processed data.

[0016] The optimized data is redrawn and output as PCB routing outline data.

[0017] Preferably, the step of identifying and classifying line segments and arcs in the preprocessed PCB outline data to obtain source data identification results includes:

[0018] Establish a pre-compiled geometric element recognition mode, which includes a line segment recognition mode and an arc recognition mode;

[0019] Based on the geometric element recognition pattern, the geometric elements in the preprocessed PCB outline data are parsed in batches;

[0020] The identified line segment elements are classified as LINE type data, and the identified arc elements are classified as ARC type data;

[0021] The categorized LINE and ARC type data are stored in different data areas of the structured dictionary to obtain the source data recognition results.

[0022] Preferably, the repeated line removal process includes:

[0023] Calculate the slope difference, parallel spacing, and projection overlap between line segments in the source data recognition results;

[0024] When the slope difference is less than the first threshold, the parallel spacing is less than the second threshold, and the projection overlap is greater than the third threshold, one line segment is retained, and the other duplicate line segments are removed.

[0025] Preferably, the small radius arc processing includes:

[0026] Determine whether the radius of the arc in the source data recognition result is less than a preset radius threshold;

[0027] When the radius is less than a preset radius threshold, the arc is moved to a temporary storage area;

[0028] After completing other processing, the arc in the temporary storage area is restored to the final result.

[0029] Preferably, before identifying and classifying the line segments and arcs in the preprocessed PCB outline data to obtain the source data identification result, the method further includes:

[0030] Identify the groups of short line segments that connect in the preprocessed PCB outline data;

[0031] Extract all vertices from the identified short line segment groups as sampling points;

[0032] Based on all sampling points, the least squares method is used to fit the circle to obtain the fitted circle.

[0033] Calculate the radial distance deviation from each sampling point to the fitted circle;

[0034] The maximum value among all radial distance deviations is taken as the fitting error;

[0035] When the fitting error is less than the preset tolerance, the short line segment group is converted into a standard circular arc.

[0036] Preferably, the opening direction correction includes:

[0037] Based on the starting point coordinates, ending point coordinates, and center coordinates of the arc in the source data identification results, calculate the direction vector of the arc;

[0038] The eight directional quadrants to which the arc belongs are determined based on the direction vector;

[0039] According to the PCB routing requirements and the eight-directional quadrant, the direction of the arc opening is corrected to the standard direction.

[0040] Preferably, the working layer verification includes:

[0041] Check if the specified working layer exists;

[0042] If a working layer does not exist, create a new working layer.

[0043] When a working layer exists but contains data, prompt the user to confirm whether to overwrite the original data.

[0044] Secondly, embodiments of the present invention provide a PCB routing outline finishing device, comprising:

[0045] The preprocessing module is used to preprocess the received raw PCB outline data to obtain preprocessed PCB outline data. The preprocessing includes working layer verification, unified units, and basic line segment cleaning.

[0046] The identification and classification module is used to identify and classify line segments and arcs in the preprocessed PCB outline data to obtain the source data identification results;

[0047] The processing module is used to perform intersection segmentation, zero-length line segment filtering and overlapping line removal processing on the line segments in the source data recognition results based on the source data recognition results, and to perform opening direction correction, intersection processing and small radius arc processing on the arcs in the source data recognition results to obtain optimized processed data.

[0048] The output module is used to redraw the optimized data and output it as PCB routing outline data.

[0049] Thirdly, embodiments of the present invention provide an electronic device, including: at least one processor, at least one memory, and computer program instructions stored in the memory, which, when executed by the processor, implement the method of the first aspect described above.

[0050] Fourthly, embodiments of the present invention provide a storage medium storing computer program instructions, which, when executed by a processor, implement the method of the first aspect described above.

[0051] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0052] This automatic PCB routing shape sorting method effectively eliminates geometric features in the original design data that are unsuitable for routing through systematic data preprocessing, geometric element identification and classification, and targeted optimization. These features include repetitive line segments, broken contours, small-radius arcs, and non-standard opening directions. This ensures that the output PCB routing shape data meets the process requirements of the routing machine, reduces abnormal tool wear and the number of pauses during processing, improves the continuity and contour accuracy of the shape cutting, reduces reliance on the operator's professional skills, and increases the efficiency of automatic PCB routing shape sorting. Attached Figure Description

[0053] To more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly described below. It should be understood that the following drawings only show some embodiments of the present invention and should not be considered as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort. In the drawings:

[0054] Figure 1 A flowchart illustrating the PCB routing outline finishing method provided by the present invention;

[0055] Figure 2 A schematic diagram of the PCB routing shape straightening device provided by the present invention;

[0056] Figure 3 This is a schematic diagram of the structure of the electronic device provided by the present invention. Detailed Implementation

[0057] To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the embodiments and accompanying drawings. The illustrative embodiments and descriptions of the present invention are only used to explain the present invention and are not intended to limit the present invention.

[0058] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.

[0059] It should be noted that all actions involving the acquisition of signals, information, or data in this invention are carried out in compliance with the relevant data protection laws and regulations of the locality and with authorization from the owner of the relevant device.

[0060] Example 1

[0061] Please see Figure 1 This invention provides a method for PCB routing outline finishing, including:

[0062] S1. The received raw PCB outline data is preprocessed to obtain preprocessed PCB outline data. The preprocessing includes working layer verification, unified unit and basic line segment cleaning.

[0063] Specifically, the original PCB outline data refers to the data file output by the PCB design software that contains board edge contour information, usually in ODB++ or Gerber format; working layer verification refers to confirming that the data contains a valid outline layer, such as a routine layer or profile layer, specifically achieved by detecting the environment variable JOB / STEP and the existence of layer files. When a working layer is missing, a new layer is created or an error is indicated; unit unification refers to standardizing coordinate data of different unit systems. The original unit type is determined by analyzing the coordinate range and file header information. When imperial units are detected, a conversion factor of 25.4 is applied to convert all geometric parameters to metric millimeters; basic line segment cleanup refers to removing obviously invalid geometric elements, including detecting and filtering zero-length line segments with a length less than 0.001 mm, repairing broken contour endpoints with a spacing less than 0.01 mm, and removing data entries with incorrect formats; the preprocessing process is executed in the order of working layer verification, unit unification, and basic cleanup. After each step is completed, data integrity is checked to ensure that the preprocessed PCB outline data has structural consistency, unit unification, and basic geometric validity, providing a reliable data foundation for subsequent identification and classification.

[0064] S2. Identify and classify the line segments and arcs in the preprocessed PCB outline data to obtain the source data identification results;

[0065] Specifically, a line segment refers to a straight geometric element with two endpoints, while an arc refers to a curved geometric element with a start point, an end point, a center, and a radius. The recognition process is achieved by establishing a geometric element recognition pattern, which includes a line segment recognition feature set and an arc recognition feature set. The former focuses on endpoint coordinates and linear relationships, while the latter focuses on the radius of curvature and the position of the center. The classification process distinguishes elements based on geometric feature parameters. When the radius of curvature of an element is greater than a preset threshold and satisfies the equation of a straight line, it is classified as a line segment. When the curvature features of an element conform to the mathematical model of an arc, it is classified as an arc. The recognition and classification adopts a batch processing mechanism, traversing all geometric elements in the preprocessed PCB outline data, extracting key parameters, and matching them with the recognition pattern. The matching results are stored in the LINE and ARC areas of the structured dictionary, respectively. This process establishes a geometric element index table, recording the unique identifier, geometric parameters, and topological relationships of each element, forming a hierarchical source data recognition result data structure, providing a classification basis for subsequent differential processing.

[0066] S3. Based on the source data identification results, perform intersection segmentation, zero-length line segment filtering and overlapping line removal on the line segments in the source data identification results, and perform opening direction correction, intersection processing and small radius arc processing on the arcs in the source data identification results to obtain optimized processed data.

[0067] Specifically, intersection segmentation involves detecting the intersection relationships between line segments and dividing the original line segment into multiple sub-segments at the intersection point. The probability of intersection is determined by calculating the cross product of the vectors formed by the endpoints of the line segments. When an intersection is determined, the precise intersection point coordinates are calculated and the line segment data is reconstructed. Zero-length line segment filtering involves calculating the Euclidean distance between the start and end points of a line segment. If the distance is less than a threshold of 0.01 mm, the line segment is removed. Double line removal involves identifying duplicate line segments with overlapping geometric positions or similar heights. Opening direction correction involves standardizing the opening direction of the arc to the standard orientation in the eight-directional quadrant. Intersection processing involves generating a virtual extension of the arc, detecting intersections with adjacent line segments, and removing interfering line segments outside the intersection points. Small radius arc processing involves calculating the radius of the arc. If the radius is less than 0.2 mm, the arc is moved to a temporary storage area and restored after the main processing is completed. Line segment processing and arc processing adopt a parallel computing framework. During the processing, a geometric relationship mapping table is maintained to ensure that the connectivity of adjacent elements is not disrupted. Finally, the processing results are merged to form optimized processing data with complete structure and accurate geometry.

[0068] S4. Redraw the optimized data and output it as PCB routing outline data.

[0069] Specifically, PCB router outline data refers to standardized outline data that meets the processing requirements of routers, including geometrically optimized line segments and arc sets. Optimized data can be automatically redrawn and output through an EDA software interface. The output process first restores the original unit system; when unit conversion was performed in the preprocessing stage, the optimized data in millimeters is proportionally converted back to the original unit. Second, data format standardization is performed, converting the internally represented geometric elements into the data format required by the target router equipment, including specific coordinate precision, instruction sequences, and layer structures. Then, data verification is performed, checking the outline closure, element connection continuity, and parameter range compliance. When verification fails, a detailed error report is generated and the process reverts to the pre-optimization state. Finally, the verified data is written to a specified storage path, usually a new layer file in the same directory as the original file. The output process records key processing indicators, including changes in the number of elements before and after processing, processing time, and anomaly statistics, forming a structured processing report. PCB router outline data can be directly imported into the router equipment control system to drive the cutter to cut the PCB outline according to the optimized path, ensuring a smooth and continuous processing process, reducing pauses and directional changes, and improving processing accuracy and equipment lifespan.

[0070] In some embodiments, the process of identifying and classifying line segments and arcs in the preprocessed PCB outline data to obtain source data identification results includes:

[0071] Establish a pre-compiled geometric element recognition mode, which includes a line segment recognition mode and an arc recognition mode;

[0072] Based on the geometric element recognition pattern, the geometric elements in the preprocessed PCB outline data are parsed in batches;

[0073] The identified line segment elements are classified as LINE type data, and the identified arc elements are classified as ARC type data;

[0074] The categorized LINE and ARC type data are stored in different data areas of the structured dictionary to obtain the source data recognition results.

[0075] Specifically, geometric element recognition patterns refer to a set of mathematical models used to distinguish and extract specific geometric features. Line segment recognition patterns are built based on the equations of straight lines and the coordinate relationships of their endpoints, while arc recognition patterns are established based on the parametric equations and curvature features of a circle. Batch parsing refers to processing large amounts of geometric data at once rather than processing them line by line. It iterates through pre-processed PCB outline data using pre-compiled recognition patterns, extracts geometric elements that match the line segment recognition pattern and marks them as LINE type, and extracts geometric elements that match the arc recognition pattern and marks them as ARC type. A structured dictionary refers to an in-memory data structure stored in regions according to data type, containing independent LINE regions. The ARC region stores the starting and ending coordinates and direction vector of a line segment, while the ARC region stores the starting and ending coordinates, center coordinates, radius, and rotation direction of an arc. The recognition process first initializes the geometric element recognition mode, then applies a pattern matching algorithm to scan the preprocessed PCB outline data. For each successfully matched element, key parameters are extracted and a unique identifier is assigned. Based on the matching type, the element data is written into the corresponding area of ​​the structured dictionary. Finally, the completeness of the classification results is verified to ensure that there are no unclassified elements or misclassification phenomena, forming a hierarchical and efficient source data recognition result, providing a structured data foundation for subsequent differential processing.

[0076] In some embodiments, the repeated line removal process includes:

[0077] Calculate the slope difference, parallel spacing, and projection overlap between line segments in the source data recognition results;

[0078] When the slope difference is less than the first threshold, the parallel spacing is less than the second threshold, and the projection overlap is greater than the third threshold, one line segment is retained, and the other duplicate line segments are removed.

[0079] Specifically, slope difference refers to the absolute value of the angle difference between the direction vectors of two line segments, used to measure the consistency of the line segment directions. The slope difference is zero when the two line segments are completely parallel. Parallel spacing refers to the average of the shortest distances between two approximately parallel line segments, obtained by averaging the perpendicular distances from the endpoints of one line segment to the other. Projection overlap refers to the proportion of the overlapping portion of two line segments in the common projection direction to the length of the longer line segment. The overlap is 100% when one line segment is completely contained within the projection range of the other line segment. The first threshold can be set to 5 degrees to determine whether the line segment directions are sufficiently close. The second threshold can be set to 0.01 millimeters to determine whether the line segment spacing meets the condition for overlapping lines. The third threshold can be set to 90% to determine whether the coverage of the line segment in the projection direction is sufficient. The duplicate line removal process first constructs a spatial index for all line segments in the source data identification results, then traverses the line segment pairs, and calculates three criteria for each pair of line segments: slope difference, parallel spacing, and projection overlap. When the three criteria simultaneously meet the threshold conditions, the reference line segment with the longer length or the position closer to the design center is retained, and the remaining line segments are removed. The processing adopts a spatial partitioning optimization algorithm to reduce the amount of computation and avoid the N² complexity problem. At the same time, the line segment connection relationship table is maintained to ensure that the continuity of the contour is not affected. Finally, the repeated cutting trajectory in the milling path is eliminated, reducing tool wear and improving processing efficiency.

[0080] In some embodiments, the small radius arc processing includes:

[0081] Determine whether the radius of the arc in the source data recognition result is less than a preset radius threshold;

[0082] When the radius is less than a preset radius threshold, the arc is moved to a temporary storage area;

[0083] After completing other processing, the arc in the temporary storage area is restored to the final result.

[0084] Specifically, the preset radius threshold refers to the critical radius value used to distinguish between standard arcs and specially processed arcs, which can be set to 0.2 mm. This value is determined based on the minimum machinable radius of a standard milling machine tool. The temporary storage area refers to a dedicated data buffer area allocated in memory to temporarily store geometric elements that require special processing, keeping their original parameters and topological relationships unchanged. Small radius arc processing first traverses all ARC type data in the source data identification results, extracts the radius parameter of each arc and compares it with the preset radius threshold. When an arc with a radius less than 0.2 mm is detected, it is removed from the main processing queue and stored in the temporary storage area. The system stores the temporary storage area and records placeholders in their original positions to maintain the continuity of the outline. After the main processing flow completes operations such as line segment optimization and intersection processing, the system verifies the status of the temporary storage area and restores the stored small-radius arcs to their corresponding positions in the optimized data according to the original topological relationship. During the restoration process, the connectivity of adjacent geometric elements is checked to ensure that there are no gaps or overlaps. This processing mechanism avoids the distortion or loss of small-radius arcs in the main processing flow due to the limitation of geometric calculation accuracy, and also prevents them from interfering with the optimization process of other geometric elements, so that the final PCB routing outline data retains the design details and meets the requirements of the routing machine.

[0085] In some embodiments, before identifying and classifying the line segments and arcs in the preprocessed PCB outline data to obtain the source data identification result, the method further includes:

[0086] Identify continuous groups of short line segments in the preprocessed PCB outline data;

[0087] Extract all vertices from the identified short line segment groups as sampling points;

[0088] Based on all sampling points, the least squares method is used to fit the circle to obtain the fitted circle.

[0089] Calculate the radial distance deviation from each sampling point to the fitted circle;

[0090] The maximum value among all radial distance deviations is taken as the fitting error;

[0091] When the fitting error is less than the preset tolerance, the short line segment group is converted into a standard circular arc.

[0092] Specifically, a continuous short line segment group refers to a geometric structure composed of multiple line segments that are closely connected end to end and have a relatively short total length, typically appearing in rounded corner transition areas in PCB design; a sampling point refers to a representative set of coordinate points extracted from the continuous short line segment group, including the start, end, and midpoint of each short line segment; the least squares method refers to a mathematical method that determines the best fitting parameters by minimizing the sum of squared distances from the sampling points to the fitted curve; the fitted circle refers to the best matching circle calculated using the least squares method, defined by the center coordinates and radius parameters; the radial distance deviation refers to the absolute difference between the actual distance from the sampling point to the center of the fitted circle and the radius of the fitted circle; the fitting error refers to the maximum value among all radial distance deviations, used to quantify the degree of deviation between the continuous short line segment group and the ideal fitted circle; the preset tolerance can be set to 0.01 mm, which is the threshold for determining whether the fitting quality meets the transformation conditions; the standard arc refers to the arc that conforms to mathematical definitions. The complete circular arc geometry element includes start point, end point, center, radius, and rotation direction parameters. The short segment group conversion process involves first identifying short segment sequences in the pre-processed PCB outline data that are connected end-to-end and each segment is less than 0.5 mm in length. When the included angle between adjacent short segments is less than 30 degrees and the total number of segments is no less than 4, they are marked as candidate continuous short segment groups. All vertices of each candidate group are extracted as sampling points, and the least squares method is applied to calculate the fitting circle parameters. The radial distance deviation is calculated point-by-point, and the maximum value is determined as the fitting error. When the fitting error is less than 0.01 mm, the original continuous short segment group is removed, and a standard circular arc with the same endpoint position is generated as a replacement. The connection relationship between adjacent geometric elements is adjusted to ensure contour continuity. This process converts the approximately circular arc-shaped polygonal structure in the design data into a precise circular arc, reducing directional abrupt changes during milling, improving the smoothness of the shape cutting, and reducing tool wear.

[0093] In some embodiments, the opening direction correction includes:

[0094] Based on the starting point coordinates, ending point coordinates, and center coordinates of the arc in the source data identification results, calculate the direction vector of the arc;

[0095] The eight directional quadrants to which the arc belongs are determined based on the direction vector;

[0096] According to the PCB routing requirements and the eight-directional quadrant, the direction of the arc opening is corrected to the standard direction.

[0097] Specifically, the direction vector refers to the unit vector pointing from the center of the arc to the start and end points, used to characterize the spatial orientation of the arc; the eight-direction quadrant refers to the orientation system formed by dividing the 360-degree circumference into eight 45-degree sector regions, each region corresponding to a standard opening direction category, including up, down, left, right, upper left, lower left, upper right, and lower right; PCB router machining requirements refer to the process constraints determined by the motion characteristics of the router tool, including restrictions on tool advance and retreat directions and minimum turning radius requirements; standard direction refers to the arc opening direction specification that meets the machining capabilities of the router, usually limited to horizontal, vertical, or standard orientations that are multiples of 45 degrees; opening direction correction first extracts the start and end coordinates of each ARC type data from the source data identification results. The rotation direction is determined by calculating the cross product of the starting and ending vectors, along with the center coordinates. The quadrant number of the arc is then determined by combining the vector angle values. Next, a preset PCB router machining standard table is used, which specifies the optimal opening direction parameters for each quadrant. When the arc opening direction deviates from the standard direction by more than 15 degrees, the starting and ending positions that conform to the standard direction are recalculated. The endpoint coordinates are adjusted while maintaining the arc radius and center position essentially unchanged. The correction process synchronously updates the connection relationships of adjacent geometric elements to ensure that the contour closure is not affected. This process ensures that all arc opening directions conform to the router tool's motion characteristics, avoiding sudden stops and reverse movements during machining, and improving the continuity of the router path and machining efficiency.

[0098] In some implementations, the working layer verification includes:

[0099] Check if the specified working layer exists;

[0100] If a working layer does not exist, create a new working layer.

[0101] When a working layer exists but contains data, prompt the user to confirm whether to overwrite the original data.

[0102] Specifically, specifying a working layer refers to a layer in PCB design data specifically used to store outline information, usually named `rout` or `profile`. Creating a working layer refers to initializing a new layer container in the PCB data structure, allocating storage space, and setting layer attribute parameters, including layer name, visibility status, and data format specifications. Overwriting the original data refers to replacing the existing set of geometric elements in the working layer with the newly generated processing result. Working layer verification first parses the JOB name and STEP path in the environment variables, locates the PCB data storage directory, and then searches the layer list to determine if the specified working layer exists. When the working layer is missing, the system generates a layer creation instruction, initializes an empty data structure, and marks it as pending processing. When the working layer exists and contains geometric elements, the existing data volume is calculated, and an interactive confirmation dialog box is generated, displaying the original data element statistics and overwrite operation prompts, waiting for the user to input confirmation instructions. The verification process records an operation log, including layer status changes, user decisions, and timestamps. This process ensures that subsequent operations are performed on the correct data layer, avoiding data corruption or loss, and providing a stable data foundation for PCB routing outline organization.

[0103] Example 2

[0104] Please see Figure 2 This invention provides a PCB routing outline straightening device, comprising:

[0105] The preprocessing module is used to preprocess the received raw PCB outline data to obtain preprocessed PCB outline data. The preprocessing includes working layer verification, unified units, and basic line segment cleaning.

[0106] The identification and classification module is used to identify and classify line segments and arcs in the preprocessed PCB outline data to obtain the source data identification results;

[0107] The processing module is used to perform intersection segmentation, zero-length line segment filtering and overlapping line removal processing on the line segments in the source data recognition results based on the source data recognition results, and to perform opening direction correction, intersection processing and small radius arc processing on the arcs in the source data recognition results to obtain optimized processed data.

[0108] The output module is used to redraw the optimized data and output it as PCB routing outline data.

[0109] It should be noted that each module and unit in the PCB routing shape straightening device in this embodiment corresponds one-to-one with each step in the PCB routing shape straightening method in the aforementioned embodiment. Therefore, the specific implementation of this embodiment can refer to the implementation of the aforementioned PCB routing shape straightening method, and will not be repeated here.

[0110] Example 3

[0111] Please see Figure 3 This embodiment provides an electronic device, including at least one processor 301 and a memory 302. Optionally, the device further includes a communication component 303. The processor 301, memory 302, and communication component 303 are connected via a bus 304.

[0112] In a specific implementation, at least one processor 301 executes computer execution instructions stored in memory 302, causing at least one processor 301 to perform the above-described method.

[0113] The specific implementation process of processor 301 can be found in the above method embodiments, and its implementation principle and technical effect are similar. It will not be repeated here.

[0114] In the above embodiments, it should be understood that the processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), etc. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in this invention can be directly implemented by a hardware processor, or implemented by a combination of hardware and software modules within the processor.

[0115] The memory may include random access memory (RAM) and may also include non-volatile memory (NVM), such as at least one disk storage device.

[0116] The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be categorized as address buses, data buses, control buses, etc. For ease of illustration, the buses shown in the accompanying drawings are not limited to a single bus or a single type of bus.

[0117] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the above-described method.

[0118] This application also provides a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, implement the above-described method.

[0119] The aforementioned readable storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk. The readable storage medium can be any available medium accessible to a general-purpose or special-purpose computer.

[0120] An exemplary readable storage medium is coupled to a processor, enabling the processor to read information from and write information to the readable storage medium. Of course, the readable storage medium can also be a component of the processor. The processor and the readable storage medium can reside in an Application Specific Integrated Circuit (ASIC). Alternatively, the processor and the readable storage medium can exist as discrete components in the device.

[0121] The division of units is merely a logical functional division; in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be indirect coupling or communication connection through some interfaces, devices, or units, and may be electrical, mechanical, or other forms.

[0122] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0123] In addition, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0124] If a function is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0125] Those skilled in the art will understand that all or part of the steps of the above-described method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When executed, the program performs the steps of the above-described method embodiments; and the aforementioned storage medium includes various media capable of storing program code, such as ROM, RAM, magnetic disks, or optical disks.

[0126] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for PCB routing outline finishing, characterized in that, include: The received raw PCB outline data is preprocessed to obtain preprocessed PCB outline data. The preprocessing includes working layer verification, unified units, and basic line segment cleaning. The line segments and arcs in the preprocessed PCB outline data are identified and classified to obtain the source data identification results; Based on the source data identification results, the line segments in the source data identification results are processed by intersection segmentation, zero-length line segment filtering and double line removal, and the arcs in the source data identification results are processed by opening direction correction, intersection processing and small radius arc processing to obtain optimized processed data. The optimized data is redrawn and output as PCB routing outline data.

2. The method according to claim 1, characterized in that, The process of identifying and classifying line segments and arcs in the preprocessed PCB outline data to obtain source data identification results includes: Establish a pre-compiled geometric element recognition mode, which includes a line segment recognition mode and an arc recognition mode; Based on the geometric element recognition pattern, the geometric elements in the preprocessed PCB outline data are parsed in batches; The identified line segment elements are classified as LINE type data, and the identified arc elements are classified as ARC type data; The categorized LINE and ARC type data are stored in different data areas of the structured dictionary to obtain the source data recognition results.

3. The method according to claim 1, characterized in that, The repeated line removal process includes: Calculate the slope difference, parallel spacing, and projection overlap between line segments in the source data recognition results; When the slope difference is less than the first threshold, the parallel spacing is less than the second threshold, and the projection overlap is greater than the third threshold, one line segment is retained, and the other duplicate line segments are removed.

4. The method according to claim 1, characterized in that, The small radius arc processing includes: Determine whether the radius of the arc in the source data recognition result is less than a preset radius threshold; When the radius is less than a preset radius threshold, the arc is moved to a temporary storage area; After completing other processing, the arc in the temporary storage area is restored to the final result.

5. The method according to claim 1, characterized in that, Before identifying and classifying the line segments and arcs in the preprocessed PCB outline data to obtain the source data identification results, the method further includes: Identify the groups of short line segments that connect in the preprocessed PCB outline data; Extract all vertices from the identified short line segment groups as sampling points; Based on all sampling points, the least squares method is used to fit the circle to obtain the fitted circle. Calculate the radial distance deviation from each sampling point to the fitted circle; The maximum value among all radial distance deviations is taken as the fitting error; When the fitting error is less than the preset tolerance, the short line segment group is converted into a standard circular arc.

6. The method according to claim 1, characterized in that, The opening direction correction includes: Based on the starting point coordinates, ending point coordinates, and center coordinates of the arc in the source data identification results, calculate the direction vector of the arc; The eight directional quadrants to which the arc belongs are determined based on the direction vector; According to the PCB routing requirements and the eight-directional quadrant, the direction of the arc opening is corrected to the standard direction.

7. The method according to any one of claims 1-6, characterized in that, The working layer verification includes: Check if the specified working layer exists; If a working layer does not exist, create a new working layer. When a working layer exists but contains data, prompt the user to confirm whether to overwrite the original data.

8. A PCB routing shape sorting device, characterized in that, include: The preprocessing module is used to preprocess the received raw PCB outline data to obtain preprocessed PCB outline data. The preprocessing includes working layer verification, unified units, and basic line segment cleaning. The identification and classification module is used to identify and classify line segments and arcs in the preprocessed PCB outline data to obtain the source data identification results; The processing module is used to perform intersection segmentation, zero-length line segment filtering and overlapping line removal processing on the line segments in the source data recognition results based on the source data recognition results, and to perform opening direction correction, intersection processing and small radius arc processing on the arcs in the source data recognition results to obtain optimized processed data. The output module is used to redraw the optimized data and output it as PCB routing outline data.

9. An electronic device, characterized in that, include: At least one processor, at least one memory, and computer program instructions stored in the memory, which, when executed by the processor, implement the method as described in any one of claims 1-7.

10. A computer-readable storage medium having computer program instructions stored thereon, characterized in that, The method as described in any one of claims 1-7 is implemented when the computer program instructions are executed by the processor.

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