Operation method and memory
By partially synchronizing the generation of checksums and data to be read, the problem of extended read operation time in ECC technology is solved, improving the efficiency of read instructions and reducing the difficulty of layout routing.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- WUHAN XINXIN SEMICON MFG CO LTD
- Filing Date
- 2024-10-31
- Publication Date
- 2026-05-01
AI Technical Summary
In automotive applications, error checking and correction (ECC) technology extends read operation time and reduces the frequency of read commands.
By partially synchronizing the generation of checksums and data to be read, the verification and error correction steps in the read operation are reduced, thereby improving the efficiency of read commands.
It reduces read operation time, lowers the difficulty of layout routing, and improves the efficiency of read instructions.
Smart Images
Figure CN121963828A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of storage technology, specifically to an operating method and a memory. Background Technology
[0002] In certain applications (especially automotive applications), error checking and correction (ECC) technology has become an essential feature to further improve the reliability of memory.
[0003] However, this increases the time required for read operations, thereby reducing the frequency of read instructions. Summary of the Invention
[0004] This application provides an operation method and a memory to alleviate the technical problem of long read operation time.
[0005] In a first aspect, this application provides an operation method, which includes: generating a corresponding check code and data to be read based on at least part of a data set; processing the data to be read according to the check code to obtain target data to be read corresponding to the data to be read.
[0006] In some implementations, generating corresponding check codes and data to be read based on at least partially synchronously of a data set includes: configuring the data set to include stored data, redundant replacement data, and redundant replacement information; and generating check codes and data to be read based on at least partially synchronously of the stored data, redundant replacement data, and redundant replacement information.
[0007] In some implementations, generating a checksum and data to be read synchronously based on at least part of the stored data, redundant replacement data, and redundant replacement information includes: generating supervisory data based on the stored data; and generating a checksum and data to be read synchronously based on at least part of the stored data, redundant replacement data, redundant replacement information, and supervisory data.
[0008] In some implementations, a checksum and data to be read are generated synchronously at least partially based on stored data, redundant replacement data, redundant replacement information, and monitoring data, including: generating data to be read based on stored data, redundant replacement data, and redundant replacement information; and generating a checksum based on stored data, redundant replacement data, redundant replacement information, and monitoring data.
[0009] In some implementations, generating a check code based on stored data, redundant replacement data, redundant replacement information, and monitoring data includes: obtaining intermediate bit data by multiplying the corresponding bit data of the redundant replacement data and the corresponding bit data of the redundant replacement information; and obtaining the check code based on the XOR operation result between each corresponding bit data of the stored data, the corresponding encoded bit data of the monitoring data, and the intermediate bit data.
[0010] In some implementations, generating data to be read based on stored data, redundant replacement data, and redundant replacement information includes: determining the redundant replacement positions in the stored data and monitoring data based on the redundant replacement information; configuring the corresponding bit data of the redundant replacement positions determined in the read stored data to be "0", and assigning the corresponding bit data of the redundant replacement data to the data of the redundant replacement positions in the data to be read.
[0011] In some implementations, the data to be read is processed according to the check code to obtain the target read data corresponding to the data to be read, including: if the check code indicates that the corresponding bit data in the data to be read has an error, the bit data with the error in the data to be read is inverted and output as the corresponding target read data; if the check code indicates that the corresponding bit data in the data to be read does not have an error, the data to be read is output as the corresponding target read data.
[0012] In some embodiments, before generating the check code and the data to be read at least partially synchronously based on the stored data, redundant replacement data, redundant replacement information, and supervisory data, the method further includes: generating supervisory data during a write or read operation based on the stored data, redundant replacement data, and redundant replacement information; and storing the supervisory data.
[0013] In some implementations, supervisory data is generated during the write operation based on stored data, redundant replacement data, and redundant replacement information, including: obtaining intermediate bit data based on the product of the corresponding bit data of the redundant replacement data and the corresponding bit data of the redundant replacement information; and obtaining supervisory data based on the XOR operation result of each corresponding bit data of the stored data and the intermediate bit data.
[0014] Secondly, this application provides a memory including a synchronization processing module and an error correction module. The synchronization processing module is used to generate a corresponding check code and data to be read based on at least partially synchronous data set. The error correction module is used to process the data to be read according to the check code to obtain target read data corresponding to the data to be read.
[0015] In some implementations, the data group includes stored data, redundant replacement data, redundant replacement information, and monitoring data; the synchronization processing module is used to generate a check code and data to be read out at least partially synchronously based on the stored data, redundant replacement data, redundant replacement information, and monitoring data.
[0016] In some implementations, the synchronization processing module includes a redundancy replacement unit and a verification unit. The redundancy replacement unit is used to generate data to be read based on the stored data, the redundancy replacement data, and the redundancy replacement information. The verification unit is used to generate a verification code based on the stored data, the redundancy replacement data, the redundancy replacement information, and the monitoring data.
[0017] In some implementations, the redundant replacement unit is integrated with the error correction module.
[0018] The operation method and memory provided in this application can generate corresponding check codes and data to be read at least partially synchronously based on a data group. This allows the check code generation process to be at least partially synchronous with the data to be read generation process. Compared with generating the data to be read first and then generating the check code, this reduces the reading operation time caused by adding verification and error correction steps during the reading operation, thereby improving the efficiency of the reading instruction.
[0019] Furthermore, compared to checksums, which are generated based on the data to be read and require two sets of buses to transmit that data for verification and error correction respectively, the aforementioned checksum is not generated based on the data to be read. Therefore, only one set of buses is needed to transmit the data to be read, which is sufficient for error correction. This reduces the number of bus sets required to transmit the data to be read, greatly simplifying the layout and routing. Attached Figure Description
[0020] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.
[0021] Figure 1 This is a flowchart illustrating the read operation in related technologies.
[0022] Figure 2 This is a schematic diagram illustrating the location of an error indicated by a checksum in related technologies.
[0023] Figure 3 This is a schematic diagram of the first operation method provided in the embodiments of this application.
[0024] Figure 4 This is a second flowchart illustrating the operation method provided in the embodiments of this application.
[0025] Figure 5 A schematic diagram illustrating the determination of redundant replacement locations based on the redundant replacement information provided in the embodiments of this application.
[0026] Figure 6 This is a schematic diagram illustrating the location of an error indicated by a checksum provided in an embodiment of this application.
[0027] Figure 7 A schematic block diagram of the memory provided in an embodiment of this application.
[0028] Figure 8 This is a schematic diagram of the synchronization processing module provided in an embodiment of this application. Detailed Implementation
[0029] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.
[0030] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Features thus defined as "first" or "second" may explicitly or implicitly include one or more of the stated features. In the description of this invention, "a plurality of" means two or more unless otherwise explicitly specified.
[0031] Figure 1 This is a flowchart illustrating the read operation in related technologies. Figure 2 This diagram illustrates how a checksum indicates the location of an error in a related technology. During the read operation, the sensitive amplifier reads and outputs stored data (SA), redundant replacement data (RSA), and supervisory data (ESA) from the storage array. Based on the redundant replacement information (R), the stored data (SA) and supervisory data (ESA) are redundantly replaced using the redundant replacement data (RSA), resulting in the data to be read (SAR) and the redundantly repaired supervisory data (ESAR). The redundantly repaired supervisory data (ESAR) and the data to be read (SAR) undergo ECC verification to generate a corresponding checksum (ECCOUT). Then, based on the checksum (ECCOUT), ECC error correction is performed on the data to be read (SAR), resulting in the target readout data (SAP).
[0032] Taking 4 bits of stored data SA (SA3~SA0) and 1 bit of redundant replacement data RSA (RSA0) as an example, it requires at least 3 bits of supervisory data ESA (ESA2~ESA0). After redundancy replacement, the stored data SA, supervisory data ESA and redundant replacement data RSA are obtained as the corresponding data to be read SAR (SAR3~SAR0) and the supervisory data ESAR (ESAR2~ESAR0) after redundancy repair. Then, the check code ECCOUT (E2~E0) is obtained through ECC verification.
[0033] By employing one of the ECC encoding rules in the write operation, the redundancy-corrected supervisory data ESAR was obtained, as shown below:
[0034] ESAR2 = SAR1^SAR2^SAR3
[0035] ESAR1 = SAR0^SAR2^SAR3
[0036] ESAR0 = SAR0^SAR1^SAR3
[0037] The ECC check in the read operation uses the corresponding decoding rules to obtain the checksum ECCOUT, as shown below:
[0038] E2 = ESA2^SAR1^SAR2^SAR3
[0039] E1 = ESA1^SAR0^SAR2^SAR3
[0040] E0 = ESA0^SAR0^SAR1^SAR3
[0041] It should be noted that "^" is the XOR operator.
[0042] The presence of errors in the SAR data to be read can be determined based on the aforementioned checksum ECCOUT. Figure 2 As shown, when E2 to E0 are 000, it indicates that no error has occurred; when E2 to E0 are 001, it indicates that an error has occurred in ESAR0 of the redundancy-corrected monitoring data; when E2 to E0 are 010, it indicates that an error has occurred in ESAR1 of the redundancy-corrected monitoring data; when E2 to E0 are 100, it indicates that an error has occurred in ESAR2 of the redundancy-corrected monitoring data; when E2 to E0 are 011, it indicates that an error has occurred in SAR0 of the SAR data to be read; when E2 to E0 are 101, it indicates that an error has occurred in SAR1 of the SAR data to be read; when E2 to E0 are 110, it indicates that an error has occurred in SAR2 of the SAR data to be read; and when E2 to E0 are 111, it indicates that an error has occurred in SAR3 of the SAR data to be read.
[0043] If errors exist, the erroneous data can be inverted using ECC error correction to obtain the target readout data SAP; if no errors exist, the SAR data to be read out is output as the target readout data SAP.
[0044] In some embodiments, the stored data SA, redundant replacement data RSA, data to be read SAR, check code ECCOUT, and target read data SAP are all transmitted through the corresponding bus, and the number of bits of the stored data SA, data to be read SAR, and target read data SAP are the same.
[0045] The above analysis shows that:
[0046] 1. Assuming that the time required for redundancy replacement is T1, the time required for ECC verification is T2, and the time required for ECC error correction is T3, then the total time required for one read operation from redundancy replacement to ECC error correction is T1+T2+T3.
[0047] 2. Through Figure 1 It can be seen that both ECC verification and ECC error correction require the SAR data to be read, which requires two sets of buses to provide the SAR data to be read for ECC verification and ECC error correction respectively.
[0048] Based on this, this embodiment provides an operation method, please refer to... Figures 3 to 8 ,like Figure 3 As shown, the operation method includes the following steps:
[0049] Step S10: Generate corresponding check codes and data to be read based on at least part of a data set.
[0050] Step S20: Process the data to be read according to the check code to obtain the target data to be read.
[0051] It is understood that the operation method provided in this embodiment, by generating the corresponding check code ECCOUT and the data to be read SAR based on a data group at least partially synchronously, can make the generation process of the check code ECCOUT and the generation process of the data to be read SAR at least partially synchronous. Compared with the generation process of the data to be read SAR first and then the generation process of the check code ECCOUT, it reduces the reading operation time caused by adding verification and error correction links in the reading operation, thereby improving the working efficiency of the reading command.
[0052] Furthermore, compared to the checksum, which is generated from the SAR data to be read and requires two sets of buses to transmit the SAR data for verification and error correction, the aforementioned checksum ECCOUT is not generated from the SAR data to be read. Therefore, only one set of buses is needed to transmit the SAR data to be read and perform error correction. This reduces the number of bus sets for transmitting the SAR data to be read, greatly reducing the difficulty of layout routing.
[0053] It should be noted that the checksum ECCOUT can be generated based on error checking and correction (ECC) technology, or it can be generated based on other check and error correction technologies. This application only uses this as an example for illustration. Specifically, step S20 above corresponds to... Figure 4 ECC error correction in the system.
[0054] In one embodiment, generating corresponding check code ECCOUT and readout data SAR based on at least partially synchronously of a data group includes: configuring the data group to include stored data SA, redundant replacement data RSA, and redundant replacement information R; and generating check code ECCOUT and readout data SAR based on at least partially synchronously of the stored data SA, redundant replacement data RSA, and redundant replacement information R.
[0055] In one embodiment, generating a check code ECCOUT and a readout data SAR based on at least part of the stored data SA, redundant replacement data RSA, and redundant replacement information R includes: generating supervisory data ESA based on the stored data SA; and generating a check code ECCOUT and a readout data SAR based on at least part of the stored data SA, redundant replacement data RSA, redundant replacement information R, and supervisory data ESA.
[0056] It should be noted that the check code ECCOUT and the SAR data to be read can be generated based on the same stored data SA, redundant replacement data RSA, and redundant replacement information R. This allows the generation process of the check code ECCOUT and the generation process of the SAR data to be read to be at least partially synchronized, thereby reducing the time of the read operation and improving the efficiency of the read command.
[0057] In one embodiment, generating a check code ECCOUT and a readout data SAR based at least partially synchronously of stored data SA, redundant replacement data RSA, redundant replacement information R, and supervisory data ESA includes: generating the readout data SAR based on stored data SA, redundant replacement data RSA, and redundant replacement information R; and generating the check code ECCOUT based on stored data SA, redundant replacement data RSA, redundant replacement information R, and supervisory data ESA.
[0058] It should be noted that the SAR data to be read is generated based on the stored data SA, the redundancy replacement data RSA, and the redundancy replacement information R. Figure 4 Redundancy replacement is performed in the process. A checksum ECCOUT is generated based on the stored data SA, redundancy replacement data RSA, redundancy replacement information R, and monitoring data ESA. Figure 4 ECC verification in the process. Figure 4 The ECC error correction in the above steps corresponds to step S20.
[0059] Specifically, such as Figure 4As shown, the sensitive amplifier reads and outputs stored data SA, redundant replacement data RSA, and supervisory data ESA from the storage array. Based on the redundant replacement information R, the stored data SA is redundantly replaced using the redundant replacement data RSA to obtain the readout data SAR. Furthermore, ECC verification is performed based on the redundant replacement information R, the redundant replacement data RSA, the stored data SA, and the supervisory data ESA to generate the corresponding checksum ECCOUT. Then, ECC error correction is performed on the readout data SAR based on the checksum ECCOUT to obtain the target readout data SAP.
[0060] Therefore, assuming the time required for redundancy replacement is T1, the time required for ECC verification is T2, and the time required for ECC error correction is T3, the total time required for a single read operation in this application is either T1+T3 or T2+T3. Compared to the total time required for a single read operation being T1+T2+T3, this reduces the total time required for a single read operation and improves the efficiency of the read instruction. In some embodiments, T2 is greater than T1; therefore, the total time required for a single read operation is typically T2+T3.
[0061] In one embodiment, generating a corresponding check code ECCOUT based on the stored data SA, redundant replacement data RSA, redundant replacement information R, and supervisory data ESA includes: obtaining intermediate bit data, i.e., R×RSA, based on the product of the corresponding bit data of the redundant replacement data RSA and the corresponding bit data of the redundant replacement information R; and obtaining the check code ECCOUT based on the XOR operation result between each corresponding bit data of the stored data SA, the corresponding encoded bit data of the supervisory data ESA, and the intermediate bit data.
[0062] It should be noted that, taking 4 bits of stored data SA (SA3~SA0), 1 bit of redundant replacement data RSA (RSA0), and 3 bits of redundant replacement information R (R2~R0) as an example, at least 3 bits of supervisory data ESA (ESA2~ESA0) are required. After redundancy replacement, the stored data SA, redundant replacement information R, and redundant replacement data RSA are used to obtain the corresponding data to be read SAR (SAR3~SAR0). Furthermore, by performing ECC verification on the supervisory data ESA (ESA2~ESA0), stored data SA, redundant replacement information R, and redundant replacement data RSA, the checksum ECCOUT (E2~E0) is obtained.
[0063] The ECC check uses the corresponding decoding rules to obtain the checksum ECCOUT, as shown below:
[0064] E2=ESA2^SA1^SA2^SA3^(R2×RSA0)
[0065] E1=ESA1^SA0^SA2^SA3^(R1×RSA0)
[0066] E0=ESA0^SA0^SA1^SA3^(R0×RSA0)
[0067] Here, "^" represents the XOR logical operator. The check bit data can be, for example, E2, E1, or E0.
[0068] In one embodiment, generating the SAR data to be read out based on the stored data SA, the redundant replacement data RSA, and the redundant replacement information R includes: determining the redundant replacement position in the stored data SA and the supervision data ESA based on the redundant replacement information R; configuring the corresponding bit data of the redundancy replacement position determined in the read-out stored data to "0", and assigning the corresponding bit data of the redundant replacement data RSA to the data of the redundant replacement position in the SAR data to be read out.
[0069] It should be noted that, such as Figure 5 As shown, in the redundancy replacement information R, if R2=1, R1=0, and R0=1, it means that the position of SA1 is a redundancy replacement position. This redundancy replacement position corresponds to the position of SAR1 in the data to be read (SAR). SAR1 will be redundantly replaced, that is, RSA0 will be assigned to SAR1 (SAR1=RSA0). SA1 will be set to 0 throughout the data reading process, that is, SA1=0. Other data are not redundantly replaced and retain their original values, for example, SAR0=SA0, SAR2=SA2, SAR3=SA3, ESAR2=ESA2, ESAR1=ESA1, and ESAR0=ESA0.
[0070] In one embodiment, the readout data SAR is processed according to the check code ECCOUT to obtain the target readout data SAP corresponding to the readout data SAR. This includes: if the check code ECCOUT indicates that there is an error in the corresponding bit data in the readout data SAR, the bit data with the error in the readout data SAR is inverted and output as the corresponding target readout data SAP; if the check code ECCOUT indicates that there is no error in the corresponding bit data in the readout data SAR, the readout data SAR is output as the corresponding target readout data SAP.
[0071] It should be noted that, such as Figure 6As shown, in the checksum ECCOUT, if E2 = 0, E1 = 0, and E0 = 0, it indicates that there are no errors in the SAR data to be read, and the SAR data to be read is directly output as the corresponding target readout data SAP. If E2 = 0, E1 = 1, and E0 = 1, it indicates that SA0 in the SAR data to be read has an error. In this case, SA0 needs to be inverted while the other bits in the SAR data to be read remain unchanged, and the output is the target readout data SAP.
[0072] In one embodiment, before generating the checksum ECCOUT based on the stored data SA, the redundancy replacement data RSA, the redundancy replacement information R, and the supervision data ESA, the process includes: generating the supervision data ESA during a write operation based on the stored data SA, the redundancy replacement data RSA, and the redundancy replacement information R; and storing the supervision data ESA.
[0073] It should be noted that the supervisory data ESA can be generated during a write operation prior to a read operation and stored in the storage array. In some other embodiments, the supervisory data ESA can also be generated when needed, such as during a read operation.
[0074] In one embodiment, supervisory data ESA is generated during a write operation based on stored data SA, redundant replacement data RSA, and redundant replacement information R. This includes: obtaining intermediate bit data by multiplying the corresponding bit data of the redundant replacement data RSA with the corresponding bit data of the redundant replacement information R; and obtaining supervisory data ESA based on the XOR operation result of each corresponding bit data of the stored data SA with the intermediate bit data.
[0075] It should be noted that, taking 4 bits of stored data SA (SA3~SA0), 1 bit of redundant replacement data RSA (RSA0), and 3 bits of redundant replacement information R (R2~R0) as an example, at least 3 bits of supervisory data ESA (ESA2~ESA0) are required. After the stored data SA, redundant replacement information R, and redundant replacement data RSA are redundantly replaced, the corresponding data to be read SAR (SAR3~SAR0) is obtained. The check code ECCOUT (E2~E0) is obtained by performing ECC verification on the supervisory data ESA (ESA2~ESA0), stored data SA, redundant replacement information R, and redundant replacement data RSA.
[0076] One of the ECC encoding rules was used in the write operation to obtain the supervisory data ESA, as shown below:
[0077] ESA2 = SA1^SA2^SA3^(R2×RSA0)
[0078] ESA1 = SA0^SA2^SA3^(R1×RSA0)
[0079] ESA0 = SA0^SA1^SA3^(R0×RSA0)
[0080] Here, "^" represents the XOR logical operator. The intermediate bit data can be, for example, R2×RSA0, R1×RSA0, or R0×RSA0. The encoded bit data can be, for example, ESA2, ESA1, or ESA0.
[0081] In summary, taking 4 bits of stored data SA (SA3~SA0), 1 bit of redundant replacement data RSA (RSA0), and 3 bits of redundant replacement information R (R2~R0) as an example, it requires at least 3 bits of supervisory data ESA (ESA2~ESA0). After the stored data SA, redundant replacement information R, and redundant replacement data RSA are redundantly replaced, the corresponding data to be read SAR (SAR3~SAR0) and supervisory data ESA (ESA2~ESA0) are obtained. Then, the checksum ECC is checked to obtain the checksum ECCOUT (E2~E0).
[0082] One ECC encoding rule for directly calculating the checksum ECCOUT of the stored data SA without considering the redundant replacement data RSA and the redundant replacement information R is as follows:
[0083] ESA2=SA1^SA2^SA3
[0084] ESA1=SA0^SA2^SA3
[0085] ESA0 = SA0^SA1^SA3
[0086] The corresponding decoding rules are as follows:
[0087] E2=ESA2^SA1^SA2^SA3
[0088] E1 = ESA1^SA0^SA2^SA3
[0089] E0 = ESA0^SA0^SA1^SA3
[0090] The presence of errors in the stored data SA can be determined based on the aforementioned checksum ECCOUT. Figure 6As shown, when E2 to E0 are 000, it indicates that no error has occurred; when E2 to E0 are 001, it indicates that an error has occurred in ESA0 of the monitoring data; when E2 to E0 are 010, it indicates that an error has occurred in ESA1 of the monitoring data; when E2 to E0 are 100, it indicates that an error has occurred in ESA2 of the monitoring data; when E2 to E0 are 011, it indicates that an error has occurred in SA0 of the stored data SA; when E2 to E0 are 101, it indicates that an error has occurred in SA1 of the data to be stored SA; when E2 to E0 are 110, it indicates that an error has occurred in SA2 of the stored data SA; when E2 to E0 are 111, it indicates that an error has occurred in SA3 of the stored data SA.
[0091] In this context, SA0 to SA3 represent the first to fourth bits of the stored data SA, from least significant bit to most significant bit. E0 to E2 represent the first to third bits of the checksum ECCOUT, from least significant bit to most significant bit. ESA0 to ESA2 represent the first to third bits of the supervisory data ESA, from least significant bit to most significant bit. R0 to R2 represent the first to third bits of the redundancy replacement information R, from least significant bit to most significant bit. SAR0 to SAR3 represent the first to fourth bits of the data to be read, from least significant bit to most significant bit. RSA0 represents the first bit of the redundancy replacement data RSA, from least significant bit to most significant bit. In other embodiments, the redundancy replacement data RSA can also be multiple bits, such as the second bit (RSA1) from least significant bit to most significant bit, the third bit (RSA2) from least significant bit to most significant bit, etc.
[0092] However, considering the redundant replacement data RSA and the redundant replacement information R, the following approach is adopted. Figure 5 The correspondence between the redundancy replacement information R and the redundancy replacement position is shown below. Specifically, when R2 to R0 are 000, no redundancy replacement is performed; when R2 to R0 are 001, the redundancy replacement position is the location of ESA0; when R2 to R0 are 010, the redundancy replacement position is the location of ESA1; when R2 to R0 are 100, the redundancy replacement position is the location of ESA2; when R2 to R0 are 011, the redundancy replacement position is the location of SA0; when R2 to R0 are 101, the redundancy replacement position is the location of SA1; when R2 to R0 are 110, the redundancy replacement position is the location of SA2; and when R2 to R0 are 111, the redundancy replacement position is the location of SA3.
[0093] In this case, an ECC encoding rule for calculating the checksum ECCOUT based on the stored data SA is as follows:
[0094] ESA2 = SA1^SA2^SA3^(R2×RSA0)
[0095] ESA1 = SA0^SA2^SA3^(R1×RSA0)
[0096] ESA0 = SA0^SA1^SA3^(R0×RSA0)
[0097] The corresponding decoding rules are as follows:
[0098] E2=ESA2^SA1^SA2^SA3^(R2×RSA0)
[0099] E1=ESA1^SA0^SA2^SA3^(R1×RSA0)
[0100] E0=ESA0^SA0^SA1^SA3^(R0×RSA0)
[0101] If R2 = 1, R1 = 0, and R0 = 1, then SA1 is located at a redundant replacement position. This redundant replacement position corresponds to the position of SAR1 in the SAR data to be read. SAR1 will be redundantly replaced, that is, RSA0 will be assigned to SAR1 (SAR1 = RSA0). SA1 will be kept at 0 during the data reading process, i.e., SA1 = 0. Other data will not be redundantly replaced and will retain their original values, for example, SAR0 = SA0, SAR2 = SA2, SAR3 = SA3, ESAR2 = ESA2, ESAR1 = ESA1, and ESAR0 = ESA0.
[0102] According to the ECC encoding rules:
[0103] ESA2 = SA1^SA2^SA3^(R2×RSA0)
[0104] Substituting SA1=0, R2=1, SAR2=SA2, SAR3=SA3, and SAR1=RSA0 into the above formula, we obtain the following calculation formula:
[0105] ESA2 = 0^SAR2^SAR3^(1×SAR1)
[0106] After simplification, the following calculation formula is obtained:
[0107] ESA2 = SAR1^SAR2^SAR3
[0108] It is equivalent to "ESAR2=SAR1^SAR2^SAR3" in the ECC encoding rule. That is, ESA2~ESA0 in the ECC encoding rule are respectively equal to ESAR2~ESAR0 in the ECC encoding rule. Similarly, E2~E0 in the decoding rule are also respectively equal to E2~E0 in the ECC encoding rule.
[0109] This demonstrates that the check code ECCOUT obtained in this application based on stored data SA, redundant replacement data RSA, and redundant replacement information R is consistent with the check code ECCOUT obtained based on data to be read SAR in related technologies, and both can be used to check for and correct errors.
[0110] In one embodiment, this embodiment provides a memory, such as Figure 7 As shown, the memory includes a synchronization processing module 100 and an error correction module 200. The synchronization processing module 100 is used to generate a corresponding check code ECCOUT and SAR data to be read out based on at least part of a data group. The error correction module 200 is used to process the SAR data to be read out according to the check code ECCOUT to obtain the target readout data SAP corresponding to the SAR data to be read out.
[0111] It is understood that the memory provided in this embodiment, by generating the corresponding check code ECCOUT and the data to be read SAR based on a data group at least partially synchronously, can make the generation process of the check code ECCOUT and the generation process of the data to be read SAR at least partially synchronous. Compared with the generation process of the data to be read SAR first and then the generation process of the check code ECCOUT, the reading operation time caused by adding verification and error correction links during the reading operation is reduced, thereby improving the working efficiency of the reading instruction.
[0112] It should be noted that the data group includes stored data SA, redundant replacement data RSA, redundant replacement information R, and supervisory data ESA. The synchronization processing module 100 is used to synchronously generate at least partially the checksum ECCOUT and the data to be read SAR based on the stored data SA, redundant replacement data RSA, redundant replacement information R, and supervisory data ESA.
[0113] The synchronization processing module 100 is connected to the error correction module 200 to receive the checksum ECCOUT and the SAR data to be read. The memory can be, but is not limited to, NOR Flash, or other suitable memory chips.
[0114] In one embodiment, such as Figure 8As shown, the synchronization processing module 100 includes a redundancy replacement unit 110 and a verification unit 120. The redundancy replacement unit 110 is used to generate SAR data to be read based on the stored data SA, the redundancy replacement data RSA, and the redundancy replacement information R. The verification unit 120 is used to generate a verification code ECCOUT based on the stored data SA, the redundancy replacement data RSA, the redundancy replacement information R, and the supervision data ESA.
[0115] It should be noted that the input terminal of the verification unit 120 can be connected to the input terminal of the redundancy replacement unit 110 to share the stored data SA, the redundancy replacement data RSA, and the redundancy replacement information R, thereby saving the number of transmission lines. The input terminal of the error correction module 200 is connected to the output terminal of the verification unit 120 and the output terminal of the redundancy replacement unit 110, respectively.
[0116] Compared to methods where the checksum is generated from the SAR data to be read, requiring two sets of buses to transmit the SAR data for verification and error correction respectively, the aforementioned checksum ECCOUT is not generated from the SAR data to be read. Therefore, only one set of buses is needed to transmit the SAR data to be read, which is sufficient for error correction. This reduces the number of bus sets for transmitting the SAR data to be read, greatly simplifying layout routing.
[0117] In one embodiment, the redundancy replacement unit 110 is integrated with the error correction module 200. This allows the redundancy replacement unit 110 and the error correction module 200 to be combined, thereby saving the bus for transmitting the SAR data to be read between the redundancy replacement unit 110 and the error correction module 200.
[0118] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.
[0119] The operation method and memory provided in the embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.
Claims
1. A method for operating a memory, characterized in that, The operation method includes: Based on a data set, at least partially synchronously generate the corresponding check code and the data to be read; The data to be read is processed according to the verification code to obtain the target data to be read.
2. The operating method according to claim 1, characterized in that, The process of generating corresponding check codes and data to be read based on at least part of a data set includes: The configuration of the data group includes stored data, redundant replacement data, and redundant replacement information; The checksum and the data to be read are generated synchronously at least partially based on the stored data, the redundant replacement data, and the redundant replacement information.
3. The operating method according to claim 2, characterized in that, The step of synchronously generating the checksum and the data to be read based on the stored data, the redundant replacement data, and the redundant replacement information (at least partially) includes: Supervisory data is generated based on the stored data; The checksum and the data to be read are generated synchronously at least partially based on the stored data, the redundant replacement data, the redundant replacement information, and the monitoring data.
4. The operating method according to claim 3, characterized in that, The step of synchronously generating the checksum and the data to be read based on at least a portion of the stored data, the redundant replacement data, the redundant replacement information, and the monitoring data includes: Data to be read is generated based on the stored data, the redundant replacement data, and the redundant replacement information; The checksum is generated based on the stored data, the redundant replacement data, the redundant replacement information, and the monitoring data.
5. The operating method according to claim 4, characterized in that, The step of generating the checksum based on the stored data, the redundant replacement data, the redundant replacement information, and the monitoring data includes: The intermediate bit data is obtained by multiplying the corresponding bit data of the redundant replacement data with the corresponding bit data of the redundant replacement information. The check code is obtained by XORing the corresponding bits of the stored data, the corresponding encoded bits of the monitoring data, and the intermediate bits.
6. The operating method according to claim 4, characterized in that, The step of generating data to be read based on the stored data, the redundant replacement data, and the redundant replacement information includes: The redundant replacement positions in the stored data and the monitoring data are determined based on the redundancy replacement information; Configure the corresponding bit data of the redundant replacement position determined in the read storage data to be "0", and assign the corresponding bit data of the redundant replacement data to the data of the redundant replacement position in the data to be read.
7. The operating method according to any one of claims 1-6, characterized in that, The step of processing the data to be read according to the check code to obtain the target data to be read includes: If the check code indicates that there is an error in the corresponding bit data in the data to be read, the bit data with the error in the data to be read is inverted and then the corresponding target data to be read is output. If the check code indicates that there are no errors in the corresponding bit data in the data to be read, the data to be read is output as the corresponding target data to be read.
8. The operating method according to claim 3, characterized in that, Before generating the checksum and the data to be read from the stored data, the redundant replacement data, the redundant replacement information, and the supervision data in at least a partial synchronous manner, the process further includes: The supervisory data is generated during write or read operations based on the stored data, the redundant replacement data, and the redundant replacement information. Store the supervision data.
9. The operating method according to claim 8, characterized in that, The step of generating the supervisory data during a write operation based on the stored data, the redundant replacement data, and the redundant replacement information includes: The intermediate bit data is obtained by multiplying the corresponding bit data of the redundant replacement data with the corresponding bit data of the redundant replacement information. The monitoring data is obtained by performing an XOR operation between the corresponding bits of the stored data and the intermediate bits.
10. A memory, characterized in that, The memory includes: A synchronization processing module is used to generate corresponding check codes and data to be read out based on at least part of a data set in a synchronized manner. An error correction module is used to process the data to be read according to the check code to obtain target read data corresponding to the data to be read.
11. The memory according to claim 10, characterized in that, The data group includes stored data, redundant replacement data, redundant replacement information, and monitoring data; The synchronization processing module is used to generate the check code and the data to be read out by at least partially synchronizing the stored data, the redundant replacement data, the redundant replacement information, and the supervision data.
12. The memory according to claim 11, characterized in that, The synchronization processing module includes: A redundancy replacement unit is configured to generate data to be read out based on the stored data, the redundancy replacement data, and the redundancy replacement information. A verification unit is configured to generate the verification code based on the stored data, the redundant replacement data, the redundant replacement information, and the monitoring data.
13. The memory according to claim 12, characterized in that, The redundant replacement unit is integrated with the error correction module.