Dynamically tunable amplifier

Abstract

The invention relates to a dynamically tunable amplifier. An electronic circuit includes an amplifier, a first variable capacitor and a second variable capacitor. The amplifier receives an input signal across an inverting input terminal of the amplifier and a non-inverting input terminal of the amplifier. The first variable capacitance is directly electrically connected to the output terminal of the amplifier and the inverting input terminal of the amplifier. The second variable capacitance is directly electrically connected to the output terminal of the amplifier and the non-inverting input terminal of the amplifier.

Description

Dynamically tunable amplifier Technical Field

[0001] This disclosure relates to the field of electronics, and more particularly to a dynamically tunable amplifier. Background Technology

[0002] In electronics, an amplifier is a circuit system designed to convert input current into an amplified voltage. In converting input current into voltage, the amplifier multiplies the input current by the amplifier gain to produce the amplified voltage. Summary of the Invention

[0003] One embodiment of this disclosure provides an electronic circuit. The electronic circuit includes an amplifier, a first variable capacitor, and a second variable capacitor. The amplifier is configured to receive an input signal across its inverting input terminal and its non-inverting input terminal. The first variable capacitor is directly electrically connected to the amplifier's output terminal and the inverting input terminal. The second variable capacitor is directly electrically connected to the amplifier's output terminal and the non-inverting input terminal.

[0004] Another embodiment of this disclosure provides an apparatus. The apparatus includes: a load configured to receive a differential voltage; and electronic circuitry. The electronic circuitry includes: an amplifier configured to receive an input signal across an inverting input terminal and a non-inverting input terminal of the amplifier; a first variable capacitor directly electrically connected to an output terminal and the inverting input terminal of the amplifier; and a second variable capacitor directly electrically connected to the output terminal and the non-inverting input terminal of the amplifier. The amplifier is configured to convert the input signal into the differential voltage by amplifying the input signal.

[0005] Another embodiment of this disclosure provides a system. The system includes: an input source configured to output an input signal; and electronic circuitry including: an amplifier configured to receive the input signal across an inverting input terminal and a non-inverting input terminal of the amplifier; a first variable capacitor directly electrically connected to an output terminal of the amplifier and the inverting input terminal of the amplifier; and a second variable capacitor directly electrically connected to the output terminal of the amplifier and the non-inverting input terminal of the amplifier. Attached Figure Description

[0006] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate examples of this disclosure and, together with the specification, explain the principles of the examples.

[0007] Figure 1 illustrates a functional block diagram of an exemplary system according to one or more embodiments of the present disclosure.

[0008] Figure 2 illustrates an exemplary electronic circuit according to one or more embodiments of the present disclosure.

[0009] Figure 3 illustrates an exemplary configuration of a variable capacitor according to one or more embodiments of the present disclosure.

[0010] Figure 4 illustrates an exemplary configuration of a variable resistor according to one or more embodiments of the present disclosure.

[0011] In the accompanying drawings, the same reference numerals and numbers indicate the same or similar components. For consistency, the same elements in each figure are represented by the same reference numerals and numbers. Unless otherwise indicated, the same elements and method steps are represented by the same reference numerals. Detailed Implementation

[0012] The technical solutions in this specification are described below with reference to the accompanying drawings. Exemplary embodiments are described in detail with reference to the accompanying drawings.

[0013] The terminology used herein is for the purpose of describing various instances only and is not intended to limit this disclosure. Unless otherwise defined, all terms used herein, including technical and scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains and upon understanding the disclosure of this application.

[0014] Terms, such as those defined in common dictionaries, should be interpreted as having meanings consistent with their meanings in the context of the relevant art and the disclosure of this application. Although the art has been described with reference to certain examples, those skilled in the art will recognize that changes in form and detail may be made without departing from the scope of the discussion.

[0015] Generally, the frequency response of many high-speed amplifiers is not flat across all frequencies. Instead, the peaking frequency of an amplifier is the frequency at which the amplifier's gain reaches its maximum before rolling off due to bandwidth limitations. In high-speed amplifiers, factors such as parasitic capacitances and inductances within the amplifier, any feedback resistors in the amplifier, and overall amplifier characteristics can cause resonances that increase the amplifier gain at the peaking frequency. This increase in amplifier gain at the peaking frequency is commonly referred to as peaking. Peaking typically occurs in the frequency response of an amplifier. In some amplifiers, the amplifier gain is highest at the peaking frequency before it decreases as the frequency continues to increase.

[0016] Peaking quantizes the increase in amplifier gain at the peaking frequency compared to the amplifier's flat or nominal gain level. Peaking is typically expressed in decibels (dB) as the difference between the nominal amplifier gain level and the amplifier gain at the peaking frequency. Peaking quantizes the extent to which the amplifier gain rises above the nominal or expected gain before beginning to roll off at higher frequencies.

[0017] Resonance can cause a peak in the frequency response before the gain rolls off at higher frequencies. Resonance occurs when the inductive and capacitive reactances in an amplifier cancel each other out, resulting in maximum signal amplification at the resonant frequency. When the resonant frequency coincides with the peaking frequency, the natural resonance and peaking effects reinforce each other, causing a sharp amplification of the input current at the peaking frequency. This sharp amplification leads to amplifier distortion. Therefore, an improved amplifier is needed in this field.

[0018] Referring now to Figure 1, an example system 100 is described. System 100 may include device 101 and input 102. Those skilled in the art will understand that additional components may be present in system 100.

[0019] Device 101 may be any electronic device capable of exchanging electronic information with input 102. Device 101 may be any type of electrically powered device with computing capabilities. For example, device 101 may be a computer terminal, laptop computer, tablet computer, and / or any other computing device. In some instances, device 101 may be a telephone, mobile phone, smartphone, cell phone, and / or any other electronic telecommunications device. In other instances, device 101 may be a television set, a video device such as a video display, a video recorder, a digital video recorder (DVR), a set-top box, a back box, and / or any other electronic entertainment device.

[0020] Device 101 may be a sensor, a Power over Ethernet device, a printer, an appliance (e.g., a washing machine, dryer, refrigerator, oven and / or other appliance), an Internet of Things (IoT) device and / or any other electronic device capable of electrical communication with input 102.

[0021] Device 101 can be any portable electronic device that can be carried or worn by an individual. For example, device 101 can be configured as a wearable device, smartwatch, fitness tracker, or personal digital assistant (PDA).

[0022] In some instances, device 101 may be found in devices such as autonomous vehicles, robots, and drones. Device 101 may be configured as a driver assistance module in a vehicle, a computing device in a vehicle, and / or an entertainment device in a vehicle. Device 101 may include network interface cards, routers, servers, hubs, network switches, modems, bridges, access points, gateways, and / or mesh network interfaces. Device 101 may be found in artificial intelligence (AI) networks.

[0023] Input 102 can be any electronic circuit system capable of providing an input signal to electronic circuit 110. For example, input 102 can be a photodiode, photomultiplier tube, ultrasonic transducer, and / or radiation detector. In some embodiments, input 102 can be a capacitive sensor, temperature sensor, electrochemical sensor, biosensor, and / or magnetic field sensor. In other examples, input 102 can be an Ethernet device, optical receiver, optical transceiver, fiber optic receiver, fiber optic transceiver, infrared (IR) receiver, IR transceiver, radio frequency (RF) receiver, RF transceiver, microwave receiver, microwave transceiver, ultrasonic receiver, ultrasonic transceiver, cellular receiver, cellular transceiver, Global Positioning System (GPS) receiver, GPS transceiver, satellite communication receiver, satellite communication transceiver, television signal receiver, Wi-Fi receiver, Wi-Fi transceiver, audio receiver, and / or audio transceiver. The above list is not intended to be exhaustive. Alternatively, input 102 can be any current source. Similarly, any voltage source can be input 102.

[0024] Device 101 may include electronic circuitry 110, a load 120, and a signal processor 130. Those skilled in the art will understand that additional components may be included in device 101.

[0025] Electronic circuit 110 may be an electronic circuit that converts the input signal from input 102 into a differential signal. At its output, electronic circuit 110 may generate voltages V(out+) and V(out-), which will be explained in detail later. Transimpedance amplifier 111, tuning circuit 112, and inductor network 113 are included in electronic circuit 110. Electronic circuit 110 may be a continuous-time linear equalizer (CTLE). In some instances, an integrated circuit chip may contain electronic circuit 110.

[0026] Load 120 is the impedance that electronic circuit 110 is driving. Load 120 can be an electronic circuit and / or an electronic device. Electronic circuit 110 can supply voltages V(out+) and V(out-) to load 120. Electronic circuit 110 can drive load 120.

[0027] Signal processor 130 is an electronic circuit system designed to regulate voltages V(out+) and V(out-). In order to regulate voltages V(out+) and V(out-), control signal 131 from signal processor 130 causes tuning circuit 112 to adjust the peaking frequency of voltages V(out+) and V(out-), as will be discussed in detail.

[0028] Turning to Figure 2, an exemplary electronic circuit 110 is illustrated. Electronic circuit 110 amplifies an input signal to convert it into an amplified signal. Gain is the ratio of the amplified signal (voltage, current, or power) to the input signal. Gain (which is typically expressed as a dimensionless ratio or in decibels (dB)) quantifies the increase in the amplitude of the input signal during the conversion of the input signal into an amplified signal by electronic circuit 110.

[0029] When converting the input current into an amplified signal, electronic circuit 110 can multiply the input current by a gain to generate the amplified signal. As illustrated in FIG2, the amplified signal, as a differential signal, is within the scope of the present invention. The voltage level of the differential signal is proportional to the input signal. The phase difference between the amplified signal and the input signal can be 180 degrees. Electronic circuit 110 may include a transimpedance amplifier 111, a tuning circuit 112, and an inductor network 113. Electronic circuit 110 may also include nodes N1 to N8.

[0030] As illustrated in Figure 2, the transimpedance amplifier 111 may include components such as feedback resistors R21 and R22, lumped capacitor C21, output filter capacitor C22, and amplifier AMP21. Amplifier AMP21 is a differential amplifier. A differential amplifier is an electronic component with a pair of differential inputs and a pair of differential outputs. In the example of Figure 2, the differential input pair in amplifier AMP21 may include an inverting input terminal (-) and a non-inverting input terminal (+).

[0031] The terms "electrically connected directly," "electrically directly connected," and "directly electrically connected" as used in this document refer to two or more components connected along a conductive path without any intermediate components. The inverting input terminal (-) is directly electrically connected to node N1. The non-inverting input terminal (+) is directly electrically connected to node N2. The differential output pair in amplifier AMP21 may include an inverting output terminal (-) and a non-inverting output terminal (+). The non-inverting output terminal (+) is directly electrically connected to node N3. The inverting output terminal (-) is directly electrically connected to node N4.

[0032] The lumped capacitor C21 is directly electrically connected to nodes N1 and N2, as illustrated in Figure 2. The lumped capacitor C21 can be described as the capacitance at the input of the transimpedance amplifier 111 and the parasitic capacitance at nodes N1 and N2. Therefore, the lumped capacitor C21 is directly electrically connected to the inverting input terminal (-) and the non-inverting input terminal (+) of the amplifier AMP21. The input signal can appear across the lumped capacitor C21. In this way, the amplifier AMP21 can receive the input signal across the inverting input terminal (-) and the non-inverting input terminal (+). The input signal can be a differential signal. The lumped capacitor C21 can filter out high-frequency common-mode noise from the input signal, improve stability by suppressing high-frequency oscillations, and provide bandwidth control for the amplifier AMP21.

[0033] Amplifier AMP21 amplifies and converts the input signal into a differential signal. For example, the non-inverting input terminal (+) and the inverting input terminal (-) can receive the input signal illustrated in Figure 2. Amplifier AMP21 ignores common-mode noise that can also appear at the non-inverting input terminal (+) and the inverting input terminal (-) when amplifying the input signal appearing between the non-inverting input terminal (+) and the inverting input terminal (-). Amplifier AMP21 multiplies the input signal by its gain to produce an amplified input signal. The differential signal from amplifier AMP21 appearing across the inverting output terminal (-) and the non-inverting output terminal (+) is exactly the amplified input signal. The differential signal is exactly 180 degrees out of phase with the input signal. Feedback resistors R21 and R22 adjust the gain of amplifier AMP21. Feedback resistors R21 and R22 also stabilize the conversion from input signal to differential signal.

[0034] Output filter capacitor C22 is directly electrically connected between nodes N3 and N4, as illustrated in Figure 2. Therefore, output filter capacitor C22 is directly electrically connected between the inverting output terminal (-) and the non-inverting output terminal (+) of amplifier AMP21. The differential signal from amplifier AMP21 can pass across output filter capacitor C22. In some instances, output filter capacitor C22 can be a lumped capacitance. Output filter capacitor C22 can form a low-pass filter, attenuating unwanted high-frequency components in the differential signal. For example, output filter capacitor C22 can filter high-frequency noise in the differential signal. Output filter capacitor C22 can also smooth transients in the differential signal.

[0035] As illustrated in the example of Figure 2, the tuning circuit 112 may include variable resistors R23 and R24. Variable resistors R23 and R24 may each be a variable resistor. A variable resistor is a resistor whose resistance value can be electronically adjusted. Variable resistor R23 is directly electrically connected between nodes N3 and N5, as illustrated in Figure 2. Variable resistor R24 ​​is directly electrically connected between nodes N4 and N6. Turning to Figure 4, an exemplary configuration of variable resistors R23 and R24 is illustrated.

[0036] The variable resistor R23 may comprise resistors R23(1) to R23(S) and switches Q23(1) to Q23(S), where “S” is an integer greater than 1. Any one of resistors R23(1) to R23(S) may be individually referred to as “resistor R23(i)”. Any one of switches Q23(1) to Q23(S) may be individually referred to as “switch Q23(i)”. In some configurations, the resistance of one of resistors R23(1) to R23(S) may be different from the resistance of the other resistors R23(1) to R23(S). In other configurations, each of resistors R23(1) to R23(S) may have the same resistance.

[0037] The control signal 131 from the signal processor 130 can independently manage the conductive and non-conductive states of switch SH23 and switches Q23(1) to Q23(S). Because they are independently controllable, switches SH23 and Q23(1) to Q23(S) can be operated individually. The control signal 131 from the signal processor 130 can cause switches SH23 and Q23(1) to Q23(S) to open and close. Switch SH23 can cause a controlled short circuit between nodes N3 and N5. For example, the control signal 131 from the signal processor 130 can make switch SH23 conductive and short-circuit nodes N3 and N5. In response to the closing of switch Q23(i), switch Q23(i) will become conductive, causing current to flow between nodes N3 and N5 via the corresponding resistor R23(i). In Figure 4, it is illustrated that switch Q23(1) corresponds to resistor R23(1), switch Q23(2) corresponds to resistor R23(2), and switch Q23(S) corresponds to resistor R23(S). In response to the opening of switch Q23(i), switch Q23(i) becomes non-conductive, suppressing current flow through the corresponding resistor R23(i) between nodes N3 and N5. In some cases, two or more of switches Q23(1) to Q23(S) may simultaneously become conductive, with at least one of switches Q23(1) to Q23(S) conducting during each case. When the electronic circuit 110 converts the input signal into a differential signal, the opening and closing of switches Q23(1) to Q23(S) can adjust the resistance value of the variable resistor R23.

[0038] The variable resistor R24 ​​may comprise resistors R24(1) to R24(T) and switches Q24(1) to Q24(T), where “T” is an integer greater than 1. In some embodiments, “T” may be an integer value other than “S”. In other embodiments, both “S” and “T” may be the same integer value. Any one of resistors R24(1) to R24(T) may be individually referred to as “resistor R24(i)”. Any one of switches Q24(1) to Q24(T) may be individually referred to as “switch Q24(i)”. In some configurations, the resistance of one of resistors R24(1) to R24(T) may be different from the resistance of the other resistors R24(1) to R24(T). In other configurations, each resistor R24(1) to R24(T) may have the same resistance.

[0039] The control signal 131 from the signal processor 130 can independently manage the conductive and non-conductive states of switch SH24 and switches Q24(1) to Q24(S). Because they are independently controllable, switches SH24 and Q24(1) to Q24(S) can operate individually. The control signal 131 from the signal processor 130 can cause switches SH24 and Q24(1) to Q24(S) to open and close. Switch SH24 can cause a controlled short circuit between nodes N4 and N6. For example, the control signal 131 from the signal processor 130 can make switch SH24 conductive and short-circuit nodes N4 and N6. In response to the closing of switch Q24(i), switch Q24(i) will become conductive, causing current to flow between nodes N4 and N6 via the corresponding resistor R24(i). In Figure 4, it is illustrated that switch Q24(1) corresponds to resistor R24(1), switch Q24(2) corresponds to resistor R24(2), and switch Q24(S) corresponds to resistor R24(S). In response to the opening of switch Q24(i), switch Q24(i) becomes non-conductive, suppressing current flow through the corresponding resistor R24(i) between nodes N4 and N6. In some cases, two or more of switches Q24(1) to Q24(S) may become conductive simultaneously, with at least one of switches Q24(1) to Q24(S) conducting during each case. When the electronic circuit 110 converts the input signal into a differential signal, the opening and closing of switches Q24(1) to Q24(S) can adjust the resistance value of the variable resistor R24.

[0040] As illustrated in the example in Figure 2, the tuning circuit 112 may include variable capacitors C23, C24, C26, and C25. A variable capacitor is a capacitor whose capacitance value can be electronically adjusted.

[0041] In the example of Figure 2, the variable capacitor C23 is directly electrically connected between nodes N1 and N3. This direct electrical connection of the variable capacitor C23 between nodes N1 and N3 introduces negative feedback between the inverting input terminal (-) and the non-inverting output terminal (+) of amplifier AMP21. As a result of this negative feedback, the variable capacitor C23 can be a dynamically adjustable positive Miller capacitor. Due to the Miller effect, the variable capacitor C23 can induce a large positive capacitance in parallel with the lumped capacitance C21, and also induce a small positive capacitance in parallel with the output filter capacitor C22.

[0042] In the example of Figure 2, the variable capacitor C24 is directly electrically connected between nodes N2 and N3. This direct electrical connection of variable capacitor C24 between nodes N2 and N3 introduces positive feedback between the non-inverting input (+) and non-inverting output (+) terminals of amplifier AMP21. As a result of this positive feedback, variable capacitor C24 can be a dynamically adjustable negative Miller capacitor. Due to the Miller effect, variable capacitor C24 can induce a small negative capacitance in parallel with the lumped capacitance C21, and also induce a large negative capacitance in parallel with the output filter capacitor C22.

[0043] In the example of Figure 2, the variable capacitor C25 is directly electrically connected between nodes N1 and N4. This direct electrical connection of the variable capacitor C25 between nodes N1 and N4 introduces positive feedback between the inverting input terminal (-) and the inverting output terminal (-) of amplifier AMP21. As a result of this positive feedback, the variable capacitor C25 can be a dynamically adjustable negative Miller capacitor. Due to the Miller effect, the variable capacitor C25 can induce a small negative capacitance in parallel with the lumped capacitor C21, and also induce a large negative capacitance in parallel with the output filter capacitor C22.

[0044] In the example of Figure 2, the variable capacitor C26 is directly electrically connected between nodes N2 and N4. This direct electrical connection of the variable capacitor C26 between nodes N2 and N4 introduces negative feedback between the non-inverting input terminal (+) and the inverting output terminal (-) of amplifier AMP21. As a result of this negative feedback, the variable capacitor C26 can be a dynamically adjustable positive Miller capacitor. Due to the Miller effect, the variable capacitor C26 can induce a large positive capacitance in parallel with the lumped capacitance C21, and also induce a small positive capacitance in parallel with the output filter capacitor C22.

[0045] The lumped capacitance C21 affects the peaking amount but not the peaking frequency. The variable capacitance added to the lumped capacitance C21 due to the dynamically adjusted Miller capacitances C23, C24, C26, and C25 can cause adjustments to the peaking amount. Therefore, the dynamically adjusted Miller capacitances C23, C24, C26, and C25 allow for precise adjustment of the peaking amount without changing the peaking frequency or with minimal impact.

[0046] Turning to Figure 3, an exemplary configuration of variable capacitors C23, C24, C26, and C25 is shown.

[0047] The variable capacitor C23 may comprise capacitors C23(1) to C23(N) and switches S23(1) to S23(N), where “N” is an integer greater than 1. In some embodiments, “N” may be an integer value different from “S” and different from “T”. In other embodiments, “N”, “S”, and “T” may all be the same integer value. Any one of capacitors C23(1) to C23(N) may be individually referred to as “capacitor C23(i)”. Any one of switches S23(1) to S23(N) may be individually referred to as “switch S23(i)”. Switch S23(i) is connected in series with capacitor C23(i). In some configurations, the capacitance of one of capacitors C23(1) to C23(N) may be different from the capacitance of another capacitor C23(1) to C23(N). In other configurations, each of capacitors C23(1) to C23(N) may have the same capacitance.

[0048] The control signal 131 from the signal processor 130 can independently manage the conductive and non-conductive states of switches S23(1) to S23(N). Since they are independently controllable, switches S23(1) to S23(N) can be operated individually. The control signal 131 from the signal processor 130 can cause switches S23(1) to S23(N) to open and close. In response to the closing of switch S23(i), switch S23(i) becomes conductive, causing current to flow through the corresponding capacitor C23(i) between nodes N1 and N3. In Figure 3, it is illustrated that switch S23(1) corresponds to capacitor C23(1), switch S23(2) corresponds to capacitor C23(2), and switch S23(N) corresponds to capacitor C23(N). In response to the opening of switch S23(i), switch S23(i) becomes non-conductive, and the current is suppressed from flowing between nodes N1 and N3 via the corresponding capacitor C23(i). Although in some cases two or more of switches S23(1) to S23(N) may become conductive simultaneously, at least one of switches S23(1) to S23(N) is conductive during each case. In cases where the electronic circuit 110 converts the input signal into a differential signal, the opening and closing of switches S23(1) to S23(N) can adjust the capacitance value of the variable capacitor C23.

[0049] The variable capacitor C24 may comprise capacitors C24(1) to C24(J) and switches S24(1) to S24(J), where “J” is an integer greater than 1. In some embodiments, “J” may be an integer value different from “N”, different from “S”, and different from “T”. In other embodiments, “J”, “N”, “S”, and “T” may all be the same integer value. Any one of capacitors C24(1) to C24(J) may be individually referred to as “capacitor C24(i)”. Any one of switches S24(1) to S24(J) may be individually referred to as “switch S24(i)”. Switch S24(i) is connected in series with capacitor C24(i). In some configurations, the capacitance of one of capacitors C24(1) to C24(J) may be different from the capacitance of another capacitor C24(1) to C24(J). In other configurations, each of capacitors C24(1) to C24(J) may have the same capacitance.

[0050] The control signal 131 from the signal processor 130 can independently manage the conductive and non-conductive states of switches S24(1) to S24(J). Since they are independently controllable, switches S24(1) to S24(J) can operate individually. The control signal 131 from the signal processor 130 can cause switches S24(1) to S24(J) to open and close. In response to the closing of switch S24(i), switch S24(i) becomes conductive, causing current to flow through the corresponding capacitor C24(i) between nodes N1 and N3. In Figure 3, it is illustrated that switch S24(1) corresponds to capacitor C24(1), switch S24(2) corresponds to capacitor C24(2), and switch S24(J) corresponds to capacitor C24(J). In response to the opening of switch S24(i), switch S24(i) becomes non-conductive, and the current is suppressed from flowing between nodes N1 and N3 via the corresponding capacitor C24(i). Although in some cases, two or more of switches S24(1) to S24(J) may become conductive simultaneously, at least one of switches S24(1) to S24(J) is conductive during each case. In cases where the electronic circuit 110 converts the input signal into a differential signal, the opening and closing of switches S24(1) to S24(J) can adjust the capacitance value of the variable capacitor C24.

[0051] The variable capacitor C26 may include capacitors C26(1) to C26(X) and switches S26(1) to S26(X), where “X” is an integer greater than 1. In some embodiments, “X” may be an integer value different from “J”, different from “N”, different from “S”, and different from “T”. In other embodiments, “X”, “J”, “N”, “S”, and “T” may all be the same integer value. Any one of the capacitors C26(1) to C26(X) may be individually referred to as “capacitor C26(i)”. Any one of the switches S26(1) to S26(X) may be individually referred to as “switch S26(i)”. Switch S26(i) is connected in series with capacitor C26(i). In some configurations, the capacitance of one of the capacitors C26(1) to C26(X) may be different from the capacitance of the other capacitors C26(1) to C26(X). In other configurations, each of capacitors C26(1) to C26(X) may have the same capacitance.

[0052] The control signal 131 from the signal processor 130 can independently manage the conductive and non-conductive states of switches S26(1) to S26(X). Since they are independently controllable, switches S26(1) to S26(X) can operate individually. The control signal 131 from the signal processor 130 can cause switches S26(1) to S26(X) to open and close. In response to the closing of switch S26(i), switch S26(i) becomes conductive, causing current to flow through the corresponding capacitor C26(i) between nodes N2 and N4. In Figure 3, it is illustrated that switch S26(1) corresponds to capacitor C26(1), switch S26(2) corresponds to capacitor C26(2), and switch S26(X) corresponds to capacitor C26(X). In response to the opening of switch S26(i), switch S26(i) becomes non-conductive, and the current is suppressed from flowing between nodes N2 and N4 via the corresponding capacitor C26(i). Although in some cases two or more of switches S26(1) to S26(X) may become conductive simultaneously, in each case at least one of switches S26(1) to S26(X) is conductive. In cases where the electronic circuit 110 converts the input signal into a differential signal, the opening and closing of switches S26(1) to S26(X) can adjust the capacitance value of the variable capacitor C26.

[0053] The variable capacitor C25 may include capacitors C25(1) to C25(Y) and switches S25(1) to S25(Y), where “Y” is an integer greater than 1. In some embodiments, “Y” may be an integer value different from “X”, different from “J”, different from “N”, different from “S”, and different from “T”. In other embodiments, “X”, “Y”, “J”, “N”, “S”, and “T” may all be the same integer value. Any one of capacitors C25(1) to C25(Y) may be individually referred to as “capacitor C25(i)”. Any one of switches S25(1) to S25(Y) may be individually referred to as “switch S25(i)”. Switch S25(i) is connected in series with capacitor C25(i). In some configurations, the capacitance of one of capacitors C25(1) to C25(Y) may be different from the capacitance of the other capacitors C25(1) to C25(Y). In other configurations, each of capacitors C25(1) to C25(Y) may have the same capacitance.

[0054] The control signal 131 from the signal processor 130 can independently manage the conductive and non-conductive states of switches S25(1) to S25(Y). Since they are independently controllable, switches S25(1) to S25(Y) can operate individually. The control signal 131 from the signal processor 130 can cause switches S25(1) to S25(Y) to open and close. In response to the closing of switch S25(i), switch S25(i) becomes conductive, causing current to flow through the corresponding capacitor C25(i) between nodes N2 and N4. In Figure 3, it is illustrated that switch S25(1) corresponds to capacitor C25(1), switch S25(2) corresponds to capacitor C25(2), and switch S25(Y) corresponds to capacitor C25(Y). In response to the opening of switch S25(i), switch S25(i) becomes non-conductive, and suppresses current flow through the corresponding capacitor C25(i) between nodes N2 and N4. Although in some cases two or more of switches S25(1) to S25(Y) may become conductive simultaneously, at least one of switches S25(1) to S25(Y) is conductive during each case. In cases where electronic circuit 110 converts the input signal into a differential signal, the opening and closing of switches S25(1) to S25(Y) can adjust the capacitance value of variable capacitor C25.

[0055] As illustrated in the example of Figure 2, the inductor network 113 may include inductors L21 to L26. Inductor L21 is directly electrically connected between nodes N5 and N7. Inductor L22 is directly electrically connected between nodes N3 and N7. Inductor L25 is directly electrically connected between node N7 and load 120. Inductor L23 is directly electrically connected between nodes N4 and N8. Inductor L26 is directly electrically connected between node N8 and load 120. Inductor L24 is directly electrically connected between nodes N6 and N8. In some configurations, the inductance of one of the inductors L21 to L26 may be different from the inductance of the other inductors L21 to L26. In other configurations, each of the inductors L21 to L26 may have the same inductance.

[0056] Mutually coupled inductors are two or more inductors that are very close to each other. Inductive coupling between inductors is a result of mutual inductance, which occurs when a change in the current in one inductor produces a changing magnetic flux, connecting one inductor to another. As illustrated in the example of Figure 2, a pair of mutually coupled inductors may include inductors L21 and L22. As mutually coupled inductors, the magnetic field generated by the current flowing through one of inductors L21 and L22 can induce a voltage in the other of inductors L21 and L22. Another pair of mutually coupled inductors may include inductors L23 and L24. Similarly, the magnetic field generated by the current flowing through one of inductors L23 and L24 can induce a voltage in the other of inductors L23 and L24.

[0057] Mutual inductance can be calculated using the following formula:

[0058]

[0059] in,

[0060] “M” stands for mutual induction.

[0061] “k” is the coupling coefficient.

[0062] "L1" is the inductance of the first inductor, and

[0063] "L2" is the inductance of the second inductor.

[0064] The coupling coefficient (k) indicates the coupling strength between the first and second inductors. Specifically, the coupling coefficient (k) is an indicator that quantifies how much of the magnetic flux from one inductor can be coupled to the other. The coupling coefficient (k) (which is a dimensionless value) ranges from "0" (indicating no coupling) to "1" (indicating full coupling). Full coupling occurs when the magnetic field generated by one inductor is completely coupled to the other inductor, resulting in 100% flux transfer between the two inductors. 100% flux transfer can occur between the two inductors when all the magnetic energy generated by the current in one inductor is transferred to the other inductor. Figure 2 illustrates the coupling coefficient (k1) between inductors L21 and L22 and the coupling coefficient (k2) between inductors L23 and L24.

[0065] Intercoupled inductors L21 and L22 may each include a polarity point, which indicates the relative polarity of the voltages induced in inductors L21 and L22. Figure 2 depicts the polarity points adjacent to inductors L21 to L22. As illustrated, the terminal of inductor L21 connected to node N7 is precisely associated with the polarity point of inductor L21. The terminal of inductor L22 connected to node N3 is precisely associated with the polarity point of inductor L22. The polarity point indicates the relative polarity of the mutual inductance between the windings of inductors L21 to L22. For example, when current flows in the windings of inductors L21 to L22, the voltage induced at the point of inductor L21 will have the opposite polarity to the voltage at the point of inductor L22.

[0066] Mutually coupled inductors L23 and L24 may each include a polarity point, which indicates the relative polarity of the voltages induced in inductors L23 and L24. Figure 2 depicts the polarity points adjacent to inductors L23 to L24. As illustrated, the terminal of inductor L23 connected to node N4 is precisely associated with the polarity point of inductor L23. The terminal of inductor L24 connected to node N8 is precisely associated with the polarity point of inductor L24. The polarity point indicates the relative polarity of the mutual inductance between the windings of inductors L23 to L24. For example, when current flows in the windings of inductors L23 to L24, the voltage induced at the point of inductor L23 will have the opposite polarity to the voltage at the point of inductor L24.

[0067] Variable resistors R23 and R24 can each be dynamically adjustable, as explained in detail previously. Because they are dynamically adjustable, variable resistors R23 and R24 can individually adjust the resistance in electronic circuit 110. For example, variable resistor R23 can adjust any resistance that happens to exist between nodes N3 and N5. Variable resistor R24 ​​can adjust any resistance that happens to exist between nodes N4 and N6. When variable resistors R23 and R24 adjust the resistance in electronic circuit 110, they can also individually adjust the quality factor (Q factor) of electronic circuit 110. The Q factor quantifies the sharpness or selectivity of the resonance in electronic circuit 110.

[0068] When adjusting the quality factor (Q factor) of electronic circuit 110, variable resistors R23 and R24 can individually adjust the effectiveness of inductors L21 to L24, thereby reducing the Q factor of electronic circuit 110. Reducing the Q factor of electronic circuit 110 leads to a decrease in the selectivity of electronic circuit 110, widens the bandwidth of electronic circuit 110, and consequently reduces the peaking at the peaking frequency.

[0069] Variable resistors R23 and R24 allow for precise tuning of the peaking frequency. Variable capacitors C23, C24, C26, and C25 allow for precise adjustment of the peaking amount without changing or minimally affecting the peaking frequency. This dynamic adjustment of the peaking amount and the precision of the dynamic tuning of the peaking frequency is an improvement that ensures excellent frequency response of the electronic circuit 110 across different communication channels, speeds, and coding schemes.

[0070] Those skilled in the art will also recognize that the arrangement or interconnection of components, such as “coupled,” “connected,” “up,” “down,” or similar terms, allows for indirect connections or intermediary components or layers.

[0071] Certain operations of the methods according to this technology, or certain operations of the systems performing those methods, may be schematically represented in the figures or otherwise discussed herein. Unless otherwise specified or limited, representing particular operations in a particular spatial order in the figures may not necessarily require those operations to be performed in a specific order corresponding to that spatial order. Accordingly, certain operations represented in the figures or otherwise disclosed herein may be performed in a different order than explicitly stated or described, as appropriate for a particular instance of this technology. Furthermore, in some instances, certain operations may be performed in parallel or partially in parallel, including by dedicated parallel processing devices or separate computing devices configured to interoperate as part of a large system.

[0072] As used herein, unless otherwise limited or defined, "or" indicates a non-exclusive list of components or operations that may exist in any various combinations, rather than an exclusive list of components that may exist only as substitutes for each other. For example, a list of "A, B, or C" indicates the following options: A; B; C; A and B; A and C; B and C; and A, B, and C.

[0073] Accordingly, the term “or” as used herein is intended to indicate an exclusive alternative only when preceded by an exclusive term (for example, “any one,” “only one,” or “exact one”). Furthermore, a list beginning with “one or more” (and its variations) and containing “or” to separate the listed elements indicates an option for one or more of any or all of the listed elements.

[0074] For example, the phrases “one or more of A, B or C” and “at least one of A, B or C” indicate the following options: one or more A; one or more B; one or more C; one or more A and one or more B; one or more B and one or more C; one or more A and one or more C; and one or more of each of A, B and C.

[0075] Similarly, a list beginning with "multiple" (and its variations) and containing "or" to separate the listed elements indicates an option for multiple examples of any or all of the listed elements. For example, the phrases "multiple of A, B, or C" and "two or more of A, B, or C" indicate the following options: A and B; B and C; A and C; and A, B, and C.

[0076] Generally, the term “or” as used herein indicates an exclusive alternative (e.g., “one or the other, but not both”) only when preceded by an exclusive term (e.g., “either one or the other, but not both”).

[0077] Any mark mentioned herein may be a common law or registered trademark of a third party, whether associated with or not with the applicant or assignee. The use of these marks is by way of example and should not be construed as descriptive or limiting the scope of the disclosed or claimed embodiments to material associated only with such marks.

[0078] The articles “a,” “one,” and “the” are also intended to include plural forms unless the context clearly indicates otherwise.

[0079] The terms “comprising,” “including,” and “having” specify the presence of the stated features, number, operation, component, element, and / or combination thereof, but do not exclude the presence or addition of one or more other features, number, operation, component, element, and / or combination thereof.

[0080] Throughout the application, ordinal numbers (e.g., first, second, third, etc.) may be used as adjectives for elements (i.e., any noun in the application).

[0081] Although terms such as “first,” “second,” and “third” may be used in this document to describe various parts, components, regions, layers, or sections, these parts, components, regions, layers, or sections are not limited by these terms.

[0082] More precisely, these terms are used only to distinguish one part, component, area, layer, or section from another part, component, area, layer, or section.

[0083] The use of ordinal numbers does not imply or create any particular order of elements, nor does it limit any element to a single element, unless explicitly stated otherwise, such as by using the terms “before,” “after,” “single,” and other such terms.

[0084] More precisely, ordinal numbers are used to distinguish components.

[0085] By way of example, the first element is different from the second element, and the first element may encompass more than one element and is located after (or before) the second element in the element order.

[0086] Therefore, the first part, component, region, layer or section mentioned in the examples described herein may also be referred to as the second part, component, region, layer or section without departing from the teachings of the examples.

Claims

1. An electronic circuit comprising: Amplifier The amplifier is configured to receive input signals across the amplifier's inverting input terminal and the amplifier's non-inverting input terminal; A first variable capacitor is directly electrically connected to the output terminal of the amplifier and the inverting input terminal of the amplifier; and a second variable capacitor, the second variable capacitor being directly electrically connected to the output terminal and the non-inverting input terminal of the amplifier.

2. The electronic circuit according to claim 1, wherein the first variable capacitor comprises a plurality of capacitors.

3. The electronic circuit according to claim 1, wherein the second variable capacitor comprises a plurality of capacitors.

4. The electronic circuit according to claim 1, wherein the output terminal of the amplifier is the non-inverting output terminal of the amplifier.

5. The electronic circuit according to claim 1, wherein the output terminal of the amplifier is the inverting output terminal of the amplifier.

6. The electronic circuit of claim 1, wherein the first variable capacitor is electrically connected between the output terminal of the amplifier and the inverting input terminal of the amplifier.

7. The electronic circuit of claim 1, wherein the second variable capacitor is electrically connected between the output terminal of the amplifier and the non-inverting input terminal of the amplifier.

8. The electronic circuit of claim 1, wherein the amplifier is configured to output an amplified signal to the output terminal of the amplifier in response to amplifying the input signal.

9. The electronic circuit of claim 8, wherein the amplifier is configured to convert the input signal into the amplified signal by amplifying the input signal.

10. The electronic circuit according to claim 1, further comprising: A first inductor is directly electrically connected to the output terminal of the amplifier.

11. The electronic circuit according to claim 10, further comprising: The second inductor is directly electrically connected to the variable resistor and the first inductor.

12. The electronic circuit of claim 11, wherein a pair of mutually coupled inductors comprises the first inductor and the second inductor.

13. The electronic circuit according to claim 11, further comprising: The variable resistor is directly electrically connected to the output terminal of the amplifier.

14. The electronic circuit of claim 13, wherein the variable resistor comprises a plurality of variable resistors.

15. The electronic circuit according to claim 13, further comprising: A feedback resistor is directly electrically connected to the variable resistor and the non-inverting input terminal of the amplifier.

16. The electronic circuit according to claim 1, further comprising: A capacitor, which is directly electrically connected to the non-inverting input terminal and the inverting input terminal of the amplifier.

17. The electronic circuit of claim 16, wherein the capacitor is directly electrically connected across the inverting input terminal and the non-inverting input terminal of the amplifier.

18. An apparatus comprising: A load configured to receive a differential voltage; and electronic circuitry, wherein the electronic circuitry includes: an amplifier configured to receive an input signal across an inverting input terminal and a non-inverting input terminal of the amplifier; a first variable capacitor directly electrically connected to an output terminal and the inverting input terminal of the amplifier; and a second variable capacitor directly electrically connected to the output terminal and the non-inverting input terminal of the amplifier; wherein the amplifier is configured to convert the input signal into the differential voltage by amplifying the input signal.

19. The apparatus of claim 18, wherein the integrated circuit includes the electronic circuit.

20. A system comprising: Input source, The input source is configured to output an input signal; An electronic circuit, wherein the electronic circuit includes: an amplifier configured to receive the input signal across an inverting input terminal and a non-inverting input terminal of the amplifier; a first variable capacitor directly electrically connected to an output terminal and the inverting input terminal of the amplifier; and a second variable capacitor directly electrically connected to the output terminal and the non-inverting input terminal of the amplifier.

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