Double-layer substrate device with sandwich structure and manufacturing method thereof

Abstract

The invention provides a double-layer substrate device with a sandwich structure and a manufacturing method thereof, the double-layer substrate device comprises a first substrate with a first substrate layer and a second component layer and a second substrate with a third conducting layer and a fourth heat dissipation layer, and the double-layer substrate device is technically characterized in that the second component layer and the third conducting layer are respectively provided with a plurality of opening areas; the upper substrate and the lower substrate are oppositely stacked to form a sandwich structure, the upper substrate and the lower substrate are aligned through the hole opening area, and the chip unit and the connecting wire unit are arranged to be electrically connected with each other, so that the electric signal conduction between the upper substrate and the lower substrate can be realized without using a traditional pressing technology and a drilling electroplating procedure in the manufacturing process; the manufacturing process is effectively simplified, and the drilling yield problem is avoided.

Description

A double-layer substrate device with a sandwich structure and its manufacturing method Technical Field

[0001] This case relates to a double-layer substrate device with a sandwich structure and a method for manufacturing the same, particularly a double-layer substrate device with a sandwich structure that can be completed by using a simple stacked sandwich structure without the need for lamination technology and drilling electroplating process. Background Technology

[0002] In embedded substrate manufacturing, double-layer substrate manufacturing, or laminated substrate manufacturing, the circuit connections and electrical conduction paths between substrate layers are crucial process steps and planning. Currently known technologies typically use vias as conduction paths, especially laser drilling, mechanical drilling, or semiconductor chemical etching. Subsequently, soldering, electroplating, or chemical coating are used to plan conductive wires or circuits. However, in the semiconductor manufacturing or substrate manufacturing industry, a large amount of manpower and resources must be invested in inspection and process correction to address issues such as missing drill holes or inconsistencies in subsequent electroplating or chemical etching.

[0003] As is known in the Taiwanese patent "TWI862215" regarding a chip packaging structure and its fabrication method, a chip packaging structure includes a first chip, a second chip, multiple first hybrid bonding pads, a first insulating layer, a first patterned conductive layer, a second patterned conductive layer, multiple first conductive via structures, and multiple second conductive via structures. The first chip is electrically connected to the second chip through a first through-silicon via. The first chip is bonded to the second chip through the first hybrid bonding pads. The first insulating layer covers both the first chip and the second chip. The first patterned conductive layer and the second patterned conductive layer are respectively disposed on a first upper surface and a first lower surface of the first insulating layer. The first conductive via structures electrically connect the first patterned conductive layer and the second patterned conductive layer. The second conductive via structures electrically connect the first chip and the first patterned conductive layer. This known patent technology requires conductive via structures for the conductive connection between the upper and lower chips.

[0004] As is known in the Taiwan patent "TWI704628" regarding semiconductor component packaging structure and method, this invention provides a semiconductor component packaging structure comprising: a first and a second semiconductor component, each having a first electrode and a second electrode, respectively disposed on the top and bottom surfaces of the semiconductor component; a first substrate, wherein the two semiconductor components are connected to the first substrate by the second electrode of the first semiconductor component and the first electrode of the second semiconductor component; a second substrate and a third substrate, respectively connecting the first electrode of the first semiconductor component and the second electrode of the second semiconductor component; wherein the outer surfaces of the second substrate and the third substrate are substantially located on the same plane; and an insulator filling the space between the first substrate and the second and third substrates. The polarities of the first electrode and the second electrode can be the same or different. The known patent technology still requires a drilled conductive post structure for the conductive connection between the upper and lower substrates.

[0005] As is known in Taiwan Patent "TWI874812" regarding the manufacturing method of a chip packaging structure with an electromagnetic interference shielding layer and a grounding wire, this invention provides a chip packaging structure with an electromagnetic interference shielding layer and a grounding wire, and its manufacturing method. The chip packaging structure includes a chip packaging unit, at least one electromagnetic interference shielding layer, and at least one grounding wire. Each grounding wire is disposed through a first insulating layer of the electromagnetic interference shielding layer and the chip packaging unit. Each grounding wire has a first end and an opposite second end. The first end of each grounding wire is electrically connected to the electromagnetic interference shielding layer, and the second end of each grounding wire is electrically connected to at least one ground terminal of at least one first circuit layer of the chip packaging unit. This is to prevent the generation of static electricity, effectively solving the problem that static electricity prevents the electronic system operating the semiconductor chip from functioning properly, thereby increasing the product's market competitiveness. The known patent technology still requires a drilled conductive wire structure for conductive connection between the upper and lower circuit layers.

[0006] The aforementioned known technologies and previous patents all require lamination technology and drilling electroplating processes. In view of the above shortcomings, the inventor felt that they were not perfect, so he devoted his efforts to researching and overcoming them. Based on his years of experience in this industry, he developed a double-layer substrate device with a sandwich structure. Using a simple stacked sandwich structure, the structure and manufacturing method of the double-layer substrate device in this case can complete a double-layer substrate device with a sandwich structure without using lamination technology on the upper and lower substrates and without drilling electroplating processes. Summary of the Invention

[0007] The purpose of this invention is to provide a double-layer substrate device structure and manufacturing process with a sandwich structure, which can achieve the function of electrically connecting the upper and lower substrates without using lamination technology and without drilling and electroplating processes.

[0008] In view of this, the present invention proposes a double-layer substrate device with a sandwich structure, comprising: a first substrate having a first base layer and a second component layer, wherein the second component layer has a plurality of first opening regions; a second substrate stacked on one side of the first substrate, wherein the second substrate has a third conductive layer and a fourth heat dissipation layer, wherein the third conductive layer has a plurality of second opening regions; and wherein one side of the first substrate is the second component layer, which is stacked opposite to the third conductive layer of the second substrate to form a sandwich structure; the third conductive layer is further electrically connected to the first base layer; and the second component layer having a plurality of first opening regions and the third conductive layer having a plurality of second opening regions are further stacked and aligned to form a double-layer substrate device with a sandwich structure.

[0009] The aforementioned double-layer substrate device with a sandwich structure further includes a plurality of chip units and interconnect units.

[0010] As described above, in a double-layer substrate device with a sandwich structure, the plurality of chip units and the connecting line units are electrically connected to the first base layer, the second component layer and the third conductive layer through a conductive adhesive material, which is selected from solder paste or silver paste.

[0011] As described above, in a double-layer substrate device with a sandwich structure, the connecting line unit is made of solder, metal wire, copper wire, or gold wire.

[0012] As described above, in a double-layer substrate device with a sandwich structure, the sandwich structure is further filled with an encapsulating material, which is a plastic material.

[0013] As described above, in a double-layer substrate device with a sandwich structure, the fourth heat dissipation layer is made of copper foil, copper substrate, or metal heat dissipation material.

[0014] As described above, in a double-layer substrate device with a sandwich structure, the chip unit is a vertical diode chip, a rectifier chip, a power chip, or a diode chip.

[0015] This invention proposes a method for manufacturing a double-layer substrate device with a sandwich structure, comprising: providing a first substrate having a first base layer and a second component layer, wherein the second component layer has a plurality of first opening regions; subsequently stacking a second substrate, which is stacked on one side of the first substrate, wherein the second substrate has a third conductive layer and a fourth heat dissipation layer, wherein the third conductive layer has a plurality of second opening regions; and wherein one side of the first substrate is the second component layer, which is stacked opposite to the third conductive layer of the second substrate to form a sandwich structure, wherein the third conductive layer is further electrically connected to the first base layer, wherein the second component layer having a plurality of first opening regions and the third conductive layer having a plurality of second opening regions are further stacked and aligned to form a double-layer substrate device with a sandwich structure.

[0016] The above-described method for manufacturing a double-layer substrate device with a sandwich structure further includes a plurality of chip units and interconnect units.

[0017] In the above-described method for manufacturing a double-layer substrate device with a sandwich structure, the plurality of chip units and the connecting line units are electrically connected to the first base layer, the second component layer and the third conductive layer through a conductive adhesive material, which is selected from solder paste or silver paste.

[0018] As described above, in the method for manufacturing a double-layer substrate device with a sandwich structure, the sandwich structure is further filled with an encapsulating material, which is a plastic material.

[0019] This invention discloses a method for manufacturing a double-layer substrate device with a sandwich structure, comprising: setting a first substrate having a first base layer and a second component layer, wherein the second component layer has a plurality of first opening regions; wherein the plurality of first opening regions further have a plurality of chip units and interconnection units disposed between the first base layer and the second component layer; subsequently cutting the first substrate into a plurality of first small block substrates; and placing a second substrate, wherein the plurality of first small block substrates are placed on the second substrate, wherein the second substrate is... The device has a third conductive layer and a fourth heat dissipation layer, wherein the third conductive layer is provided with a plurality of second opening areas; and wherein one side of the plurality of first small block substrates is a second component layer, which is stacked opposite to the third conductive layer of the second substrate to form a sandwich structure, wherein the third conductive layer is further electrically connected to the chip unit and the interconnection unit, wherein the second component layer having a plurality of first opening areas and the third conductive layer having a plurality of second opening areas are further stacked and aligned to form a double-layer substrate device with a sandwich structure.

[0020] In the above-described method for manufacturing a double-layer substrate device with a sandwich structure, the plurality of chip units and the connecting line units are electrically connected to the first base layer, the second component layer and the third conductive layer through a conductive adhesive material, which is selected from solder paste or silver paste.

[0021] As described above, in the method for manufacturing a double-layer substrate device with a sandwich structure, the sandwich structure is further filled with an encapsulating material, which is a plastic material.

[0022] The above-described method for manufacturing a double-layer substrate device with a sandwich structure further includes a baking step to heat-set the encapsulating material.

[0023] As described above, the method for manufacturing a double-layer substrate device with a sandwich structure further includes, after the baking step, a cutting operation and a packaging process for the sandwich structure. Attached Figure Description

[0024] Figure 1 is a side view of a first specific embodiment of a double-layer substrate device with a sandwich structure according to the present invention.

[0025] Figure 2 is a side view of the first substrate of a double-layer substrate device with a sandwich structure according to the method of the present invention.

[0026] Figures 3(A) and 3(B) are top views of the first substrate disassembled in a double-layer substrate device with a sandwich structure according to the method of the present invention.

[0027] Figure 4 is a side view of the first substrate of a double-layer substrate device with a sandwich structure according to the method of the present invention.

[0028] Figure 5 is a side view of the first substrate cut of a double-layer substrate device with a sandwich structure according to the method of the present invention.

[0029] Figure 6 is a side view of the second substrate of the double-layer substrate device with a sandwich structure according to the method of the present invention.

[0030] Figures 7(A) and 7(B) are top views of the disassembled second substrate of a double-layer substrate device with a sandwich structure according to the method of the present invention.

[0031] Figure 8 is a side view of an embodiment of the double-layer substrate device with a sandwich structure according to the method of the present invention.

[0032] Figure 9 is a side view of an embodiment of the sandwich structure filling and encapsulation of a double-layer substrate device with a sandwich structure according to the method of the present invention.

[0033] Figure 10 is a cut side view of a double-layer substrate device with a sandwich structure according to the method of the present invention. Detailed Implementation

[0034] To make it easier to understand the technical content, purpose and advantages of the present invention, the embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.

[0035] Figure 1 is a side view of a first specific embodiment of the double-layer substrate device with a sandwich structure according to the present invention. The double-layer substrate device 1000 with a sandwich structure according to the present invention includes: a first substrate 100 having a first base layer 10 and a second component layer 20; an adhesive layer 11 on the first base layer 10, the adhesive layer 11 being between the first base layer 10 and the second component layer 20; the second substrate 200 having a third conductive layer 30 and a fourth heat dissipation layer 40; and a third conductive layer 30 and a fourth heat dissipation layer 40 being separated from the third conductive layer 30 and the fourth heat dissipation layer 40 by another layer. The adhesive layer 31 and the fourth heat dissipation layer 40 have another protective layer 41. The second component layer 20 is provided with a plurality of first opening areas (not shown). The plurality of first opening areas are further provided with a plurality of chip unit areas (12, 32), chip units 22 and connecting line units 13 between the first base layer 10 and the second component layer 20. Continuing from the above embodiment, the first base layer 10 is further provided with a protective layer 14 and an external contact portion 15. The second substrate 200 has a third conductive layer 30 and a fourth conductive layer 41. A heat dissipation layer 40 is provided, wherein the third conductive layer is further provided with a plurality of second opening areas (not shown) and is stacked with the second component layer 20 on one side of the first substrate 100 and the third conductive layer 30 of the second substrate 200 to form a sandwich structure 21. The third conductive layer 30 is further electrically connected to the chip unit 22 and the connection line unit 13. The second component layer 20 having a plurality of first opening areas and the third conductive layer having a plurality of second opening areas are further stacked and aligned. In the sandwich structure 21, the third conductive layer 30 is further provided with a plurality of second opening areas (not shown) and the third conductive layer 30 has a plurality of second opening areas (not shown). The encapsulating material 50 is filled with a non-conductive epoxy, filler material, or filler plastic material, etc., and then baked to form a double-layer substrate device with a sandwich structure. The chip unit 22 is a vertical diode chip, rectifier chip, power chip, or diode chip. The connecting line unit 13 is made of solder, metal wire, copper wire, or gold wire. The sandwich structure 21 is baked and encapsulated by baking the non-conductive epoxy, filler material, or filler plastic material.

[0036] A method for manufacturing a sandwich-structured double-layer substrate device, wherein the process includes the following steps: The first step of the process is shown in Figure 2, which is a side view of the first substrate 100 of the sandwich-structured double-layer substrate device of the present invention. The first substrate 100 has a first base layer 10 and a second component layer 20. As shown in Figure 2, an adhesive layer 11 is provided on the first base layer 10, and the adhesive layer 11 is located between the first base layer 10 and the second component layer 20. The second component layer 20... The first substrate 10 has a plurality of planned chip unit areas 12, planned connection line units 13, and a plurality of first opening areas (not shown). The chip unit areas 12 and the connection line units 13 can be further made of solder paste, silver paste, or solder. As shown in Figure 2, the first substrate 10 also has a protective layer 14 and an external contact portion 15. The protective layer 14 is used to protect the first substrate 10, and the external contact portion 15 is used to transmit external electrical signals or conduct signals to the first substrate 10.

[0037] Continuing with the above embodiments, Figure 3 shows a disassembled top view of the first substrate 100 of the double-layer substrate device with a sandwich structure according to the present invention. The implementation method is shown in Figure 3(A) or Figure 3(B), wherein a protective layer 14 is stacked on the first base layer 10, and an adhesive layer 11 is stacked below the first base layer 10, wherein the adhesive layer 11 is between the first base layer 10 and the second component layer 20, wherein the second component layer 20 has a plurality of first opening areas 121 for each intended chip unit placement area and a plurality of first openings for each intended interconnection line area. In section 131, the first opening area 121 of the aforementioned plurality of chip unit placement areas and the first opening area 131 of the connection line unit areas are all completed by laser opening or windowing in advance when stacking the second component layer 20 and the third conductive layer 30; wherein the first opening area 121 of the chip unit area is further provided with a plurality of chip unit placement areas 12, chip units 22 and connection line units 13 between the first substrate layer 10 and the second component layer 20.

[0038] As shown in Figure 4, a side view of a double-layer substrate device with a sandwich structure according to the present invention, the first substrate 100 of this embodiment has a first base layer 10 and a second component layer 20. As shown in the figure, an adhesive layer 11 is provided on the first base layer 10, and the adhesive layer 11 is located between the first base layer 10 and the second component layer 20. The second component layer 20 has a plurality of chip unit areas 12, chip units 22 and connecting line units 13 to be placed between the first base layer 10 and the second component layer 20. The chip unit areas 12 and the connecting line units 13 can be further made of solder paste, silver paste or solder. As shown in Figure 4, the first base layer 10 also has a protective layer 14 and an external contact portion 15. The protective layer 14 is used to protect the first base layer 10, and the external contact portion 15 is used to transmit external electrical signals or conduct signals to the first base layer 10. The chip unit 22 is a vertical diode chip, rectifier chip, power chip or diode chip.

[0039] Continuing with the above process method, as shown in Figure 5, which is a side view of the first substrate of a sandwich structure double-layer substrate device, the first substrate 100 is first cut into a structure composed of a plurality of first small block substrates 101. As shown in Figure 5, cutting line A is used to cut the first substrate 100 into a plurality of first small block substrates 101.

[0040] Continuing with the above process method, as shown in Figure 6, which is a side view of the second substrate 200 of a sandwich structure double-layer substrate device, the process method of the present invention begins by stacking a second substrate 200, wherein the second substrate 200 has a third conductive layer 30 and a fourth heat dissipation layer 40, wherein there is another adhesive layer 31 between the third conductive layer 30 and the fourth heat dissipation layer 40, and the fourth heat dissipation layer 40 has another protective layer 41, wherein the third conductive layer 30 also has a plurality of intended chip unit areas 32 and interconnection line units 13.

[0041] Continuing with the process method of the above embodiments, Figure 7 shows a disassembled top view of the second substrate 200 of the double-layer substrate device with a sandwich structure according to the present invention. The implementation method is shown in Figure 7(A) or Figure 7(B), wherein a protective layer 41 is stacked under the fourth heat dissipation layer 40, and an adhesive layer 31 is stacked under the third conductive layer 30. The adhesive layer 11 is located between the third conductive layer 30 and the fourth heat dissipation layer 40. The third conductive layer 30 has a plurality of second opening areas 321 for placing chip units and a plurality of expected connection line areas. The second opening area 132, the aforementioned plurality of second opening areas 321 of the chip unit placement area and the second opening area 132 of the connection line unit area are all completed by laser opening or windowing in advance when stacking the second component layer 20 and the third conductive layer 30; wherein the second opening area 321 of the chip unit area is further provided with a plurality of chip unit areas 32, chip units 22 and connection line units 13 between the third conductive layer 30 and the fourth heat dissipation layer.

[0042] Figure 8 shows a side view of an embodiment of a double-layer substrate device with a sandwich structure according to one of the methods of the present invention. Continuing with the manufacturing process of the above embodiment, the process steps are as follows: First, the structure composed of a plurality of first small block substrates 101 cut from the first substrate 100 in Figure 5 is placed on the second substrate 200. The third conductive layer 30 on the second substrate 200 is provided with a plurality of second opening areas, and one side of the plurality of first small block substrates 101 is a second component layer 20. It is stacked together with the third conductive layer 30 of the second substrate 200 to form a sandwich structure 21. The third conductive layer 30 is further connected to the chip unit area 32 to which the chip unit is to be placed. 22 is electrically connected to the connection unit 13, wherein the connection unit 13 is solder paste, silver paste, or solder. In the above method, the first base layer 10, the second component layer 20, and the third conductive layer 30 are further electrically connected through a conductive adhesive. The conductive adhesive is selected from solder paste or silver paste, which is used to electrically connect the first base layer 10 with the second component layer 20 and with the third conductive layer 30 and to conduct electrical signals. The second component layer 20 has a plurality of first opening areas (not shown) and the third conductive layer 30 has a plurality of second opening areas (not shown), which are further stacked and aligned to form a sandwich structure double-layer substrate device 1000.

[0043] Following the process method described in the above embodiments, as shown in the side view of the sandwich structure filling and encapsulation embodiment of the double-layer substrate device with sandwich structure in FIG9 of the present invention, the sandwich structure of the double-layer substrate device with sandwich structure in FIG8 is filled, and the sandwich structure is then filled with encapsulating adhesive 50. The encapsulating adhesive 50 is a plastic material, which can be a non-conductive adhesive, a filler material, or a filler plastic material. After the filling step, a baking and shaping step of the double-layer substrate device 1000 with sandwich structure and a side encapsulation operation of the double-layer substrate device with sandwich structure are performed. After the filling is completed in the above embodiments, the entire device is baked to allow the encapsulating adhesive 50 to achieve physical shaping by heat, ensuring the mechanical strength and airtightness of the sandwich structure. Meanwhile, depending on the requirements, the sides of the double-layer substrate device are encapsulated to further isolate external moisture and noise interference, thereby improving the reliability of the components. According to the implementation method of the present invention, no known substrate lamination technology is used in the upper and lower substrate processes, and no drilling and electroplating process is required in the substrates. This also avoids problems such as drilling yield and leakage current in known technologies.

[0044] Continuing with the embodiments of this case, Figure 10 shows a side view of the cut double-layer substrate device with a sandwich structure according to the invention. First, the double-layer substrate device 1000 with a sandwich structure, which has undergone baking, shaping, and packaging processes, is cut into a plurality of small blocks of double-layer substrate device 1001. As shown by cutting line B in Figure 10, the double-layer substrate device 1000 with a sandwich structure is cut into a plurality of small blocks of double-layer substrate device 1001. According to the implementation process of this invention, from the first substrate cutting (cutting line A) to the final product cutting (cutting line B), the entire process does not require the use of known high-temperature and high-pressure substrate bonding technology, and completely eliminates the drilling and electroplating process. This not only significantly improves the process yield but also effectively avoids the leakage problems caused by missing laser drilling holes or uneven electroplating, which are common in known technologies.

[0045] Although the present invention has been disclosed with reference to the embodiments described above, it is not intended to limit the present invention. Any person skilled in the art may make some modifications and alterations without departing from the spirit and scope of the present invention, and such modifications and alterations shall be within the scope of the rights claimed by this patent. Therefore, the scope of protection of this patent shall be determined by the scope of the appended patent application.

Claims

1. A double-layer substrate device with a sandwich structure, comprising: The first substrate has a first base layer and a second component layer, wherein the second component layer has a plurality of first opening regions; The second substrate is stacked on one side of the first substrate. The second substrate has a third conductive layer and a fourth heat dissipation layer. The third conductive layer has a plurality of second opening regions. One side of the first substrate is a second component layer, which is stacked opposite to the third conductive layer of the second substrate to form a sandwich structure. The third conductive layer is further electrically connected to the first substrate layer. The second component layer has a plurality of first opening regions, and the third conductive layer has a plurality of second opening regions. They are further stacked and aligned to form a double-layer substrate device with a sandwich structure.

2. The double-layer substrate device with a sandwich structure according to claim 1, wherein the sandwich structure further comprises a plurality of chip units and interconnect units.

3. The double-layer substrate device with a sandwich structure according to claim 2, wherein the plurality of chip units and the connecting line unit are electrically connected to the first base layer, the second component layer and the third conductive layer through a conductive adhesive, wherein the conductive adhesive is selected from solder paste or silver paste.

4. The double-layer substrate device with a sandwich structure according to claim 3, wherein the material of the connecting line unit is solder, metal wire, copper wire, or gold wire.

5. The double-layer substrate device with a sandwich structure according to claim 4, wherein the sandwich structure is further filled with an encapsulating material, the encapsulating material being a plastic material.

6. The double-layer substrate device with a sandwich structure according to claim 5, wherein the fourth heat dissipation layer is made of copper foil, copper substrate, or metal heat dissipation material.

7. The double-layer substrate device with a sandwich structure according to claim 2, wherein the chip unit is a vertical diode chip, a rectifier chip, a power chip, or a diode chip.

8. A method for manufacturing a double-layer substrate device with a sandwich structure, comprising: A first substrate is provided, which has a first base layer and a second component layer, wherein the second component layer is provided with a plurality of first opening regions; A second substrate is stacked on one side of the first substrate. The second substrate has a third conductive layer and a fourth heat dissipation layer. The third conductive layer has a plurality of second opening regions. One side of the first substrate is a second component layer, which is stacked opposite to the third conductive layer of the second substrate to form a sandwich structure. The third conductive layer is further electrically connected to the first substrate layer. The second component layer with a plurality of first opening regions and the third conductive layer with a plurality of second opening regions are further stacked and aligned to form a sandwich structure double-layer substrate device.

9. The method for manufacturing a double-layer substrate device with a sandwich structure according to claim 8, wherein the sandwich structure is further provided with a plurality of chip units and interconnection units.

10. The method for manufacturing a double-layer substrate device with a sandwich structure according to claim 9, wherein the plurality of chip units and the connecting line unit are electrically connected to the first base layer, the second component layer and the third conductive layer through a conductive adhesive, wherein the conductive adhesive is selected from solder paste or silver paste.

11. The method for manufacturing a double-layer substrate device with a sandwich structure according to claim 10, wherein the sandwich structure is further filled with an encapsulating material, the encapsulating material being a plastic material.

12. A method for manufacturing a double-layer substrate device with a sandwich structure, comprising: A first substrate is provided, comprising a first base layer and a second component layer, wherein the second component layer has a plurality of first opening regions; wherein the plurality of opening regions further comprises a plurality of chip units and interconnect units between the first base layer and the second component layer; the first substrate is then cut into a plurality of first small block substrates; a second substrate is placed on which the aforementioned cut first small block substrates are placed, wherein the second substrate has a third conductive layer and a fourth heat dissipation layer, wherein the third conductive layer has a plurality of second opening regions; and wherein one side of the cut first small block substrates is the second component layer, which is stacked opposite to the third conductive layer of the second substrate to form a sandwich structure, wherein the third conductive layer is further electrically connected to the chip units and the interconnect units, wherein the second component layer having a plurality of first opening regions and the third conductive layer having a plurality of second opening regions are further stacked and aligned to form a sandwich structure double-layer substrate device.

13. The method for manufacturing a double-layer substrate device with a sandwich structure according to claim 12, wherein the plurality of chip units and the connecting line units are electrically connected to the first base layer, the second component layer and the third conductive layer through a conductive adhesive, wherein the conductive adhesive is selected from solder paste or silver paste.

14. The method for manufacturing a double-layer substrate device with a sandwich structure according to claim 12, wherein the sandwich structure is further filled with an encapsulating material, the encapsulating material being a plastic material.

15. The method for manufacturing a double-layer substrate device with a sandwich structure according to claim 14, wherein the double-layer substrate device with a sandwich structure includes a baking step for heat-setting the encapsulating adhesive.

16. The method for manufacturing a double-layer substrate device with a sandwich structure according to claim 15, further comprising, after the baking step, a cutting operation and a packaging process for the sandwich structure.

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