Integrated passive device and electronic equipment

Abstract

The integrated passive device comprises a device main body layer which comprises a substrate and a capacitor function layer located on the substrate, and the capacitor function layer comprises at least one capacitor; the first conducting layer is located on one side of the device main body layer in the first direction, the substrate is provided with a first surface facing the capacitor function layer, the first direction is perpendicular to the first surface, and the first conducting layer comprises a first connecting part and a second connecting part which are arranged at an interval; the at least one inductor is located on the side, away from the substrate, of the first conducting layer, the inductor comprises a first pole and a second pole, the first pole is electrically connected with the first connecting part, the second pole is electrically connected with the second connecting part, and the first pole of the inductor is electrically connected with the capacitor through the first connecting part.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor technology, and more particularly to an integrated passive device and electronic device. Background Technology

[0002] Integrated Passive Devices (IPD) technology uses semiconductor processes to fabricate multilayer dielectric / metal layers on the surface of a substrate (silicon, glass, quartz, ceramic, organic materials, etc.) to form circuits with passive components such as capacitors, inductors, and resistors. This technology can be used to fabricate devices such as filters, duplexers, couplers, baluns, and packaging substrates, and can be applied in fields such as radio frequency (RF) and packaging. Glass-based IPD devices offer advantages such as high precision and low cost, and can be used in the receiving or transmitting ends of RF modules. In high-frequency (sub-6GHz) scenarios, transmitting IPD devices operate at high power, resulting in large currents in the inductors and generating significant heat. Due to the relatively poor heat dissipation performance of glass, IPD devices are at risk of damage. Improving the heat dissipation performance of IPD devices is one of the key research topics for developers.

[0003] The information disclosed in this section is only for understanding the background of the inventive concept of this disclosure, and therefore may include information that does not constitute prior art. Summary of the Invention

[0004] In one aspect, an integrated passive device is provided, comprising:

[0005] The device body layer includes a substrate and a capacitor functional layer located on the substrate, wherein the capacitor functional layer includes at least one capacitor.

[0006] A first conductive layer is located on one side of the device body layer along a first direction. The substrate has a first surface facing the capacitor functional layer, and the first direction is perpendicular to the first surface. The first conductive layer includes a first connection portion and a second connection portion spaced apart.

[0007] At least one inductor is located on the side of the first conductive layer away from the substrate. The inductor includes a first pole and a second pole. The first pole is electrically connected to the first connection portion, and the second pole is electrically connected to the second connection portion. The first pole of the inductor is electrically connected to the capacitor through the first connection portion.

[0008] According to some exemplary embodiments, the first conductive layer is located on the side of the capacitor functional layer away from the substrate.

[0009] The integrated passive device further includes a first insulating layer located on the side of the first conductive layer away from the substrate; and

[0010] The first insulating layer has a first via and a second via, the first via exposing at least a portion of the first connection portion, the second via exposing at least a portion of the second connection portion, the first electrode being electrically connected to the first connection portion through the first via, and the second electrode being electrically connected to the second connection portion through the second via.

[0011] According to some exemplary embodiments, the integrated passive device further includes at least two pads located on the side of the first insulating layer away from the substrate, at least one of the pads being electrically connected to the capacitor and at least one of the pads being electrically connected to the inductor.

[0012] According to some exemplary embodiments, the first conductive layer further includes a third connecting portion and a fourth connecting portion, wherein the third connecting portion is electrically connected to the capacitor, and the fourth connecting portion is connected to the second connecting portion to form an integral structure;

[0013] The first insulating layer has a third via and a fourth via, the third via exposing at least a portion of the third connection portion, and the fourth via exposing at least a portion of the fourth connection portion;

[0014] At least two of the pads include a first pad and a second pad, the first pad being electrically connected to the third connection portion through the third via, and the second pad being electrically connected to the fourth connection portion through the fourth via.

[0015] According to some exemplary embodiments, the integrated passive device further includes a second insulating layer located between the first conductive layer and the capacitor functional layer;

[0016] The capacitor functional layer includes a first capacitor layer located on the substrate, an interlayer dielectric layer located on the side of the first capacitor layer away from the substrate, and a second capacitor layer located on the side of the interlayer dielectric layer away from the substrate. The capacitor includes a first capacitor plate located on the first capacitor layer and a second capacitor plate located on the second capacitor layer.

[0017] The first connection portion is electrically connected to the second capacitor plate through a fifth via located in the second insulating layer, and the third connection portion is electrically connected to the first capacitor plate through a sixth via located in the second insulating layer and the interlayer dielectric layer; or, the first connection portion is electrically connected to the first capacitor plate through a seventh via located in the second insulating layer and the interlayer dielectric layer, and the second connection portion is electrically connected to the second capacitor plate through an eighth via located in the second insulating layer.

[0018] According to some exemplary embodiments, the surface of the pads away from the substrate is further away from the substrate than the surface of the inductor away from the substrate.

[0019] According to some exemplary embodiments, the pad includes a support pillar and a solder cap located on the side of the support pillar away from the substrate; or,

[0020] The pad includes a metallization layer under the bump and a solder ball located on the side of the metallization layer away from the substrate.

[0021] According to some exemplary embodiments, the surface of the support pillar away from the substrate is further away from the substrate than the surface of the inductor away from the substrate.

[0022] According to some exemplary embodiments, the integrated passive device further includes at least two pads located on the side of the substrate away from the capacitor functional layer, at least one of the pads being electrically connected to the capacitor and at least one of the pads being electrically connected to the inductor.

[0023] According to some exemplary embodiments, the integrated passive device further includes a second conductive layer located on the side of the substrate away from the capacitor functional layer and a third insulating layer located on the side of the second conductive layer away from the substrate, wherein the at least two pads are located on the side of the third insulating layer away from the substrate.

[0024] The second conductive layer includes a third connection portion and a fourth connection portion, and the third insulating layer has a ninth via and a tenth via, the ninth via exposing at least a portion of the third connection portion and the tenth via exposing at least a portion of the fourth connection portion;

[0025] At least two of the pads include a first pad and a second pad, the first pad being electrically connected to the third connection portion through the ninth via, and the second pad being electrically connected to the fourth connection portion through the tenth via;

[0026] The substrate has an eleventh via and a twelfth via, the eleventh via and the twelfth via penetrating the substrate along its thickness direction; and

[0027] The eleventh via is provided with a first conductive structure, and the third connecting part is electrically connected to the capacitor through the first conductive structure. The twelfth via is provided with a second conductive structure, and the fourth conductive part is electrically connected to the second connecting part through the second conductive structure.

[0028] According to some exemplary embodiments, the first conductive layer is located on the side of the substrate away from the capacitor functional layer;

[0029] The integrated passive device further includes a first insulating layer located on the side of the first conductive layer away from the substrate, and the inductor located on the side of the first insulating layer away from the substrate; and

[0030] The first insulating layer has a first via and a second via, the first via exposing at least a portion of the first connection portion, the second via exposing at least a portion of the second connection portion, the first electrode being electrically connected to the first connection portion through the first via, and the second electrode being electrically connected to the second connection portion through the second via.

[0031] According to some exemplary embodiments, the integrated passive device further includes at least two pads located on the side of the capacitor functional layer away from the substrate, at least one of the pads being electrically connected to the capacitor and at least one of the pads being electrically connected to the inductor.

[0032] According to some exemplary embodiments, the substrate has a thirteenth via and a fourteenth via, the thirteenth via and the fourteenth via penetrating the substrate along the thickness direction of the substrate, a third conductive structure being disposed in the thirteenth via, and a fourth conductive structure being disposed in the fourteenth via; and

[0033] The first connection portion is electrically connected to the capacitor through the third conductive structure, and the second connection portion is electrically connected to at least one of the solder pads through the fourth conductive structure.

[0034] According to some exemplary embodiments, the integrated passive device further includes a second conductive layer located on the side of the capacitor functional layer away from the substrate and a third insulating layer located on the side of the second conductive layer away from the substrate, wherein the at least two pads are located on the side of the third insulating layer away from the substrate.

[0035] The second conductive layer includes a third connection portion and a fourth connection portion, and the third insulating layer has a ninth via and a tenth via, the ninth via exposing at least a portion of the third connection portion and the tenth via exposing at least a portion of the fourth connection portion;

[0036] At least two of the pads include a first pad and a second pad, the first pad being electrically connected to the third connection portion via the ninth via, and the second pad being electrically connected to the fourth connection portion via the tenth via; and

[0037] The third connection part is electrically connected to the capacitor, and the fourth connection part is electrically connected to the second connection part through the fourth conductive structure.

[0038] According to some exemplary embodiments, the capacitor functional layer includes a first capacitor layer located on the substrate, an interlayer dielectric layer located on the side of the first capacitor layer away from the substrate, and a second capacitor layer located on the side of the interlayer dielectric layer away from the substrate. The capacitor includes a first capacitor plate located on the first capacitor layer and a second capacitor plate located on the second capacitor layer.

[0039] The first connecting portion is electrically connected to the first capacitor plate through the third conductive structure, and the third connecting portion is electrically connected to the second capacitor plate; or, the first connecting portion is electrically connected to the second capacitor plate through the third conductive structure, and the third connecting portion is electrically connected to the first capacitor plate.

[0040] According to some exemplary embodiments, the pad includes a metal electrode, the material of which does not include tin.

[0041] According to some exemplary embodiments, the at least one inductor includes a ceramic inductor.

[0042] In another aspect, an electronic device is provided, comprising the integrated passive device described in any of the preceding claims. Attached Figure Description

[0043] Other objects and advantages of this disclosure will become apparent from the following description of the disclosure with reference to the accompanying drawings, and will help to provide a comprehensive understanding of the disclosure.

[0044] Figure 1 A cross-sectional view of an integrated passive device in the related art is shown schematically.

[0045] Figure 2 and Figure 3 A schematic cross-sectional view of an integrated passive device according to some embodiments of the present disclosure is shown, wherein, Figure 2 The diagram shows a cross-sectional view of the inductor before assembly. Figure 3 The diagram shows a cross-sectional view of the inductor after assembly.

[0046] Figure 4 A cross-sectional view of an integrated passive device according to some embodiments of the present disclosure is shown schematically.

[0047] Figure 5 A cross-sectional view of an integrated passive device according to some embodiments of the present disclosure is shown schematically.

[0048] Figure 6 A cross-sectional view of an integrated passive device according to some embodiments of the present disclosure is shown schematically.

[0049] Figure 7A cross-sectional view of an integrated passive device according to some embodiments of the present disclosure is shown schematically.

[0050] Figure 8 A cross-sectional view of an integrated passive device according to some embodiments of the present disclosure is shown schematically.

[0051] Figure 9 A cross-sectional view of an integrated passive device according to some embodiments of the present disclosure is shown schematically.

[0052] It should be noted that, for clarity, the dimensions of layers, structures, or regions in the accompanying drawings used to describe embodiments of this disclosure may be enlarged or reduced; that is, these drawings are not drawn to actual scale. Detailed Implementation

[0053] In the following description, numerous specific details are set forth for illustrative purposes to provide a comprehensive understanding of various exemplary embodiments. However, it will be apparent that various exemplary embodiments may be implemented without these specific details or with one or more equivalent arrangements. In other instances, well-known structures and apparatuses are shown in block diagram form to avoid unnecessarily obscuring the various exemplary embodiments. Furthermore, the various exemplary embodiments may be different, but not necessarily exclusive. For example, specific shapes, configurations, and characteristics of exemplary embodiments may be used or implemented in another exemplary embodiment without departing from the inventive concept.

[0054] In the accompanying drawings, the dimensions and relative dimensions of the elements may be enlarged for clarity and / or descriptive purposes. Thus, the dimensions and relative dimensions of the individual elements are not necessarily limited to those shown in the drawings. When exemplary embodiments can be implemented differently, the specific process sequence may be performed differently than the order described. For example, two consecutively described processes may be performed substantially simultaneously or in the reverse order of description. Furthermore, the same reference numerals denote the same elements.

[0055] When an element is described as being "on" another element, "connected to" another element, or "attached to" another element, the element may be directly on, directly connected to, or directly attached to the other element, or there may be intermediate elements present. However, when an element is described as being "directly on" another element, "directly connected to" another element, or "directly attached to" another element, there are no intermediate elements. Other terms and / or expressions used to describe relationships between elements should be interpreted in a similar manner, such as "between" versus "directly between," "adjacent" versus "directly adjacent," or "on" versus "directly on," etc. Furthermore, the term "connection" can refer to a physical connection, an electrical connection, a communication connection, and / or a fluid connection. Additionally, the X-axis, Y-axis, and Z-axis are not limited to the three axes of a Cartesian coordinate system and can be interpreted in a broader sense. For example, the X-axis, Y-axis, and Z-axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. For the purposes of this disclosure, “at least one of X, Y, and Z” and “at least one selected from the group consisting of X, Y, and Z” can be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z such as XYZ, XY, YZ, and XZ. As used herein, the term “and / or” includes any and all combinations of one or more of the listed related items.

[0056] It should be understood that although the terms first, second, etc., may be used herein to describe different elements, these elements should not be limited by these terms. These terms are merely used to distinguish one element from another. For example, without departing from the scope of the exemplary embodiments, a first element may be named a second element, and similarly, a second element may be named a first element.

[0057] Figure 1 A cross-sectional view of an integrated passive device in the related art is shown schematically.

[0058] Reference Figure 1The integrated passive device includes a substrate 110', a first conductive layer 210' located above the substrate 110', a first insulating layer 310' located on the side of the first conductive layer 210' away from the substrate 110', a second conductive layer 220' located on the side of the first insulating layer 310' away from the substrate 110', a second insulating layer 320' located on the side of the second conductive layer 220' away from the substrate 110', a third conductive layer 230' located on the side of the second insulating layer 320' away from the substrate 110', a third insulating layer 330' located on the side of the third insulating layer 230' away from the substrate 110', a fourth conductive layer 240' located on the side of the third insulating layer 230' away from the substrate 110', a fourth insulating layer 340' located on the side of the fourth conductive layer 240' away from the substrate 110', and at least two pads Pad' located on the side of the fourth insulating layer 340' away from the substrate 110'.

[0059] The stacked first conductive layer 210', first insulating layer 310', and second conductive layer 220' include at least one capacitor C', and the stacked third conductive layer 230', third insulating layer 330', and fourth conductive layer 240' include at least one inductor I'. One pole of the inductor I' is electrically connected to a pad Pad', the other pole of the inductor I' is electrically connected to one plate of the capacitor C', and the other plate of the capacitor C' is electrically connected to another pad Pad'.

[0060] In other words, Figure 1 In the schematic integrated passive device, capacitor C' is composed of an overlapping film layer of conductive layer / insulating layer / conductive layer, and inductor I' is composed of an overlapping film layer of conductive layer / insulating layer / conductive layer. The number of capacitors C' and inductors I' is set according to actual needs.

[0061] Figure 2 The illustration shows a physical image of an integrated passive device in the related art after it has been burned out.

[0062] To have Figure 1 The schematic cross-sectional structure of the integrated passive device operates at a certain frequency. When the device power increases, it is prone to burnout. The inventors discovered that the burnout is caused by the accumulation of heat generated by the electronic components during operation. Using simulation software, the inventors simulated the current distribution at a power of 3W and found that the current in the inductor was significantly higher than that in other components. Correspondingly, the inductor generated significantly more heat during operation than other components. The insulating layer at the inductor (made of materials such as polyimide or benzocyclobutene resin) was prone to burnout due to overheating, leading to the failure of the integrated passive device.

[0063] Figure 2 and Figure 3 A schematic cross-sectional view of an integrated passive device according to some embodiments of the present disclosure is shown, wherein, Figure 2 The diagram shows a cross-sectional view of the inductor before assembly. Figure 3 The diagram shows a cross-sectional view of the inductor after assembly.

[0064] Reference Figure 3 The integrated passive device includes a device body layer 100, a first conductive layer 210, and at least one inductor I. The device body layer 100 includes a substrate 110 and a capacitor functional layer 120 located on the substrate 110, the capacitor functional layer 120 including at least one capacitor C. The substrate 110 has a first surface 110a facing the capacitor functional layer 120, and a direction perpendicular to the first surface 110a is defined as a first direction X. The first conductive layer 210 is located on one side of the device body layer 100 along the first direction X, and the first conductive layer 210 has a first connection portion L01 and a second connection portion L02 spaced apart. The inductor I is located on the side of the first conductive layer 210 away from the substrate 110. The inductor I includes a first electrode I1 and a second electrode I2. The first electrode I1 is electrically connected to the first connection portion L01, and the second electrode I2 is electrically connected to the second connection portion L02. The first electrode I1 of the inductor I is electrically connected to the capacitor C through the first connection portion L01.

[0065] It should be noted that the first pole I1 and the second pole I2 of inductor I are defined only to distinguish the two poles of inductor I. In the integrated passive device provided in the embodiments of this disclosure, the first pole I1 and the second pole I2 of inductor I can be interchanged.

[0066] In the integrated passive device provided in this embodiment, the inductor I is no longer composed of a rewiring layer containing overlapping insulating and conductive layers, but rather a discrete inductor I connected to the device through a first connection portion L01 and a second connection portion L02 in the first conductive layer 210. The inventors discovered through research that by changing the inductor I from... Figure 1 The schematic integrated form of inductor I is changed to Figure 3 The discrete form of inductor I shown in the diagram can significantly improve the heat dissipation performance of the inductor. During operation, the inductor can quickly dissipate the heat generated, enabling the integrated passive device to withstand higher power when operating at high frequencies. This can effectively prevent the integrated passive device from burning out due to poor heat dissipation during operation.

[0067] According to some exemplary embodiments, the substrate 110 can be selected from any one of a glass substrate, a silicon substrate, a quartz substrate, a ceramic substrate, and a resin substrate. For example, when the substrate 110 is a glass substrate, the poor thermal conductivity of glass makes it particularly prone to burn-out due to poor heat dissipation. The integrated passive device provided in this disclosure has good heat dissipation performance; even when its substrate 110 is a glass substrate, good heat dissipation performance can still be guaranteed.

[0068] According to some exemplary embodiments, refer to Figure 3 The first conductive layer 210 is located on the side of the capacitor functional layer 120 away from the substrate 110. The integrated passive device also includes a first insulating layer 310 located on the side of the first conductive layer 210 away from the substrate 110. The first insulating layer 310 has a first via VO1 and a second via VO2. The first via VO1 exposes at least a portion of the first connection portion L01, and the second via VO2 exposes at least a portion of the second connection portion L02. The first electrode I1 is electrically connected to the first connection portion L01 through the first via VO1, and the second electrode I2 is electrically connected to the second connection portion L02 through the second via VO2. That is, in this integrated passive device, the inductor I and the capacitor C are located on the same side of the substrate 110, and the inductor I is located on the side of the capacitor functional layer 120 away from the substrate 110. (Refer to reference...) Figure 2 and Figure 3 The capacitor functional layer 120, the first conductive layer 210, and the first insulating layer 310 can be sequentially formed on the substrate 110. Then, the first electrode I1 and the second electrode I2 of the inductor I are soldered to the first connection portion L01 and the second connection portion L02 respectively through the first via V01 and the second via V02. This integrated passive device has a simple fabrication process and can be mass-produced. Furthermore, the capacitor and inductor in this integrated passive device can be manufactured independently and simultaneously, compared to... Figure 1 The schematic diagram of integrated passive devices (which require continuous fabrication layer by layer) can shorten the manufacturing cycle and improve the manufacturing yield to a certain extent.

[0069] According to some exemplary embodiments, refer to Figure 3 The integrated passive device also includes at least two pads located on the side of the first insulating layer 310 away from the substrate 110. At least one pad is electrically connected to a capacitor C, and at least one pad is electrically connected to an inductor I. Exemplarily, the at least two pads include a first pad Pad1 and a second pad Pad2. The first pad Pad1 can be electrically connected to the capacitor C, and the second pad Pad2 can be electrically connected to the inductor I. Each pad in the integrated passive device is used to connect to the circuit board to be soldered, thereby enabling the transmission of signals from the capacitor C and inductor I in the integrated passive device between the soldered circuit board and the circuit board.

[0070] According to some exemplary embodiments, refer to Figure 3 The surface of the pad away from the substrate 110 is further away from the substrate 110 than the surface of the inductor I away from the substrate 110. Furthermore, the surface of the pad away from the substrate 110 needs to be a predetermined distance higher than the surface of the inductor I away from the substrate 110. This ensures that during the soldering process between the integrated passive device and the circuit board to be soldered, after the reflow soldering process, the surface of the pad away from the substrate 110 remains higher than the surface of the inductor I away from the substrate 110, thus avoiding soldering defects caused by contact between the inductor I and the circuit board to be soldered. This predetermined distance depends on factors such as the material and shape of the pad and the structure of the solder joint on the circuit board to be soldered, and is not limited in this embodiment.

[0071] It should be noted that the surface of the pad away from the substrate 110 can be a plane, a curved surface, or other irregularly shaped surface, and the surface of the inductor I away from the substrate 110 can also be a plane, a curved surface, or other irregularly shaped surface. The statement that the surface of the pad away from the substrate 110 is further away from the substrate 110 than the surface of the inductor I should be understood as the endpoint of the pad furthest from the substrate 110 being further away from the substrate 110 than the endpoint of the inductor I furthest from the substrate 110.

[0072] According to some exemplary embodiments, refer to Figure 3 The pad includes a support pillar 510 and a solder cap 520 located on the side of the support pillar 510 away from the substrate 110. The support pillar 510 is approximately cylindrical in shape, and the solder cap 520 is approximately hemispherical in shape. That is, the pad can be formed using copper pillar technology.

[0073] According to some exemplary embodiments, refer to Figure 3 The material of the support pillar 510 includes copper, and the material of the solder cap 520 includes tin. Since the copper metal does not turn into a molten state during the reflow soldering process, the height of the support pillar 510 will not change much. The surface of the support pillar 510 away from the substrate 110 is further away from the substrate 110 than the surface of the inductor I away from the substrate 110. This ensures that the height of the pad is still higher than the height of the inductor I after the reflow soldering process is completed.

[0074] For example, the support column 510 may have a stacked structure of copper / nickel / tin-silver alloy layers.

[0075] Figure 4 A cross-sectional view of an integrated passive device according to some embodiments of the present disclosure is shown schematically.

[0076] According to some exemplary embodiments, refer to Figure 4 The pad includes a metallization layer under the bump 530 and solder balls 540 located on the side of the metallization layer 530 away from the substrate 110. The metallization layer 530 is electrically connected to the first conductive layer 210 through a via located in the first insulating layer 310. The solder balls 540 are spherical in shape with a flat lower surface. In other words, the pad can be formed using solder ball technology.

[0077] According to some exemplary embodiments, refer to Figure 4 The under-bump metallization layer 530 may have a copper / titanium layer stack structure, and the material of the solder ball 540 includes tin.

[0078] According to some exemplary embodiments, refer to Figure 3 The first conductive layer 210 further includes a third connection portion L03 and a fourth connection portion L04. The third connection portion L03 is electrically connected to the capacitor C, and the fourth connection portion L04 is connected to the second connection portion L02 as an integral structure. The first insulating layer 310 also has a third via V03 and a fourth via V04. The third via V03 exposes at least a portion of the third connection portion L03, and the fourth via V04 exposes at least a portion of the fourth connection portion L04. The first pad Pad1 is electrically connected to the third connection portion L03 through the third via V03, thereby achieving electrical connection with the capacitor C. The second pad Pad2 is electrically connected to the second electrode I2 of the inductor I through the fourth via V04, thereby achieving electrical connection with the capacitor C.

[0079] According to some exemplary embodiments, refer to Figure 3The capacitor functional layer 120 includes a first capacitor layer 121 located on the substrate 110, an interlayer dielectric layer 123 located on the side of the first capacitor layer 121 away from the substrate 110, and a second capacitor layer 122 located on the side of the interlayer dielectric layer 123 away from the substrate 110. The capacitor C includes a first capacitor plate C1 located on the first capacitor layer 121 and a second capacitor plate C2 located on the second capacitor layer 122. A second insulating layer 320 is also provided between the second capacitor layer 122 and the first conductive layer 210. The second insulating layer 320 has a fifth via V05, and the second insulating layer 320 and the interlayer dielectric layer 123 have a sixth via V06. The fifth via V05 exposes a portion of the second capacitor plate C2, and the sixth via V06 exposes a portion of the first capacitor plate C1. The first connection portion L01 is electrically connected to the second capacitor plate C2 through the fifth via V05, and the third connection portion L03 is electrically connected to the first capacitor plate C1 through the sixth via V06. In other words, the first pad Pad1 is electrically connected to the first capacitor plate C1 of capacitor C through the third connection part L03, the first electrode I1 of inductor I is electrically connected to the second capacitor plate C2 through the first connection part L01, and the second electrode I2 of inductor I is electrically connected to the second pad Pad2 through the second connection part L02 and the fourth connection part L04 (connected into a single structure).

[0080] Figure 5 A cross-sectional view of an integrated passive device according to some embodiments of the present disclosure is shown schematically.

[0081] According to some exemplary embodiments, refer to Figure 5 The capacitor functional layer 120 includes a first capacitor layer 121 located on the substrate 110, an interlayer dielectric layer 123 located on the side of the first capacitor layer 121 away from the substrate 110, and a second capacitor layer 122 located on the side of the interlayer dielectric layer 123 away from the substrate 110. The capacitor C includes a first capacitor plate C1 located on the first capacitor layer 121 and a second capacitor plate C2 located on the second capacitor layer 122. A second insulating layer 320 is also provided between the second capacitor layer 122 and the first conductive layer 210. A seventh via V07 is provided in the second insulating layer 320 and the interlayer dielectric layer 123, and an eighth via V08 is provided in the second insulating layer 320. The seventh via V07 exposes a portion of the first capacitor plate C1, and the eighth via V08 exposes a portion of the second capacitor plate C2. A first connection portion L01 is electrically connected to the first capacitor plate C1 through the seventh via V07, and a second connection portion L02 is electrically connected to the second capacitor plate C2 through the eighth via V08.

[0082] In other words, the first pad Pad1 is electrically connected to the second capacitor plate C2 through the third connection part L03, the first pole I1 of the inductor I is electrically connected to the first capacitor plate C1 of the capacitor C through the first connection part L01, and the second pole I2 of the inductor I is electrically connected to the second pad Pad2 through the second connection part L02 and the fourth connection part L04 (connected into a single structure).

[0083] Figure 6 A cross-sectional view of an integrated passive device according to some embodiments of the present disclosure is shown schematically.

[0084] According to some exemplary embodiments, refer to Figure 6 A first conductive layer 210 is located on the side of the substrate 110 away from the capacitor functional layer 120. The side of the first conductive layer 210 away from the substrate 110 has a first insulating layer 310. Inductor I is located on the side of the first insulating layer 310 away from the substrate 110. The first insulating layer 310 has a first via VO1 and a second via VO2. The first via VO1 exposes at least a portion of the first connection portion L01, and the second via VO2 exposes at least a portion of the second connection portion L02. The first electrode I1 is electrically connected to the first connection portion L01 through the first via VO1, and the second electrode I2 is electrically connected to the second connection portion L02 through the second via VO2. At least two pads are located on the side of the capacitor functional layer 120 away from the substrate 110. At least one pad is electrically connected to the capacitor C, and at least one pad is electrically connected to the inductor I.

[0085] Based on actual process requirements, the capacitor C and inductor I in the integrated passive device can be placed on opposite sides of the substrate 110. Furthermore, the pad is placed on the side of the capacitor functional layer 120 furthest from the substrate 110. In other words, the pad and inductor I are placed on opposite sides of the substrate 110. This ensures that after the integrated passive device is soldered to the circuit board, inductor I is located on the side of the substrate 110 furthest from the circuit board, allowing for better heat dissipation and further improving the heat dissipation performance of the integrated passive device.

[0086] According to some exemplary embodiments, refer to Figure 6 The substrate 110 has a thirteenth via V13 and a fourteenth via V14, which are located along the thickness direction of the substrate 110 (i.e., Figure 3The first direction X) shown penetrates the substrate 110. A third conductive structure 430 is provided in the thirteenth via V13, and a fourth conductive structure 440 is provided in the fourteenth via V14. The third conductive structure 430 substantially completely fills the thirteenth via V13, and the fourth conductive structure 440 substantially completely fills the fourteenth via V14. The surfaces of the third conductive structure 430 and the fourth conductive structure 440 near the capacitor functional layer 120 are substantially flush with the surfaces of the substrate 110 near the capacitor functional layer 120. The surfaces of the third conductive structure 430 and the fourth conductive structure 440 away from the capacitor functional layer 120 are substantially flush with the surfaces of the substrate 110 away from the capacitor functional layer 120. The first connection portion L01 is electrically connected to the capacitor C through the third conductive structure 430, and the second connection portion L02 is electrically connected to at least one pad through the fourth conductive structure 440. When inductor I, capacitor C, and pad are placed on both sides of substrate 110, inductor I is electrically connected to capacitor C and pad on the other side of substrate 110 through a through-hole located in substrate 110.

[0087] According to some exemplary embodiments, refer to Figure 6 The integrated passive device also includes a fourth insulating layer 340 located on the side of the capacitor functional layer 120 away from the substrate 110, a second conductive layer 220 located on the side of the fourth insulating layer 340 away from the substrate 110, and a third insulating layer 330 located on the side of the second conductive layer 220 away from the substrate 110. At least two pads are located on the side of the third insulating layer 330 away from the substrate 110. The second conductive layer 220 includes a third connection portion L03 and a fourth connection portion L04 spaced apart. The third insulating layer 330 has a ninth via V09 and a tenth via V10. The ninth via V09 exposes at least a portion of the third connection portion L03, and the tenth via V10 exposes at least a portion of the fourth connection portion L04. At least two pads include a first pad Pad1 and a second pad Pad2. The first pad Pad1 is electrically connected to the third connection part L03 through the ninth via V09. The second pad Pad2 is electrically connected to the fourth connection part L04 through the tenth via V10. The third connection part L03 is electrically connected to the capacitor C. The fourth connection part L04 is electrically connected to the second connection part L02 through the fourth conductive structure 440.

[0088] According to some exemplary embodiments, refer to Figure 6The capacitor functional layer 120 includes a first capacitor layer 121 located on the substrate 110, an interlayer dielectric layer 123 located on the side of the first capacitor layer 121 away from the substrate 110, and a second capacitor layer 122 located on the side of the interlayer dielectric layer 123 away from the substrate 110. The capacitor C includes a first capacitor plate C1 located on the first capacitor layer 121 and a second capacitor plate C2 located on the second capacitor layer 122.

[0089] The integrated passive device also includes an eighth connection portion L08 located in the first capacitor layer 121 and a ninth connection portion L09 located in the second capacitor layer 122. A fourth connection portion L04 is electrically connected to the ninth connection portion L09 via a fifteenth via V15 located in the fourth insulating layer 340. The ninth connection portion L09 is electrically connected to the eighth connection portion L08 via a sixteenth via V16 located in the interlayer dielectric layer 123. The eighth connection portion L08 is electrically connected to the second connection portion L02 via a fourth conductive structure 440, and further electrically connected to the second electrode I2 of the inductor I. A first connection portion L01 is electrically connected to the first capacitor plate C1 via a third conductive structure 430, and a third connection portion L03 is electrically connected to the second capacitor plate C2 via a seventeenth via V17 located in the fourth insulating layer 340.

[0090] In other words, the first pad Pad1 is electrically connected to the second capacitor plate C2 through the third connection part L03, the first pole I1 of the inductor I is electrically connected to the first capacitor plate C1 of the capacitor C through the first connection part L01 and the third conductive structure 430 in sequence, and the second pole I2 of the inductor I is electrically connected to the second pad Pad2 through the second connection part L02, the fourth conductive structure 440, the eighth connection part L08, the ninth connection part L09 and the fourth connection part L04 in sequence.

[0091] It should be noted that, referring to Figure 6 Alternatively, the ninth connection portion can be omitted, and the fourth connection portion L04 can be directly electrically connected to the eighth connection portion L08 through a via penetrating the fourth insulating layer 340 and the interlayer dielectric layer 123. With this configuration, the patterning process of forming the interlayer dielectric layer 123 can be completed without the use of a mask, which simplifies the fabrication process of this integrated passive device.

[0092] Figure 7 A cross-sectional view of an integrated passive device according to some embodiments of the present disclosure is shown schematically.

[0093] According to some exemplary embodiments, refer to Figure 7The capacitor functional layer 120 includes a first capacitor layer 121 located on the substrate 110, an interlayer dielectric layer 123 located on the side of the first capacitor layer 121 away from the substrate 110, and a second capacitor layer 122 located on the side of the interlayer dielectric layer 123 away from the substrate 110. The capacitor C includes a first capacitor plate C1 located on the first capacitor layer 121 and a second capacitor plate C2 located on the second capacitor layer 122. The integrated passive device also includes a sixth connection portion L06 and an eighth connection portion L08 located on the first capacitor layer 121, a ninth connection portion L09 located on the second capacitor layer 122, and a seventh connection portion L07 located on the second conductive layer 220.

[0094] The fourth connection L04 is electrically connected to the ninth connection L09 through the fifteenth via V15 located in the fourth insulating layer 340. The ninth connection L09 is electrically connected to the eighth connection L08 through the sixteenth via V16 located in the interlayer dielectric layer 123. The eighth connection L08 is electrically connected to the second connection L02 through the fourth conductive structure 440, and then electrically connected to the second electrode I2 of the inductor I. One end of the seventh connection L07 is electrically connected to the sixth connection L06 through the eighteenth via V18 located in the fourth insulating layer 340 and the interlayer dielectric layer 123. The sixth connection L06 is electrically connected to the first connection L01 through the third conductive structure 430. The other end of the seventh connection L07 is electrically connected to the second capacitor plate C2 through the nineteenth via V19 located in the fourth insulating layer 340. The third connection L03 is electrically connected to the first capacitor plate C1 through the twentieth via V20 located in the fourth insulating layer 340 and the interlayer dielectric layer 123.

[0095] In other words, the first pad Pad1 is electrically connected to the first capacitor plate C1 of capacitor C through the third connection part L03, the first electrode I1 of inductor I is electrically connected to the second capacitor plate C2 through the first connection part L01, the third conductive structure 430, the sixth connection part L06 and the seventh connection part L07 in sequence, and the second electrode I2 of inductor I is electrically connected to the second pad Pad2 through the second connection part L02, the fourth conductive structure 440, the eighth connection part L08, the ninth connection part L09 and the fourth connection part L04 in sequence.

[0096] Figure 8 A cross-sectional view of an integrated passive device according to some embodiments of the present disclosure is shown schematically.

[0097] According to some exemplary embodiments, refer to Figure 8The inductor I is located on the side of the capacitor functional layer 120 away from the substrate 110. The integrated passive device also includes at least two pads located on the side of the substrate 110 away from the capacitor functional layer 120. At least one pad is electrically connected to the capacitor C, and at least one pad is electrically connected to the inductor I. With this configuration, both the inductor I and the capacitor C are located on opposite sides of the substrate 110 along with the pads. This ensures that after the integrated passive device is soldered to the circuit board to be soldered, both the inductor I and the capacitor C are located on the side of the substrate 110 away from the circuit board being soldered, allowing for better heat dissipation of the inductor I and the capacitor C, thus further improving the heat dissipation performance of the integrated passive device.

[0098] According to some exemplary embodiments, refer to Figure 8 The integrated passive device also includes a second insulating layer 320 located on the side of the capacitor functional layer 120 away from the substrate 110, a first conductive layer 210 located on the side of the second insulating layer 320 away from the substrate 110, and a first insulating layer 310 located on the side of the first conductive layer 210 away from the substrate 110. The inductor I is located on the side of the first insulating layer 310 away from the substrate 110. The first conductive layer 210 has a first connection portion L01 and a second connection portion L02. The first insulating layer 310 has a first via VO1 and a second via VO2. The first via VO1 exposes at least a portion of the first connection portion L01, and the second via VO2 exposes at least a portion of the second connection portion L02. The first electrode I1 of the inductor I is electrically connected to the first connection portion L01 through the first via VO1, and the second electrode I2 of the inductor I is electrically connected to the second connection portion L02 through the second via VO2.

[0099] Continue to refer to Figure 8 The integrated passive device also includes a second conductive layer 220 located on the side of the substrate 110 away from the capacitor functional layer 120 and a third insulating layer 330 located on the side of the second conductive layer 220 away from the substrate 110. At least two pads are located on the side of the third insulating layer 330 away from the substrate 110. The second conductive layer 220 includes a third connection portion L03 and a fourth connection portion L04. The third insulating layer 330 has a ninth via V09 and a tenth via V10. The ninth via V09 exposes at least a portion of the third connection portion L03, and the tenth via V10 exposes at least a portion of the fourth connection portion L04. The at least two pads include a first pad Pad1 and a second pad Pad2. The first pad Pad1 is electrically connected to the third connection portion L03 through the ninth via V09, and the second pad Pad2 is electrically connected to the fourth connection portion L04 through the tenth via V10.

[0100] The substrate 110 has an eleventh via V11 and a twelfth via V12, which penetrate the substrate 110 along its thickness direction. A first conductive structure 410 is provided in the eleventh via V11, and a second conductive structure 420 is provided in the twelfth via V12. The third connection portion L03 is electrically connected to the capacitor C through the first conductive structure 410, and the fourth connection portion L04 is electrically connected to the second connection portion L02 through the second conductive structure 420, and then electrically connected to the second electrode I2 of the inductor I.

[0101] According to some exemplary embodiments, refer to Figure 8 The capacitor functional layer 120 includes a first capacitor layer 121 located on the substrate 110, an interlayer dielectric layer 123 located on the side of the first capacitor layer 121 away from the substrate 110, and a second capacitor layer 122 located on the side of the interlayer dielectric layer 123 away from the substrate 110. The capacitor C includes a first capacitor plate C1 located on the first capacitor layer 121 and a second capacitor plate C2 located on the second capacitor layer 122. The first capacitor layer 121 also includes a fifth connection portion L05 spaced apart from the first capacitor plate C1.

[0102] The third connection part L03 is electrically connected to the first capacitor plate C1 through the first conductive structure 410. The first connection part L01 is electrically connected to the second capacitor plate C2 through the fifth via V05 located in the second insulating layer 320. The second connection part L02 is electrically connected to the fifth connection part L05 through the twenty-first via V21 located in the second insulating layer 320 and the interlayer dielectric layer 123. The fifth connection part L05 is electrically connected to the fourth connection part L04 through the second conductive structure 420.

[0103] In other words, the first pad Pad1 is electrically connected to the first capacitor plate C1 of the capacitor C through the third connection part L03 and the first conductive structure 410 in sequence, the first electrode I1 of the inductor I is electrically connected to the second capacitor plate C2 through the first connection part L01, and the second electrode I2 of the inductor I is electrically connected to the second pad Pad2 through the second connection part L02, the fifth connection part L05, the second conductive structure 420 and the fourth connection part L04 in sequence.

[0104] It should be noted that, in Figure 8 In the schematic integrated passive device, the first pad Pad1 can be electrically connected to the second capacitor plate C2, and the first capacitor plate C1 can be electrically connected to the first pole I1 of the inductor I, according to the actual circuit design.

[0105] Figure 9 A cross-sectional view of an integrated passive device according to some embodiments of the present disclosure is shown schematically.

[0106] According to some exemplary embodiments, refer to Figure 9 When the inductor I and the pad are located on opposite sides of the substrate 110, the height of the pad does not need to be greater than the height of the inductor I. The height of the pad can be set to be relatively small. For example, the pad can be composed of a metal electrode 550 that does not contain tin. This metal electrode 550 can be formed by a chemical plating process, which significantly reduces the manufacturing cost compared to pads formed using copper pillar or solder ball techniques. Figure 9 When soldering the integrated passive device to the circuit board, solder paste is applied to the corresponding position of the soldering point on the circuit board to achieve soldering with the pad in the integrated passive device.

[0107] For example, the metal electrode 550 may include a first sub-electrode 551, a second sub-electrode 552 located on the side of the first sub-electrode 551 away from the substrate 110, and a third sub-electrode 553 located on the side of the second sub-electrode 552 away from the substrate 110. The material of the first sub-electrode 551 may include copper, the material of the second sub-electrode 552 may include nickel, and the material of the third sub-electrode 553 may include silver.

[0108] It should be noted that, Figure 9 The schematic diagram shows the structure of an integrated passive device. Figure 8 Based on the schematic integrated passive device, the structure of the pad is changed to a metal electrode. Figure 6 and Figure 7 The schematic integrated passive device, as well as other integrated passive devices with inductors I and pads located on both sides of the substrate 110, can all have their pads set according to actual process requirements. Figure 9 The schematic diagram shows the form of a metal electrode.

[0109] According to some exemplary embodiments, at least one inductor includes a ceramic inductor, that is, an inductor whose dielectric material is a ceramic material. The thermal conductivity of the ceramic material is higher than that of the dielectric material used in the integrated inductor (e.g., polyimide or benzocyclobutene resin), which makes the ceramic inductor have excellent heat dissipation performance, further improving the heat dissipation performance of the integrated passive device.

[0110] According to some exemplary embodiments, at least one inductor can be independently selected from wire-wound inductors, thin-film inductors, and multilayer inductors. Wire-wound inductors are typically constructed by winding wire (such as copper wire) onto a magnetic core (such as a ferrite or iron powder core), a structure that allows the inductance to be adjusted by changing the number of turns. Multilayer inductors are inductors manufactured using multilayer circuit board technology, achieving higher inductance density and smaller size by stacking conductive materials between different layers. Thin-film inductors are inductors manufactured using thin-film technology, achieving inductance by depositing a thin film on a conductive layer to form a coil pattern. The specific structure of the inductors in this integrated passive device can be selected according to actual needs, and any two inductors can have the same or different structures.

[0111] Another embodiment of this disclosure also provides an electronic device, which includes the integrated passive device provided in the foregoing embodiments. The electronic device may be a mobile phone, tablet, wearable device or other electronic device, and is not limited thereto.

[0112] As used herein, the terms “substantially,” “approximately,” “about,” and other similar terms are used as terms of approximation rather than as terms of degree, and they are intended to account for inherent deviations in measured or calculated values ​​that would be recognized by one of ordinary skill in the art. Taking into account factors such as process variations, measurement problems, and errors associated with the measurement of a particular quantity (i.e., limitations of the measurement system), “approximately” or “about” as used herein includes the stated value and indicates that the particular value is within an acceptable range of deviation for one of ordinary skill in the art. For example, “approximately” may mean within one or more standard deviations, or within ±10% or ±5% of the stated value.

[0113] While some embodiments based on the general inventive concept of this disclosure have been illustrated and described, those skilled in the art will understand that changes may be made to these embodiments without departing from the principles and spirit of the general inventive concept of this disclosure, the scope of which is defined by the claims and their equivalents.

Claims

1. An integrated passive device, wherein, The integrated passive device includes: The device body layer includes a substrate and a capacitor functional layer located on the substrate, wherein the capacitor functional layer includes at least one capacitor. A first conductive layer is located on one side of the device body layer along a first direction. The substrate has a first surface facing the capacitor functional layer, and the first direction is perpendicular to the first surface. The first conductive layer includes a first connection portion and a second connection portion spaced apart. At least one inductor is located on the side of the first conductive layer away from the substrate. The inductor includes a first pole and a second pole. The first pole is electrically connected to the first connection portion, and the second pole is electrically connected to the second connection portion. The first pole of the inductor is electrically connected to the capacitor through the first connection portion.

2. The integrated passive device according to claim 1, wherein, The first conductive layer is located on the side of the capacitor functional layer away from the substrate. The integrated passive device further includes a first insulating layer located on the side of the first conductive layer away from the substrate. as well as The first insulating layer has a first via and a second via, the first via exposing at least a portion of the first connection portion, the second via exposing at least a portion of the second connection portion, the first electrode being electrically connected to the first connection portion through the first via, and the second electrode being electrically connected to the second connection portion through the second via.

3. The integrated passive device according to claim 2, wherein, The integrated passive device further includes at least two pads located on the side of the first insulating layer away from the substrate, at least one of the pads being electrically connected to the capacitor and at least one of the pads being electrically connected to the inductor.

4. The integrated passive device according to claim 3, wherein, The first conductive layer further includes a third connecting portion and a fourth connecting portion, wherein the third connecting portion is electrically connected to the capacitor, and the fourth connecting portion is connected to the second connecting portion to form an integral structure; The first insulating layer has a third via and a fourth via, the third via exposing at least a portion of the third connection portion, and the fourth via exposing at least a portion of the fourth connection portion; At least two of the pads include a first pad and a second pad, the first pad being electrically connected to the third connection portion through the third via, and the second pad being electrically connected to the fourth connection portion through the fourth via.

5. The integrated passive device according to claim 4, wherein, The integrated passive device further includes a second insulating layer located between the first conductive layer and the capacitor functional layer; The capacitor functional layer includes a first capacitor layer located on the substrate, an interlayer dielectric layer located on the side of the first capacitor layer away from the substrate, and a second capacitor layer located on the side of the interlayer dielectric layer away from the substrate. The capacitor includes a first capacitor plate located on the first capacitor layer and a second capacitor plate located on the second capacitor layer. The first connection portion is electrically connected to the second capacitor plate through a fifth via located in the second insulating layer, and the third connection portion is electrically connected to the first capacitor plate through a sixth via located in the second insulating layer and the interlayer dielectric layer; or, the first connection portion is electrically connected to the first capacitor plate through a seventh via located in the second insulating layer and the interlayer dielectric layer, and the second connection portion is electrically connected to the second capacitor plate through an eighth via located in the second insulating layer.

6. The integrated passive device according to any one of claims 3-5, wherein, The surface of the pads that are farther from the substrate is further away from the substrate than the surface of the inductor that is farther away from the substrate.

7. The integrated passive device according to claim 6, wherein, The pad includes a support post and a solder cap located on the side of the support post away from the substrate; or, The pad includes a metallization layer under the bump and a solder ball located on the side of the metallization layer away from the substrate.

8. The integrated passive device according to claim 7, wherein, The surface of the support pillar that is farther from the substrate is farther from the substrate than the surface of the inductor that is farther from the substrate.

9. The integrated passive device according to claim 2, wherein, The integrated passive device further includes at least two pads located on the side of the substrate away from the capacitor functional layer, at least one of the pads being electrically connected to the capacitor and at least one of the pads being electrically connected to the inductor.

10. The integrated passive device according to claim 9, wherein, The integrated passive device further includes a second conductive layer located on the side of the substrate away from the capacitor functional layer and a third insulating layer located on the side of the second conductive layer away from the substrate, wherein the at least two pads are located on the side of the third insulating layer away from the substrate. The second conductive layer includes a third connection portion and a fourth connection portion, and the third insulating layer has a ninth via and a tenth via, the ninth via exposing at least a portion of the third connection portion and the tenth via exposing at least a portion of the fourth connection portion; At least two of the pads include a first pad and a second pad, the first pad being electrically connected to the third connection portion through the ninth via, and the second pad being electrically connected to the fourth connection portion through the tenth via; The substrate has an eleventh via and a twelfth via, which penetrate the substrate along the thickness direction of the substrate. as well as The eleventh via is provided with a first conductive structure, and the third connecting part is electrically connected to the capacitor through the first conductive structure. The twelfth via is provided with a second conductive structure, and the fourth conductive part is electrically connected to the second connecting part through the second conductive structure.

11. The integrated passive device according to claim 1, wherein, The first conductive layer is located on the side of the substrate away from the capacitor functional layer; The integrated passive device further includes a first insulating layer located on the side of the first conductive layer away from the substrate, and the inductor located on the side of the first insulating layer away from the substrate; and The first insulating layer has a first via and a second via, the first via exposing at least a portion of the first connection portion, the second via exposing at least a portion of the second connection portion, the first electrode being electrically connected to the first connection portion through the first via, and the second electrode being electrically connected to the second connection portion through the second via.

12. The integrated passive device according to claim 11, wherein, The integrated passive device further includes at least two pads located on the side of the capacitor functional layer away from the substrate, at least one of the pads being electrically connected to the capacitor and at least one of the pads being electrically connected to the inductor.

13. The integrated passive device according to claim 12, wherein, The substrate has a thirteenth via and a fourteenth via, which penetrate the substrate along its thickness direction. A third conductive structure is disposed in the thirteenth via, and a fourth conductive structure is disposed in the fourteenth via. The first connection portion is electrically connected to the capacitor through the third conductive structure, and the second connection portion is electrically connected to at least one of the solder pads through the fourth conductive structure.

14. The integrated passive device according to claim 13, wherein, The integrated passive device further includes a second conductive layer located on the side of the capacitor functional layer away from the substrate and a third insulating layer located on the side of the second conductive layer away from the substrate, wherein the at least two pads are located on the side of the third insulating layer away from the substrate. The second conductive layer includes a third connection portion and a fourth connection portion, and the third insulating layer has a ninth via and a tenth via, the ninth via exposing at least a portion of the third connection portion and the tenth via exposing at least a portion of the fourth connection portion; At least two of the pads include a first pad and a second pad, the first pad being electrically connected to the third connection portion via the ninth via, and the second pad being electrically connected to the fourth connection portion via the tenth via; and The third connection part is electrically connected to the capacitor, and the fourth connection part is electrically connected to the second connection part through the fourth conductive structure.

15. The integrated passive device according to claim 14, wherein, The capacitor functional layer includes a first capacitor layer located on the substrate, an interlayer dielectric layer located on the side of the first capacitor layer away from the substrate, and a second capacitor layer located on the side of the interlayer dielectric layer away from the substrate. The capacitor includes a first capacitor plate located on the first capacitor layer and a second capacitor plate located on the second capacitor layer. The first connecting portion is electrically connected to the first capacitor plate through the third conductive structure, and the third connecting portion is electrically connected to the second capacitor plate; or, the first connecting portion is electrically connected to the second capacitor plate through the third conductive structure, and the third connecting portion is electrically connected to the first capacitor plate.

16. The integrated passive device according to any one of claims 9-10 and 12-15, wherein, The pad includes a metal electrode, and the material of the metal electrode does not include tin.

17. The integrated passive device according to any one of claims 1-16, wherein, The at least one inductor includes a ceramic inductor.

18. An electronic device, wherein, The electronic device includes an integrated passive device according to any one of claims 1-17.

Images