High-frequency output circuit compensation circuit, compensation method and power supply

Abstract

The invention discloses a high-frequency output circuit compensation circuit, a compensation method and a power supply, input voltage and output current signals are collected in real time through a double ADC circuit, a control unit accurately calculates a difference value between a real-time standard output current and an actual output current, and a compensation voltage signal is dynamically generated in combination with the compensation circuit. And the selection unit is matched to switch signal paths as required, so that accurate compensation in a high-frequency scene is realized. The problem that precision is out of tolerance caused by device frequency response when an existing pure hardware circuit is in high frequency is effectively solved, and high-frequency output precision stability is remarkably improved. Complex hardware modification is not needed, compensation adjustment is automatically completed through closed-loop control, operation is easy and convenient, the method is suitable for various circuit scenes needing linear precision correction, the application range is wide, and the precision advantage of original hardware calibration in a low-frequency scene is considered.

Description

Technical Field

[0001] This application relates to the field of power supplies, and in particular to a high-frequency output circuit compensation circuit, compensation method, and power supply. Background Technology

[0002] In the field of analog circuit technology, in the scenario of remote programming of standard current sources, the output circuit of a pure hardware architecture can meet the accuracy requirements of DC or low-frequency input signals after hardware calibration. However, when the input voltage frequency increases, the inherent frequency response of each stage of the circuit will change the high-frequency gain of the loop, causing the output current to deviate from the ideal value by a large margin, making it difficult to adapt to the accuracy requirements of high-frequency scenarios. Summary of the Invention

[0003] This application aims to propose a high-frequency output circuit compensation circuit, compensation method, and power supply that can achieve stable output in high-frequency scenarios.

[0004] The high-frequency output circuit compensation circuit according to the first aspect embodiment of this application includes:

[0005] The selection unit has a first selection input terminal for receiving an external voltage signal, a second selection input terminal, a selection output terminal connected to the input terminal of a signal processing unit, and a selection controlled terminal. The selection unit is used to connect the first selection input terminal to the selection output terminal or the second selection input terminal to the selection controlled terminal according to the selection signal input by the selection controlled terminal. The control unit is connected to the selected controlled terminal; A first ADC circuit is connected between the first selection input terminal and the control unit to obtain an input voltage digital signal corresponding to the external voltage signal. The second ADC circuit is connected between the current sampling output terminal of the current sampling feedback unit and the control unit, and is used to obtain the output current digital signal corresponding to the signal output by the current sampling output terminal; the control unit is used to determine the real-time standard output current signal according to the input voltage digital signal, and to obtain the compensation adjustment signal according to the real-time current difference between the real-time standard output current signal and the output current digital signal, and to adjust the selection signal according to the real-time current difference. A compensation circuit, connected between the control unit and the second selection input terminal, is used to generate a compensation voltage signal according to the compensation adjustment signal and output it to the second selection input terminal.

[0006] The power supply according to a second aspect embodiment of this application includes a high-frequency output circuit compensation circuit as described in the first aspect embodiment.

[0007] The high-frequency output circuit compensation method according to the third aspect of this application is applied to the control unit of the high-frequency output circuit compensation circuit as described in the first aspect embodiment. The high-frequency output circuit compensation method includes: Acquire the digital input voltage signal corresponding to the external voltage signal; Determine the real-time frequency data of the input voltage digital signal; If the real-time frequency data is higher than the preset compensation frequency threshold, a compensation strategy is executed. The compensation strategy includes: Determine the real-time standard output current signal corresponding to the input voltage digital signal; Obtain the digital signal of the output current corresponding to the signal output from the current sampling output terminal; Determine the real-time current difference between the digital output current signal and the real-time standard output current signal; If the real-time current difference exceeds the preset allowable deviation range, a compensation adjustment signal is determined based on the real-time current difference, and the compensation adjustment signal is output to the compensation circuit. A selection signal is also sent to the selected control terminal to connect the second selection input terminal to the selection output terminal.

[0008] The high-frequency output circuit compensation circuit, compensation method, and power supply of this application embodiment acquire input voltage and output current signals in real time through a dual ADC circuit. The control unit accurately calculates the difference between the real-time standard output current and the actual output current, and dynamically generates a compensation voltage signal in conjunction with the compensation circuit. The selection unit switches the signal path as needed to achieve accurate compensation in high-frequency scenarios. This effectively solves the accuracy deviation problem caused by the frequency response of components in existing pure hardware circuits at high frequencies, significantly improving the stability of high-frequency output accuracy. It requires no complex hardware modifications, automatically completes compensation adjustment through closed-loop control, is easy to operate, and is adaptable to various circuit scenarios requiring linear accuracy correction, making it widely applicable while retaining the accuracy advantages of existing hardware calibration in low-frequency scenarios.

[0009] Other features and advantages of this application will be set forth in the following description, and will be apparent in part from the description, or may be learned by practicing this application. Attached Figure Description

[0010] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which: Figure 1 A circuit diagram of the output circuit of the hardware architecture provided in the embodiments of this application; Figure 2 A circuit diagram of the control unit in the high-frequency output circuit compensation circuit provided in the embodiments of this application; Figure 3 A circuit diagram of the first ADC circuit in the high-frequency output circuit compensation circuit provided in the embodiments of this application; Figure 4 A circuit diagram of the second ADC circuit in the high-frequency output circuit compensation circuit provided in the embodiments of this application; Figure 5 A circuit diagram of the compensation circuit in the high-frequency output circuit compensation circuit provided in the embodiments of this application; Figure 6 A circuit diagram of the driver in the high-frequency output circuit compensation circuit provided in the embodiments of this application; Figure 7 A flowchart of a multi-range high-frequency output circuit compensation method provided in an embodiment of this application.

[0011] Figure label: Selection unit 100; control unit 200; first ADC circuit 300; second ADC circuit 400; compensation circuit 500; driver 600. Detailed Implementation

[0012] The embodiments of this application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0013] In the description of this application, the use of terms such as "first," "second," etc., is for the purpose of distinguishing technical features only and should not be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated or the order of the technical features indicated.

[0014] In the description of this application, it should be understood that the orientation descriptions, such as up, down, etc., are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0015] In the description of this application, it should be noted that, unless otherwise explicitly defined, terms such as "setup," "installation," and "connection" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this application in conjunction with the specific content of the technical solution.

[0016] The technical solution of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the embodiments described below are some embodiments of this application, not all embodiments.

[0017] To better describe the high-frequency output circuit compensation circuit, compensation method, and power supply in the embodiments of this application, a hardware architecture for the output circuit is proposed here, such as... Figure 1 As shown, the output circuit includes operational amplifier units U1, U2, U3, U4, U16, and U17, where U1 and U4 can be instrumentation amplifiers. Both the positive and negative input terminals of operational amplifier unit U1 are connected to clamping circuits (D1, D2). Operational amplifier unit U1 is used to convert externally input voltage signals into signals to ground. Operational amplifier units U1 and U2 are connected through the first selection input terminal and selection output terminal of selection unit 100; the positive input terminal of operational amplifier unit U2 is connected to the selection output terminal through a voltage divider circuit (e.g., ...). Figure 1 As shown, R3 and R1 form a voltage divider circuit. The negative input terminal is connected to ground through resistor R8 and to the output terminal through resistor R9. The output terminal is connected to the positive input terminal of operational amplifier unit U3. The negative input terminal of operational amplifier unit U3 is connected to ground through resistor R6 and to the output terminal through capacitor C2. The output terminal is connected to the positive input terminal of operational amplifier unit U16 through resistor R7 and to the positive input terminal of operational amplifier unit U17 through resistor R15. The positive input terminal of operational amplifier unit U16 is connected to +10V through resistor R10, and its negative input terminal is connected to the output terminal. The output terminal is connected to the gate of NMOS transistor Q1. The positive input terminal of operational amplifier unit U17 is connected to a -10V voltage via resistor R30, the negative input terminal is connected to the output terminal, and the output terminal is connected to the gate of PMOS transistor Q2. After the source of the PMOS transistor is connected to the source of the NMOS transistor, it is connected to the current sampling resistor RS. The end of the current sampling resistor away from the source of the PMOS transistor can be connected to the external output terminal I-out. The drain of the PMOS transistor is connected to -VBUS, and the source of the NMOS transistor is connected to +VBUS. The positive and negative input terminals of operational amplifier unit U4 are connected to the two ends of the current sampling resistor, and the negative input terminal of operational amplifier unit U3 is connected via resistor R11.

[0018] The aforementioned operational amplifier unit U2, together with resistors R3, R1, R8, and R9, can constitute a signal processing unit. The end of resistor R3 furthest from U2 can be considered as the input terminal of the signal processing unit, and the output terminal of U2 can be considered as the output terminal of the signal processing unit.

[0019] The aforementioned current sampling resistor and operational amplifier unit U4 can constitute a current sampling feedback unit, and the output terminal of operational amplifier unit U4 can be regarded as the current sampling output terminal.

[0020] It should be noted that the output circuit of the above hardware architecture is for better description of the high-frequency output circuit compensation circuit, compensation method, and power supply in the embodiments of this application, and should not be regarded as a constraint on the scope of protection of this application. It is understood that the current sampling feedback unit can take many forms, as long as it is a circuit that can sample the current and output the corresponding analog signal. Similarly, the signal processing unit is also a module that serves as an input signal and can realize the input of external voltage signals.

[0021] Based on the above hardware architecture, the following describes the high-frequency output circuit compensation circuit, compensation method, and power supply in the embodiments of this application.

[0022] See Figures 1 to 6 As shown, one embodiment of this application provides a high-frequency output circuit compensation circuit, which includes: The selection unit 100 has a first selection input terminal for receiving an external voltage signal, a second selection input terminal, a selection output terminal connected to the input terminal of a signal processing unit, and a selection controlled terminal. The selection unit 100 is used to connect the first selection input terminal to the selection output terminal or the second selection input terminal to the selection controlled terminal according to the selection signal input by the selection controlled terminal. Control unit 200, connected to the selected controlled terminal; The first ADC circuit 300 is connected between the first selection input terminal and the control unit 200, and is used to obtain the input voltage digital signal corresponding to the external voltage signal. The second ADC circuit 400 is connected between the current sampling output terminal of the current sampling feedback unit and the control unit 200, and is used to obtain the output current digital signal corresponding to the signal output by the current sampling output terminal; the control unit 200 is used to determine the real-time standard output current signal based on the input voltage digital signal, and to obtain the compensation adjustment signal based on the real-time current difference between the real-time standard output current signal and the output current digital signal, and to adjust the selection signal based on the real-time current difference. The compensation circuit 500 is connected between the control unit 200 and the second selection input terminal. It is used to generate a compensation voltage signal according to the compensation adjustment signal and output it to the second selection input terminal.

[0023] In this embodiment, the input voltage and output current signals are acquired in real time through a dual ADC circuit. The control unit 200 accurately calculates the difference between the real-time standard output current and the actual output current. Combined with the compensation circuit 500, a compensation voltage signal is dynamically generated. The selection unit 100 switches the signal path as needed to achieve accurate compensation in high-frequency scenarios. This effectively solves the accuracy deviation problem caused by the frequency response of components in existing pure hardware circuits at high frequencies, significantly improving the stability of high-frequency output accuracy. It requires no complex hardware modifications, automatically completes compensation adjustment through closed-loop control, is easy to operate, and is adaptable to various circuit scenarios requiring linear accuracy correction. It has a wide range of applications and also retains the accuracy advantages of existing hardware calibration in low-frequency scenarios.

[0024] The selection unit 100 described above can employ a selection device, such as a relay (e.g., Figure 1 As shown, K4), controllable switches, etc. The first selection input terminal is connected to the original external voltage signal (such as...) after conversion by U1. Figure 1 , Figure 3 As shown, Vin_M); the second selection input terminal is connected to the compensation voltage signal output by the compensation circuit 500 (such as...). Figure 1 , Figure 5 As shown, V_ADJ); select the output terminal to connect to the input terminal of the subsequent signal processing unit; select the controlled terminal (through driver 600 (e.g. Figure 6 As shown, U15) and control unit 200) Figure 2 As shown, U5 (model APM32F103RCT6) is connected to the I / O port. The high / low level selection signal output by the control unit 200 (amplified by U15) drives the relay (such as... Figure 1 As shown, the K4 switching contact enables the first selection input terminal to conduct with the selection output terminal (non-compensated mode) or the second selection input terminal to conduct with the selection output terminal (compensated mode). This design provides rapid switching response, adapts to the mode switching requirements in high-frequency scenarios, and prevents accuracy fluctuations caused by switching delays. The relay contact has low on-resistance and low signal loss, which does not affect the transmission quality of the original or compensated signal. The structure is simple and reliable, and the switching can be controlled by a level signal. The interaction logic with the control unit 200 is simple, reducing system complexity.

[0025] The aforementioned control unit 200 can be a microcontroller (such as...) Figure 2 As shown, U5, model APM32F103RCT6, can communicate via SPI interface with the DAC modules in the first ADC circuit 300, the second ADC circuit 400, and the compensation circuit 500 (e.g., Figure 5As shown, U8 is connected, and the I / O port (via driver 600) is connected to the selection control terminal of the selection unit 100. The control unit 200 has built-in program logic: it receives the input voltage digital signal output by the first ADC, calculates the real-time standard output current signal according to the preset current range algorithm (for example, 1V voltage corresponds to 1A current, and the specific conversion can be predetermined); it receives the output current digital signal output by the second ADC, calculates the real-time current difference between the two; if the difference exceeds the preset range, it generates a corresponding compensation adjustment signal (digital quantity) and sends it to the DAC module, while simultaneously outputting a selection signal to control the selection unit 100 to switch to compensation mode.

[0026] It should be noted that the control unit 200 can be selected from other types of processors. If the driving capability is sufficient, it can directly drive the selection switch action without having to select the driver 600 to provide sufficient driving force.

[0027] The aforementioned first ADC circuit 300 can be composed of a fourth operational amplifier unit (such as...) Figure 3 As shown, U14) and the first ADC module (as shown) Figure 3 As shown, it consists of U7). The positive input terminal of the fourth operational amplifier unit is connected to the first selection input terminal of the selection unit 100, and the negative input terminal is connected to the third resistor (e.g., U7). Figure 3 As shown, R29) is grounded and passes through a fourth resistor (such as... Figure 3 As shown, R28 is connected to its own output terminal to achieve buffering and isolation of external signals; the input terminal of the first ADC module is connected to the output terminal of the fourth operational amplifier unit, and the converted input voltage digital signal is transmitted to the control unit 200 through the SPI communication interface. The sampling frequency can be set according to the high-frequency requirements of the system. This design can reduce the impact on the original external signal through buffering and ensure the integrity of the sampled signal.

[0028] The aforementioned second ADC circuit 400 consists of a fifth operational amplifier unit (such as...) Figure 4 As shown, U13) and the second ADC module (such as Figure 4 As shown, it consists of U6. The positive input terminal of the fifth operational amplifier unit is connected to the current sampling output terminal of the current sampling feedback unit, and the negative input terminal is connected to the fifth resistor (e.g., Figure 4 As shown, R25) is grounded and passed through the sixth resistor (such as... Figure 4 As shown, R24 is connected to its own output terminal to achieve buffering and isolation of external signals; the input terminal of the second ADC module is connected to the output terminal of the fifth operational amplifier unit, and the converted output current digital signal is transmitted to the control unit 200 through SPI communication. The sampling frequency can be kept consistent with that of the first ADC circuit 300. This design can reduce the impact on the original external signal and ensure the integrity of the sampled signal through buffering.

[0029] The aforementioned compensation circuit 500 may include a digital-to-analog conversion module and a signal conditioning unit. It receives the compensation adjustment signal from the control unit 200, converts the digital signal into an analog signal via digital-to-analog conversion, and then achieves dynamic adjustment of the voltage amplitude through signal conditioning to generate a suitable compensation voltage signal. It is not limited by specific device models, parameters, or implementation paths, covers various linear accuracy compensation methods, and can flexibly adapt to the accuracy deviation correction requirements of high-frequency scenarios.

[0030] Specifically, the aforementioned compensation circuit 500 can be derived from a DAC module (such as...) Figure 5 As shown, U8), the first operational amplifier unit (such as...) Figure 5 As shown, U9), multiplier (such as Figure 5 As shown, U10) and the second operational amplifier unit (such as Figure 5 As shown, U12), the third operational amplifier unit (such as...) Figure 5 As shown, it consists of U11. The DAC module can be a high-precision digital-to-analog converter with an output range of 0 to 2.5V. Its input terminal receives the compensation and adjustment signal from the control unit 200 via SPI, and outputs the corresponding analog voltage. The first operational amplifier unit constitutes an inverting proportional amplifier circuit. The positive input terminal is connected to the DAC output, and the negative input terminal is connected to the first resistor (e.g., U11). Figure 5 As shown, R19) is connected to a preset adjustment voltage (such as...) Figure 5 As shown, REF+2.5V, where REF is the reference voltage and 2.5V is the amplitude range to be adjusted, and is connected through a second resistor (such as...). Figure 5 As shown, R20 is connected to its own output, converting the "0~2.5V" voltage into an adjustable voltage of "-2.5~2.5V" to obtain a compensation signal. The specific adjustable range can be flexibly adjusted according to actual needs. The input terminal of the second operational amplifier unit is connected to the Vin_M signal of the first selection input terminal, and the output terminal is connected to the second input terminal of the multiplier to achieve signal buffering. The first input terminal of the multiplier is connected to the output of the first operational amplifier unit, and the output terminal is buffered by the third operational amplifier unit and then connected to the second selection input terminal of the selection unit 100, finally outputting the compensation voltage signal V_ADJ. The final output is ((-2.5~2.5) / 10 The Vin_M+Vin_M combination is adjustable, meaning the adjustable range is Vin_M ± 25%. The multiplier achieves linear superposition of the Vin_M signal and the compensation signal, with a controllable adjustment range (e.g., ± 25%), allowing for targeted correction of gain deviations in the high-frequency band. Two-stage buffered operational amplifiers isolate the original signal from the multiplier and the multiplier from the selection unit 100, respectively, preventing mutual interference between modules and ensuring the stability of the compensation signal. The compensation logic is based on digital signal control, and the compensation amplitude can be flexibly adjusted via software to adapt to the accuracy deviation correction requirements at different frequencies.

[0031] In some implementations, reference Figure 5 The compensation circuit 500 includes: The DAC module has its input terminal used to input compensation and adjustment signals; The first operational amplifier unit has its positive input terminal connected to the output terminal of the DAC module, its negative input terminal connected to a preset adjustment voltage through a first resistor, and its output terminal connected to the negative input terminal through a second resistor. The multiplier has its first input connected to the output of the first operational amplifier unit, its second input connected to the first selection input, and its output connected to the second selection input.

[0032] The input terminal of the aforementioned DAC module receives the digital compensation and adjustment signal output by the control unit 200 via the SPI interface and converts it into an analog voltage signal in the range of 0 to 2.5V.

[0033] The first operational amplifier unit mentioned above can be used to construct an inverting amplifier circuit to linearly convert the 0-2.5V voltage output by the DAC module into an adjustable voltage of -2.5-2.5V, so as to make the compensation amplitude as symmetrical and controllable as possible.

[0034] The second input terminal of the multiplier is directly connected to the external voltage signal of the first selection input terminal, and the first input terminal is connected to the compensation voltage output by the first operational amplifier unit. After the two are multiplied, the output compensation voltage signal with adjustable amplitude is directly connected to the second selection input terminal of the selection unit 100.

[0035] In this embodiment, the DAC module works in conjunction with the operational amplifier unit to provide excellent linearity of the compensation voltage, thus providing accurate signal support for high-frequency precision correction. The multiplier enables dynamic adaptation between the compensation signal and the Vin_M signal, and the compensation amplitude is adjusted synchronously with the Vin_M signal to prevent over-compensation or under-compensation.

[0036] In some implementations, reference Figure 5 The compensation circuit 500 also includes: The second operational amplifier unit has its positive input connected to the first selection input, its negative input connected to the output, and its output connected to the second input of the multiplier.

[0037] In this embodiment, the second operational amplifier unit constitutes a voltage follower. Its high input impedance can isolate the influence of the multiplier load on the original signal. Its low offset and low noise characteristics improve the signal transmission fidelity, while also enhancing the circuit's load-carrying capacity, preventing signal distortion in high-frequency scenarios, providing a precise input reference for the multiplier, and effectively ensuring the accuracy and stability of compensation adjustment.

[0038] In some implementations, reference Figure 5 The compensation circuit 500 also includes: The third operational amplifier unit has its positive input connected to the output of the multiplier, its negative input connected to the output, and its output connected to the second selection input.

[0039] In this embodiment, the third operational amplifier unit constitutes a voltage follower. Its high input impedance can isolate the load interference of the selection unit 100 on the multiplier output. Its low offset and low noise characteristics improve the distortion-free transmission of the compensation signal, while also enhancing the circuit's load-carrying capacity. It adapts to the rapidly changing signal requirements in high-frequency scenarios, ensuring that the compensation voltage is accurately delivered to the selection unit 100 and stabilizing the compensation adjustment accuracy.

[0040] In some implementations, reference Figure 6 The aforementioned high-frequency output circuit compensation circuit also includes: The driver 600 is connected between the control unit 200 and the selected controlled terminal.

[0041] In this embodiment, the driver 600 amplifies the selection signal output by the control unit 200, compensating for the insufficient driving capability of the control unit 200's I / O ports and accurately driving the selection unit 100 to switch. Simultaneously, it isolates the selection unit 100 from the control unit 200's circuit interference, preventing signal crosstalk in high-frequency scenarios, ensuring rapid, stable, and reliable mode switching response, and further improving the overall circuit's anti-interference capability and operational stability.

[0042] In some implementations, reference Figure 3 The first ADC circuit 300 includes: The fourth operational amplifier unit has its positive input terminal connected to the first selection input terminal, its negative input terminal connected to ground through the third resistor, and its output terminal connected to the negative input terminal through the fourth resistor. The first ADC module has its input terminal connected to the output terminal of the fourth operational amplifier unit, and its output terminal is used to output the digital signal of the input voltage.

[0043] In this embodiment, the signal can be conditioned by the fourth operational amplifier unit. The conditioned signal can better adapt to the sampling requirements of the first ADC module, improve the accuracy and stability of analog-to-digital conversion, and provide a reliable input voltage digital signal for the control unit 200.

[0044] In some implementations, reference Figure 4 The second ADC circuit 400 includes: The fifth operational amplifier unit has its positive input terminal connected to the current sampling output terminal, its negative input terminal connected to the ground line through the fifth resistor, and its output terminal connected to the negative input terminal through the sixth resistor. The second ADC module has its input terminal connected to the output terminal of the fifth operational amplifier unit, and its output terminal is used to output the digital signal of the output current.

[0045] In this embodiment, the signal can be conditioned by the fifth operational amplifier unit. The conditioned signal can better adapt to the sampling requirements of the second ADC module, improve the accuracy and stability of analog-to-digital conversion, and provide a reliable output current digital signal for the control unit 200.

[0046] This application also proposes a power supply that includes the high-frequency output circuit compensation circuit described above.

[0047] In this embodiment, the power supply includes the high-frequency output circuit compensation circuit as described above, and therefore possesses all the beneficial effects brought by the high-frequency output circuit compensation circuit described above, which will not be repeated here.

[0048] like Figure 7 As shown, this application embodiment also proposes a high-frequency output circuit compensation method, applied to the control unit 200 of the high-frequency output circuit compensation circuit as described above. The high-frequency output circuit compensation method includes steps S100 to S300. Step S100: Obtain the input voltage digital signal corresponding to the external voltage signal; Step S200: Determine the real-time frequency data of the input voltage digital signal; Step S300: If the real-time frequency data is higher than the preset compensation frequency threshold, execute the compensation strategy. The compensation strategies include: Determine the real-time standard output current signal corresponding to the input voltage digital signal; Obtain the digital signal of the output current corresponding to the signal output from the current sampling output terminal; Determine the real-time current difference between the digital output current signal and the real-time standard output current signal; If the real-time current difference exceeds the preset allowable deviation range, a compensation adjustment signal is determined based on the real-time current difference, and the compensation adjustment signal is output to the compensation circuit 500. A selection signal is also sent to the selected controlled terminal to connect the second selection input terminal and the selection output terminal.

[0049] In this embodiment, the compensation method is precisely adapted to the high-frequency output circuit compensation circuit. Through a closed-loop logic of "signal acquisition - frequency judgment - precise compensation," it specifically addresses the problem of excessive output accuracy in high-frequency scenarios. It dynamically initiates compensation based on the real-time frequency and current difference, preventing ineffective compensation and exhibiting a high degree of automation. Simultaneously, the compensation strategy focuses on the core error, using precise calculations and signal switching to ensure timely and efficient compensation adjustments, significantly improving the stability of high-frequency output accuracy. Furthermore, the method is adaptable to different preset thresholds and ranges, demonstrating strong versatility. It improves high-frequency compensation effects without affecting the original hardware calibration accuracy in low-frequency scenarios, offering simple operation and high reliability.

[0050] In step S100 above, the control unit 200 reads the digital signal output by the first ADC circuit 300 in real time through the SPI communication interface; after receiving the data, it can remove signal noise through the built-in filtering algorithm to finally obtain a stable and accurate input voltage digital signal.

[0051] In step S200 above, the control unit 200 can use the Fast Fourier Transform algorithm to perform spectrum analysis on the filtered input voltage digital signal to extract the signal main frequency, or calculate the signal period through the period measurement method to obtain real-time frequency data.

[0052] In step S300 above, the control unit 200 compares the real-time frequency data with the preset compensation frequency threshold. If the data is higher than the threshold, the compensation strategy is triggered; if the data is lower than or equal to the threshold, the compensation strategy is not executed.

[0053] In the aforementioned compensation strategy, the control unit 200 invokes the built-in voltage-current conversion relationship (for example, typically set to positive correlation or even direct proportion, such as 1V corresponding to 1A). By substituting the input voltage digital signal into the conversion relationship, the real-time standard output current signal matching the current input can be calculated. Afterward, the control unit 200 can read the digital signal output by the second ADC circuit 400 via the SPI communication interface. During this process, the sampling timing of the first ADC data can be synchronized to ensure time consistency between the input voltage and output current data. After reading, simple filtering can be performed to remove transient interference. Next, the control unit 200 can calculate the difference between the output current digital signal and the real-time standard output current signal through subtraction, obtaining the real-time current difference, and compare it with a preset allowable deviation range (e.g., -0.1% to +0.1%). Finally, the control unit 200 generates a compensation adjustment digital signal based on the difference (proportional or stepwise), sends it to the DAC module via SPI, and simultaneously outputs a high-level selection signal, which, after being amplified by the driver 600, controls the selection unit 100 to switch between the second selection input and selection output terminals.

[0054] In some embodiments, the above-mentioned high-frequency output circuit compensation method further includes: If the real-time frequency data is less than or equal to the preset compensation frequency threshold, the compensation strategy will be stopped.

[0055] In this embodiment, this step achieves closed-loop control of the compensation strategy, stopping compensation in a timely manner when the input signal frequency meets the standard, thus preventing invalid compensation from occupying system resources in low-frequency scenarios.

[0056] The above are merely specific embodiments of this application. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, modules, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here. It should be understood that the protection scope of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the protection scope of this application.

Claims

1. A high-frequency output circuit compensation circuit, characterized in that, include: The selection unit has a first selection input terminal for receiving an external voltage signal, a second selection input terminal, a selection output terminal connected to the input terminal of a signal processing unit, and a selection controlled terminal. The selection unit is used to connect the first selection input terminal to the selection output terminal or the second selection input terminal to the selection controlled terminal according to the selection signal input by the selection controlled terminal. The control unit is connected to the selected controlled terminal; A first ADC circuit is connected between the first selection input terminal and the control unit to obtain an input voltage digital signal corresponding to the external voltage signal. The second ADC circuit is connected between the current sampling output terminal of the current sampling feedback unit and the control unit, and is used to obtain the output current digital signal corresponding to the signal output by the current sampling output terminal; the control unit is used to determine the real-time standard output current signal according to the input voltage digital signal, and to obtain the compensation adjustment signal according to the real-time current difference between the real-time standard output current signal and the output current digital signal, and to adjust the selection signal according to the real-time current difference. A compensation circuit, connected between the control unit and the second selection input terminal, is used to generate a compensation voltage signal according to the compensation adjustment signal and output it to the second selection input terminal.

2. The high-frequency output circuit compensation circuit according to claim 1, characterized in that, The compensation circuit includes: The DAC module has its input terminal used to input the compensation adjustment signal; The first operational amplifier unit has its positive input terminal connected to the output terminal of the DAC module, its negative input terminal connected to a preset adjustment voltage through a first resistor, and its output terminal connected to the negative input terminal through a second resistor. The multiplier has a first input terminal connected to the output terminal of the first operational amplifier unit, a second input terminal connected to the first selection input terminal, and an output terminal connected to the second selection input terminal.

3. The high-frequency output circuit compensation circuit according to claim 2, characterized in that, The compensation circuit further includes: The second operational amplifier unit has its positive input terminal connected to the first selection input terminal, its negative input terminal connected to the output terminal, and its output terminal connected to the second input terminal of the multiplier.

4. The high-frequency output circuit compensation circuit according to claim 2 or 3, characterized in that, The compensation circuit further includes: The third operational amplifier unit has its positive input connected to the output of the multiplier, its negative input connected to the output, and its output connected to the second selection input.

5. The high-frequency output circuit compensation circuit according to claim 1, characterized in that, Also includes: A driver is connected between the control unit and the selected controlled terminal.

6. The high-frequency output circuit compensation circuit according to claim 4, characterized in that, The first ADC circuit includes: The fourth operational amplifier unit has its positive input terminal connected to the first selection input terminal, its negative input terminal connected to ground through a third resistor, and its output terminal connected to the negative input terminal through a fourth resistor. The first ADC module has its input terminal connected to the output terminal of the fourth operational amplifier unit, and its output terminal is used to output the input voltage digital signal.

7. The high-frequency output circuit compensation circuit according to claim 1, characterized in that, The second ADC circuit includes: The fifth operational amplifier unit has its positive input terminal connected to the current sampling output terminal, its negative input terminal connected to the ground line through the fifth resistor, and its output terminal connected to the negative input terminal through the sixth resistor. The second ADC module has its input terminal connected to the output terminal of the fifth operational amplifier unit, and its output terminal is used to output the digital signal of the output current.

8. A power supply, characterized in that, include: The high-frequency output circuit compensation circuit as described in any one of claims 1 to 7.

9. A high-frequency output circuit compensation method, characterized in that, A control unit applied to the high-frequency output circuit compensation circuit as described in any one of claims 1 to 7; The high-frequency output circuit compensation method includes: Acquire the digital input voltage signal corresponding to the external voltage signal; Determine the real-time frequency data of the input voltage digital signal; If the real-time frequency data is higher than the preset compensation frequency threshold, a compensation strategy is executed. The compensation strategy includes: Determine the real-time standard output current signal corresponding to the input voltage digital signal; Obtain the digital signal of the output current corresponding to the signal output from the current sampling output terminal; Determine the real-time current difference between the digital output current signal and the real-time standard output current signal; If the real-time current difference exceeds the preset allowable deviation range, a compensation adjustment signal is determined based on the real-time current difference, and the compensation adjustment signal is output to the compensation circuit. A selection signal is also sent to the selected control terminal to connect the second selection input terminal to the selection output terminal.

10. The high-frequency output circuit compensation method according to claim 9, characterized in that, Also includes: If the real-time frequency data is less than or equal to a preset compensation frequency threshold, the compensation strategy will be stopped.

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