Cubic root calculation method and device based on pre-scaling lookup table

Abstract

The invention discloses a cubic root calculation method and device based on a pre-scaling lookup table. The method comprises the following steps: dividing an input field into R sub-intervals which are not intersected; independently constructing a pre-scaling lookup table for each subinterval, wherein a final cubic root fixed-point integer value containing an output scaling factor is directly stored in each table item; according to the input value, determining a subinterval index to which the input value belongs and an in-interval offset index; and generating a storage address according to the index, and directly reading a cubic root result from the pre-scaling lookup table and outputting the cubic root result. The device comprises a range detection and address generation module, a pre-scaling BRAM storage unit and a pipeline register set. According to the method, the output scaling factor is integrated into the BRAM content in advance, so that scaling operation during operation is eliminated fundamentally. According to the method, only 7 LUTs, 36 triggers and 0.5 BRAM are consumed, fixed 3-clock period delay is achieved, and the method is particularly suitable for an embedded system with limited resources.

Description

Technical Field

[0001] This invention relates to the fields of digital signal processing and FPGA hardware design technology, and specifically to a cube root calculation method and apparatus based on a pre-scaled lookup table. Background Technology

[0002] Cube root operations are key nonlinear operations in computer graphics, scientific computing, and signal processing. In thermodynamics, solving the Kirchhoff equation relies on cube root calculations; in computer graphics, the Phong lighting model and Lab / XYZ color space conversion require cube root operations; and in geometric calculations, volume-related operations are also inseparable from this function.

[0003] With the increasing performance demands of embedded systems, software-implemented cube root calculations can no longer meet real-time requirements. Existing hardware methods for cube root calculation mainly fall into three categories:

[0004] The first category is the iterative multiplication algorithm represented by Newton-Raphson.

[0005] This method uses iterative approximation based on reciprocals to calculate the function, offering the advantage of fast convergence. However, its common bottlenecks are: each iteration involves multiple multiplication operations, typically requiring three multipliers; its strong dependence on DSP resources limits its application on resource-constrained platforms; and it requires a lookup table to provide a high-precision initial estimate. A typical implementation requires approximately 15 clock cycles and consumes five DSP blocks.

[0006] The second type is the lookup table method based on ROM / BRAM.

[0007] Traditional lookup table (LUT) methods achieve function approximation by pre-compiling function values ​​and storing them in ROM or BRAM. The basic idea is to normalize the input to a standard range, look up the value in the table, and then scale the output. However, the core problem with traditional LUT methods is that when the input exponent k is not a multiple of 3, the scaling factor is not an integer power of 2, requiring multipliers or complex shift-addition logic for scaling operations. This bottleneck makes it difficult for lookup table methods to truly achieve the goal of zero multiplier design.

[0008] The third type is the digit-recurrence algorithm.

[0009] This algorithm is based on the concept of a complete cube, generating the result bit by bit iteratively. Its computational latency, which is directly proportional to the number of bits of precision, severely limits throughput. For 24-bit precision, the Radix-2 version requires 24 cycles; even with the improved Radix-4 scheme of 2 bits per cycle, it still requires 12 cycles. Due to the data dependencies between iterations, pipelined implementation is limited, making it difficult to achieve high throughput.

[0010] In summary, while the Newton-Raphson iterative method converges quickly, it heavily relies on DSP resources (typically requiring 5 DSP blocks) and has high latency (approximately 15 cycles). Traditional lookup table methods, although simple, suffer from limitations in handling scaling factors that are not integer powers (such as...). This necessitates the introduction of multipliers or complex shift-add logic after table lookup, making a true "zero multiplier" design impossible. A key reason is that existing methods do not fully utilize the pre-computation storage capacity of BRAM to eliminate runtime arithmetic operations. Therefore, a cube root calculation method that can fully utilize FPGA BRAM resources and achieve ultra-low logic resource consumption and low latency is urgently needed. Summary of the Invention

[0011] To address the severe trade-off between resource efficiency and computational latency in existing cube root hardware implementations, this invention provides a cube root calculation method and apparatus based on a pre-scaled lookup table. This method fundamentally eliminates runtime dependence on DSP units and complex arithmetic logic, achieving extremely low logic resource consumption and consistently low latency.

[0012] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0013] The cube root calculation method based on a pre-scaled lookup table includes the following steps:

[0014] S1. Divide the input domain into Given three non-overlapping subintervals, define each subinterval... ,in , As a benchmark index;

[0015] S2, for each subinterval Independently build prescaled lookup table Each entry in the prescaled lookup table directly stores the final cube root fixed-point integer value that incorporates the range output scaling factor:

[0016] ;

[0017] in To output the decimal places, For the first The first sub-interval The physical values ​​of each sampling point;

[0018] S3. Determine the index of the sub-interval to which it belongs based on the input value. and the offset index within the interval ;

[0019] S4. Based on sub-interval index and the offset index within the interval Generate the storage address, and then you can retrieve it from the pre-scaled lookup table. The cube root result is directly read and output.

[0020] As a preferred technical solution of the present invention: in step S1, the input domain coverage range is The corresponding parameter configuration is: benchmark index. Number of subintervals .

[0021] As a preferred technical solution of the present invention: in step S2... Sub-intervals The prescaled lookup tables are stored contiguously in the same storage block, the first... The entries of each sub-interval are mapped to the address space. storage address .

[0022] As a preferred technical solution of the present invention: In step S2, a midpoint sampling strategy is used to determine the physical value of each sampling point:

[0023] ;

[0024] in For the first The lower bound of each sub-interval, The interval width, The number of sampling points for each sub-interval. For index bit width, .

[0025] As a preferred technical solution of the present invention: in step S3...

[0026] The sub-interval index is determined by detecting the position of the most significant bit of the input fixed-point integer. ,in The weight index is used as the reference position, and the offset index within the interval is obtained through bit extraction. .

[0027] As a preferred technical solution of the present invention: in step S3, it further includes handling arbitrary floating-point inputs. Parameter reduction is performed as follows:

[0028] S31, By analyzing the input index Perform modulo 3 decomposition: ,in Map the input to the valid mantissa within the coverage area. ;

[0029] S32. Calculate using the pre-scaled lookup table ;

[0030] S33. Adjust the output of the table lookup results by index: This enables the calculation of the cube root of floating-point numbers across the entire dynamic range.

[0031] A cube root calculation device based on a pre-scaled lookup table includes:

[0032] Range detection and address generation module: used to determine the sub-range index based on the input data. and the offset index within the interval And concatenate them to generate the storage address ;

[0033] Pre-scaled BRAM memory cells: used for storage The prescaled lookup table for each sub-interval stores the scaling factor of the corresponding sub-interval in advance, so that the output data does not require post-processing multiplication.

[0034] Pipeline register set: used to connect the range detection and address generation module and the pre-scaled BRAM memory unit to achieve full pipelined processing.

[0035] As a preferred technical solution of the present invention: the total delay of the device is fixed at 3 clock cycles, and the throughput is equal to the clock frequency.

[0036] As a preferred technical solution of the present invention: the pre-scaled BRAM storage unit is configured as a single FPGA on-chip BRAM, with input in Q2.22 format and output in Q1.23 format.

[0037] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0038] 1. Extreme logic resource efficiency: The architecture of this invention consumes only 7 LUTs, which reduces LUT resources by 97.0% compared to the Newton-Raphson method and by 96.8% compared to the Radix-2 Digit-Recurrence method. This advantage is mainly attributed to the pre-scaling technique, which internalizes complex arithmetic operations such as multiplication and shifting into the pre-computed data of the BRAM.

[0039] 2. Lowest latency and highest throughput: This invention achieves a fixed 3-cycle latency, which reduces latency by 80%, 87.5%, and 75% respectively compared to the approximately 15-cycle Newton-Raphson, 24-cycle Radix-2, and 12-cycle Radix-4 recursion. Thanks to the synchronous read / write characteristics of BRAM, the architecture of this invention supports fully pipelined operation, and its throughput is directly equivalent to the clock frequency, reaching 87.9 MOPS.

[0040] 3. Eliminates DSP resource dependency: The method of this invention does not use any DSP48 units, while Newton-Raphson requires 5 DSPs and traditional LUT methods require 1 DSP for multiplication operations. This feature is of great significance in application scenarios where DSP resources are scarce.

[0041] 4. Excellent energy efficiency ratio: The architecture of this invention achieves a high energy efficiency ratio of 3.66 GOPS / W, which is 4.5 times and 40 times higher than the Radix-4 and Radix-2 methods, respectively.

[0042] 5. O(1) time complexity: This invention achieves a fixed 3-cycle delay, which is completely independent of the number of bits of output precision, and is particularly suitable for real-time control systems with strict requirements for deterministic delay. Attached Figure Description

[0043] Figure 1 This is a schematic diagram illustrating the geometric interpretation of the approximate error bound in this invention;

[0044] Figure 2 This is a block diagram of the BRAM prescaled cube root calculation architecture in this invention;

[0045] Figure 3 This is a schematic diagram of the data path pipeline level structure in this invention;

[0046] Figure 4 This is a timing diagram of the data path pipeline in this invention. Detailed Implementation

[0047] The present invention will be further illustrated below with reference to the accompanying drawings and specific embodiments. It should be understood that the following specific embodiments are for illustrative purposes only and are not intended to limit the scope of the invention.

[0048] The cube root calculation method based on a pre-scaled lookup table proposed in this invention includes the following steps:

[0049] S1. Divide the input domain into Given three non-overlapping subintervals, define each subinterval... ,in , As a benchmark index;

[0050] The input domain coverage range is as follows: The corresponding parameter configuration is: benchmark index. Number of subintervals .

[0051] S2, for each subinterval Independently build prescaled lookup table Each entry in the prescaled lookup table directly stores the final cube root fixed-point integer value that incorporates the range output scaling factor:

[0052] ;

[0053] in To output the decimal places, For the first The first sub-interval The physical values ​​of each sampling point;

[0054] in, Sub-intervals The prescaled lookup tables are stored contiguously in the same storage block, the first... The entries of each sub-interval are mapped to the address space. storage address .

[0055] The physical value of each sampling point is determined by employing a midpoint sampling strategy:

[0056] ;

[0057] in For the first The lower bound of each sub-interval, The interval width, The number of sampling points for each sub-interval. For index bit width, .

[0058] S3. Determine the index of the sub-interval to which it belongs based on the input value. and the offset index within the interval ;

[0059] Specifically, the sub-interval index is determined by detecting the position of the most significant bit of the input fixed-point integer: ,in The weight index is used as the reference position, and the offset index within the interval is obtained through bit extraction. .

[0060] Although the core architecture is aimed at The normalization range is optimized, but through the parameter reduction mechanism, support can be achieved.

[0061] Accepts arbitrary floating-point input. Parameter reduction is performed as follows:

[0062] S31, By analyzing the input index Perform modulo 3 decomposition: ,in Map the input to the valid mantissa within the coverage area. ;

[0063] S32. Calculate using the pre-scaled lookup table ;

[0064] S33. Adjust the output of the table lookup results by index: This enables the calculation of the cube root of floating-point numbers across the entire dynamic range.

[0065] S4. Based on sub-interval index and the offset index within the interval Generate the storage address, and then you can retrieve it from the pre-scaled lookup table. The cube root result is directly read and output.

[0066] This invention fundamentally eliminates runtime scaling operations by pre-integrating the output scaling factor into the BRAM content. In traditional table-driven methods, to save storage space, the input is typically normalized to a unit interval before looking up the table and then scaling the output. However, the key bottleneck of existing methods is that the scaling factor (k0+r) / 3 is usually not an integer. This scaling operation requires a multiplier or complex shift-add logic, significantly increasing hardware overhead.

[0067] The method of the present invention constructs a lookup table independently for each range and directly stores the scaled fixed-point integer values, so that the hardware can directly read the lookup table at runtime to obtain the final result without any post-processing arithmetic operations.

[0068] The present invention will now be described in detail with reference to specific methods.

[0069] 1. Problem formalization and symbol definition:

[0070] Given input real numbers Belongs to the set of positive real numbers Calculate its cube root .

[0071] To adapt to hardware implementation, define The fixed-point integer representation is The format is ,in It is an integer bit width. This refers to the decimal places width. The relationship between the two is as follows: The system's output fixed-point integer is denoted as... The format is ,satisfy .

[0072] Algorithm in bounded input domain Run on it. To ensure computational coverage, define... ,in As a benchmark index, This represents the number of subintervals covered that are powers of 2. This embodiment sets... , That is, covering the input range .

[0073] 2. Principle of Range Decomposition:

[0074] To linearize the nonlinear cube root function piecewise, the input domain is... Divided into Disjoint subintervals :

[0075] ;

[0076] in For the first The lower bound of each sub-interval, the interval width .

[0077] For any input The range index to which it belongs It is uniquely determined by the position of its most significant bit (MSB). Let... Given the position of the leading one (the first '1' in the binary representation of the input fixed-point number), the interval indexing function is defined as follows:

[0078] ;

[0079] in The weight index is the benchmark. Table 1 shows the weight index when... , Detailed mapping logic at that time.

[0080] Table 1 shows the input range decomposition and indexing logic. ).

[0081]

[0082] Table 1

[0083] 3. Construction of pre-scaled lookup table

[0084] Traditional lookup table methods typically first normalize the input to... Look up the table and then multiply by To restore. Due to This step is usually not an integer, and it requires expensive multipliers or shift logic.

[0085] This invention proposes a "pre-scaling" strategy, which constructs a lookup table independently for each sub-interval. . Each sub-interval Evenly divided into There are 1 sampling points, among which The index width is [value]. A midpoint sampling strategy is employed to minimize the maximum approximation error. The first interval sampling points The physical value is defined as:

[0086] ;

[0087] Will Quantization to fixed-point integers, storage and lookup tables . Indicates the first The index of each interval sampling point is A dedicated lookup table directly stores the final cube root value corresponding to the sampling point, which includes the prescaling factor for that interval:

[0088] ;

[0089] The output scaling factor is internalized in the storage unit using the above formula.

[0090] During hardware runtime, direct reading This is the final result, requiring no post-processing arithmetic operations.

[0091] 4. Error Analysis

[0092] The total error of the lookup table approximation consists of the approximation error caused by the finite sampling density, and the quantization error caused by the finite storage word length. cause.

[0093] For range Point sampling within the range, the approximate error satisfies:

[0094] ;

[0095] This derivation is based on the convexity analysis of functions and the Taylor series approximation. Root function. The first derivative is The corresponding second derivative For all The second derivative is negative, indicating that the function is concave in the positive input domain.

[0096] This embodiment employs a midpoint sampling strategy, where the sampling point is located at the center of the sub-interval. Compared to endpoint sampling, this strategy minimizes the maximum approximation error. Figure 1As shown, since the cube root function is a concave function, the maximum error occurs at both ends of the interval.

[0097] To quantify the approximation accuracy in a hardware-friendly manner, effective bit precision is defined as a metric.

[0098] ;

[0099] in sub-interval The smallest cube root value within.

[0100] 5. Generality Extension and Parameter Reduction

[0101] Although this embodiment mainly describes the target While the hardware implementation of this invention is limited, the architecture proposed in this invention can be extended at low cost to support arbitrary floating-point or wide-bit-width fixed-point inputs.

[0102] Based on the periodicity of the cube root function, for any input ,in For normalized mantissa, For the index. Regarding the index Perform modulo 3 decomposition: ,in The cube root calculation then becomes: .make .because ,and ,but The range just falls within Between (corresponding) arrive This completely covers the three sub-intervals designed in this invention. , , Therefore, the hardware only requires the addition of a very low-overhead modulo-3 exponentiation circuit and a shift circuit for the final result (implementation). This allows the core BRAM prescaler unit of the present invention to be reused to process the full range of data.

[0103] The cube root calculation device based on a pre-scaled lookup table proposed in this invention includes:

[0104] Range detection and address generation module: used to determine the sub-range index based on the input data. and the offset index within the interval And concatenate them to generate the storage address ;

[0105] Pre-scaled BRAM memory cells: used for storage The prescaled lookup table for each sub-interval stores the scaling factor of the corresponding sub-interval in advance, so that the output data does not require post-processing multiplication.

[0106] Pipeline register set: used to connect the range detection and address generation module and the pre-scaled BRAM memory unit to achieve full pipelined processing.

[0107] like Figure 2 As shown, this embodiment, designed for high-precision embedded computing requirements, selects the following key design parameters:

[0108] Input / output format: Input Using the Q2.22 fixed-point format, output The Q1.23 format is used to ensure sufficient calculation accuracy.

[0109] Range decomposition parameters: Set the number of sub-intervals to decompose. Initial index offset This allows the hardware to directly handle a wide range of inputs. .

[0110] Lookup table size: The number of sampling points is set for each sub-interval. That is, the index bit width .here The selection is based on error boundary constraints, ensuring that the maximum approximation error is better than the quantization error. The total number of system storage entries is... Each entry is 24 bits long and occupies only 18Kb of BRAM resources.

[0111] The overall architecture adopts a fully pipelined design, with data path width and control logic instantiated based on the aforementioned parameters. The architecture mainly consists of three cascaded functional modules: a range detection unit, an address generation unit, and a pre-scaled BRAM storage unit.

[0112] 1. Data path and pipeline level

[0113] like Figure 3 and Figure 4 As shown, the data path is divided into four stages (Stage 0 - Stage 3), with a total delay of 3 clock cycles.

[0114] Stage 0: Combinational Logic Computation

[0115] This stage completes all necessary address preprocessing, excluding registers. Q2.22 format input data. The range detection unit and the bit extraction unit are entered in parallel.

[0116] Range detection: based on the formula By detecting input data The most significant bit (MSB) is used to determine the range index. The specific logic is implemented as a priority encoder: if but ;like but ;otherwise .

[0117] Bit extraction: Offset index within the interval The calculation is simplified to a bit extraction operation. This is performed using a multiplexer (MUX) based on the range index. Select different bit segments for input. At that time, extract ;when At that time, extract .

[0118] Finally, a 2-bit range index With 7-bit offset index A 9-bit BRAM physical address is formed by bit concatenation. .

[0119] Stage 1:

[0120] Address storage:

[0121] The calculated 9-bit address A is latched into the pipeline register on the rising edge of the clock. This register effectively isolates the combinational logic path from the BRAM setup time requirements, optimizing timing performance.

[0122] Stage 2:

[0123] BRAM Read: Pre-computed data is stored in the FPGA's on-chip BRAM. The BRAM is configured in 384×24-bit mode, and a single 18Kb BRAM can hold the entire lookup table.

[0124] Storage mapping: The address space is divided into three ranges. Range 0 is mapped to addresses 0-127; Range 1 is mapped to addresses 128-255; and Range 2 is mapped to addresses 256-383.

[0125] Read operation: The BRAM uses synchronous read mode, reading data in Q1.23 format. It is valid in the next clock cycle and is latched into the data register.

[0126] Stage 3:

[0127] Output registers:

[0128] The final cube root calculation result is latched to the output port to ensure the signal integrity of the output signal and facilitate the timing convergence of subsequent modules.

[0129] 2. Prescaled lookup table contents

[0130] Contents stored in BRAM It is a fixed-point quantized value that pre-integrates the shift scaling factor according to the formula. For the first... The first interval Each entry stores a value of:

[0131] ;

[0132] in To output the number of decimal places.

[0133] Table 2 shows a comparison of the existing methods and the method of the present invention in terms of the table content:

[0134]

[0135] Table 2

[0136] The pre-scaling lookup table construction method completely eliminates the hardware consumption caused by scaling operations; compared with existing methods, the pre-scaling technology will reduce the scaling operation latency by 1 level; the tables of the three intervals are merged and stored in one BRAM, without wasting the BRAM resources in the FPGA.

[0137] 3. Implementation Results

[0138] The implementation results on a Xilinx Kintex-7 FPGA (xc7k420tffg1156-2L) show that the architecture of this invention consumes only 7 LUTs, 36 flip-flops and 0.5 BRAM (18Kb) to achieve a fixed 3-clock-cycle delay.

[0139] Table 3 provides a comprehensive comparison between the present invention and existing methods:

[0140]

[0141] Table 3

[0142] The experimental results of this invention show a maximum relative error of 0.13% and an effective precision of 9.9 bits. This design achieves a throughput of 87.9 MOPS and a high energy efficiency ratio of 3.66 GOPS / W while providing approximately 10 bits of effective precision, providing an extremely efficient computing core for embedded systems with stringent requirements for deterministic latency.

[0143] It should be noted that the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention in any other way. Any modifications or equivalent changes made based on the technical essence of the present invention shall still fall within the scope of protection claimed by the present invention.

Claims

1. A cube root calculation method based on a pre-scaled lookup table, characterized in that, Includes the following steps: S1. Divide the input domain into Given three non-overlapping subintervals, define each subinterval... ,in , As a benchmark index; S2, for each subinterval Independently build prescaled lookup table Each entry in the prescaled lookup table directly stores the final cube root fixed-point integer value that incorporates the range output scaling factor: ； in To output the decimal places, For the first The first sub-interval The physical values ​​of each sampling point; S3. Determine the index of the sub-interval to which it belongs based on the input value. and the offset index within the interval ; S4. Based on sub-interval index and the offset index within the interval Generate the storage address, and then you can retrieve it from the pre-scaled lookup table. The cube root result is directly read and output.

2. The cube root calculation method based on a pre-scaling lookup table according to claim 1, characterized in that, In step S1, the input domain coverage range is The corresponding parameter configuration is: benchmark index. Number of subintervals .

3. The cube root calculation method based on a pre-scaling lookup table according to claim 1, characterized in that, In step S2, Sub-intervals The prescaled lookup tables are stored contiguously in the same storage block, the first... The entries of each sub-interval are mapped to the address space. storage address .

4. The cube root calculation method based on a pre-scaling lookup table according to claim 1, characterized in that, In step S2, a midpoint sampling strategy is used to determine the physical value of each sampling point: ； in For the first The lower bound of each sub-interval, The interval width, The number of sampling points for each sub-interval. For index bit width, .

5. The cube root calculation method based on a pre-scaling lookup table according to claim 1, characterized in that, In step S3, The sub-interval index is determined by detecting the position of the most significant bit of the input fixed-point integer. ,in The weight index is used as the reference position, and the offset index within the interval is obtained through bit extraction. .

6. The cube root calculation method based on a pre-scaling lookup table according to claim 1, characterized in that, Step S3 also includes handling arbitrary floating-point inputs. Parameter reduction is performed as follows: S31, By analyzing the input index Perform modulo 3 decomposition: ,in Map the input to the valid mantissa within the coverage area. ; S32. Calculate using the pre-scaled lookup table ; S33. Adjust the output of the table lookup results by index: This enables the calculation of the cube root of floating-point numbers across the entire dynamic range.

7. A cube root calculation device based on a pre-scaled lookup table, characterized in that, include: Range detection and address generation module: used to determine the sub-range index based on the input data. and the offset index within the interval And concatenate them to generate the storage address ; Pre-scaled BRAM memory cells: used for storage The prescaled lookup table for each sub-interval stores the scaling factor of the corresponding sub-interval in advance, so that the output data does not require post-processing multiplication. Pipeline register set: used to connect the range detection and address generation module and the pre-scaled BRAM memory unit to achieve full pipelined processing.

8. The cube root calculation device based on a pre-scaled lookup table according to claim 7, characterized in that, The total delay of the device is fixed at 3 clock cycles, and the throughput is equal to the clock frequency.

9. The cube root calculation device based on a pre-scaled lookup table according to claim 7, characterized in that, The pre-scaled BRAM storage unit is configured as a single FPGA on-chip BRAM, with input in Q2.22 format and output in Q1.23 format.

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