Gradient piezoelectric buffer layer, preparation method and solid-state battery
By constructing a three-layer structure of piezoelectric buffer layer-ion conduction layer-piezoelectric composite electrolyte, the inverse piezoelectric effect of piezoelectric materials is used to dynamically compensate for electrode volume changes, solving the volume mismatch and lithium dendrite problems at the electrode-electrolyte interface in solid-state batteries. This achieves high energy density and excellent cycle stability, supporting the industrialization of solid-state batteries.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- GEM CO LTD
- Filing Date
- 2026-02-26
- Publication Date
- 2026-05-05
AI Technical Summary
Existing solid-state batteries suffer from volume mismatch stress, increased interfacial impedance, and the risk of lithium dendrite penetration at the electrode-electrolyte interface, leading to interface failure and poor cycle stability. Existing buffering strategies cannot effectively solve these problems.
A three-layer structure consisting of a piezoelectric buffer layer, an ion-conducting layer, and a piezoelectric composite electrolyte is constructed. The inverse piezoelectric effect of the piezoelectric material is used to dynamically compensate for changes in electrode volume, thereby achieving stress regulation and ion transport.
Significantly reduces interface impedance, improves cycle stability, supports the industrialization of high energy density solid-state batteries, and achieves an energy density of ≥400Wh/kg and excellent capacity retention at normal and low temperatures.
Smart Images

Figure SMS_1
Abstract
Description
Technical Field
[0001] This invention belongs to the field of battery technology, and relates to a solid-state battery, particularly to a gradient piezoelectric buffer layer, its preparation method, and the solid-state battery. Background Technology
[0002] Lithium-ion batteries, as the mainstream energy storage technology, have been widely used in consumer electronics, electric vehicles and energy storage. However, traditional liquid lithium batteries have safety hazards such as electrolyte leakage and thermal runaway, and their energy density is close to the theoretical limit. Solid-state batteries use non-flammable solid electrolytes, and theoretically their energy density can reach more than 500Wh / kg. They also have advantages such as wide temperature range operation and ultra-long cycle life, and are recognized as the core direction of the next generation of energy storage technology.
[0003] The core bottleneck currently facing the industrialization of solid-state batteries lies in electrode-electrolyte interface failure, specifically manifested in two ways: First, volume mismatch stress, with high-nickel cathodes exhibiting a volume expansion rate as high as 6%~8% at 4.3V charging, while rigid solid electrolytes such as LLZO have a volume expansion rate of <0.5%, leading to microcracks at the interface; second, a dramatic increase in interfacial impedance, with interfacial contact losses after charge-discharge cycles causing the impedance to drop from the initial 50Ω·cm. 2 Increased to 200Ω·cm 2 The above points highlight three main risks: First, lithium dendrite penetration, where stress concentration on the negative electrode side induces dendrite growth, shortening battery life. The elastic binder used in CN119253079A only provides passive buffering and cannot dynamically respond to voltage changes; furthermore, its addition exceeding 3% reduces ionic conductivity. While the in-situ polymerized interface layer used in CN117525633A improves wettability, it cannot solve the stress accumulation problem. CN116706064A uses ionic / electronic dual-phase fillers, which, although improving transport kinetics, cannot suppress interface delamination caused by cyclic stress accumulation.
[0004] Therefore, it is necessary to overcome the limitations of existing technologies and develop innovative strategies that can synergistically solve mechanical mismatch, dynamic interface degradation, and dendrite suppression, so as to achieve long-term stability of mechanical-electrochemical performance and promote the commercial application of all-solid-state batteries. Summary of the Invention
[0005] To address the shortcomings of existing technologies, this invention aims to provide a gradient piezoelectric buffer layer, its preparation method, and a solid-state battery. This invention constructs a three-layer structure consisting of a piezoelectric buffer layer, an ion-conducting layer, and a piezoelectric composite electrolyte. It utilizes the inverse piezoelectric effect of piezoelectric materials to dynamically compensate for electrode volume changes, simultaneously achieving stress regulation and ion transport. Compared to traditional passive buffering strategies, this invention reduces interfacial impedance and significantly improves cycle stability, providing technical support for the industrialization of high-energy-density (≥400Wh / kg) solid-state batteries.
[0006] To achieve this objective, the present invention adopts the following technical solution:
[0007] In a first aspect, the present invention provides a gradient piezoelectric buffer layer, the gradient piezoelectric buffer layer comprising a bismuth sodium titanate nanoparticle coating layer, a lithium phosphate ion conduction layer and a PVDF-ZnO composite electrolyte layer stacked together.
[0008] The raw materials for preparing the sodium bismuth titanate nanoparticle coating include sodium source, bismuth source, titanium source, mineralizer, and ternary cathode material.
[0009] This invention constructs a three-layer structure consisting of a piezoelectric buffer layer, an ion-conducting layer, and a piezoelectric composite electrolyte. It utilizes the inverse piezoelectric effect of the piezoelectric material to dynamically compensate for electrode volume changes, simultaneously achieving stress regulation and ion transport. Compared to traditional passive buffering strategies, this invention reduces interfacial impedance and significantly improves cycle stability, providing technical support for the industrialization of high-energy-density (≥400Wh / kg) solid-state batteries.
[0010] In some embodiments of the present invention, the thickness of the sodium bismuth titanate nanoparticle coating layer is 20nm to 60nm, for example, it can be 20nm, 25nm, 30nm, 35nm, 40nm, 45nm, 50nm, 55nm or 60nm, but is not limited to the listed values, and other unlisted values within the range are also applicable.
[0011] In some embodiments of the present invention, the thickness of the lithium phosphate ion conductive layer is 20nm to 40nm, for example, it can be 20nm, 25nm, 30nm, 35nm or 40nm, but is not limited to the listed values. Other unlisted values within the range are also applicable.
[0012] In some embodiments of the present invention, the thickness of the PVDF-ZnO composite electrolyte layer is 40nm~60nm, for example, it can be 40nm, 45nm, 50nm, 55nm or 60nm, but is not limited to the listed values. Other unlisted values within the range are also applicable.
[0013] In some embodiments of the present invention, the molar ratio of sodium in the sodium source, bismuth in the bismuth source, and titanium in the titanium source is 0.5:0.5:1.
[0014] This invention achieves a precise sodium titanate ratio by maintaining a molar ratio of sodium in a sodium source, bismuth in a bismuth source, and titanium in a titanium source of 0.5:0.5:1, thus obtaining Na 0.5 Bi 0.5 TiO3. Understandably, there may be some deviations in actual operation, so the molar ratio is not strictly defined as 0.5:0.5:1.
[0015] Optionally, the sodium source may be sodium nitrate.
[0016] Optionally, the bismuth source may be bismuth pentahydrate.
[0017] Optionally, the titanium source may be tetrabutyl titanate.
[0018] Optionally, the mineralizing agent can be a high-concentration sodium hydroxide solution with a concentration of 8 mol / L to 12 mol / L, for example, 8 mol / L, 9 mol / L, 10 mol / L, 11 mol / L or 12 mol / L, but not limited to the listed values. Other unlisted values within the range are also applicable.
[0019] In some embodiments of the present invention, the raw materials for preparing the PVDF-ZnO composite electrolyte layer include PVDF, ZnO, and LiTFSI.
[0020] Optionally, the ZnO is ZnO nanowires.
[0021] Optionally, the average diameter of the ZnO nanowires can be 30nm to 60nm, for example, 30nm, 35nm, 40nm, 45nm, 50nm, 55nm or 60nm, but is not limited to the listed values. Other unlisted values within the range are also applicable.
[0022] Optionally, the average length of the ZnO nanowire is 0.8 μm to 1.2 μm, for example, it can be 0.8 μm, 0.9 μm, 1 μm, 1.1 μm or 1.2 μm, but is not limited to the listed values. Other unlisted values within the range are also applicable.
[0023] Secondly, the present invention provides a method for preparing a gradient piezoelectric buffer layer, the method comprising the following steps:
[0024] (1) The calculated amounts of bismuth source and sodium source are dissolved together in a mixed solvent containing ethanol and acetic acid. Under strong stirring, titanium source and ternary cathode material are added slowly in sequence to obtain a precursor slurry. A mineralizing agent solution is slowly added to the precursor slurry to carry out a hydrothermal reaction, so that sodium bismuth titanate is uniformly nucleated and grown into nanoparticles on the surface of the ternary cathode material. After the reaction, the mixture is naturally cooled to room temperature. After the product is thoroughly washed and dried, it is annealed in a protective atmosphere to obtain sodium bismuth titanate nanoparticle coated material. The sodium bismuth titanate nanoparticle coated material is made into a slurry and coated on the surface of aluminum foil to obtain a sodium bismuth titanate nanoparticle coated layer.
[0025] (2) Surface magnetron sputtered lithium phosphate conductive layer of bismuth titanate sodium nanoparticle coating;
[0026] (3) A PVDF-ZnO composite electrolyte layer is disposed on the surface of the lithium phosphate ion conducting layer to obtain the gradient piezoelectric buffer layer described in the first aspect.
[0027] In some embodiments of the present invention, the volume ratio of ethanol to acetic acid in step (1) is 1:(1~3), for example, it can be 1:1, 1:2 or 1:3, but is not limited to the listed values. Other unlisted values within the range are also applicable.
[0028] In some embodiments of the present invention, the particle size D50 of the ternary cathode material in step (1) is 3μm to 8μm, for example, it can be 3μm, 4μm, 5μm, 6μm, 7μm or 8μm, but is not limited to the listed values. Other unlisted values within the range are also applicable.
[0029] In some embodiments of the present invention, the ternary cathode material in the precursor slurry of step (1) is 15wt% to 25wt%, for example, it can be 15wt%, 16wt%, 18wt%, 20wt%, 21wt%, 24wt% or 25wt%, but is not limited to the listed values. Other unlisted values within the range are also applicable.
[0030] In some embodiments of the present invention, the ternary cathode material includes NCM811.
[0031] In some embodiments of the present invention, the temperature of the hydrothermal reaction in step (1) is 140°C to 180°C, for example, it can be 140°C, 150°C, 160°C, 170°C or 180°C, but is not limited to the listed values. Other unlisted values within the range are also applicable.
[0032] In some embodiments of the present invention, the hydrothermal reaction time in step (1) is 6h to 18h, for example, it can be 6h, 8h, 10h, 12h, 14h, 16h or 18h, but is not limited to the listed values. Other unlisted values within the range are also applicable.
[0033] In some embodiments of the present invention, during the hydrothermal reaction in step (1), stirring is performed at 500 rpm to 1000 rpm, for example, 500 rpm, 600 rpm, 700 rpm, 800 rpm, 900 rpm or 1000 rpm, but not limited to the listed values. Other unlisted values within the range are also applicable.
[0034] In some embodiments of the present invention, after the hydrothermal reaction in step (1), the product is washed alternately with deionized water and ethanol until neutral, and then dried at 60°C to 80°C for 12 to 18 hours.
[0035] The drying temperature is 60℃~80℃, for example, it can be 60℃, 65℃, 70℃, 75℃ or 80℃, but is not limited to the listed values. Other unlisted values within the range are also applicable.
[0036] The drying time is 12h to 18h, for example, it can be 12h, 13h, 14h, 15h, 16h or 18h, but is not limited to the listed values. Other unlisted values within the range are also applicable.
[0037] In some embodiments of the present invention, the annealing temperature in step (1) is 500°C to 650°C, for example, it can be 500°C, 530°C, 560°C, 590°C, 620°C or 650°C, but is not limited to the listed values. Other unlisted values within the range are also applicable.
[0038] In some embodiments of the present invention, the heat preservation time of the annealing treatment in step (1) is 2h to 5h, for example, it can be 2h, 2.5h, 3h, 3.5h, 4h, 4.5h or 5h, but is not limited to the listed values. Other unlisted values within the range are also applicable.
[0039] In some embodiments of the present invention, the bismuth titanate sodium nanoparticle coating material is prepared into a slurry and coated onto the surface of aluminum foil, comprising: mixing PVDF binder, carbon nanotubes and bismuth titanate sodium nanoparticle coating material to obtain a slurry; coating the slurry onto the surface of aluminum foil to obtain an areal density of 18 mg / cm³. 2 ~22mg / cm 2 The compacted density is 3.2 g / cm³. 3 ~3.4g / cm 3 The sodium bismuth titanate nanoparticle coating layer.
[0040] The mass ratio of PVDF binder, carbon nanotubes and sodium bismuth titanate nanoparticles can be 5:3:92.
[0041] In some embodiments of the present invention, the substrate temperature during magnetron sputtering in step (2) is 90°C to 110°C, for example, it can be 90°C, 95°C, 100°C, 105°C or 110°C, but is not limited to the listed values. Other unlisted values within the range are also applicable.
[0042] In some embodiments of the present invention, the deposition rate of magnetron sputtering in step (2) is 1 nm / min to 1.5 nm / min, for example, it can be 1 nm / min, 1.1 nm / min, 1.2 nm / min, 1.3 nm / min, 1.4 nm / min or 1.5 nm / min, but is not limited to the listed values. Other unlisted values within the range are also applicable.
[0043] In some embodiments of the present invention, the method of setting the PVDF-ZnO composite electrolyte layer in step (3) includes: dissolving PVDF, ZnO and LiTFSI in a solvent to form a uniform slurry, then casting it into a film and vacuum drying it to obtain the PVDF-ZnO composite electrolyte layer.
[0044] In some embodiments of the present invention, the PVDF content in the homogeneous slurry is 10wt% to 15wt%, for example, it can be 10wt%, 11wt%, 12wt%, 13wt%, 14wt% or 15wt%, but is not limited to the listed values. Other unlisted values within the range are also applicable.
[0045] In some embodiments of the present invention, the ZnO content in the homogeneous slurry is 12wt% to 18wt%, for example, it can be 12wt%, 13wt%, 14wt%, 15wt%, 16wt% or 18wt%, but is not limited to the listed values. Other unlisted values within the range are also applicable.
[0046] In some embodiments of the present invention, the content of LiTFSI in the homogeneous slurry is 5wt% to 10wt%, for example, it can be 5wt%, 6wt%, 8wt%, 9wt% or 10wt%, but is not limited to the listed values. Other unlisted values within the range are also applicable.
[0047] In some embodiments of the present invention, the solvent in the homogeneous slurry is N,N-dimethylformamide (DMF).
[0048] Thirdly, the present invention provides a solid-state battery, the solid-state battery comprising the gradient piezoelectric buffer layer described in the first aspect, or comprising the gradient piezoelectric buffer layer prepared by the preparation method described in the second aspect.
[0049] In some embodiments of the present invention, the solid-state battery includes stacked aluminum foil, the gradient piezoelectric buffer layer described in the first aspect, and lithium foil; the sodium titanate nanoparticle coating layer of the gradient piezoelectric buffer layer described in the first aspect is close to the aluminum foil, and the PVDF-ZnO composite electrolyte layer is close to the lithium foil.
[0050] In some embodiments of the present invention, the method for preparing the solid-state battery includes: stacking aluminum foil, a gradient piezoelectric buffer layer and a lithium foil layer, hot-pressing and then encapsulating them to obtain a solid-state battery.
[0051] Optionally, the hot pressing pressure can be 280MPa~320MPa, the temperature can be 70℃~90℃, and the time can be 8min~12min.
[0052] In some embodiments of the present invention, the substrate for preparing the gradient piezoelectric buffer layer is an aluminum foil. In this case, the method for preparing the solid-state battery includes: stacking an aluminum foil with a gradient piezoelectric buffer layer on a lithium foil, with the gradient piezoelectric buffer layer disposed on the side close to the lithium foil, and then encapsulating it after hot pressing to obtain a solid-state battery.
[0053] The numerical range described in this invention includes not only the point values listed above, but also any point values within the numerical ranges not listed above. Due to space limitations and for the sake of brevity, this invention will not exhaustively list all the specific point values included in the range.
[0054] Compared with the prior art, the present invention has the following beneficial effects:
[0055] This invention constructs a three-layer structure consisting of a piezoelectric buffer layer, an ion-conducting layer, and a piezoelectric composite electrolyte. It utilizes the inverse piezoelectric effect of the piezoelectric material to dynamically compensate for electrode volume changes, simultaneously achieving stress regulation and ion transport. Compared to traditional passive buffering strategies, this invention reduces interfacial impedance and significantly improves cycle stability, providing technical support for the industrialization of high-energy-density (≥400Wh / kg) solid-state batteries. Detailed Implementation
[0056] The technical solution of the present invention will be further illustrated below through specific embodiments. Those skilled in the art should understand that the embodiments described are merely illustrative of the present invention and should not be construed as limiting the invention in any way.
[0057] The "range" disclosed in this invention can be defined in the form of a lower limit and an upper limit. A given range is defined by selecting a lower limit and an upper limit, which define the boundaries of the specific range. This type of range definition can include or exclude endpoints; any endpoint can be independently included or excluded, and they can be arbitrarily combined, meaning any lower limit can be combined with any upper limit to form a range. For example, if ranges of 60~120 and 80~110 are listed for specific parameters, it is understood that ranges of 60~110 and 80~120 are also expected. Furthermore, if minimum range values 1 and 2 are listed, and maximum range values 3, 4, and 5 are also listed, then the following ranges are all expected: 1~3, 1~4, 1~5, 2~3, 2~4, and 2~5. In this invention, unless otherwise stated, the numerical range "a~b" represents a shortened representation of any combination of real numbers between a and b, where a and b are real numbers. For example, the numerical range "0~5" indicates that all real numbers between "0" and "5" have been listed in this article; "0~5" is simply a shortened representation of these numerical combinations. Furthermore, when a parameter is described as an integer ≥2, it is equivalent to listing integers such as 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, etc. For instance, when a parameter is described as an integer selected from "2~10", it is equivalent to listing the integers 2, 3, 4, 5, 6, 7, 8, 9, and 10.
[0058] In this invention, "a combination of at least two" refers to a quantity greater than or equal to two, unless otherwise specified. For example, "any combination of one or at least two" means one or more or more items. It can be understood that when referring to "a combination of at least two," it refers to any suitable combination of multiple items, that is, a combination of "at least two" items carried out in a manner that does not conflict with and enables the implementation of this invention.
[0059] Unless otherwise specified, all embodiments and optional embodiments of the present invention can be combined with each other to form new technical solutions.
[0060] The term "embodiment" as used in this invention means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment or implementation of the invention. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a mutually exclusive, independent, or alternative embodiment. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described in this invention can be combined with other embodiments.
[0061] Those skilled in the art will understand that the order in which the steps are written in the methods of the various embodiments does not imply a strict execution order. The detailed execution order of each step should be determined by its function and possible internal logic. Unless otherwise specified, all steps of the present invention may be performed sequentially or randomly, but are preferably performed sequentially. For example, if the method includes steps (a) and (b), it means that the method may include steps (a) and (b) performed sequentially, or it may include steps (b) and (a) performed sequentially. For example, the method may also include step (c), meaning that step (c) can be added to the method in any order. For example, the method may include steps (a), (b), and (c), or it may include steps (a), (c), and (b), or it may include steps (c), (a), and (b), etc.
[0062] In this invention, open-ended technical features or solutions described using terms such as "comprising" do not exclude additional members beyond those listed unless otherwise specified. They can be considered as providing both closed-ended features or solutions comprised of the listed members and open-ended features or solutions that include additional members beyond the listed members. For example, A includes a1, a2, and a3. Unless otherwise specified, it may also include other members or exclude additional members. This can be considered as providing both technical features or solutions where "A is composed of a1, a2, and a3" or "A is selected from a1, a2, and a3," and technical features or solutions where "A includes not only a1, a2, and a3, but also other members."
[0063] In this invention, unless otherwise specified, the features or solutions corresponding to "and / or" include any one of two or more of the related listed items, as well as any and all combinations of the related listed items. These arbitrary and all combinations include any two related listed items, any more related listed items, or a combination of all related listed items. For example, "A and / or B" represents a group consisting of A, B, and "a combination of A and B". "Containing A and / or B" can mean "containing A, containing B, and containing A and B", or "containing A, containing B, or containing A and B", and can be appropriately understood according to the context.
[0064] In this invention, the terms "first aspect," "second aspect," "third aspect," "fourth aspect," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or quantity, nor should they be construed as implicitly indicating the importance or quantity of the indicated technical features. Moreover, "first," "second," "third," "fourth," etc., serve only as a non-exhaustive enumeration and should be understood not to constitute a closed limitation on the quantity.
[0065] In this invention, "optional" means that something is optional, that is, it refers to any one of the two parallel solutions of "having" or "not having". If there are multiple "optional" options in a technical solution, unless otherwise specified, and there are no contradictions or mutual constraints, then each "optional" option is independent.
[0066] In this invention, "room temperature" generally refers to 4℃~35℃, and can refer to 20℃±5℃. In some embodiments of this invention, room temperature refers to 20℃~30℃, preferably 25℃.
[0067] Example 1
[0068] This embodiment provides a gradient piezoelectric buffer layer, comprising a bismuth sodium titanate nanoparticle coating layer, a lithium phosphate ion conduction layer, and a PVDF-ZnO composite electrolyte layer stacked together.
[0069] The thickness of the sodium bismuth titanate nanoparticle coating layer is 40 nm, the thickness of the lithium phosphate ion conductive layer is 30 nm, and the thickness of the PVDF-ZnO composite electrolyte layer is 50 nm.
[0070] The method for preparing the gradient piezoelectric buffer layer in this embodiment includes:
[0071] (1) Take 0.8235g of bismuth nitrate pentahydrate, 0.1443g of sodium nitrate and 1.1546g of tetrabutyl titanate according to the molar ratio of 0.5:0.5:1. First, dissolve bismuth nitrate hydrate and sodium nitrate together in 60mL of a mixed solvent containing ethanol and acetic acid (volume ratio 1:2). Under strong stirring, slowly add tetrabutyl titanate and 10g of ternary cathode material NCM811 with a particle size D50 of 5μm. After fully dissolving, a well dispersed precursor slurry is obtained.
[0072] 20 mL of a 10 mol / L sodium hydroxide solution was slowly added to the precursor slurry. The mixture was then subjected to a hydrothermal reaction at 160 °C for 12 h with stirring at 750 rpm, allowing sodium bismuth titanate nanoparticles to uniformly nucleate and grow on the surface of the ternary cathode material. After the reaction, the mixture was naturally cooled to room temperature. The product was washed alternately with deionized water and ethanol until neutral, and then dried at 70 °C for 15 h. Finally, it was annealed in a nitrogen atmosphere at a temperature increased to 600 °C at 5 °C / min for 4 h to obtain sodium bismuth titanate nanoparticle-coated NCM811 cathode material.
[0073] A slurry was prepared by coating NCM811 cathode material with a mixture of PVDF binder, carbon nanotubes, and sodium bismuth titanate nanoparticles at a mass ratio of 5:3:92. This slurry was then coated onto a 50 μm thick aluminum foil to obtain an areal density of 20 mg / cm³. 2 The compacted density is 3.3 g / cm³. 3 Bismuth sodium titanate nanoparticle coating;
[0074] (2) Surface magnetron sputtered lithium phosphate conductive layer of bismuth titanate sodium nanoparticle coating;
[0075] Magnetron sputtering was performed using a lithium phosphate target at a base vacuum of 5 × 10⁻⁶. -4 Pa, working gas is Ar, power is 200W, substrate temperature is 100℃, and deposition rate is 1.2nm / min;
[0076] (3) A PVDF-ZnO composite electrolyte layer is disposed on the surface of the lithium phosphate ion conducting layer to obtain a gradient piezoelectric buffer layer;
[0077] The method for setting the PVDF-ZnO composite electrolyte layer includes: dissolving PVDF (Mw=534000), ZnO nanowires (average diameter 50nm, average length 1μm) and LiTFSI (molar ratio EO:Li=15:1) in DMF to form a uniform slurry; stirring at 500rpm at 60℃ for 24h; then casting the slurry with a doctor blade gap of 100μm; and vacuum drying at 60℃ for 48h to obtain the PVDF-ZnO composite electrolyte layer.
[0078] The homogeneous slurry contains 12 wt% PVDF, 15 wt% ZnO nanowires, and 8 wt% LiTFSI.
[0079] Example 2
[0080] This embodiment provides a gradient piezoelectric buffer layer, comprising a bismuth sodium titanate nanoparticle coating layer, a lithium phosphate ion conduction layer, and a PVDF-ZnO composite electrolyte layer stacked together.
[0081] The thickness of the sodium bismuth titanate nanoparticle coating layer is 20 nm, the thickness of the lithium phosphate ion conductive layer is 20 nm, and the thickness of the PVDF-ZnO composite electrolyte layer is 40 nm.
[0082] The method for preparing the gradient piezoelectric buffer layer in this embodiment includes:
[0083] (1) Take 0.4118g of bismuth nitrate pentahydrate, 0.0722g of sodium nitrate and 0.5773g of tetrabutyl titanate according to the molar ratio of 0.5:0.5:1. First, dissolve bismuth nitrate hydrate and sodium nitrate together in 60mL of a mixed solvent containing ethanol and acetic acid (volume ratio 1:1). Under strong stirring, slowly add tetrabutyl titanate and 10g of ternary cathode material NCM811 with a particle size D50 of 3μm. After full dissolution, a well dispersed precursor slurry is obtained.
[0084] 20 mL of an 8 mol / L sodium hydroxide solution was slowly added to the precursor slurry. The mixture was then subjected to a hydrothermal reaction at 140 °C for 6 hours with stirring at 500 rpm, allowing sodium bismuth titanate nanoparticles to uniformly nucleate and grow on the surface of the ternary cathode material. After the reaction, the mixture was allowed to cool naturally to room temperature. The product was washed alternately with deionized water and ethanol until neutral, and then dried at 60 °C for 12 hours. Finally, it was annealed in a nitrogen atmosphere at a rate of 5 °C / min to 500 °C for 2 hours to obtain sodium bismuth titanate nanoparticle-coated NCM811 cathode material.
[0085] (2) Surface magnetron sputtered lithium phosphate conductive layer of bismuth titanate sodium nanoparticle coating;
[0086] Magnetron sputtering was performed using a lithium phosphate target at a base vacuum of 5 × 10⁻⁶. -4 Pa, working gas is Ar, power is 200W, substrate temperature is 90℃, deposition rate is 1nm / min;
[0087] (3) A PVDF-ZnO composite electrolyte layer is disposed on the surface of the lithium phosphate ion conducting layer to obtain a gradient piezoelectric buffer layer;
[0088] The method for setting the PVDF-ZnO composite electrolyte layer includes: dissolving PVDF (Mw=534000), ZnO nanowires (average diameter 45nm, average length 0.8μm) and LiTFSI (molar ratio EO:Li=15:1) in DMF to form a uniform slurry; stirring at 500rpm at 60℃ for 24h; then casting the slurry with a 100μm doctor blade gap; and vacuum drying at 60℃ for 48h to obtain the PVDF-ZnO composite electrolyte layer.
[0089] The homogeneous slurry contains 10 wt% PVDF, 12 wt% ZnO nanowires, and 5 wt% LiTFSI.
[0090] Example 3
[0091] This embodiment provides a gradient piezoelectric buffer layer, comprising a bismuth sodium titanate nanoparticle coating layer, a lithium phosphate ion conduction layer, and a PVDF-ZnO composite electrolyte layer stacked together.
[0092] The thickness of the sodium bismuth titanate nanoparticle coating layer is 60 nm, the thickness of the lithium phosphate ion conductive layer is 40 nm, and the thickness of the PVDF-ZnO composite electrolyte layer is 60 nm.
[0093] The method for preparing the gradient piezoelectric buffer layer in this embodiment includes:
[0094] (1) Take 1.2353g of bismuth nitrate pentahydrate, 0.2165g of sodium nitrate and 1.7319g of tetrabutyl titanate according to the molar ratio of 0.5:0.5:1. First, dissolve bismuth nitrate hydrate and sodium nitrate together in 60mL of a mixed solvent containing ethanol and acetic acid (volume ratio 1:3). Under strong stirring, slowly add tetrabutyl titanate and 10g of ternary cathode material NCM811 with a particle size D50 of 8μm. After fully dissolving, a well dispersed precursor slurry is obtained.
[0095] 20 mL of a 12 mol / L sodium hydroxide solution was slowly added to the precursor slurry. Under stirring at 1000 rpm, a hydrothermal reaction was carried out at 180 °C for 18 h, allowing sodium bismuth titanate nanoparticles to uniformly nucleate and grow on the surface of the ternary cathode material. After the reaction, the mixture was naturally cooled to room temperature. The product was washed alternately with deionized water and ethanol until neutral, and then dried at 80 °C for 18 h. Finally, under a nitrogen atmosphere, the mixture was annealed at 650 °C for 5 h at a rate of 5 °C / min to obtain sodium bismuth titanate nanoparticle-coated NCM811 cathode material.
[0096] A slurry was prepared by coating NCM811 cathode material with a mixture of PVDF binder, carbon nanotubes, and sodium bismuth titanate nanoparticles at a mass ratio of 5:3:92. This slurry was then coated onto a 50 μm thick aluminum foil to obtain an areal density of 20 mg / cm³. 2 The compacted density is 3.3 g / cm³. 3 Bismuth sodium titanate nanoparticle coating;
[0097] (2) Surface magnetron sputtered lithium phosphate conductive layer of bismuth titanate sodium nanoparticle coating;
[0098] Magnetron sputtering was performed using a lithium phosphate target at a base vacuum of 5 × 10⁻⁶. -4 Pa, working gas is Ar, power is 200W, substrate temperature is 110℃, and deposition rate is 1.5nm / min;
[0099] (3) A PVDF-ZnO composite electrolyte layer is disposed on the surface of the lithium phosphate ion conducting layer to obtain a gradient piezoelectric buffer layer;
[0100] The method for setting the PVDF-ZnO composite electrolyte layer includes: dissolving PVDF (Mw=534000), ZnO nanowires (average diameter 55nm, average length 1.2μm) and LiTFSI (molar ratio EO:Li=15:1) in DMF to form a uniform slurry; stirring at 500rpm at 60℃ for 24h; then casting the slurry with a 100μm doctor blade gap; and vacuum drying at 60℃ for 48h to obtain the PVDF-ZnO composite electrolyte layer.
[0101] The homogeneous slurry contains 15 wt% PVDF, 18 wt% ZnO nanowires, and 10 wt% LiTFSI.
[0102] Example 4
[0103] This embodiment provides a gradient piezoelectric buffer layer, which is the same as in Example 1 except that the thickness of the sodium bismuth titanate nanoparticle coating layer is 10 nm.
[0104] Example 5
[0105] This embodiment provides a gradient piezoelectric buffer layer, which is the same as in Example 1 except that the thickness of the sodium bismuth titanate nanoparticle coating layer is 80 nm.
[0106] Example 6
[0107] This embodiment provides a gradient piezoelectric buffer layer, which is the same as that in Embodiment 1 except that the thickness of the lithium phosphate ion conductive layer is 10 nm.
[0108] Example 7
[0109] This embodiment provides a gradient piezoelectric buffer layer, which is the same as that in Embodiment 1 except that the thickness of the lithium phosphate ion conductive layer is 50 nm.
[0110] Example 8
[0111] This embodiment provides a gradient piezoelectric buffer layer, which is the same as in Embodiment 1 except that the thickness of the PVDF-ZnO composite electrolyte layer is 20 nm.
[0112] Example 9
[0113] This embodiment provides a gradient piezoelectric buffer layer, which is the same as in Embodiment 1 except that the thickness of the PVDF-ZnO composite electrolyte layer is 80 nm.
[0114] Example 10
[0115] This embodiment provides a gradient piezoelectric buffer layer, which is the same as that in Embodiment 1 except that the substrate temperature during magnetron sputtering is 60°C.
[0116] Example 11
[0117] This embodiment provides a gradient piezoelectric buffer layer, which is the same as that in Embodiment 1 except that the substrate temperature during magnetron sputtering is 150°C.
[0118] Example 12
[0119] This embodiment provides a gradient piezoelectric buffer layer, which is the same as that in Example 1 except that the content of ZnO nanowires in the uniform slurry is 10wt%.
[0120] Example 13
[0121] This embodiment provides a gradient piezoelectric buffer layer, which is the same as that in Example 1 except that the content of ZnO nanowires in the uniform slurry is 20wt%.
[0122] Comparative Example 1
[0123] This invention provides a gradient piezoelectric buffer layer, which is identical to Example 1 except that it is not coated with sodium bismuth titanate nanoparticles.
[0124] Comparative Example 2
[0125] The present invention provides a gradient piezoelectric buffer layer, which is the same as that in Example 1 except that a lithium phosphate ion conduction layer is not provided.
[0126] Comparative Example 3
[0127] The present invention provides a gradient piezoelectric buffer layer, which is the same as that in Example 1 except that the PVDF-ZnO composite electrolyte layer is not provided.
[0128] Comparative Example 4
[0129] This invention provides a gradient piezoelectric buffer layer, which is the same as in Example 1 except that it does not have sodium bismuth titanate nanoparticle coating, lithium phosphate ion conduction layer and PVDF-ZnO composite electrolyte layer, but directly uses NCM811 cathode material.
[0130] Performance Characterization
[0131] To prepare a solid-state battery, since a 50 μm thick aluminum foil was already used when preparing the gradient piezoelectric buffer layer, the gradient piezoelectric buffer layers provided in the above examples and comparative examples were stacked with a 50 μm thick lithium foil, with the gradient piezoelectric buffer layer placed on the side close to the lithium foil. After hot pressing at 300 MPa and 80°C for 10 min, the battery was encapsulated to obtain a solid-state battery.
[0132] A charge-discharge test system was used to activate the device twice in the 3V~4.6V range at a rate of 0.05C, and then cycle it 500 times at a rate of 1C. The discharge capacity of the first and 500th cycles was recorded. The percentage of the discharge capacity of the 500th cycle to the discharge capacity of the first cycle was taken as the room temperature cycle capacity retention rate.
[0133] In addition, the assembled solid-state battery was placed in a -40℃ constant temperature chamber for 2 hours and cycled 300 times at a 0.5C rate in the range of 3V~4.6V. The discharge capacity of the first and 300th cycles was recorded. The percentage of the discharge capacity of the 300th cycle to the discharge capacity of the first cycle was used as the low-temperature cycle capacity retention rate.
[0134] The electrochemical impedance spectroscopy (EIS) of the solid-state battery was tested using an electrochemical workstation at a frequency band of 10 GHz. -2 The EIS spectrum of the activated solid-state battery was measured at Hz with an amplitude of 5mV. The interface impedance was obtained by fitting the equivalent circuit.
[0135] Weigh the solid-state battery; discharge it at 25℃ and 0.1C rate to 3V under constant current, record the discharge capacity and average operating voltage, calculate the total energy, and then the ratio of total energy to weight is the energy density.
[0136] Table 1
[0137]
[0138] As can be seen from Examples 1 to 3 in the table, the three-layer structure of piezoelectric buffer layer-ion conduction layer-piezoelectric composite electrolyte provided by the present invention can enable solid-state batteries to achieve a high energy density of ≥400Wh / kg, while achieving low interfacial impedance and excellent capacity retention at normal and low temperatures, thus meeting the industrial application requirements of high energy density solid-state batteries.
[0139] A comparison of Examples 4 and 5 with Example 1 shows that the thickness of the sodium bismuth titanate nanoparticle protective layer needs to be controlled within a reasonable range. When the protective layer thickness is too low, it cannot completely cover the electrode, making it difficult to fully utilize the inverse piezoelectric effect to buffer the volume changes of the electrode during cycling, resulting in an increase in interfacial impedance. When the protective layer thickness is too high, it increases the path length of ion transport, reduces ion migration efficiency, and consequently causes a decrease in battery energy density and cycle performance.
[0140] A comparison of Examples 6 and 7 with Example 1 shows that the thickness of the lithium phosphate ion conduction layer needs to be controlled within a reasonable range. When the thickness of the conduction layer is too low, there are insufficient ion conduction sites, which cannot provide sufficient channels for lithium ion migration, resulting in increased interface impedance. When the thickness of the conduction layer is too high, it will increase the lithium ion transport resistance, reduce the ion transport rate, and ultimately cause a decrease in battery energy density and cycle capacity retention.
[0141] A comparison of Examples 8 and 9 with Example 1 shows that the thickness of the PVDF-ZnO composite electrolyte layer needs to be maintained within a suitable range. When the thickness of the composite electrolyte layer is too low, the mechanical strength of the electrolyte membrane is insufficient, and it is prone to damage during cycling, which will disrupt the interface stability and lead to deterioration of cycle performance. When the thickness of the composite electrolyte layer is too high, it will increase the interface contact resistance, hinder the interface transport of lithium ions, and cause the battery energy density to decrease and the interface impedance to increase.
[0142] A comparison of Examples 10, 11 and Example 1 shows that when the sputtering temperature is too low, the film quality of sodium bismuth titanate nanoparticles is poor, the coating layer is uneven and the bonding force with the substrate is weak, and it cannot effectively play a stress buffering role. When the sputtering temperature is too high, it will cause the crystal structure of the piezoelectric material to be distorted, weakening its inverse piezoelectric effect. At the same time, it may destroy the microstructure of the ion conduction layer, seriously affecting the ion transport and stress regulation capabilities of the battery.
[0143] A comparison of Examples 12 and 13 with Example 1 shows that the ZnO nanowire content in the PVDF-ZnO composite electrolyte layer needs to be controlled within a reasonable range. When the ZnO nanowire content is too low, the piezoelectric effect of the composite electrolyte is weak, making it difficult to dynamically compensate for the volume change of the electrode and effectively control the interfacial stress. When the ZnO nanowire content is too high, it will disrupt the continuity of the PVDF matrix, hinder the transport of lithium ions in the electrolyte, and cause an increase in interfacial impedance and a decrease in cycle performance.
[0144] As can be seen from the comparison between Comparative Example 1 and Example 1, the coating of sodium bismuth titanate nanoparticles is an important condition for reducing interfacial impedance and improving cycle stability. Without this coating layer, the volume change of the electrode during cycling cannot be effectively buffered, and cracks and side reactions are prone to occur at the interface, resulting in a decrease in battery energy density, a sharp increase in interfacial impedance, and a significant reduction in cycle capacity retention.
[0145] As can be seen from the comparison between Comparative Example 2 and Example 1, when the lithium phosphate ion conductive layer is not provided, the transport path of lithium ions in the interface and bulk phase is blocked, and the ion migration efficiency drops significantly. This not only reduces the energy density of the battery, but also exacerbates the interface polarization, leading to a deterioration in cycle performance.
[0146] As can be seen from the comparison between Comparative Example 3 and Example 1, the PVDF-ZnO composite electrolyte layer has the dual functions of stress regulation and ion conduction. Without the PVDF-ZnO composite electrolyte layer, it is impossible to dynamically compensate for the change in electrode volume by means of the piezoelectric effect, nor can it provide an efficient transport channel for lithium ions, which makes the overall performance of the battery significantly worse.
[0147] As can be seen from the comparison between Comparative Example 4 and Example 1, the three-layer structure of piezoelectric buffer layer-ion conduction layer-piezoelectric composite electrolyte needs to work together to achieve synchronous optimization of stress regulation and ion transport. When the three-layer structure is completely missing and NCM811 cathode material is used directly, the battery cannot alleviate the interface damage caused by the change in electrode cycling volume, nor can it guarantee the efficient transport of lithium ions. In the end, it exhibits the lowest energy density, the highest interface impedance and the worst cycle performance.
[0148] In summary, this invention constructs a three-layer structure of a piezoelectric buffer layer, an ion-conducting layer, and a piezoelectric composite electrolyte. It utilizes the inverse piezoelectric effect of the piezoelectric material to dynamically compensate for electrode volume changes, simultaneously achieving stress regulation and ion transport. Compared to traditional passive buffering strategies, this invention reduces interfacial impedance and significantly improves cycle stability, providing technical support for the industrialization of high-energy-density (≥400Wh / kg) solid-state batteries. In the preferred embodiment of the solid-state battery provided by this invention, the interfacial impedance is <38Ω·cm. 2 The capacity retention rate is ≥93% after 500 cycles at 1C rate, and the capacity retention rate is ≥85% at -40℃. The energy density is above 400Wh / Kg.
[0149] The applicant declares that the above description is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Those skilled in the art should understand that any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention fall within the protection and disclosure scope of the present invention.
Claims
1. A gradient piezoelectric buffer layer, characterized in that, The gradient piezoelectric buffer layer includes a layered bismuth titanate sodium nanoparticle coating layer, a lithium phosphate ion conduction layer, and a PVDF-ZnO composite electrolyte layer. The raw materials for preparing the sodium bismuth titanate nanoparticle coating include sodium source, bismuth source, titanium source, mineralizer, and ternary cathode material.
2. The gradient piezoelectric buffer layer according to claim 1, characterized in that, The thickness of the sodium bismuth titanate nanoparticle coating layer is 20 nm to 60 nm. And / or, the thickness of the lithium phosphate ion conductive layer is 20nm~40nm; And / or, the thickness of the PVDF-ZnO composite electrolyte layer is 40nm~60nm.
3. The gradient piezoelectric buffer layer according to claim 1 or 2, characterized in that, The molar ratio of sodium in the sodium source, bismuth in the bismuth source, and titanium in the titanium source is 0.5:0.5:
1. And / or, the raw materials for preparing the PVDF-ZnO composite electrolyte layer include PVDF, ZnO, and LiTFSI.
4. A method for preparing a gradient piezoelectric buffer layer, characterized in that, The preparation method includes the following steps: (1) The calculated amounts of bismuth source and sodium source are dissolved together in a mixed solvent containing ethanol and acetic acid. Under strong stirring, titanium source and ternary cathode material are added slowly in sequence to obtain a precursor slurry. A mineralizing agent solution is slowly added to the precursor slurry to carry out a hydrothermal reaction, so that sodium bismuth titanate is uniformly nucleated and grown into nanoparticles on the surface of the ternary cathode material. After the reaction, the mixture is naturally cooled to room temperature. After the product is thoroughly washed and dried, it is annealed in a protective atmosphere to obtain sodium bismuth titanate nanoparticle coated material. The sodium bismuth titanate nanoparticle coated material is made into a slurry and coated on the surface of aluminum foil to obtain a sodium bismuth titanate nanoparticle coated layer. (2) Surface magnetron sputtered lithium phosphate conductive layer of bismuth titanate sodium nanoparticle coating; (3) A PVDF-ZnO composite electrolyte layer is disposed on the surface of the lithium phosphate ion conducting layer to obtain the gradient piezoelectric buffer layer as described in any one of claims 1 to 3.
5. The preparation method according to claim 4, characterized in that, The volume ratio of ethanol to acetic acid in step (1) is 1:(1~3); And / or, the particle size D50 of the ternary cathode material in step (1) is 3μm~8μm; And / or, in the precursor slurry of step (1), the mass percentage of ternary cathode material is 15wt%~25wt%.
6. The preparation method according to claim 4 or 5, characterized in that, The temperature of the hydrothermal reaction in step (1) is 140℃~180℃; And / or, the hydrothermal reaction time in step (1) is 6h~18h; And / or, during the hydrothermal reaction described in step (1), stirring is performed at 500 rpm to 1000 rpm; And / or, after the hydrothermal reaction described in step (1), the product is washed alternately with deionized water and ethanol until neutral, and then dried at 60℃~80℃ for 12h~18h; And / or, the annealing temperature in step (1) is 500℃~650℃; And / or, the holding time for the annealing treatment in step (1) is 2h~5h.
7. The preparation method according to any one of claims 4 to 6, characterized in that, The substrate temperature during magnetron sputtering in step (2) is 90℃~110℃; And / or, the deposition rate of the magnetron sputtering in step (2) is 1 nm / min to 1.5 nm / min.
8. The preparation method according to any one of claims 4 to 7, characterized in that, The method for setting the PVDF-ZnO composite electrolyte layer in step (3) includes: dissolving PVDF, ZnO and LiTFSI in a solvent to form a uniform slurry, then casting it into a film and vacuum drying it to obtain the PVDF-ZnO composite electrolyte layer.
9. The preparation method according to claim 8, characterized in that, The PVDF content in the homogeneous slurry is 10wt%~15wt%; And / or, the ZnO content in the homogeneous slurry is 12wt%~18wt%; And / or, the LiTFSI content in the homogeneous slurry is 5wt%~10wt%; And / or, the solvent in the homogeneous slurry is DMF.
10. A solid-state battery, characterized in that, The solid-state battery includes the gradient piezoelectric buffer layer according to any one of claims 1 to 3, or includes the gradient piezoelectric buffer layer prepared by the preparation method according to any one of claims 4 to 9.
Citation Information
Patent Citations
Positive electrode conductive filler, solid-state battery positive electrode, solid-state battery and preparation method of solid-state battery
CN116706064A
Solid-state battery interface optimization structure and preparation method
CN117525633A
Preparation method of all-solid-state battery
CN119253079A